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L29:Lower Power Embedded Architecture Design
성균관대학교 조 준 동 교수 , 1999. 8
http://vada.skku.ac.kr
Low Power MPU
Levels for Low Power Design
System
Algorithm
Architecture
Circuit/Logic
Technology
Hardware-software partitioning,
Complexity, Concurrency, Locality,
Parallelism, Pipelining, Signal correlations
Sizing, Logic Style, Logic Design
Threshold Reduction, Scaling, Advanced packaging
Possible Power Savings at Different Design LevelsLevel of
Abstraction Expected Saving
Algorithm
Architecture
Logic Level
Layout Level
Device Level
10 - 100 times
10 - 90%
20 - 40%
10 - 30%
10 - 30%
Regularity, Data representation
Instruction set selection, Data rep.
SOI
Power down
Present- Day Digital Systems
• Current systems are complex and heterogenous Contain many different types of components– Programmable and Re-configurable processors– Application- specific integrated circuits (ASICs)– Application-specific Instruction processor (ASIP)– Read- Only Memory (ROM) and RAM– I/ O devices and circuitry
• Typically designed from a (large) software specification
• These heterogenous systems are called embedded systems
Embedded System Characteristics
• Limited user programmability– Completely transparent to user, e. g.
automotive engine control– Limited user interface e. g., intelligent
telephones– Programmable through application
specific language e.g., postscript printer
• Real- time response No batch processing
Embedded Systems: Products - 1
Computer Relatedpersonal digital
assistantprinterdisc drivemultimedia
subsystemgraphics
subsystemgraphics terminal
Communicationscellular phonevideo phonefaxmodemsPBX
Consumer ElectronicsHDTVCD playervideo gamevideo tape recorderprogrammable TVcameramusic system
Embedded Systems: Products - 2
• Control Systems– Automotive:engine, ignition, brake system– Manufacturing process control: robotics– Remote control: satellite control, spacecraft control– Other mechanical control: elevator control
• Office Equipment– smart copier, printer, smart typewriter, calculator– point- of- sale equipment, credit- card validator,UPC code rea
der, cash register
• Medical Applications: instruments( EKG, EEG), scanning, imaging
Problem Domain Shift
Embedded System Trends - I
• Microcomponents grow in importance in IC industry due to their reusability: DSP, P, C
• More embedded systems will require ASICs– From 20- 70% in 1992 to 60- 70% in 1996
Moral of the story: u-P are joining with high- speed highly-complex ASIC in embedded systems
Embedded System Trends - II
• Embedded systems will require more application software– Average moves from 16- 64k lines in 1992 to
64k-512k in 1996– Requires migration from assembler to C/ C++,
implying requirement for automatic compilation– From 40- 70% of programmers versus ASIC
designers in 1992 to 60- 90% in 1996
Moral of the story: Increase in code- size / code- complexityis causing a migration to C/ C++ from assembly coding
Embedded Software Optimization
• Code size becomes an important objective Software will eventually become a part of the chip:– Need to generate the best possible code– Can afford longer compilation time
• Need not only traditional optimization techniques, but also new application- domain-specific optimizations (e. g., DSP and microcontroller architectures)
Implementing Digital Systems
What is an ASIP?
• Application- Specific Instruction Processor
• Processor architecture tailored not just for application domain (e. g., DSP, microcontrollers), but for specific sets of applications (e. g., audio, engine control)
• ASIP characteristics– Greater design cost (processor + compiler)– + Higher performance, lower power than commercial cores, m
ore flexibility than ASIC
ASIP Design
• Given a set of applications, determine architecture of ASIP (i. e., configuration of functional units in datapaths, instruction set)
• To accurately evaluate performance of processor on a given application need to compile the application program onto the processor datapath and simulate object code
• However, the architecture of the processor is a design parameter!
Processor Design Flow
Required Compiler Optimizations
• Machine independent optimizations– Parallelizing transformations (lots of them!) Common subexpression
elimination, Strength reduction, Code motion
• Machine dependent optimizations– Loop unrolling and software pipelining– Static allocation (non- recursive procedure calls)– Storage layout (arrays, scalars)– Optimization of mode setting instructions Instruction selection, scheduling, and register allocation
Common Subexpression Elimination
Constant Propagation and Folding
Dead Code Elimination
Loop Invariant Code Motion
Array Access Strength Reduction