In-line, Non-destructive Electrical Metrology of NitridedSilicon Dioxide and High-k Gate Dielectric Layers

Robert J. Hillard^ P.Y. Hung*, William Chism*, C. Win Yef, William H.Rowland^ Louison C. Tan^ and Christine E. Kalnas1^

1* Solid State Measurements, Inc.110 Technology Dr.

Pittsburgh, PA 15275

^International Sematech Corp.(ISMT)Montopolis Dr.

Austin, TX

Abstract. Highly sensitive, accurate and precise methods for measuring the properties of dielectrics used in sub0.13 jam technology are required. It is particularly critical to monitor the electrical properties of the gate dielectric. Theelectrical properties of thin dielectrics are assessed with a new, non-contaminating, non-damaging elastic probe. Thisprobe forms a small diameter (-30 um to 50 um ) Elastic Metal gate (EM-gate) on the surface of a dielectric.Subsequent electrical measurements are made with advanced Capacitance-Voltage (CV), Conductance-Voltage (GV),and Current-Voltage (IV) techniques. Valuable and essential information about the dielectric thickness and quality,leakage current, Si-SiO2 interface quality, and channel carrier density profile is obtained.

INTRODUCTION

Current device technologies require the use of thinoxides and oxynitrides for active gate dielectrics thatare between 20 Angstroms and 30 Angstroms inthickness. Future technology nodes (0.10 jim andbelow) will require an Equivalent Oxide Thickness(EOT) that is between 15 Angstroms and 20Angstroms. Looking even further ahead to 0.05 |imtechnology, gate dielectrics will be required to have anEOT of 10 Angstroms and less (1). At this point,alternate, high dielectric constant (high-k) gatedielectrics will be used. These high-k dielectrics offerthe advantage of a high capacitance density (smallEOT) and low gate leakage currents due to the higherphysical thickness of these films.

The most important parameters determining deviceperformance for deep sub-micron (0.13 jum and lower)processes are the Equivalent Oxide Thickness (EOT)and Leakage Current (ILK)- These two parametersdominate the on-state and off-state MOS transistor

drive currents, respectively. It is also highly desirableto monitor other device related parameters such asinterface trap density (DIT), threshold voltage (VT),flatband voltage (VFB), channel threshold adjust PartialImplant Dose (PID) and surface dopant density(NSURF), and for alternate high-k dielectrics, CVhysteresis (AVFB).

Conventional capacitance-voltage (CV) techniquesrequire a polysilicon or metal gate Metal OxideSemiconductor Capacitor (MOSCAP). These requireadditional processing which is time-consuming.Furthermore, these conventional methods are highlyaffected by equivalent circuit effects introduced bylarge direct tunneling leakage currents, seriesresistance, and stray inductance influences, and bymaterial effects such as polysilicon depletion. It ishighly desirable to develop an accurate and repeatablemethod that is rapid, non-contaminating, andnon-damaging, allowing it to be used on productwafers. This method must be free from the equivalentcircuit errors that plague conventional CV

CP683, Characterization and Metrology for VLSI Technology: 2003 International Conference,edited by D. G. Seiler, A. C. Diebold, T. J. Shaffner, R. McDonald, S. Zollner, R. P. Khosla, and E. M. Secula

© 2003 American Institute of Physics 0-7354-0152-7/03/$20.00796

measurements on thin dielectrics. It is also importantthat the measurement technique has a high throughput.In the case of thin dielectrics, surface contaminantssuch as water and organics become adsorbed on thesurface of the dielectric over time and can influencethe measurements. Rapid measurement times reducethese absorption effects.

This paper discusses a new Elastic Metal gate (EM-gate) that allows for quick MOSCAP formation on avariety of dielectric and semiconductor surfaces.Subsequent CV, GV and IV measurements can bemade with this new elastic probe and informationobtained relative to the process and device parametersdiscussed earlier. EM-gate measurements can bemade on unpatterned wafers and in scribe line testareas on product wafers. Applications on nitridedoxides are emphasized, with some examples on high-kdielectrics.

DESCRIPTION OF ELASTIC METALGATE (EM-GATE)

EM-gate Basic Description

Drawings of several types of probes that are used toform the gate of a two-terminal MOSCAP are shownin Figure 1. These probes can be used to make CV,GV, and IV measurements.

m

FIGURE 1. Illustrations of MOSCAPs formed with a) apolysilicon gate, b) a mercury (Hg) Gate, and c) an EM-gate.

The polysilicon gate MOSCAP construction,formed with short loop processes, is similar to the finaldevice structure except that it takes considerable timeto form the gate for monitor wafers. In the case of testdevices at first metal, this process step is far from gateoxidation and therefore does not provide immediatefeedback to the process and development engineer.The mercury (Hg) gate MOSCAP shown in Figure Ibis highly useful for development and R&D MOSapplications (2), but is not appropriate for use on in-line monitoring of product wafers because of thepossible mercury contamination in fab. The elasticmetal gate shown in Figure Ic is non-contaminatingand non-damaging, and can be used on either productor monitor wafers. It is made with a semiconductor

compatible metal that deforms elastically to form asmall diameter contact to the surface of a dielectric orsemiconductor. The probe assembly is operated with acontrolled force and descent rate. The kinematicmounting is highly important to the non-damagingnature of the system and greatly enhances therepeatability and lifetime of the probe. The probeproperties, such as material, geometry, andpreparation, are crucial to the probe's performance. Itis critical that the probe is elastic, and thereforereversible, and is optimized in order to form a planar,intimate contact to the dielectric. The EM-gatesdescribed in this paper were prepared with aproprietary process in order to produce a stable,intimate, and non-damaging and non-contaminatingcontact. The nominal areas and diameters of the EM-gates are about 10~5 cm2 and 30 to 40 jum, respectively.

There are two types of elastic probes commerciallyavailable; type A is optimized for CV measurements,and types B or C optimized for IV measurements. TheCV probe is designed to have a metallic oxide to allowfor capacitance measurements down to 7 Angstroms.The IV probe is designed to allow large directtunneling currents to flow and is highly suitable forelectrical characterization of thin gate dielectrics.Each of these probes is described in the next section.

CV and IV Model

A schematic of two types of elastic probes is shownin Figure 2.

.jliil̂ r

a. b.

FIGURE 2. Schematic of two types of elastic probesused for electrical characterization. The type B or C probeused for IV measurements is shown in Figure 2a. The type Aelastic probe used for CV and GV measurements is shown inFigure 2b.

797

The type A probe shown in Figure 2b is used formaking CV measurements on thin dielectrics and ishighly robust against direct tunneling (DT) leakagecurrent due to the presence of the metallic oxide layeron the probe. This metallic oxide layer effectivelyincreases the injection barrier height, thereby loweringcarrier transmission and current transport.

The effectiveness of this metallic oxide layer inreducing DT leakage current is shown for thesimulated IV curves in Figure 3. An assumeddielectric constant of k = 1 was used. As seen inFigure 3, the current is significantly reduced as theinterface layer thickness increases.

EM-gate IV SimulationsInterface Barrier Dependence

Vg (V)

FIGURE 3. Simulated IV plots as a function of interfacelayer thickness. The existence of a controlled interface layerinhibits DT leakage current and allows for CV measurementson sub-10 Angstrom oxides and SiON.

Type A EM-gate probes have been used to measureCV data on SiO2 and SiON dielectrics as thin as 7Angstroms (3).

EM-gate IV measurements are sensitive in caseswhere DT currents dominate, that is, for oxides withthicknesses less than about 35 Angstroms. The type Band C probes are essentially DT sensing probes.

Other equivalent circuit effects, such as seriesresistance and stray inductance, that cause errors inconventional CV measurements have only minoreffects in EM-gate CV measurements. This isprimarily because the EM-gate effective area is small(~10~5 cm2). EM-gate CV data is affected only byseries resistances greater than 2 kQ. Similarly, largestray inductances (>50 |LiH) are required to inducenear-resonant frequency effects. SPICE simulationshave also confirmed these effects (5).

Several tests can be made to check for the influenceof equivalent circuit effects. The first test is to

determine the frequency dispersion associated withmultiple frequency CV measurements. This is the besttest and can detect dissipation factor, near-resonantfrequency errors at higher frequencies, and leakagecurrent effects at lower frequencies. An example of anEM-gate multiple frequency CV measurement madeon a thin high-k dielectric is shown in Figure 4.

20

15

O 10

EM-gate Multi-frequency Comparison____Thin High K HfO2_______Frequency Range: 5 KHz to 1 MHz

Note: HP-4284A Used

3.5 0.52.5 1.5Gate Voltage (V)

FIGURE 4. EM-gate multiple frequency CV measurementsmade on a thin HfO2 high-k dielectric. The absence of CVroll-off or vertical shifts in accumulation verifies that themeasurement is free from equivalent circuit effects within therange of frequencies, 5 KHz to 1.0 MHz.

The second test is the series-corrected capacitanceversus parallel capacitance at a given measurementfrequency (6). If the CV data are affected byequivalent circuit effects, the series-correctedcapacitance and parallel capacitance data inaccumulation will not agree.

Probe Calibration

The probe is calibrated for an effective contact areaand for the presence of a metallic oxide on the probetip. The parallel capacitance associated with the probeand cabling is determined and accounted for.

EM-gate CV and GV Curves

Schematics of EM-gate conventional CV and GVcurves are shown in Figures 5 and 6, respectively.

798

Capacitance

[Reverse CV]

[Forward CV]

Gate Voltage

FIGURE 5. Conventional forward and reverse CV curves.

EM-gate CV measurements are made by startingin accumulation and sweeping the voltage to deepdepletion as shown in Figure 5. After establishingequilibrium, a reverse CV curve is acquired. Thesecurves provide valuable information on CapacitiveEffective Thickness (CET), EOT, VFB, VT,cv, AVFB,and NSURF-

Conductance

Sensitive to LeakageAnd Series Resistance

Sensitive to InterfaceTrapDensity (D|T)_____

Series ResistanceCorrected G

Gate Voltage

FIGURE 6. Conventional parallel- and series-corrected GVcurves.

A description of an EM-gate forward GVmeasurement is shown in Figure 6. GV data inaccumulation are highly sensitive to series resistanceand leakage current (6) which represent the real, in-phase currents and voltages from the wafer under test.An additional conductance component comes from theinteraction of interface traps with the applied ac signal(7). From the peak series-resistance-correctedconductance, a DIT value can be obtained at a specificenergy. The energy value depends on the appliedfrequency and sample dopant density and is defined bythe DC gate bias at which the peak conductanceoccurs. The single frequency GV-based method formeasuring DIT cannot provide spectroscopicinformation about DIT versus energy. However, it is

rapid, repeatable, and highly sensitive to processingconditions and interface quality.

One concern with measuring thin dielectrics is theeffect of the measurement itself on the parametersbeing measured. It is well known that interface trapand oxide trapped charge densities can change withelectrical stress (7). EM-gate CV measurements canbe made under low stress conditions, therebysignificantly reducing both the electrical stress and thetime for the measurements.

Repeatability

Typical short term area repeatability obtainedfrom ten measurements made at the same site, raisingand lowering the probe before each measurement, isbetween 0.1% and 0.3% (one sigma). The typicalshort term repeatabilities obtained for carrier densityand VT adjust PID (Partial Implant Dose) are less than1.0% (one sigma); three-day repeatabilities for CETand VFB are 0.1 Angstroms and lOmV, respectively.An example of an EM-gate short term CETrepeatability test is shown in Figure 7. This test wasperformed by making 15 measurements in a localregion with a separation of 0.1 mm between specificmeasurement locations.

EM-gate Short Term Repeatability Test8 Angstrom SiON Wafer____

40

30

^5 20o

10

Mean = 9.83 Ang.Sigma = 0.051 Ang.

-1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4Gate Voltage (V)

-0.2

FIGURE 7. EM-gate short term CET repeatability testmade on a SiON wafer with an optical thickness (OTox) of8 Angstroms. The one sigma CET repeatability obtainedfrom this test was 0.051 Angstroms. These statistics arebased on 15 local measurements made 0.1 mm apart.

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Oxide (SiO2) and Nitrided Oxide(SiON) Applications

EM-gate CV, GV and IV measurements weremeasured on SiO2 and SiON dielectrics with opticalthicknesses in the range of 13 to 20 Angstroms. EM-gate CV curves acquired for SiON wafers with andwithout an anneal are shown in Figure 8.

EM-gate CV: SiON Dielectrics

c

Annealed

NotAnnealed

10

-2 -1.5 -0.5Vg(V)FIGURE 8. EM-gate CV curves obtained ondielectrics with and without an anneal.

SiON

The distortion in the un-annealed CV curves isdue to oxide trapping (8) and the effects of a high D]T.The EM-gate EOT values were in the 15 to 17Angstrom range on the annealed wafers. Theinfluence of the post-oxidation/nitridation anneal canbe clearly seen in Figure 8. The corresponding GVcurves obtained from the same CV sweep are shown inFigure 9. The significantly increased peaks in the un-annealed conductance curves are due to a highinterface trap density.

EM-gate GV: SiON Dielectrics

FIGURE 9. EM-gate GV curves obtained on SiONdielectrics that have been properly annealed and with noanneal.

Although EM-gate CV and GV measurements arehighly useful for characterizing the electrical thicknessof thin dielectrics and the interface quality, it is also

important to monitor the dielectric or gate leakage. Anexample of EM-gate IV measurements made on thinSiO2 and SiON dielectrics is shown in Figure 10.EM-gate IV measurements are highly sensitive toSiON and to direct tunneling currents. A plot ofmeasured leakage (50% cumulative probability) versusoptical thickness obtained from IV wafer maps isshown in Figure 11 for both the SiON and SiO2dielectrics. The observed sensitivities of about 3 to 4Angstrom/Decade are typical for EM-gate IV leakagecurrent measurements.

EM-gate IV Comparison

-10-2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 -0.0

Vg(V)FIGURE 10. EM-gate IV curves measured on thin SiO2gate dielectrics.

EM-gate Leakage Current50 % Cumulative Probability

1 .OOE-03 —————————————————————————

•y 1.00E-04

g- 1.00E-05

0)o>| 1.00E-07

10 15 20 2

*V» y=0.0388e°-6548x

/ ̂ "sXr —— R2 = 0.9975

y = 0.0269e°-6921x N^vR2 = 0.9988 N«

(3.33Ang./Decade) ^fc

Otox (Ang.)

• S• S

— E— E

iO2iONxpon. (SiO2)xpon. (SiON)

FIGURE 11. EM-gate IV 50% cumulative probabilityleakage current versus Optical Thickness (OTox) for SiO2and SiON dielectrics. Typical leakage current sensitivitiesof about 3 to 4 Angstroms/Decade are observed.

High-k Gate Dielectrics Applications

Application of the CV and IV measurements fromEM-gate on the characterization of high-k dielectricswas also explored. The best results are obtained onthose high-k dielectrics that have surface roughnessescomparable to good quality SiO2 or SiON films. Anexample of EM-gate CV measurements made on

800

HfSiOx dielectrics with optical thicknesses in the 40 to50 Angstrom range are shown in Figure 12.

-1Voltage (V)

0

FIGURE 12. EM-gate CV measurements on thin HfSiOxhigh-k dielectrics

An example of EM-gate CV measurements madeon ZrO2 high-k dielectrics is shown in Figure 13.

EM-gate CV ComparisonZrO2 High k Dielectrics

18

16

14

12

i10O 8

6

4

2

—— 200 A ZrO2: EOT = 44.7 A— • • • • 100AZrO2:EOT = 28.7A

— - 50AZrO2:EOT = 21.8A

1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0Gate Voltage (V)

FIGURE 13. EM-gate CV measurements made on ZrO2

high-k dielectrics.

High k dielectric EM-gate CV and IVmeasurements are still under development; the primaryissues that need to be better understood are thedependence of CV on surface roughness and theinfluence of surface aging.

Although applications to high-k dielectrics arestill under development, good sensitivity has beenobserved.

REFERENCES

(1) International TechnologySemiconductors: 2001 Edition.

Roadmap for

(2) B. Roberds and R. J. Hillard, Electrical Characterizationof Advanced Gate Dielectrics with Hg GateCapacitance-Voltage (CV) and Current-Voltage (IV),Electrochemical Society Proceedings Volume 99-16,pg. 385, The Electrochemical Society, Inc. (1999).

(3) SSM Applications Seminar, Yr. 2001.

(4) R. J. Hillard, R.G. Mazur, S. M. Ramey, W. H.Rowland, G. A. Gruber, R. Siergiej, and S. Evseev,Product Wafer Measurements of MOS Gate DielectricQuality with a Small Diameter Elastic Probe, AIPConference Proceedings, Characterization andMetrology for ULSI Technology, Vol. 550, 26-29, June2000.

(5) SSM Seminar 2003, to be published later this year.

(6) D.K.Schroder, Semiconductor Material and DeviceCharacterization, J. Wiley &Sons (1990).

(7) E.H. Nicollian and J.R. Brews, MOS (Metal OxideSemiconductor) Physics and Technology, J. Wiley andSons (1982).

(8) W.K. Chim and P.S. Lim, IEEE TED, Vol. 47, No. 2(2000), p. 473.

(9) CVC CV Analysis Software, J. Hauser, NCSU.

SUMMARY

FastGate™ CV, GV, and IV measurements havebeen demonstrated on a variety of SiO2, SiON, andhigh-k dielectric films. EM-gate CV measurementswere shown to be repeatable and highly sensitive togate dielectric EOT, nitrogen content, and oxide andinterface quality.

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