A power loss characterization method for semiconductor switching devices based on inverter-

level dc measurements Ke Zou and Chingchi Chen

Ford Motor Company Dearborn, MI

Abstract— This paper presents an inverter-level power loss measurement method for semiconductor switching devices in real inverter operation conditions. This method employs an H-bridge dc-dc convertor topology and a low-loss inductive load to improve the loss measurement accuracy. Since only dc measurement is involved, it is simpler and more accurate compared to traditional inverter-level loss measurement methods. Both switching and conduction loss can be estimated with this method. Experimental results on a traction-drive inverter show that, the difference between the estimated results with the proposed method and the results from traditional component-level methods is within 4% in the normal operation range of the inverter.

I. INTRODUCTION Power loss characterization of power switching devices is

one key task for inverter product design. Accurate power loss measurement can help to predict the inverter efficiency, facilitate cooling loop design and eventually save cost of the product.

Based on at which level power loss is measured, two types of power loss characterization methods exist: component-level methods and inverter-level methods. The component-level method is a bottom-up process, which involves measuring power loss of individual component at different operation conditions, and the inverter power loss is calculated by adding all component losses together. The inverter-level method is to calculate the inverter power loss by directly measuring the input and output power losses when the inverter is operating.

For the component-level method, traditionally curve tracers [1][2] are used for conduction loss measurement and double-pulse test method [3][4][5] is used for switching loss measurement. However, high power curve tracers, although have good accuracy, are usually expensive. Contrarily, the double pulse method can be easily implemented with modest cost, but its accuracy cannot be guaranteed unless extra effort been put on calibrating probes, adopting high bandwidth shunts, avoid ground loop and so on. It also should be noted that, since gate driver circuitry, capacitor and busbar can largely affect the switching loss, only by employing the same

components as the final product, the double-pulse results can be used to predict the inverter loss in real-world operation condition.

In the inverter level, the traditional power loss measurement method is to measure the input dc power and output ac power using power meters or other high-accuracy power measurement equipment. However, this method has severe problems. First, the measurement accuracy is affected by the required ac measurement and limited bandwidth of measurement equipment, especially for the measurement of the pulsing output voltage. Second, since the inverter usually operates with a high efficiency, its power loss is a small fraction of the measured input and output power. This makes it more difficult to get accurate power loss measurement using this method. Another drawback of the inverter-level method is that the measured loss is the lump-sum loss of all the components in the inverter, so detailed loss information of individual component such as the conduction loss or switching loss of the switching devices are not available.

In this paper, an inverter-level power loss characterization method based on dc measurement is presented. The proposed method is easy to implement and is more accurate compared to traditional inverter-level methods. Both conduction and switching loss can be accurately measured using this method.

II. TEST SETUP AND TEST METHOD A. Test Setup

The block diagram for the inverter-level loss measurement test setup is shown in Fig.1. The inverter in Fig. 1 is the inverter under test, which can be a single-phase inverter, a three-phase inverter or a dual inverter for hybrid electrical vehicle (HEV) applications. The inverter is configured to operate as an H-bridge dc-dc converter. The load should have high inductance for minimized output ripple current, as well as low dc and ac resistance to minimize the dc output power and ac power loss. The power meter is used to measure the power loss by measuring dc input power and dc output power of the inverter. Alternatively, if the power meter is not available, dc voltage and current meters with adequate accuracy can be

978-1-4799-2325-0/14/$31.00 ©2014 IEEE 1287

used. The chiller is necessary to control and maintain the power module junction temperature inside the inverter.

Figure 1. Inverter-level Loss Measurement Test Setup

Fig. 2 shows the circuit diagram of the test setup. Only two phase-legs of this three-phase inverter are used to build an H-bridge dc-dc converter, and the third phase leg is not used in this test. It is desired to choose two phase-legs that are closely

match each other, so that the loss of one phase leg can be approximately half of the total measured loss. Insulated gate bipolar transistors (IGBTs) are used here as the switching devices. The purpose of the input LC filter is to reduce the ripple from the dc power supply and to smooth the input current of the inverter, so the power meter can get accurate dc input current measurement results. The RC low-pass filter (Cfilter and Rfilter in Fig. 2) is added across the output legs and its cutoff frequency is set to be lower than 50 Hz to extract the dc component out of the PWM output voltage.

The loss of this H-bridge converter is calculated by subtracting the dc output power from the dc input power. To calculate dc input and output power, the dc values of the dc bus voltage Vin, input current Iin, output voltage Vout and output current Iout need to be measured. The location of the measurement points should be carefully chosen to avoid including losses from the components other than IGBTs, such as the dc link capacitor or dc bus bar. Table 1 shows the locations of the measurement points for all dc voltages and dc currents.

dc link cap

aLload

Iin

Iout

S1

D2 S4S2

S3D1

b

D4

D3

DC power source

Input capacitor

Iin measurement

point

Input inductor Iout

measurement point

Vin measurement

points

InverterInput filterDC source Load

P

N

Vout measurement

points

Rfilter Cfilter Rfilter

Figure 2. The circuit diagram for the test setup.

Table 1. The location of the dc voltages and dc currents measurement points Measurement Items Symbol Location of the Measurement Points

Input Voltage Vin On the P and N terminals of the DC-link capacitor

Input Current Iin On the cables between the input inductor and DC-link capacitor

Output Voltage Vout On the filter capacitor Cfilter. The filter resistors Rfilter should be connected directly

on the ac power terminals of IGBT modules. Output Current Iout On the ac output cables of the inverter

B. The Operation Principle of the Test Circuit The operation principle of the test circuit is illustrated by

the gating waveforms shown in Fig. 3. Switches S1 through S4 represent the four IGBTs used to build the H-bridge dc-dc converter shown in Fig.2. The upper and lower IGBT within one phase leg operate in complimentary mode, with a switching cycle of T and a dead band time defined as DB. The duty ratio of S1 and S3 are defined as dA and dB, respectively. To minimize the current ripples on the inductive load, the following relationship exists between dA and dB:

.1 BABA ddanddd >=+ (1) In Fig. 3, DΔ is defined as the duty ratio difference of the

two phase legs excluding the impact of the dead time: )./2( TDBddD BA −−=Δ (2)

In the proposed method, the load current Iout is adjusted to the desired value by changing DΔ . The higher the DΔ , the higher the dc load current.

There are eight operation intervals in Fig.3. Based on the states of the switching devices, the eight intervals can be

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categorized into five states. Fig. 4 shows the equivalent circuit and current flowing paths of the five states.

TD2

Δ TD2

Δ

Figure 3. The gating signals of S1-S4 and the waveforms of Vout and

Iout.

C. The Power Losses of the Test Circuit Table 2 shows the switching energy loss and conduction

power loss in the eight time intervals. In this table, it is assumed that the turn on and turn off energy of an IGBT is EIGBT_ON and EIGBT_OFF, respectively. The turn on and turn off energy of the diode is assumed to be is EDiode_ON and EDiode_OFF, respectively. VCE represents the collector-emitter voltage of the IGBT at a dc load current of Iout and VF represents the forward voltage drop of the diode with a current of Iout. The inductive load is represented by a resistor with a resistance of RL in series with an inductor with an inductance of L. The voltage across the resistor and inductor are assumed to be VR and VL, respectively.

Figure 4. The five operation states of the H-bridge converter.

Table 2. The switching energy loss and conduction power loss at different time intervals.

Interval Number

Switching action at the end of interval

Switching energy Current-carrying devices

Conduction power loss

Duration of Interval

VL

1 S1 turn on, D2 turn off EIGBT_ON +EDiode_OFF S4, D2 (VCE+VF)× Iout DB -(VCE+VF+VR)

2 S4 turn off, D3 turn on EIGBT_OFF +EDiode_ON S1, S4 2VCE× Iout (∆D/2)×T Vin-2VCE - VR

3 S3 turn on 0 ( Zero voltage turn on) S1, D3 (VCE+VF)× Iout DB -(VCE+VF+VR)

4 S3 turn off 0 ( Zero voltage turn off) S1, D3 (VCE+VF)× Iout dAT- 3DB-∆D×T -(VCE+VF+VR)

5 S4 turn on, D3 turn off EIGBT_ON +EDiode_OFF S1, D3 (VCE+VF)× Iout DB -(VCE+VF+VR)

6 S1 turn off, D2 turn on EIGBT_OFF +EDiode_ON S1, S4 2VCE× Iout (∆D/2)×T Vin-2VCE - VR

7 S2 turn on 0 ( Zero voltage turn on) S4, D2 (VCE+VF)× Iout DB -(VCE+VF+VR)

8 S2 turn off 0 ( Zero voltage turn off) S4, D2 (VCE+VF)× Iout dBT- DB -(VCE+VF+VR)

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From Table 2, the total switching energy in one switching cycle equals to:

).(2 ____ offdiodeondiodeoffIGBTonIGBTsw EEEEE +++×= (3) It can be seen that only at interval 2 and 6, the dc source

charges the inductor through two IGBTs S1 and S4, and the conduction power loss equals 2VCE×Iout. For other states, the inductor current is free-wheeling through one IGBT and one diode and the conduction power loss equals (VCE+VF)× Iout. As a result, the total conduction loss is:

.2)1()( DIVDIVVP OUTCEOUTFCEcond Δ+Δ−+= (4) Equation (4) can be rewritten as (5):

.)()( DIVVIVVP OUTFCEOUTFCEcond Δ−++= (5)

It should be noted that since DΔ is usually a small value, equation (5) implies that the total conduction loss of the dc-dc converter is approximately equals to the sum of the conduction loss of an IGBT and a diode which both carrying a continuous current of IOUT.

Table 2 also provides the voltage across the equivalent load inductor VL at different time intervals. At steady state, the following relationship can be established using the voltage balancing of the inductor in one switching cycle:

).1)(()2( DVVVVVVD RFCERCEin Δ−++=−−×Δ (6)

Assuming VCE<< Vin, VF<<Vin and 1<<ΔD , then

./)( inFCER VVVVD ++≈Δ (7)

Equation (7) provides an estimation of DΔ to achieve a load current of Iout. It should be noted that since the load resistance changes with the temperature, DΔ has to be manually adjusted to achieve accurate load current.

In this test, the inverter-level power loss is calculated by subtracting the measured dc output power from the measured dc input power.

,_ outoutininoutininverterloss IVIVPPP ×−×=−= (8) Equation (8) is valid only if the ac power loss associated

with the output current ripple is negligible. The peak-peak current ripple can be estimated by assuming 1<<ΔD . Under this assumption, the duration of this free-wheeling state is approximately half of a switching cycle, and the voltage applied on the equivalent load inductor is )( RFCE VVV ++ . Then the peak-peak current ripple on the load OUTIΔ can be calculated as:

.22

)(Lf

RIVVTL

VVVIsw

LOUTFCEswRFCEOUT

++=×++≈Δ (9)

To maintain the accuracy of the measurement results, OUTIΔ has to be kept much smaller than IOUT. In this paper, if

OUTIΔ is smaller than 3% of IOUT then the effect of the ac loss can be neglected.

The power loss associated with busbar and dc-link capacitor also need to be taken into consideration. The busbar power loss is mainly related with the resistance of the busbar connecting two power modules. The busbar power loss can be estimated as:

,2_ busbarOUTbusbarloss RIP = (10)

where busbarR is the dc resistance of the busbar connecting two power modules, including the contact resistance between the busbar and power module.

The power loss associated with the dc-link capacitor is estimated using

,2_ DRIP capOUTbusbarloss Δ×= (11)

where capR is the ESR of the capacitor at switching frequency. By assuming the ac power loss and the power loss

associated with busbar and dc-link capacitor are negligible, the measured inverter power loss Ploss equals to the sum of the switching loss and conduction loss of the power modules. In this case,

,swcondoutinloss PPPPP +=−= (12)

From (12), by measuring the dc input and output power of the inverter, the sum of condP and swP can be calculated. The total switching power loss of the two phase-legs Psw is the total switching energy loss in each cycle times the switching frequency:

,)(2 ____ swoffdiodeondiodeoffIGBTonIGBTsw fEEEEP ×+++×= (13) where fsw is the switching frequency.

Since swP is a linear function of switching frequency while condP is not, by conducting test at different switching frequencies, condP and swP can be separated.

III. EXPERIMENTAL RESULTS

A. Test setup The test setup employs a three-phase traction-drive

inverter from a mass-production hybrid electric vehicle. Out of the three phases, phase A and B are used to build the H-bridge converter. The stator of the electric motor of this vehicle is used as the inductive load. Table 3 listed the parameters of the test equipment and components. It should be noted that although the input dc power supply is capable of supplying 500A dc current, the maximum input current needed for the experiment is only 20A.

A Yokogawa WT1030 power meter is used to measure the input voltage and current, and the output voltage and current. A LEM IT 600-S current transducer is used for the output current measurement. The pulsing output voltage is filtered by a RC filter with a cutoff frequency of 20 Hz before sent to the power meter. Fig. 5 shows the picture of the test setup.

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Power supply for Inverter Controller

Power supply for Inverter Controller

Inverter

Figure.5. The experimental test setup.

Table 3. The parameters for test equipment and components

Equipment/component Parameters

Chiller Temperature capability: 5 ˚C ~80 ˚C

DC power source Voltage rating: 450V,

Current rating: 500A

Input filter capacitor Capacitance : 220 uF

Input filter inductor Inductance : 200 uH

Dc link capacitor Capacitance : 1100 uF,

ESR: 1 mOhm at 10 kHz

Inductive load Inductance : 200 uH,

Dc Resistance: 5 mΩ at 25 ˚C

Output voltage filter resistor Rfilter

Resistance: 10 kΩ

Output voltage filter capacitor Cfilter

Capacitance: 1 uF

B. The impact of the losses not associated with IGBTs To estimate the current ripple in this test setup, the

parameters listed in Table 3 are used. Also, since in this experiment the switching fsw is always higher than 5 kHz, equation (9) can be rewritten as: ).

2105.2( 3 CEF

OUTOUTVVII ++××≤Δ − (14)

The current ripple shown in (14) consists of two terms. The first term is 0.25% of the load current. The second term changes with the forward voltage of the diode and IGBT. For example, if at 300A VF+VCE is 4V, then the second term is 2A, which corresponding to 0.67% of the total current. On the other hand, if at 10A VF+VCE is 1.5V, then the second term is 0.75A, which corresponding to 7.5% of the load current. In this experiment, the minimum test current is 50A so the impact of the ac losses due to current ripple is neglected.

Since the ESR of the dc-link capacitor is only 1 mOhm at 10 kHz, its power loss is less than 0.1% of the measured inverter loss and it is neglected. The total dc resistance of the

busbar is around 200 uOhm, so its power loss is less than 1% of the inverter power loss. In this experiment, the busbar power loss is calculated based on the current value and deducted from the measured inverter loss as the measured IGBT loss.

C. Separation of conduction loss and switching loss To separate the conduction loss and the switching loss, the

inverter power loss values at different switching frequencies are plotted in one chart. A linear curve fitting process is performed on the loss data to get an equation with one constant term and one term (slope) that changes linearly with the switching frequency. The constant term is the measured conduction loss in Watts, and the slope is the measured switching energy of the two phase legs in Joule.

Fig.6 shows the process to separate the switching and conduction loss from the measured total loss. The inverter module is operated at three different frequencies: 5 kHz, 7.5 kHz and 10 kHz. The three measured loss values at different frequency are linearly curve fitted. The test results in Fig.6 show that, at 200V, 100A and 25°C junction temperature condition, the conduction loss is 246.14 W, and the switching loss of the two legs in one switching cycle is 14.9 mJ.

Figure 6. The example for switching and conduction loss

separation process.

396.79

359.74

321.35

y = 0.014x + 246.1

300.00

320.00

340.00

360.00

380.00

400.00

420.00

4000.00 6000.00 8000.00 10000.00

200V,100A, 25CPloss(W)

Freq(Hz)

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Please note that in order to make a fair comparison between the losses calculated with the proposed method and those measured with traditional component-level methods, the junction temperature at three different switching frequencies in Fig. 6 are kept the same by changing the coolant temperature.

D. Comparison with curve tracer and double-pulse test method To verify the accuracy of the proposed method, curve

tracer test and double pulse test have been done on the same type of IGBT as those in the inverter module. The junction temperature is also kept the same as that in the inverter-level test.

A ST5300 curve tracer with high current deck is used to measure VF and VCE. Equation (5) is used to calculate the conduction loss with curve tracer measurement results. The double pulse test setup employs the original gate driver, busbar, dc link capacitor as the inverter. Extensive calibration effort has been done on the current shunt, the voltage probes and the oscilloscope to ensure the test accuracy.

Table 4 and Table 5 show the comparison of the power loss measurement at 25°C junction temperature, 400V and 50A-200A test conditions. The difference between the proposed and traditional methods is within 3%. For a larger test range which covers the normal operation range of this inverter (200V-400V, 25A-300A, 25°C-125°C), the difference is within 4%.

Table 4. The comparison of conduction loss measurement

400V,25°C 50A 100A 200A

Curve tracer (W) 107.7 238.7 558.8

Proposed method (W) 108.3 240.8 569.6

Difference (%) 0.56 0.88 2.32

Table 5. The comparison of switching loss measurement

400V,25°C 50A 100A 200A

Double pulse (mJ) 8.16 15.56 30.90

Proposed method (mJ) 8.30 15.65 31.00

Difference (%) 1.71 0.58 0.32

IV. CONCLUSION This paper proposed a simple yet accurate method for

power device switching and conduction loss measurement.

With only dc measurement involved, simple circuit structure and operation strategy, it is suitable for rapid power loss characterization of inverter power modules. The experimental results prove that the estimation results of the proposed method matches the measurement results with traditional component-level methods, including curve tracer method and double-pulse test method.

REFERENCES

[1] Scientific test Inc, Curve tracer series 5000 semiconductor tester, 2012.

[2] Tektronics, “371B Programmable High Power Curve Tracer User Manual”.

[3] J. Lai, B. Song, R. Zhou, A. Hefner, D. Berning and C. Shen, “Characteristics and Utilization of a New Class of Low On- Resistance MOS-Gated Power Device,” IEEE Trans. On Industry Applications, vol. 37, no. 5, pp. 1282-1288, Sept./Oct. 2001.

[4] Z. Xu, M. Li, F.Wang, and Z. Liang, “Investigation of Si IGBT operation at 200°C for traction application,” IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2604–2615, May 2013.

[5] J. B. Witcher, “Methodology for switching characterization of power devices and modules”, 2002.

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