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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
Cover SheetCustom
1 48Monday, December 03, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Schematics Document
REV:0.2
2007-12-03
Mobile AMD S1G2 CPU with ATI RS780M(NB) & SB700(SB) core logic
Compal confidential
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
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E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
Block DiagramCustom
2 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Compal Confidential
Thermal SensorADM1032ARMZ
Fan conn
AMD S1G2 CPU638-PIN uFCPGA 638
Mini-Card*2
16X16
ATI RS780M
Power On/Off CKT.
LPC BUS
DC/DC Interface CKT.
Page 4, 5, 6, 7
Page 10, 11, 12, 13, 14
Page 8, 9
Page 19, 20, 21, 22, 23
Page 24
Page 24
SATA ODD Connector
Page 25
Page 19
RTC CKT.
ATI SB700
Power OK CKT.
Touch Pad CONN. Int.KBD
KBC
Realtek8102E(10/100M)
RJ45/11 CONN
PCI-E BUS*5
BANK 0, 1, 2, 3
LED
DDR2-SO-DIMM X2
SATA HDD Connector
SATA Master-1
SATA Slave
A-Link Express II4X PCI-E
Page 26
Page 26
14" UMA PA Only Page 24Multi-Bay HDD/ODD Option Connector
SATA Slave
SATA Master-2
Page 31
e-SATA Connector
Consumer AMD 14" UMA - Ripley (JBL20)
Page 17
Express CardPage 26
WLAN & WWAN
Page 28 Page 29
Page 31
Page 31
P41
Page 33
Page 33
Page 36
CRT
LVDS PanelInterface
Page 16
Codec_IDT9271B7Audio CKT AMP & Audio Jack
TPA6017A2
USB conn x2
USB2.0 X12
Azalia (HDA I/F)
BT Conn
Mini-Card WWAN
Page 6
Page 4
HDMIPage 18
Clock Generator SLG8SP626VTR
Page 15
72QFN
14" Only
ENE KB926
Page 34
P35
P35
Page 12
Side-Port DDR2 SDRAM256Mbits(16Mbx16)
DDR2 400MHz
Hyper Transport Link
Page 25
SPI ROMSST25VF080B
Page 32
Page 17
USB WebCam
Page 34
Consumer IR SPI
Docking CONN.*RJ-45(LED*2)*RJ-11(Pass Through)*CRT*COMPOSITE Video Out*S-VIDEO OUT*SPDIF*Headphone/Line Out L/R*Stereo Mic L/R*Volume Control*Consumer IR*USB x1*DC JACK
page 35daughter board
FingerPrinter AES1610USBx1
daughter board
daughter board
Page 35
DDR2 800MHz 1.8VDual Channel
Page 34MDC V1.5 daughter board
AccelerometerST LIS302DLTR
Page 30
Page 27
CardReaderJMicronJMB385-LGEZ0A
daughter board
Page 31USB conn x1
Page 27
CardReader Socket
A
A
B
B
C
C
D
D
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
Notes ListCustom
3 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Voltage Rails O MEANS ON X MEANS OFF
O
O
X
+0.9V
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+2.5VS
+CPU_CORE
OO
OO
X
X X
+VCCP
powerplane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.8V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground
: means Analog Ground
SERIAL SENSOR
SMB_EC_CK2
SOURCE
KB926
INVERTER BATT EEPROM
THERMAL
SODIMM CLK CHIP
SMBUS Control Table
MINI CARD
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
KB926
LCDADM1032
XX X X
X XX X
XXX X
XV V
V1 0 1 0 0 1 0 0A4
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX
DDR SO-DIMM 1
ADDRESS
DDR SO-DIMM 0
1 1 0 1 0 0 1 0
DEVICE
+VGA_CORE
+1.8VS
+0.9VGA
+1.2VS
HEX
98H
HEX
16H
EC SM Bus1 addressDevice
A0H 1010 000X b
Address Address
EC SM Bus2 addressDevice
1001 100X b0001 011X bSmart Battery24C16
CPU9AH 1001 101X bADI1032-2 CPU
L Layout Notes
Slot 2I / IICPU &
VI2C_CLK
I2C_DATARS780M X X X X X X X
V VSCL0
SDA0SB700 X X X X X
HDMI
XXX
DDC_CLK0
DDC_DATA0RS780M X X X X X
DDC_CLK1
DDC_DATA1RS780M X X X X X
X X X VX X X X
XX
XX XXSDA3 XSB700SCL3 XX
XX XXSDA1SB700
SCL1 XXX X V
X XXX XXSDA2 XSB700
SCL2 XXX X
Please see VGA@ as no install. No support RX780M.
12/03 update
G-Sensor
X
X
XXX
X
V
X
X
: Question Area Mark.(Wait check)
"*" as default BOM setting PA@ : means install when Ripley PA. PR@ : means install when Ripley PR. RM@ : means install when Rachman.*RP@ : means install when Ripley. SIDE@ : means install when SidePort support.*DOCK@ : means install when DOCK support.*CY@ : means install when Function Board-Cypress. ENE@ : means install when Function Board-ENE. @ : means just reserve , no build DEBUG@ : means just reserve for debug. 45@ : Install when 45 level Assy. D3E@ : means install when JMircon D3E support
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3H_CADIN2H_CADIP2
H_CADIP1
H_CADIN3H_CADIP4
H_CADIN5
H_CADIN4H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10H_CADIP10
H_CADIN11H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15H_CADIP15
H_CADIP13
H_CADON15
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
+VCC_FAN
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
+VLDT_B
H_CADON[0..15] <10>H_CADIN[0..15]<10>
H_CADOP[0..15] <10>
H_CLKIN0<10>
H_CLKIN1<10>H_CLKIP1<10>
H_CTLIN1<10>
H_CLKIP0<10>
H_CTLIP1<10> H_CTLOP1 <10>
H_CLKOP1 <10>
H_CADIP[0..15]<10>
H_CLKOP0 <10>H_CLKON0 <10>
H_CLKON1 <10>
H_CTLON1 <10>
H_CTLOP0 <10>H_CTLON0 <10>H_CTLIN0<10>
H_CTLIP0<10>
FAN_PWM<33>
+1.2V_HT
+1.2V_HT
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AMD CPU S1G2 HT I/FCustom
4 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
250 mil
VLDT=500mA
PWM Fan Control circuit
Athlon 64 S1Processor Socket
Near CPU Socket
VLDT CAP.
If VLDT is connected only on one side, one4.7uF cap should be added to the islandside.
9/20 SP07000DM00/SP07000EQ00
11/14 update
Change PCB Footprint fromACES_85204-02001_2P toACES_88231-02001_2P
D1CH751H-40PT_SOD323-2
21
C90.1U_0402_16V4Z
1
2
C30.22U_0603_16V4Z
1
2
C5180P_0402_50V8J
1
2
C6180P_0402_50V8J
1
2
C14.7U_0805_10V4Z
1
2
S
GD Q1
SI3456BDV-T1-E3_TSOP6
3
624
51
C8
4.7U_0805_10V4Z
1
2
C24.7U_0805_10V4Z
1
2
HT LINK
JCPUA
FOX_PZ6382A-284S-41F_GRIFFINCONN@
VLDT_A3D4 VLDT_A2D3 VLDT_A1D2 VLDT_A0D1
VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2
L0_CADIN_H15N5L0_CADIN_L15P5
L0_CADIN_H14M3L0_CADIN_L14M4
L0_CADIN_H13L5L0_CADIN_L13M5
L0_CADIN_H12K3L0_CADIN_L12K4
L0_CADIN_H11H3L0_CADIN_L11H4
L0_CADIN_H10G5L0_CADIN_L10H5
L0_CADIN_H9F3L0_CADIN_L9F4
L0_CADIN_H8E5L0_CADIN_L8F5
L0_CADIN_H7N3L0_CADIN_L7N2
L0_CADIN_H6L1L0_CADIN_L6M1
L0_CADIN_H5L3L0_CADIN_L5L2
L0_CADIN_H4J1L0_CADIN_L4K1
L0_CADIN_H3G1L0_CADIN_L3H1
L0_CADIN_H2G3L0_CADIN_L2G2
L0_CADIN_H1E1L0_CADIN_L1F1
L0_CADIN_H0E3L0_CADIN_L0E2
L0_CADOUT_H15 T4L0_CADOUT_L15 T3
L0_CADOUT_H14 V5L0_CADOUT_L14 U5
L0_CADOUT_H13 V4L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1L0_CADOUT_L7 R1
L0_CADOUT_H6 U2L0_CADOUT_L6 U3
L0_CADOUT_H5 V1L0_CADOUT_L5 U1
L0_CADOUT_H4 W2L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1L0_CADOUT_L0 AC1
L0_CLKIN_H1J5L0_CLKIN_L1K5
L0_CLKIN_H0J3L0_CLKIN_L0J2
L0_CTLIN_H1P3L0_CTLIN_L1P4
L0_CTLIN_H0N1L0_CTLIN_L0P1
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2L0_CTLOUT_L0 R3
D2
RLZ5.1B_LL34
@
12
C40.22U_0603_16V4Z
1
2
JP2
ACES_88231-02001CONN@
1122
GND3GND4
C7 4.7U_0805_10V4Z1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+MCH_REF
DDR_B_MA10
DDR_B_MA7
DDR_B_MA1
DDR_B_MA12
DDR_B_MA6
DDR_B_MA11
DDR_B_MA0
DDR_B_MA9
DDR_B_MA15
DDR_B_MA3
DDR_B_MA5
DDR_B_MA8
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_CKE1_DIMMB
DDR_B_D0
DDR_CKE0_DIMMB
DDR_B_DQS6DDR_B_DQS#6
DDR_B_DQS2DDR_B_DQS#2
DDR_B_DQS5DDR_B_DQS#5
DDR_B_DQS1DDR_B_DQS#1
DDR_B_DQS4DDR_B_DQS#4
DDR_B_DQS0DDR_B_DQS#0
DDR_B_DQS7DDR_B_DQS#7
DDR_B_DQS3DDR_B_DQS#3
DDR_A_CLK1
DDR_A_CLK#1
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
DDR_A_DQS0DDR_A_DQS#0
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS2DDR_A_DQS#2
DDR_A_DQS1DDR_A_DQS#1
DDR_A_DQS4DDR_A_DQS#4DDR_A_DQS5DDR_A_DQS#5DDR_A_DQS6DDR_A_DQS#6
DDR_A_DQS#7DDR_A_DQS7
VTT_SENSE
DDR_A_CLK0
DDR_A_CLK#0
+MCH_REF
DDR_B_ODT0DDR_B_ODT1
DDR_A_ODT1DDR_A_ODT0
DDR_B_CLK#0DDR_B_CLK0
DDR_B_CLK1DDR_B_CLK#1DDR_A_CLK#1
DDR_A_CLK#0DDR_A_CLK0
DDR_A_CLK1
DDR_CKE0_DIMMADDR_CKE1_DIMMA
DDR_B_D28
DDR_B_D16
DDR_B_D22
DDR_B_D19
DDR_B_D9
DDR_B_D50
DDR_B_D35
DDR_B_D46
DDR_B_D5
DDR_B_D37
DDR_B_D26
DDR_B_D3
DDR_B_D8
DDR_B_D29
DDR_B_D14
DDR_B_D7
DDR_B_D59
DDR_B_D51
DDR_B_D10
DDR_B_D17
DDR_B_D44
DDR_B_D41
DDR_B_D38
DDR_B_D47
DDR_B_D63
DDR_B_D32
DDR_B_D20
DDR_B_D52
DDR_B_D30
DDR_B_D53
DDR_B_D40
DDR_B_D27
DDR_B_D45
DDR_B_D55DDR_B_D56
DDR_B_D11
DDR_B_D48
DDR_B_D39
DDR_B_D1
DDR_B_D42
DDR_B_D36
DDR_B_D2
DDR_B_D58
DDR_B_D33
DDR_B_D62
DDR_B_D31
DDR_B_D21
DDR_B_D54
DDR_B_D24
DDR_B_D15
DDR_B_D60
DDR_B_D12
DDR_B_D49
DDR_B_D43
DDR_B_D18
DDR_B_D61
DDR_B_D34
DDR_B_D4
DDR_B_DM6
DDR_B_DM4
DDR_B_DM2
DDR_B_DM0
DDR_B_DM5
DDR_B_DM3
DDR_B_DM1
DDR_B_DM7DDR_A_DM6DDR_A_DM5DDR_A_DM4DDR_A_DM3DDR_A_DM2DDR_A_DM1DDR_A_DM0
DDR_A_DM7
DDR_A_D59
DDR_A_D3
DDR_A_D13
DDR_A_D60
DDR_A_D40
DDR_A_D29
DDR_A_D56
DDR_A_D20
DDR_A_D28
DDR_A_D36
DDR_A_D19
DDR_A_D23
DDR_A_D34
DDR_A_D61
DDR_A_D15
DDR_A_D4
DDR_A_D0
DDR_A_D53
DDR_A_D47
DDR_A_D43
DDR_A_D33
DDR_A_D24
DDR_A_D39
DDR_A_D46
DDR_A_D22
DDR_A_D51
DDR_A_D9
DDR_A_D5DDR_A_D6
DDR_A_D54
DDR_A_D8
DDR_A_D31
DDR_A_D7
DDR_A_D50
DDR_A_D57
DDR_A_D12
DDR_A_D21
DDR_A_D26
DDR_A_D63DDR_A_D62
DDR_A_D42
DDR_A_D48
DDR_A_D44
DDR_A_D25
DDR_A_D58
DDR_A_D32
DDR_A_D1
DDR_A_D17
DDR_A_D2
DDR_A_D55
DDR_A_D38
DDR_A_D11DDR_A_D10
DDR_A_D27
DDR_A_D18
DDR_A_D14
DDR_A_D41
DDR_A_D49
DDR_A_D16
DDR_A_D52
DDR_A_D37
DDR_A_D35
DDR_A_D30
DDR_B_D6
DDR_A_D45
DDR_B_RAS#DDR_B_CAS#DDR_B_WE#
DDR_B_BS#0DDR_B_BS#1DDR_B_BS#2
DDR_A_WE#
DDR_B_D25
DDR_A_CAS#DDR_A_RAS#
DDR_B_D23
DDR_B_D57
DDR_B_D13
DDR_A_BS#2DDR_A_BS#1DDR_A_BS#0
DDR_A_MA15
DDR_A_MA12
DDR_A_MA14DDR_A_MA13
DDR_A_MA11DDR_A_MA10
DDR_A_MA6
DDR_A_MA1
DDR_A_MA7
DDR_A_MA2DDR_A_MA3
DDR_A_MA8
DDR_A_MA5DDR_A_MA4
DDR_A_MA9
DDR_A_MA0
DDR_B_MA14
DDR_CS1_DIMMA# DDR_CS0_DIMMB#DDR_CS1_DIMMB#
DDR_CS0_DIMMA#
DDR_CKE1_DIMMB <9>DDR_CKE0_DIMMB <9>
DDR_CS0_DIMMA#<8>DDR_CS1_DIMMA#<8> DDR_CS0_DIMMB# <9>
DDR_CS1_DIMMB# <9>
DDR_B_D[63..0]<9>
DDR_B_DM[7..0]<9> DDR_A_DM[7..0] <8>
DDR_A_D[63..0] <8>
DDR_B_DQS7<9>DDR_B_DQS#7<9>
DDR_B_DQS6<9>
DDR_B_DQS5<9>
DDR_B_DQS4<9>
DDR_B_DQS3<9>
DDR_B_DQS2<9>
DDR_B_DQS1<9>
DDR_B_DQS0<9>
DDR_B_DQS#6<9>
DDR_B_DQS#5<9>
DDR_B_DQS#4<9>
DDR_B_DQS#3<9>
DDR_B_DQS#2<9>
DDR_B_DQS#1<9>
DDR_B_DQS#0<9>
DDR_A_DQS3 <8>
DDR_A_DQS2 <8>
DDR_A_DQS1 <8>
DDR_A_DQS0 <8>
DDR_A_DQS#3 <8>
DDR_A_DQS#2 <8>
DDR_A_DQS#1 <8>
DDR_A_DQS#0 <8>
DDR_A_DQS4 <8>DDR_A_DQS#4 <8>DDR_A_DQS5 <8>DDR_A_DQS#5 <8>DDR_A_DQS6 <8>DDR_A_DQS#6 <8>DDR_A_DQS7 <8>DDR_A_DQS#7 <8>
DDR_B_RAS# <9>DDR_B_CAS# <9>DDR_B_WE# <9>
DDR_B_BS#0 <9>DDR_B_BS#1 <9>DDR_B_BS#2 <9>
DDR_A_RAS#<8>DDR_A_CAS#<8>DDR_A_WE#<8>
DDR_A_BS#0<8>DDR_A_BS#1<8>DDR_A_BS#2<8>
DDR_A_MA[15..0]<8> DDR_B_MA[15..0] <9>
DDR_B_ODT0 <9>DDR_B_ODT1 <9>
DDR_A_ODT0<8>DDR_A_ODT1<8>
DDR_B_CLK0 <9>DDR_B_CLK#0 <9>DDR_B_CLK1 <9>DDR_B_CLK#1 <9>
DDR_A_CLK0<8>DDR_A_CLK#0<8>
DDR_A_CLK1<8>DDR_A_CLK#1<8>
DDR_CKE0_DIMMA<8>DDR_CKE1_DIMMA<8>
+1.8V
+0.9V+0.9V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AMD CPU S1G2 DDRII I/FCustom
5 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
Athlon 64 S1ProcessorSocket
Athlon 64 S1Processor Socket
Place them close to CPU within 1"
Processor DDR2 Memory Interface
09/13 update
09/13 update
C111.5P_0402_50V9C
1
2
R2
1K_0402_1%
12
T3PAD
T2 PAD
MEM:DATAJCPUC
FOX_PZ6382A-284S-41F_GRIFFIN
CONN@
MB_DATA63AD11 MB_DATA62AF11 MB_DATA61AF14 MB_DATA60AE14 MB_DATA59Y11 MB_DATA58AB11 MB_DATA57AC12 MB_DATA56AF13 MB_DATA55AF15 MB_DATA54AF16 MB_DATA53AC18 MB_DATA52AF19 MB_DATA51AD14 MB_DATA50AC14 MB_DATA49AE18 MB_DATA48AD18 MB_DATA47AD20 MB_DATA46AC20 MB_DATA45AF23 MB_DATA44AF24 MB_DATA43AF20 MB_DATA42AE20 MB_DATA41AD22 MB_DATA40AC22 MB_DATA39AE25 MB_DATA38AD26 MB_DATA37AA25 MB_DATA36AA26 MB_DATA35AE24 MB_DATA34AD24 MB_DATA33AA23 MB_DATA32AA24 MB_DATA31G24 MB_DATA30G23 MB_DATA29D26 MB_DATA28C26 MB_DATA27G26 MB_DATA26G25 MB_DATA25E24 MB_DATA24E23 MB_DATA23C24 MB_DATA22B24 MB_DATA21C20 MB_DATA20B20 MB_DATA19C25 MB_DATA18D24 MB_DATA17A21 MB_DATA16D20 MB_DATA15D18 MB_DATA14C18 MB_DATA13D14 MB_DATA12C14 MB_DATA11A20 MB_DATA10A19 MB_DATA9A16 MB_DATA8A15 MB_DATA7A13 MB_DATA6D12 MB_DATA5E11 MB_DATA4G11 MB_DATA3B14 MB_DATA2A14 MB_DATA1A11 MB_DATA0C11
MA_DATA63 AA12MA_DATA62 AB12MA_DATA61 AA14MA_DATA60 AB14MA_DATA59 W11MA_DATA58 Y12MA_DATA57 AD13MA_DATA56 AB13MA_DATA55 AD15MA_DATA54 AB15MA_DATA53 AB17MA_DATA52 Y17MA_DATA51 Y14MA_DATA50 W14MA_DATA49 W16MA_DATA48 AD17MA_DATA47 Y18MA_DATA46 AD19MA_DATA45 AD21MA_DATA44 AB21MA_DATA43 AB18MA_DATA42 AA18MA_DATA41 AA20MA_DATA40 Y20MA_DATA39 AA22MA_DATA38 Y22MA_DATA37 W21MA_DATA36 W22MA_DATA35 AA21MA_DATA34 AB22MA_DATA33 AB24MA_DATA32 Y24MA_DATA31 H22MA_DATA30 H20MA_DATA29 E22MA_DATA28 E21MA_DATA27 J19MA_DATA26 H24MA_DATA25 F22MA_DATA24 F20MA_DATA23 C23MA_DATA22 B22MA_DATA21 F18MA_DATA20 E18MA_DATA19 E20MA_DATA18 D22MA_DATA17 C19MA_DATA16 G18MA_DATA15 G17MA_DATA14 C17MA_DATA13 F14MA_DATA12 E14MA_DATA11 H17MA_DATA10 E17MA_DATA9 E15MA_DATA8 H15MA_DATA7 E13MA_DATA6 C13MA_DATA5 H12MA_DATA4 H11MA_DATA3 G14MA_DATA2 H14MA_DATA1 F12MA_DATA0 G12
MB_DM7AD12 MB_DM6AC16 MB_DM5AE22 MB_DM4AB26 MB_DM3E25 MB_DM2A22 MB_DM1B16 MB_DM0A12
MB_DQS_H7AF12MB_DQS_L7AE12
MB_DQS_H6AE16MB_DQS_L6AD16
MB_DQS_H5AF21MB_DQS_L5AF22
MB_DQS_H4AC25MB_DQS_L4AC26
MB_DQS_H3F26MB_DQS_L3E26
MB_DQS_H2A24MB_DQS_L2A23
MB_DQS_H1D16MB_DQS_L1C16
MB_DQS_H0C12MB_DQS_L0B12
MA_DM7 Y13MA_DM6 AB16MA_DM5 Y19MA_DM4 AC24MA_DM3 F24MA_DM2 E19MA_DM1 C15MA_DM0 E12
MA_DQS_H7 W12MA_DQS_L7 W13
MA_DQS_H6 Y15MA_DQS_L6 W15
MA_DQS_H5 AB19MA_DQS_L5 AB20
MA_DQS_H4 AD23MA_DQS_L4 AC23
MA_DQS_H3 G22MA_DQS_L3 G21
MA_DQS_H2 C22MA_DQS_L2 C21
MA_DQS_H1 G16MA_DQS_L1 G15
MA_DQS_H0 G13MA_DQS_L0 H13
C12
0.1U_0402_16V4Z
1
2
R1
1K_0402_1%
12
R4 39.2_0402_1%
1 2
R3 39.2_0402_1%
1 2
C13
1000P_0402_25V8J
1
2
C151.5P_0402_50V9C
1
2
C101.5P_0402_50V9C
1
2
MEM:CMD/CTRL/CLK
JCPUB
FOX_PZ6382A-284S-41F_GRIFFIN
CONN@
VTT1D10VTT2C10VTT3B10VTT4AD10
VTT5 W10VTT6 AC10VTT7 AB10VTT8 AA10VTT9 A10
MA1_ODT1V19 MA1_ODT0U21 MA0_ODT1V22 MA0_ODT0T19
MB1_ODT0 Y26MB0_ODT1 W23MB0_ODT0 W26
RSVD_M2 B18
MB1_CS_L0 U22MB0_CS_L1 W25MB0_CS_L0 V26MA0_CS_L1U19
MA1_CS_L1V20 MA1_CS_L0U20
MA0_CS_L0T20
MA_ADD15K19 MA_ADD14K24 MA_ADD13V24 MA_ADD12K20 MA_ADD11L22 MA_ADD10R21 MA_ADD9K22 MA_ADD8L19 MA_ADD7L21 MA_ADD6M24 MA_ADD5L20 MA_ADD4M22 MA_ADD3M19 MA_ADD2N22 MA_ADD1M20 MA_ADD0N21
MA_BANK2J21 MA_BANK1R23 MA_BANK0R20
MA_RAS_LR19MA_CAS_LT22MA_WE_LT24
MEMZPAF10MEMZNAE10 VTT_SENSE Y10
MEMVREF W17
MA_CLK_H4P19MA_CLK_L4P20
MA_CLK_H7Y16MA_CLK_L7AA16
MA_CLK_H1E16MA_CLK_L1F16
MA_CLK_H5N19MA_CLK_L5N20
MB_CLK_H4 R26MB_CLK_L4 R25
MB_CLK_H7 AF18MB_CLK_L7 AF17
MB_CLK_H1 A17MB_CLK_L1 A18
MB_CLK_H5 P22MB_CLK_L5 R22
MA_CKE0J22MA_CKE1J20 MB_CKE0 J25
MB_CKE1 H26
MB_ADD15 J24MB_ADD14 J23MB_ADD13 W24MB_ADD12 L25MB_ADD11 L26MB_ADD10 T26MB_ADD9 K26MB_ADD8 M26MB_ADD7 L24MB_ADD6 N25MB_ADD5 L23MB_ADD4 N26MB_ADD3 N23MB_ADD2 P26MB_ADD1 N24MB_ADD0 P24
MB_BANK2 J26MB_BANK1 U26MB_BANK0 R24
MB_RAS_L U25MB_CAS_L U24MB_WE_L U23
RSVD_M1H16
C141.5P_0402_50V9C
1
2
T1PAD
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
THERMDA_CPU
THERMDC_CPU
SMB_EC_CK2
SMB_EC_DA2
CPU_DBRDY
CPU_TDO
CPU_TMSCPU_TCK
CPU_TDICPU_TRST#
CPU_DBREQ#
HDT_RST#LDT_RST#
CPU_VDD1_FB_H
CPU_THERMTRIP#_R
VDD_NB_FB_H
CPU_VDD0_FB_L
VDD_NB_FB_LCPU_VDD1_FB_LVDD_NB_FB_HVDD_NB_FB_L
CPU_HTREF0CPU_HTREF1
CPU_TEST25_L_BYPASSCLK_L
CPU_DBRDYCPU_TMS
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST19_PLLTEST0
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD_CPU
LDT_STOP#
THERMDA_CPU
LDT_STOP#
THERMDC_CPUCPU_SIDCPU_SIC
CPU_LDT_REQ#
CPU_CLKIN_SC_N
CPU_VDD0_FB_H
CPU_TDICPU_TRST#CPU_TCK
CPU_DBREQ#
CPU_TDO
CPU_SVCCPU_SVD
CPU_TEST12_SCANSHIFTENB
CPU_TEST20_SCANCLK2CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1CPU_TEST22_SCANSHIFTEN
CPU_TEST29_L_FBCLKOUT_NCPU_TEST29_H_FBCLKOUT_P
CPU_TEST17_BP3CPU_TEST16_BP2
CPU_TEST14_BP0CPU_TEST15_BP1
CPU_TEST28_L_PLLCHRZ_NCPU_TEST28_H_PLLCHRZ_P
H_PWRGD_CPULDT_RST#
CPU_TEST23_TSTUPD
CPU_MEMHOT#_1.8V
CPU_LDT_REQ#
CPU_TEST27_SINGLECHAIN
CPU_PROCHOT#_1.8
CPU_TEST18_PLLTEST1
CPU_PROCHOT#_1 .8
CPU_VDD0_FB_HCPU_VDD0_FB_L
CPU_VDD1_FB_HCPU_VDD1_FB_L
CPU_TEST21_SCANEN
CPU_TEST27_SINGLECHAIN
CPU_TEST18_PLLTEST1CPU_TEST19_PLLTEST0
CPU_TEST15_BP1
CPU_TEST20_SCANCLK2
CPU_TEST22_SCANSHIFTENCPU_TEST12_SCANSHIFTENB
CPU_TEST24_SCANCLK1
CPU_TEST14_BP0
CPU_SVDCPU_SVC
SMB_EC_CK2
SMB_EC_DA2CPU_SID
CPU_SIC
SB_PWRGD <20,33,43>
CPU_SVD <43>CPU_SVC <43>
H_PWRGD_CPU<19>
LDT_RST#<19>
LDT_STOP#<11,19>
VDD_NB_FB_H <43>VDD_NB_FB_L <43>
CPU_VDD0_FB_H<43>CPU_VDD0_FB_L<43>
CPU_VDD1_FB_H<43>CPU_VDD1_FB_L<43>
CLK_CPU_BCLK<15>
CLK_CPU_BCLK#<15>
CPU_LDT_REQ# <11,19>
H_THERMTRIP# <20>
ENTRIP2 <37,39>
H_PROCHOT# <19>
SMB_EC_CK2 <33>
SMB_EC_DA2 <33>
H_THERMTRIP#_EC <33>
+3VS
+1.8V
+3VS
+1.8V
+1.2V_HT
+2.5VDDA
+2.5VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_0
+1.8V
+1.8V
+3VS
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AMD CPU S1G2 CTRLCustom
6 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
2200p change to1000p for ADT7421
Address:100_1101
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
Address:100_1100
+1.8V sense no support
0718 AMD , need check with AMD
0718 Silego -- 216 ohm
Place close to CPU wihtin 1.5"
VDDA=300mA
as short as possibleroute as differential
testpoint under package
A:Need to re-Link "SGN00000200"
Close to CPU
09/11 update
09/13 update
09/19 update
Close to CPU
9/20 SP020016900
09/11 update
0718 AMD --> 1K ohm
FDV301N, the Vgs is:min = 0.65VTyp = 0.85VMax = 1.5V
EC is PU to 5VALW
2.09V for Gate
11/13 update
11/22 update
11/30 update
R488 10_0402_5%
1 2
R9 300_0402_5% 1 2
U2
ADM1032ARMZ-2REEL_MSOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R31 300_0402_5%@12
R15300_0402_5%
12
R34 300_0402_5%@12
R487 10_0402_5%
1 2
T10PADT11 PAD
C203900P_0402_50V7K 1 2
R8169_0402_1%
12
R16 0_0402_5%1 2
R19
390_0402_5%12
G
DS
Q127FDV301N_NL_SOT23-3
2
13
R25 0_0402_5%1 2
R36300_0402_5%
12
R41
220_
0402
_5%
@1
2
T13PAD
R485 10_0402_5% 1 2
T4 PAD
T43PAD
EB
C
Q3
MMBT3904_NL_SOT23-3
2
3 1
R484 10_0402_5%
1 2
C190.22U_0603_16V4Z
1
2
C27
2200P_0402_50V7K1 2
L1
FBM_L11_201209_300L_08051 2
EB
C
Q2MMBT3904_NL_SOT23-3@2
3 1
R18
390_0402_5%12
JCPUD
FOX_PZ6382A-284S-41F_GRIFFINCONN@
VDDA1F8VDDA2F9
RESET_LB7PWROKA7LDTSTOP_LF10
SICAF4SIDAF5
HT_REF1P6 HT_REF0R6
VDD0_FB_HF6VDD0_FB_LE6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6PROCHOT_L AC7
RSVD2A5
LDTREQ_LC6
SVC A6SVD A4
RSVD6 C5RSVD4B5
RSVD1A3
CLKIN_HA9CLKIN_LA8
DBRDYG10TMSAA9TCKAC9TRST_LAD9TDIAF9
DBREQ_L E10
TDO AE9
TEST25_HE9TEST25_LE8
TEST19G9 TEST18H10
RSVD8 AA7
TEST9C2
TEST17 D7TEST16 E7TEST15 F7TEST14 C7
TEST12AC8
TEST7 C3
TEST6AA6
THERMDC W7THERMDA W8
VDD1_FB_HY6VDD1_FB_LAB6
TEST29_H C9TEST29_L C8
TEST24AE7
TEST23AD7
TEST22AE8
TEST21AB8TEST20AF7
TEST28_H J7TEST28_L H8
TEST27AF8
ALERT_LAE6
TEST10 K8
TEST8 C4
RSVD3B3
RSVD5C1
VDDNB_FB_H H6VDDNB_FB_L G6
RSVD7 D5
KEY2 W18
MEMHOT_L AA8
RSVD10 H18RSVD9 H19
KEY1 M11
C23
0.1U_0402_16V7K
1
2
R486 10_0402_5% 1 2
C21 3900P_0402_50V7K 1 2
C939 0.1U_0402_16V4Z
1 2
R29 300_0402_5%@12
R30300_0402_5%
12
R10 10K_0402_5%
1 2
C26
0.1U
_040
2_16
V4Z 1
2
T12PAD
R7 0_0402_5%1 2
SAMTEC_ASP-68200-07
JP3
@
2468
101214161820222423
21191715131197531
26
R28 300_0402_5%@12
T42PAD
R24 300_0402_5%@1 2
T9 PAD T8PAD
R35 300_0402_5%@12
+C16100U_D2_10VM
1
2
R22 1K_0402_5%1 2
R40
220_
0402
_5%
@1
2
T5PAD
R14 44.2_0402_1%1 2
R27 300_0402_5%@12
U1
NC7SZ08P5X_NL_SC70-5@
B 2
A 1Y4
P5
G3
T7PAD
R37
220_
0402
_5%
@1
2
R32 300_0402_5%@12
R13 44.2_0402_1%1 2
R5 300_0402_5%
1 2
R814
34.8K_0402_1%~N
12
R6 0_0402_5%@1 2
C240.01U_0402_25V4Z
@
1
2
T6PAD
C250.01U_0402_25V4Z
@
1
2
R26 300_0402_5%@1 2
T14PAD
C174.7U_0805_10V4Z
1
2
R175
20K_0402_5%
12
R33 300_0402_5%@12
R23 1K_0402_5%1 2
C220.01U_0402_25V4Z
@
1
2
C18
3300P_0402_50V7K
1
2
R59 0_0402_5%1 2
R489 10_0402_5%
1 2
R39
220_
0402
_5%
@1
2
R17
300_0402_5%@
12
R21300_0402_5%
12
R38
220_
0402
_5%
@1
2
R11 10K_0402_5%@12
G
DSQ129
FDV301N_NL_SOT23-32
13
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+0.9V
+CPU_CORE_0
+CPU_CORE_0
+CPU_CORE_0
+1.8V
+1.8V
+1.8V
+1.8V +1.8V
+0.9V
+0.9V
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_NB
+CPU_CORE_1+CPU_CORE_0
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AMD CPU S1G2 PWR & GNDCustom
7 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
A: Add C165 and C176to follow AMD Layoutreview recommand forEMI
Between CPU Socket and DIMM
180PF Qt'y follow the distance betweenCPU socket and DIMM0. <2.5inch>
Under CPU Socket
Athlon 64 S1Processor Socket
Near CPU Socket
VTT decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling.+CPU_CORE_NB decoupling.
C: Change to NBO CAP
C: Change to NBO CAP
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1Processor Socket
L 18A/720mil/36vias L 18A/720mil/36vias
L ?A/?mil/?vias
L ?A/?mil/?vias
C580.22U_0603_16V4Z
1
2
C810.22U_0603_16V4Z
1
2
C3422U_0805_6.3V6M
1
2
C764.7U_0805_10V4Z
1
2
C5322U_0805_6.3V6M
1
2
+ C78220U_Y_4VM@
1
2
C72180P_0402_50V8J
1
2
C45180P_0402_50V8J
1
2
C65180P_0402_50V8J
1
2
+ C28330U_X_2VM_R6M
1
2
C48
0.22U_0603_16V4Z
1
2
C610.01U_0402_25V4Z
1
2
C804.7U_0805_10V4Z
1
2
C680.22U_0603_16V4Z
1
2
C820.22U_0603_16V4Z
1
2
C3922U_0805_6.3V6M
1
2
C570.22U_0603_16V4Z
1
2
+ C29330U_X_2VM_R6M
1
2
+ C30330U_X_2VM_R6M
1
2
C430.22U_0603_16V4Z
1
2
C4622U_0805_6.3V6M
1
2
C550.22U_0603_16V4Z
1
2 C690.22U_0603_16V4Z
1
2
JCPUE
FOX_PZ6382A-284S-41F_GRIFFIN
CONN@
VDD1_25 AC4VDD1_26 AD2
VDD0_1G4VDD0_2H2VDD0_3J9VDD0_4J11VDD0_5J13
VDD0_7K6VDD0_8K10VDD0_9K12VDD0_10K14VDD0_11L4VDD0_12L7VDD0_13L9VDD0_14L11VDD0_15L13
VDD0_17M2VDD0_18M6VDD0_19M8VDD0_20M10VDD0_21N7VDD0_22N9VDD0_23N11
VDD1_1 P8VDD1_2 P10VDD1_3 R4VDD1_4 R7VDD1_5 R9VDD1_6 R11VDD1_7 T2VDD1_8 T6VDD1_9 T8
VDD1_10 T10VDD1_11 T12VDD1_12 T14VDD1_13 U7VDD1_14 U9VDD1_15 U11VDD1_16 U13
VDD1_18 V6VDD1_19 V8VDD1_20 V10VDD1_21 V12VDD1_22 V14VDD1_23 W4VDD1_24 Y2
VDD0_6J15
VDDNB_1K16
VDD0_16L15
VDDNB_2M16VDDNB_3P16VDDNB_4T16
VDD1_17 U15
VDDNB_5V16
VDDIO1H25VDDIO2J17VDDIO3K18VDDIO4K21VDDIO5K23VDDIO6K25VDDIO7L17VDDIO8M18VDDIO9M21VDDIO10M23VDDIO11M25VDDIO12N17 VDDIO13 P18VDDIO14 P21VDDIO15 P23VDDIO16 P25VDDIO17 R17VDDIO18 T18VDDIO19 T21VDDIO20 T23VDDIO21 T25VDDIO22 U17VDDIO23 V18VDDIO24 V21VDDIO25 V23VDDIO26 V25VDDIO27 Y25
C5222U_0805_6.3V6M
1
2
C3822U_0805_6.3V6M
1
2
+ C59220U_Y_4VM
1
2
C774.7U_0805_10V4Z
1
2
C701000P_0402_25V8J
1
2
C674.7U_0805_10V4Z
1
2
C600.01U_0402_25V4Z
1
2
C3322U_0805_6.3V6M
1
2
C3222U_0805_6.3V6M
1
2
JCPUF
FOX_PZ6382A-284S-41F_GRIFFIN
CONN@
VSS1AA4VSS2AA11VSS3AA13VSS4AA15VSS5AA17VSS6AA19VSS7AB2VSS8AB7VSS9AB9VSS10AB23VSS11AB25VSS12AC11VSS13AC13VSS14AC15VSS15AC17VSS16AC19VSS17AC21VSS18AD6VSS19AD8VSS20AD25VSS21AE11VSS22AE13VSS23AE15VSS24AE17VSS25AE19VSS26AE21VSS27AE23VSS28B4VSS29B6VSS30B8VSS31B9VSS32B11VSS33B13VSS34B15VSS35B17VSS36B19VSS37B21VSS38B23VSS39B25VSS40D6VSS41D8VSS42D9VSS43D11VSS44D13VSS45D15VSS46D17VSS47D19VSS48D21VSS49D23VSS50D25VSS51E4VSS52F2VSS53F11VSS54F13VSS55F15VSS56F17VSS57F19VSS58F21VSS59F23VSS60F25VSS61H7VSS62H9VSS63H21VSS64H23VSS65J4
VSS66 J6VSS67 J8VSS68 J10VSS69 J12VSS70 J14VSS71 J16VSS72 J18VSS73 K2VSS74 K7VSS75 K9VSS76 K11VSS77 K13VSS78 K15VSS79 K17VSS80 L6VSS81 L8VSS82 L10VSS83 L12VSS84 L14VSS85 L16VSS86 L18VSS87 M7VSS88 M9VSS89 AC6VSS90 M17VSS91 N4VSS92 N8VSS93 N10VSS94 N16VSS95 N18VSS96 P2VSS97 P7VSS98 P9VSS99 P11
VSS100 P17VSS101 R8VSS102 R10VSS103 R16VSS104 R18VSS105 T7VSS106 T9VSS107 T11VSS108 T13VSS109 T15VSS110 T17VSS111 U4VSS112 U6VSS113 U8VSS114 U10VSS115 U12VSS116 U14VSS117 U16VSS118 U18VSS119 V2VSS120 V7VSS121 V9VSS122 V11VSS123 V13VSS124 V15VSS125 V17VSS126 W6VSS127 Y21VSS128 Y23VSS129 N6
C86180P_0402_50V8J
1
2
C3622U_0805_6.3V6M
1
2
C440.01U_0402_25V4Z
1
2
C49
0.22U_0603_16V4Z
1
2
C3522U_0805_6.3V6M
1
2
C794.7U_0805_10V4Z
1
2
C4722U_0805_6.3V6M
1
2
C5422U_0805_6.3V6M
1
2
C73180P_0402_50V8J
1
2
C63180P_0402_50V8J
1
2
C64180P_0402_50V8J
1
2
C664.7U_0805_10V4Z
1
2
C744.7U_0805_10V4Z
1
2
C62180P_0402_50V8J
1
2
C831000P_0402_25V8J
1
2
C400.22U_0603_16V4Z
1
2
C85180P_0402_50V8J
1
2
C711000P_0402_25V8J
1
2
C3722U_0805_6.3V6M
1
2
C410.01U_0402_25V4Z
1
2
C560.22U_0603_16V4Z
1
2
C841000P_0402_25V8J
1
2
C42180P_0402_50V8J
1
2
C51
180P_0402_50V8J
1
2
C754.7U_0805_10V4Z
1
2
C50
180P_0402_50V8J
1
2
+ C31330U_X_2VM_R6M
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_CKE1_DIMMA
+V_DDR_MCH_REF
DDR_A_MA3
DDR_A_BS#0
DDR_A_RAS#
DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_ODT1
DDR_A_WE#
DDR_A_D4
DDR_A_CAS# DDR_A_ODT0
DDR_CS0_DIMMA#
DDR_CKE1_DIMMA
DDR_A_D29
DDR_A_D30
DDR_A_D35
DDR_A_D26
DDR_A_D38
DDR_A_BS#0
DDR_A_D28
DDR_A_D34
DDR_A_D36DDR_A_D33
DDR_A_D31
DDR_A_D32
DDR_A_D27
DDR_A_D53
DDR_A_D46DDR_A_D43
DDR_A_D48
DDR_A_D41
DDR_A_D44
DDR_A_D50
DDR_A_D45
DDR_A_D49
DDR_A_D37
DDR_A_D55
DDR_A_D39
DDR_A_D51
DDR_A_D40
DDR_A_D47DDR_A_D42
DDR_A_D63
DDR_A_D54
DDR_A_D6
DDR_A_D14
DDR_A_D52
DDR_A_D3
DDR_A_D59DDR_A_D58
DDR_A_D9
DDR_A_D61DDR_A_D60
DDR_A_D57
DDR_A_D7
DDR_A_D8
DDR_A_D56
DDR_A_D5
DDR_A_D24
DDR_A_D23
DDR_A_D12
DDR_A_D15
DDR_A_D21
DDR_A_BS#1
DDR_A_D22
DDR_A_D16 DDR_A_D20
DDR_A_BS#2
DDR_A_D10
DDR_A_D13
DDR_A_D19DDR_A_D18
DDR_A_D17
DDR_A_D11
DDR_A_DM5
DDR_A_MA11
DDR_A_DM6
DDR_A_DM4
DDR_A_D0
DDR_A_DM7
DDR_A_D62
DDR_A_DM1
DDR_A_DM0
DDR_A_MA4
DDR_A_DM2
DDR_A_D25
DDR_A_D1
DDR_A_DM3
DDR_A_D2
DDR_A_MA8
DDR_A_MA12
DDR_A_MA14
DDR_A_MA9
DDR_A_MA10
DDR_A_DQS#0
DDR_A_MA13
DDR_A_MA1 DDR_A_MA0DDR_A_MA2
DDR_A_MA7
DDR_A_MA15
DDR_A_MA3DDR_A_MA5
DDR_A_MA6
DDR_A_DQS2
DDR_A_DQS6
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS#6
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS#2
DDR_A_DQS7
DDR_A_DQS#4
DDR_A_DQS#7
DDR_A_DQS#5
DDR_A_DQS#1DDR_A_MA4
DDR_A_MA11
DDR_A_MA12
DDR_A_MA5
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
+V_DDR_MCH_REF
DDR_A_MA15
DDR_A_BS#2DDR_CKE0_DIMMA
DDR_A_MA7DDR_A_MA6
DDR_A_MA14
DDR_A_MA0DDR_A_BS#1DDR_A_MA2
DDR_A_ODT0DDR_A_MA13DDR_A_RAS#DDR_CS0_DIMMA#
DDR_A_MA8DDR_A_MA9
DDR_A_MA10DDR_A_MA1
DDR_A_CAS#DDR_A_WE#DDR_CS1_DIMMA#DDR_A_ODT1
DDR_A_CLK0 <5>DDR_A_CLK#0 <5>
DDR_CKE0_DIMMA<5>
DDR_A_BS#2<5>
DDR_A_BS#0<5>DDR_A_WE#<5>
DDR_A_CAS#<5>DDR_CS1_DIMMA#<5>
DDR_A_ODT1<5>
DDR_A_CLK1 <5>DDR_A_CLK#1 <5>
DDR_CS0_DIMMA# <5>
DDR_A_ODT0 <5>
DDR_A_RAS# <5>DDR_A_BS#1 <5>
DDR_CKE1_DIMMA <5>
DDR_A_MA[0..15] <5>
DDR_A_D[0..63] <5>
DDR_A_DQS[0..7] <5>
DDR_A_DM[0..7] <5>
DDR_A_DQS#[0..7] <5>
SMB_CK_DAT0<9,15,20,30>SMB_CK_CLK0<9,15,20,30>
+V_DDR_MCH_REF <9>
+1.8V+1.8V
+3VS
+1.8V
+1.8V+0.9V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
DDRII SO-DIMM 0Custom
8 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
09/13 update
9/20 SP07000BZ00/SP07000EU00 DDR2 SOCKET H9.2 (REV)
Cross between +1.8V and +0.9V power plan
C102 0.1U_0402_16V4Z
1 2
RP3
47_0804_8P4R_5%
18273645
C98 0.1U_0402_16V4Z
1 2
RP7
47_0804_8P4R_5%
18273645
C94 0.1U_0402_16V4Z
1 2
C92 0.1U_0402_16V4Z
1 2
R441K_0402_1%
12
C101 0.1U_0402_16V4Z
1 2
C97 0.1U_0402_16V4Z
1 2
C96
0.1U_0402_16V4Z
1
2
C95
1000P_0402_25V8J
1
2
C87 0.1U_0402_16V4Z
1 2
C100 0.1U_0402_16V4Z
1 2
R431K_0402_1%
12
RP2
47_0804_8P4R_5%
18273645
C99 0.1U_0402_16V4Z
1 2
RP5
47_0804_8P4R_5%
18273645
C88 0.1U_0402_16V4Z
1 2
C91 0.1U_0402_16V4Z
1 2
RP4
47_0804_8P4R_5%
18273645
C1030.1U_0402_16V4Z
1
2
C93 0.1U_0402_16V4Z
1 2
C90 0.1U_0402_16V4Z
1 2
RP1
47_0804_8P4R_5%
18273645
RP6
47_0804_8P4R_5%
18273645
C89 0.1U_0402_16V4Z
1 2
JP4
FOX_AS0A426-N8RN-7FCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SA0 198SA1 200
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_MA15
DDR_B_BS#0
DDR_B_D26
DDR_B_D29
DDR_B_D27DDR_B_D30
DDR_B_D33
DDR_B_D31
DDR_B_D32
DDR_B_D28
DDR_B_D34DDR_B_D35
DDR_B_D38
DDR_B_D36
DDR_B_D39
DDR_B_D37
DDR_B_D41
DDR_B_D42
DDR_B_D44DDR_B_D40
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D45
DDR_B_D46
DDR_B_D49 DDR_B_D53
DDR_B_D51 DDR_B_D55DDR_B_D50
DDR_B_D52
DDR_B_D56
DDR_B_D54
DDR_B_D59
DDR_B_D57
DDR_B_D58
DDR_B_D61
DDR_B_D63
DDR_B_D60
DDR_B_D3
DDR_B_D8
DDR_B_D6DDR_B_D7
DDR_B_D5
DDR_B_D14
DDR_B_D13
DDR_B_D11DDR_B_D10
DDR_B_D9
DDR_B_D15
DDR_B_D12
DDR_B_D17DDR_B_D20
DDR_B_D18 DDR_B_D22DDR_B_D19
DDR_B_D24
DDR_B_D16
DDR_B_D23
DDR_B_BS#2
DDR_B_BS#1
DDR_B_D25
DDR_B_D62
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4
DDR_B_DM3
DDR_B_DM1
DDR_B_DM0
DDR_B_DM6
DDR_B_DM5
DDR_B_MA4
DDR_B_D0
DDR_B_D2
DDR_B_D1
DDR_B_D4
DDR_B_MA11
DDR_B_MA10
DDR_B_MA12DDR_B_MA9
DDR_B_MA6DDR_B_MA8
DDR_B_MA5
DDR_B_MA7
DDR_B_MA3DDR_B_MA0
DDR_B_MA8DDR_B_MA9
DDR_B_MA13
DDR_B_MA15
DDR_B_MA2DDR_B_MA1
DDR_B_MA14
DDR_B_DQS2
DDR_B_DQS#0
DDR_B_DQS4
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS5
DDR_B_DQS7
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS#2
DDR_B_DQS#6
DDR_B_DQS#3
DDR_B_DQS1
DDR_B_DQS#5
DDR_B_ODT1
DDR_CKE0_DIMMB
DDR_CS1_DIMMB#
DDR_B_RAS#DDR_B_WE#
DDR_CKE1_DIMMB
DDR_B_CAS# DDR_B_ODT0
DDR_CS0_DIMMB#
DDR_B_MA12
DDR_B_MA5
DDR_B_MA4
DDR_B_D[0..63]
DDR_B_MA[0..15]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_WE#DDR_B_CAS#DDR_CS1_DIMMB#DDR_B_ODT1
DDR_B_MA3DDR_B_MA1DDR_B_BS#0DDR_B_MA10
DDR_B_MA13DDR_B_ODT0DDR_B_BS#1DDR_B_RAS#
DDR_CS0_DIMMB#DDR_B_MA0DDR_B_MA2DDR_B_MA6
DDR_B_MA7DDR_B_MA11DDR_B_MA14
DDR_CKE1_DIMMB
DDR_CKE0_DIMMBDDR_B_BS#2
DDR_B_D21
+V_DDR_MCH_REF<8>
DDR_B_CLK0 <5>DDR_B_CLK#0 <5>
DDR_CKE0_DIMMB<5>
DDR_B_BS#2<5>
DDR_B_BS#0<5>DDR_B_WE#<5>
DDR_B_CAS#<5>DDR_CS1_DIMMB#<5>
DDR_B_ODT1<5>
DDR_B_CLK1 <5>DDR_B_CLK#1 <5>
DDR_B_ODT0 <5>
DDR_B_RAS# <5>DDR_B_BS#1 <5>
DDR_CKE1_DIMMB <5>
DDR_CS0_DIMMB# <5>
DDR_B_MA[0..15] <5>
DDR_B_D[0..63] <5>
DDR_B_DQS[0..7] <5>
DDR_B_DM[0..7] <5>
DDR_B_DQS#[0..7] <5>
SMB_CK_DAT0<8,15,20,30>SMB_CK_CLK0<8,15,20,30>
+1.8V+1.8V
+3VS
+0.9V
+3VS
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
DDRII SO-DIMM 1Custom
9 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
9/20 SP07000ET00/SP07000GN00
09/26 updateDDR_B_D21 swap with DDR_B_D16DDR_B_D13 swap with DDR_B_D9
Cross between +1.8V and +0.9V power plan
C116 0.1U_0402_16V4Z
12
RP10
47_0804_8P4R_5%
18273645
RP11
47_0804_8P4R_5%
18273645
C106 0.1U_0402_16V4Z
1 2
RP12
47_0804_8P4R_5%
18273645
C111 0.1U_0402_16V4Z
12
RP13
47_0804_8P4R_5%
18273645
RP9
47_0804_8P4R_5%
18273645
C112 0.1U_0402_16V4Z
1 2
RP14
47_0804_8P4R_5%
18273645
C105 0.1U_0402_16V4Z
12
C114 0.1U_0402_16V4Z
12
C107 0.1U_0402_16V4Z
1 2
C117 0.1U_0402_16V4Z
1 2
C110 0.1U_0402_16V4Z
1 2
JP5
TYCO_292527-4CONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND 202GND201
C115 0.1U_0402_16V4Z
1 2
C109 0.1U_0402_16V4Z
12
C118 0.1U_0402_16V4Z
12
RP8
47_0804_8P4R_5%
18273645
C108 0.1U_0402_16V4Z
12
C113 0.1U_0402_16V4Z
1 2
C1190.1U_0402_16V4Z
1
2
C104
1000P_0402_25V8J
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN0H_CADIP1H_CADIN1
H_CADIN2H_CADIP2
H_CADIN3H_CADIP3
H_CTLIN0H_CTLIP0
H_CTLON0
H_CADIN4H_CADIP4
H_CADIN5H_CADIP5
H_CADIN6H_CADIP6
H_CADIN7H_CADIP7
H_CADIN8H_CADIP8
H_CADIN9H_CADIP9
H_CADIN10H_CADIP10
H_CTLOP0
H_CADIP11H_CADIN11H_CADIP12H_CADIN12
H_CADIN13H_CADIP13
H_CADIN14H_CADIP14
H_CADIN15H_CADIP15
H_CADOP0H_CADON0H_CADOP1H_CADON1
H_CTLIP1H_CTLIN1
H_CADON2
H_CTLOP1
H_CADOP2
H_CTLON1
H_CADOP3H_CADON3
H_CADON4H_CADOP4
H_CADOP5H_CADON5H_CADOP6H_CADON6H_CADOP7H_CADON7
H_CADOP15H_CADON15
H_CADOP14H_CADON14
H_CADOP13H_CADON13
H_CADOP12H_CADON12
H_CADOP11H_CADON11
H_CADON10H_CADOP10H_CADON9H_CADOP9
H_CADOP8H_CADON8
H_CADIP0
PCIE_ITX_PRX_P5PCIE_ITX_PRX_N5
PCIE_ITX_PRX_P1PCIE_ITX_PRX_N1PCIE_ITX_PRX_P2PCIE_ITX_PRX_N2PCIE_ITX_PRX_P3PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P0PCIE_ITX_PRX_N0
SB_TX2P_CSB_TX2N_CSB_TX3P_CSB_TX3N_C
SB_TX0P_CSB_TX0N_CSB_TX1P_C
H_CADIN[0..15]
H_CADIP[0..15]H_CADOP[0..15]
H_CADON[0..15]
SB_TX1N_C
PCIE_PTX_C_IRX_P5<26>PCIE_PTX_C_IRX_N5<26>
H_CLKIN0 <4>H_CLKIP0 <4>
H_CTLIN0 <4>H_CTLIP0 <4>
H_CLKON0<4>H_CLKOP0<4>
H_CLKOP1<4>H_CLKON1<4>
H_CTLOP0<4>H_CTLON0<4>
H_CLKIN1 <4>H_CLKIP1 <4>
H_CTLIN1 <4>H_CTLIP1 <4>H_CTLOP1<4>
H_CTLON1<4>
PCIE_ITX_C_PRX_P5 <26>PCIE_ITX_C_PRX_N5 <26>
PCIE_ITX_C_PRX_N1 <27>PCIE_ITX_C_PRX_P1 <27>
PCIE_ITX_C_PRX_P2 <26>PCIE_ITX_C_PRX_N2 <26>PCIE_ITX_C_PRX_P3 <25>PCIE_ITX_C_PRX_N3 <25>
PCIE_ITX_C_PRX_P0 <26>PCIE_ITX_C_PRX_N0 <26>
PCIE_PTX_C_IRX_P0<26>PCIE_PTX_C_IRX_N0<26>PCIE_PTX_C_IRX_P1<27>PCIE_PTX_C_IRX_N1<27>
PCIE_PTX_C_IRX_P3<25>PCIE_PTX_C_IRX_N3<25>
PCIE_PTX_C_IRX_P2<26>PCIE_PTX_C_IRX_N2<26>
H_CADIP[0..15] <4>
H_CADON[0..15]<4> H_CADIN[0..15] <4>
H_CADOP[0..15]<4>
SB_RX1P<19>SB_RX1N<19>
SB_RX0P<19>SB_RX0N<19>
SB_TX0P <19>
SB_TX1N <19>
SB_TX0N <19>SB_TX1P <19>
SB_RX3P<19>SB_RX3N<19>
SB_RX2P<19>SB_RX2N<19>
SB_TX2P <19>SB_TX2N <19>
SB_TX3N <19>SB_TX3P <19>
TMDS_B_CLK <18>TMDS_B_CLK# <18>
TMDS_B_DATA0 <18>TMDS_B_DATA0# <18>
TMDS_B_DATA1 <18>TMDS_B_DATA1# <18>
TMDS_B_DATA2 <18>TMDS_B_DATA2# <18>
+1.1VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RS780-HT/PCIECustom
10 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
NEED CHECK R68 & R69 WITH AMD
0718 Place within 1"layout 1:2
0718 Place within 1"layout 1:2
LAN10/100
WLAN
New Card
CardReader
DP0GFX_TX0,TX1,TX2 and TX3
RS780M Display Port Support (muxed on GFX)
DP1GFX_TX4,TX5,TX6 and TX7
AUX0 and HPD0
AUX1 and HPD1
TV Tuner
9/20 SA00001ZG00(A11) S IC 216-0674001-00/RS780M FCBGA528P 0FH
C158 0.1U_0402_16V7K 1 2
R56 2K_0402_1% 1 2
C162 0.1U_0402_16V7K 1 2
C165 0.1U_0402_16V7K 1 2
C168 0.1U_0402_16V7K 1 2
C159 0.1U_0402_16V7K 1 2
R57 301_0402_1%1 2
C152 0.1U_0402_16V7K 1 2
C161 0.1U_0402_16V7K 1 2
PART 1 OF 6
HYP
ER T
RA
NSP
OR
T C
PU I/
F
U3A
RS780M_FCBGA528
HT_RXCAD15PU19HT_RXCAD15NU18
HT_RXCAD14PU20HT_RXCAD14NU21
HT_RXCAD13PV21HT_RXCAD13NV20
HT_RXCAD12PW21HT_RXCAD12NW20
HT_RXCAD11PY22HT_RXCAD11NY23
HT_RXCAD10PAA24HT_RXCAD10NAA25
HT_RXCAD9PAB25HT_RXCAD9NAB24
HT_RXCAD8PAC24HT_RXCAD8NAC25
HT_RXCAD7PN24HT_RXCAD7NN25
HT_RXCAD6PP25HT_RXCAD6NP24
HT_RXCAD5PP22HT_RXCAD5NP23
HT_RXCAD4PT25HT_RXCAD4NT24
HT_RXCAD3PU24HT_RXCAD3NU25
HT_RXCAD2PV25HT_RXCAD2NV24
HT_RXCAD1PV22HT_RXCAD1NV23
HT_RXCAD0PY25HT_RXCAD0NY24
HT_RXCLK1PAB23HT_RXCLK1NAA22
HT_RXCLK0PT22HT_RXCLK0NT23
HT_RXCTL0PM22HT_RXCTL0NM23HT_RXCTL1PR21HT_RXCTL1NR20
HT_RXCALPC23HT_RXCALNA24
HT_TXCAD15P P18HT_TXCAD15N M18
HT_TXCAD14P M21HT_TXCAD14N P21
HT_TXCAD13P M19HT_TXCAD13N L18
HT_TXCAD12P L19HT_TXCAD12N J19
HT_TXCAD11P J18HT_TXCAD11N K17
HT_TXCAD10P J20HT_TXCAD10N J21
HT_TXCAD9P G20HT_TXCAD9N H21
HT_TXCAD8P F21HT_TXCAD8N G21
HT_TXCAD7P K23HT_TXCAD7N K22
HT_TXCAD6P K24HT_TXCAD6N K25
HT_TXCAD5P J25HT_TXCAD5N J24
HT_TXCAD4P H23HT_TXCAD4N H22
HT_TXCAD3P F23HT_TXCAD3N F22
HT_TXCAD2P F24HT_TXCAD2N F25
HT_TXCAD1P E24HT_TXCAD1N E25
HT_TXCAD0P D24HT_TXCAD0N D25
HT_TXCLK1P L21HT_TXCLK1N L20
HT_TXCLK0P H24HT_TXCLK0N H25
HT_TXCTL0P M24HT_TXCTL0N M25HT_TXCTL1P P19HT_TXCTL1N R18
HT_TXCALP B24HT_TXCALN B25
C155 0.1U_0402_16V7K 1 2C156 0.1U_0402_16V7K 1 2
C166 0.1U_0402_16V7K 1 2
R55 1.27K_0402_1% 1 2
C153 0.1U_0402_16V7K 1 2
C164 0.1U_0402_16V7K 1 2
C167 0.1U_0402_16V7K 1 2
C160 0.1U_0402_16V7K 1 2
C154 0.1U_0402_16V7K 1 2
C169 0.1U_0402_16V7K 1 2
R58 301_0402_1%1 2
C163 0.1U_0402_16V7K 1 2
C157 0.1U_0402_16V7K 1 2
PART 2 OF 6
PCIE
I/F
GFX
PCIE I/F GPP
PCIE I/F SB
U3B
RS780M_FCBGA528
SB_TX3P AD5SB_TX3N AE5
GPP_TX2P AA2GPP_TX2N AA1GPP_TX3P Y1GPP_TX3N Y2
SB_RX3PW5SB_RX3NY5
GPP_RX2PAD1GPP_RX2NAD2GPP_RX3PV5GPP_RX3NW6
SB_TX0P AD7SB_TX0N AE7SB_TX1P AE6SB_TX1N AD6
SB_RX0PAA8SB_RX0NY8SB_RX1PAA7SB_RX1NY7
PCE_CALRP(PCE_BCALRP) AC8PCE_CALRN(PCE_BCALRN) AB8
SB_TX2N AC6SB_RX2PAA5SB_RX2NAA6 SB_TX2P AB6
GPP_RX0PAE3GPP_RX0NAD4GPP_RX1PAE2GPP_RX1NAD3
GPP_TX0P AC1GPP_TX0N AC2GPP_TX1P AB4GPP_TX1N AB3
GFX_RX0PD4GFX_RX0NC4GFX_RX1PA3GFX_RX1NB3GFX_RX2PC2GFX_RX2NC1GFX_RX3PE5GFX_RX3NF5GFX_RX4PG5GFX_RX4NG6GFX_RX5PH5GFX_RX5NH6GFX_RX6PJ6GFX_RX6NJ5GFX_RX7PJ7GFX_RX7NJ8GFX_RX8PL5GFX_RX8NL6GFX_RX9PM8GFX_RX9NL8GFX_RX10PP7GFX_RX10NM7GFX_RX11PP5GFX_RX11NM5GFX_RX12PR8GFX_RX12NP8GFX_RX13PR6GFX_RX13NR5GFX_RX14PP4GFX_RX14NP3GFX_RX15PT4GFX_RX15NT3
GFX_TX0P A5GFX_TX0N B5GFX_TX1P A4GFX_TX1N B4GFX_TX2P C3GFX_TX2N B2GFX_TX3P D1GFX_TX3N D2GFX_TX4P E2GFX_TX4N E1GFX_TX5P F4GFX_TX5N F3GFX_TX6P F1GFX_TX6N F2GFX_TX7P H4GFX_TX7N H3GFX_TX8P H1GFX_TX8N H2GFX_TX9P J2GFX_TX9N J1
GFX_TX10P K4GFX_TX10N K3GFX_TX11P K1GFX_TX11N K2GFX_TX12P M4GFX_TX12N M3GFX_TX13P M1GFX_TX13N M2GFX_TX14P N2GFX_TX14N N1GFX_TX15P P1GFX_TX15N P2
GPP_TX4P Y4GPP_TX4N Y3GPP_TX5P V1GPP_TX5N V2
GPP_RX4PU5GPP_RX4NU6GPP_RX5PU8GPP_RX5NU7
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDA18HTPLL
+NB_HTPVDD
+AVDD2
NB_THERMAL_DCNB_THERMAL_DA
TV_LUMA
NB_RESET#
+AVDD1
RED
BLUE
CRT_VSYNC
GREEN
CRT_HSYNC
NB_PWRGD
NB_ALLOW_LDTSTOPNB_LDTSTOP#
+VDDLT18
TV_COMPS
TV_CRMA
+AVDDQ
+VDDLTP18
RED
GREEN
BLUE
+NB_PLLVDD
+VDDA18PCIEPLL
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
UMA_CRT_CLK<16>UMA_CRT_DAT<16>
HDMIDAT_UMA<18>
NB_PWRGD<20>
CRT_HSYNC<14,16>CRT_VSYNC<14,16>
UMA_ENVDD <17>ENBKL <33>
NBGFX_CLK<15>NBGFX_CLK#<15>
CLK_SBLINK_BCLK<15>CLK_SBLINK_BCLK#<15>
HPD <18>
CLK_NBHT<15>CLK_NBHT#<15>
PLT_RST#<14,19,25,26,27,32,33>
RED<16>
GREEN<16>
BLUE<16>
AUX_CAL<14>
RS780_DFT_GPIO_0<14> SUS_STAT# <20>
LVDS_A2+ <17>
LVDS_A0+ <17>
LVDS_A1+ <17>
LVDS_BCLK- <17>LVDS_BCLK+ <17>
LVDS_B1+ <17>LVDS_B0- <17>
LVDS_B1- <17>
LVDS_B0+ <17>
LVDS_ACLK- <17>
HDMICLK_UMA<18>
LVDS_B2- <17>LVDS_B2+ <17>
LVDS_ACLK+ <17>
LVDS_A2- <17>
LVDS_A0- <17>
LVDS_A1- <17>
LCD_DDC_DAT<17>LCD_DDC_CLK<17>
NB_OSC_14.318M<15>
LDT_STOP#<6,19>
CPU_LDT_REQ#<6,19>
SUS_STAT_R# <14>
+3VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+1.1VS
+1.1VS
+1.8VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RS780 VEDIO/CLK GENCustom
11 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Strap pin
AVDD=100mA
flash issue check IALAA
Strap pin
PA_RS780A4placement close to NB ball
NB temp to SB
Strap pin
11/13 updateL Install when SB700 A12 use
11/05 update
L 0.08A/10mil/1vias
11/13 update
R62 150_0402_1%1 2
R70 0_0402_5% 1 2
R714.7K_0402_5%
1 2
C179
2.2U_0603_6.3V4Z
1
2
L4
0_0603_5%
C1802.2U_0603_6.3V4Z
1
2
L5
BLM18PG121SN1D_06031 2
L2
BLM18PG121SN1D_0603
1 2
R67
0_0402_5%
1 2
L7
BLM18PG121SN1D_0603
1 2
R88 10K_0402_5%
12
R69 0_0402_5% 1 2
L10
BLM18PG121SN1D_0603
1 2
T49PAD
R371 10K_0402_5%1 2
C1752.2U_0603_6.3V4Z
1
2
T50PAD
C1722.2U_0603_6.3V4Z
1
2
T47 PAD
R63 150_0402_1%1 2
C176
2.2U_0603_6.3V4Z
1
2
C1730.1U_0402_16V4Z
1
2
L9
BLM18PG121SN1D_0603
1 2
PART 3 OF 6
PMC
LOC
Ks
PLL
PWR
MIS.
CR
T/TV
OU
TLV
TM
U3C
RS780M_FCBGA528
VDDA18HTPLLH17
SYSRESETbD8POWERGOODA10LDTSTOPbC10ALLOW_LDTSTOPC12
REFCLK_P/OSCIN(OSCIN)E11
PLLVDD(NC)A12
HPD(NC) D10DDC_CLK0/AUX0P(NC)A8 DDC_DATA0/AUX0N(NC)B8
THERMALDIODE_P AE8THERMALDIODE_N AD8
I2C_CLKB9
STRP_DATAB10
GFX_REFCLKPT2GFX_REFCLKNT1
GPP_REFCLKPU1GPP_REFCLKNU2
PLLVDD18(NC)D14PLLVSS(NC)B12
TXOUT_L0P(NC) A22TXOUT_L0N(NC) B22TXOUT_L1P(NC) A21TXOUT_L1N(NC) B21TXOUT_L2P(NC) B20
TXOUT_L2N(DBG_GPIO0) A20TXOUT_L3P(NC) A19
TXOUT_U0P(NC) B18
TXOUT_L3N(DBG_GPIO2) B19
TXOUT_U0N(NC) A18TXOUT_U1P(PCIE_RESET_GPIO3) A17TXOUT_U1N(PCIE_RESET_GPIO2) B17
TXOUT_U2P(NC) D20TXOUT_U2N(NC) D21
TXOUT_U3P(PCIE_RESET_GPIO5) D18TXOUT_U3N(NC) D19
TXCLK_LP(DBG_GPIO1) B16TXCLK_LN(DBG_GPIO3) A16
TXCLK_UP(PCIE_RESET_GPIO4) D16TXCLK_UN(PCIE_RESET_GPIO1) D17
VDDLTP18(NC) A13VSSLTP18(NC) B13
C_Pr(DFT_GPIO5)E17Y(DFT_GPIO2)F17COMP_Pb(DFT_GPIO4)F15
RED(DFT_GPIO0)G18
TMDS_HPD(NC) D9I2C_DATAA9
TESTMODE D13
HT_REFCLKNC24 HT_REFCLKPC25
SUS_STAT#(PWM_GPIO5) D12
GREEN(DFT_GPIO1)E18
BLUE(DFT_GPIO3)E19
DAC_VSYNC(PWM_GPIO6)B11 DAC_HSYNC(PWM_GPIO4)A11
DAC_RSET(PWM_GPIO1)G14
AVDD1(NC)F12AVDD2(NC)E12
REDb(NC)G17
GREENb(NC)F18
AVDDDI(NC)F14AVSSDI(NC)G15AVDDQ(NC)H15AVSSQ(NC)H14
VDDLT18_2(NC) B15VDDLT33_1(NC) A14VDDLT33_2(NC) B14
VSSLT1(VSS) C14VSSLT2(VSS) D15
VDDLT18_1(NC) A15
VSSLT3(VSS) C16VSSLT4(VSS) C18VSSLT5(VSS) C20
LVDS_DIGON(PCE_TCALRP) E9LVDS_BLON(PCE_RCALRP) F7
LVDS_ENA_BL(PWM_GPIO2) G12
VSSLT6(VSS) E20
VDDA18PCIEPLL1D7VDDA18PCIEPLL2E7
BLUEb(NC)F19
AUX_CAL(NC)C8
GPPSB_REFCLKP(SB_REFCLKP)V4GPPSB_REFCLKN(SB_REFCLKN)V3
DDC_DATA1/AUX1N(NC)A7 DDC_CLK1/AUX1P(NC)B7
DAC_SCL(PCE_RCALRN)F8DAC_SDA(PCE_TCALRN)E8
REFCLK_N(PWM_GPIO3)F11
VSSLT7(VSS) C22
RSVDG11
R68
0_0402_5%
1 2
R64 150_0402_1%1 2
T46 PAD
L6
BLM18PG121SN1D_0603
1 2
L11
BLM18PG121SN1D_0603
1 2
R724.7K_0402_5%
1 2
C1712.2U_0603_6.3V4Z
1
2
C178
2.2U_0603_6.3V4Z
1
2
R801.8K_0402_5%
1 2
C1744.7U_0805_10V4Z
1
2
C1702.2U_0603_6.3V4Z
1
2
T48 PAD
R65 715_0402_1%
1 2
R66 0_0402_5% 1 2
R77 0_0402_5%
1 2
L3
BLM18PG121SN1D_06031 2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MEM_DQS_P0
MEM_DQS_P1MEM_DQS_N0
MEM_A9
MEM_A2 MEM_A12
MEM_DQ9
MEM_DQS_P0
+MEM_VREF
MEM_DQS_N0
MEM_ODT
MEM_DQS_P1
MEM_DM1
MEM_DQS_N1
MEM_DQ12 MEM_A2
MEM_DQ2
MEM_A8
MEM_DQ15
MEM_A1
+NB_IOPLLVDD+1.8V_IOPLLVDD
MEM_A3
+MEM_VREF
MEM_A0
MEM_DQ0
MEM_DQ7MEM_DQ3
MEM_DQ5
MEM_DQ1
MEM_DQ14
MEM_DQ6
MEM_A11
MEM_BA0MEM_BA1
MEM_CKE
MEM_WE#MEM_CS#
MEM_A4
MEM_DQS_N1MEM_RAS#MEM_CAS#
MEM_BA2
MEM_DM1
MEM_CLKPMEM_CLKN
MEM_ODT
MEM_DM0
MEM_A10
MEM_DQ8
+MEM_VREF1
MEM_A11
MEM_A8MEM_A9
MEM_CAS#
MEM_CS#
MEM_CLKN
MEM_CKE
MEM_RAS#
MEM_CLKP
MEM_WE#
MEM_DM0
MEM_BA0
MEM_A7
MEM_DQ11
+MEM_VREF1
MEM_A0
MEM_A10
MEM_BA2
MEM_A3
MEM_DQ10
MEM_BA1
MEM_A6
+VDDL
MEM_DQ13 MEM_A1
MEM_A6MEM_A7
MEM_A4MEM_A5
MEM_DQ4
MEM_DQ2
MEM_DQ0MEM_DQ1
MEM_DQ3
MEM_DQ10
MEM_DQ7
MEM_DQ11
MEM_DQ8
MEM_DQ5MEM_DQ6
MEM_DQ9
MEM_DQ15
MEM_DQ13MEM_DQ14
MEM_DQ4
MEM_DQ12
MEM_A12
MEM_A5
MEM_COMP_P
MEM_COMP_N
+1.8VS
+1.8VS
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ+1.8V_MEM_VDDQ
+1.1VS
+1.8V_MEM_VDDQ
+1.8V_MEM_VDDQ
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RS780 Side-Port DDR2 SDRAMCustom
12 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Side Port disable,VREF need connect to +1.8VS for DDR2
Layout Note: 50 mil for VSSDL
MEM_COMP_P and MEM_COMP_N tracewidth >=10mils and 10mils spacing fromother Signals in X,Y,Z directions
220 ohm @ 100MHz,2A
09/19 update
09/19 updateDel SI3456 and MEM related Pull-high.
9/20 SA000012G20 S IC D2 32M16 HY5PS121621CFP-25 FBGA 84P
10/8 update
10/8 update
R97
1K_0
402_
1%
SIDE@
12
C60
7
1U_0
402_
6.3V
4Z
SIDE@
1
2
C19
5
0.1U
_040
2_16
V4Z
SIDE@
1
2
L12
BLM18PG121SN1D_0603
1 2
L15
0_0805_5%SIDE@1 2R
96
1K_0
402_
1%
SIDE@
12
C1812.2U_0603_6.3V4Z
SIDE@
1
2
C20
1
0.1U
_040
2_16
V4Z
SIDE@
1
2C60
8
1U_0
402_
6.3V
4Z
SIDE@
1
2
C20
0
0.1U
_040
2_16
V4Z
SIDE@
1
2
L96
0_0603_5%SIDE@1 2
C20
2
0.1U
_040
2_16
V4Z
SIDE@
1
2SBD_MEM/DVO_I/F
PAR 4 OF 6U3D
RS780M_FCBGA528
MEM_A0(NC)AB12MEM_A1(NC)AE16MEM_A2(NC)V11MEM_A3(NC)AE15MEM_A4(NC)AA12MEM_A5(NC)AB16MEM_A6(NC)AB14MEM_A7(NC)AD14MEM_A8(NC)AD13MEM_A9(NC)AD15MEM_A10(NC)AC16MEM_A11(NC)AE13MEM_A12(NC)AC14MEM_A13(NC)Y14
MEM_BA0(NC)AD16MEM_BA1(NC)AE17MEM_BA2(NC)AD17
MEM_RASb(NC)W12MEM_CASb(NC)Y12MEM_WEb(NC)AD18MEM_CSb(NC)AB13MEM_CKE(NC)AB18MEM_ODT(NC)V14
MEM_CKP(NC)V15MEM_CKN(NC)W14
MEM_DM0(NC) W17MEM_DM1/DVO_D8(NC) AE19
MEM_DQS0P/DVO_IDCKP(NC) Y17MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_DQS1P(NC) AD20MEM_DQS1N(NC) AE21
MEM_DQ0/DVO_VSYNC(NC) AA18MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_DQ2/DVO_DE(NC) AA19MEM_DQ3/DVO_D0(NC) Y19
MEM_DQ4(NC) V17MEM_DQ5/DVO_D1(NC) AA17MEM_DQ6/DVO_D2(NC) AA15MEM_DQ7/DVO_D4(NC) Y15MEM_DQ8/DVO_D3(NC) AC20MEM_DQ9/DVO_D5(NC) AD19
MEM_DQ10/DVO_D6(NC) AE22MEM_DQ11/DVO_D7(NC) AC18
MEM_DQ12(NC) AB20MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22MEM_DQ15/DVO_D11(NC) AD21
MEM_COMPP(NC)AE12MEM_COMPN(NC)AD12 MEM_VREF(NC) AE18
IOPLLVDD18(NC) AE23
IOPLLVSS(NC) AD23
IOPLLVDD(NC) AE24
R93 40.2_0402_1%SIDE@12
R98
1K_0
402_
1% SIDE@
12
C19
9
0.1U
_040
2_16
V4Z
SIDE@
1
2
U61
HY5PS561621AFP-25_FBGA84SIDE@
VREFJ2
LDMF3UDMB3
DQ14 B1DQ13 D9DQ12 D1DQ11 D3DQ10 D7
DQ9 C2DQ8 C8DQ7 F9DQ6 F1DQ5 H9DQ4 H1DQ3 H3DQ2 H7DQ1 G2DQ0 G8
BA1L3 BA0L2
A11P7A10/APM2A9P3A8P8A7P2A6N7A5N3A4N8A3N2
A0M8 A1M3 A2M7
RASK7
CKEK2
ODTK9
CSL8
CASL7
CKJ8 CKK8
WEK3 VDDQ G9
VDDQ A9VDDQ C1VDDQ C3VDDQ C7VDDQ C9VDDQ E9VDDQ G1
VSSQ A7VSSQ B2VSSQ B8VSSQ D2VSSQ D8VSSQ E7VSSQ F2VSSQ F8VSSQ H2VSSQ H8
VSS A3VSS E3VSS J3VSS N1VSS P9
UDQSA8 UDQSB7
LDQSE8 LDQSF7
VDDQ G3VDDQ G7
VDD A1VDD E1VDD J9VDD M9VDD R1
A12R2
DQ15 B9
VDDL J1VSSDL J7
NCR8
NCA2
NCL1NCR3NCR7
NCE2
C1832.2U_0603_6.3V4Z
SIDE@
1
2
R91
100_0402_1%SIDE@
12
C184
1U_0603_10V6KSIDE@
1
2
C1820.1U_0402_16V4Z
SIDE@
1
2
R99
1K_0
402_
1%
SIDE@
12
R92 40.2_0402_1%SIDE@12
C19
6
0.1U
_040
2_16
V4Z
SIDE@
1
2
C203
22U
_080
5_6.
3V6M
SIDE@
1
2
L13
BLM18PG121SN1D_0603
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDA11PCIE
+1.8V_VDD_MEM
+VDDHTRX
+VDDHT
+VDDA18PCIE
+VREF1.35V
+1.8V_VDD_SP
+VDDHTTX
VLDT_EN#<36>
+1.1VS
+1.8VS
+1.1VS +NB_VDDC
+1.8VS
+3VS
+1.8VS
+1.2V_HT
+1.1VS
+3VS
+1.8VS
+1.35VS
+1.35VS
+1.8VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RS780 PWR/GNDCustom
13 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
2A
2A
2A
2A
VDDA_12=2.5A
VDD_CORE=5A
L Just for RS780M A11 version boot issue
11/20 update
11/20 update
10/04 update
10/8 update
L 0.6A/50mil/4vias
L 0.45A/40mil/3vias
L 0.5A/50mil/4vias
L 0.25A/30mil/2vias
L 0.7A/60mil/4vias
L 7A/280mil/16vias
L 0.15A/30mil/2vias11/13 update
C218
0.1U_0402_16V4Z
1
2 C223 0.1U_0402_16V4Z 12
C23
00.
1U_0
402_
16V4
Z
1
2
C599 0.1U_0402_16V4ZSIDE@12
C2354.7U_0805_10V4Z
1
2
C225
4.7U_0805_10V4Z
1
2
C2530.1U_0402_16V4Z
1 2
C211 10U_0805_10V4Z
L18
FBMA-L11-201209-221LMA30T_0805
12
C207
0.1U_0402_16V4Z
1
2
C1067
10U_0805_10V4Z@
1
2
+C234
330U_D2E_2.5VM_R15
1
2
C24
40.
1U_0
402_
16V4
Z
1
2
C2500.1U_0402_16V4Z
1 2
R1051 0_0603_5%1 2
C2080.1U_0402_16V4Z
1
2
C2511U_0402_6.3V4Z
1
2
R10151K_0402_1%
@
12
C24
00.
1U_0
402_
16V4
Z
1
2
C10680.1U_0402_16V7K@
1
2
C210
0.1U_0402_16V4Z
1
2
L19
FBMA-L11-201209-221LMA30T_080512
C239
0.1U_0402_16V4Z
1
2
L16
FBMA-L11-201209-221LMA30T_0805
12
L22
FBMA-L11-201209-221LMA30T_0805
12
PART 5/6
POW
ER
U3E
RS780M_FCBGA528
VDDHT_1J17VDDHT_2K16VDDHT_3L16VDDHT_4M16VDDHT_5P16VDDHT_6R16VDDHT_7T16
VDDHTTX_1AE25VDDHTTX_2AD24VDDHTTX_3AC23VDDHTTX_4AB22VDDHTTX_5AA21VDDHTTX_6Y20VDDHTTX_7W19VDDHTTX_8V18
VDDHTRX_1H18VDDHTRX_2G19VDDHTRX_3F20VDDHTRX_4E21VDDHTRX_5D22
VDD18_1F9VDD18_2G9VDD18_MEM1(NC)AE11VDD18_MEM2(NC)AD11
VDDA18PCIE_1J10VDDA18PCIE_2P10VDDA18PCIE_3K10
VDDA18PCIE_10Y9VDDA18PCIE_11AA9VDDA18PCIE_12AB9VDDA18PCIE_13AD9VDDA18PCIE_14AE9
VDDA18PCIE_6W9VDDA18PCIE_7H9
VDDPCIE_1 A6VDDPCIE_2 B6VDDPCIE_3 C6VDDPCIE_4 D6VDDPCIE_5 E6VDDPCIE_6 F6VDDPCIE_7 G7VDDPCIE_8 H8VDDPCIE_9 J9
VDDA18PCIE_4M10VDDA18PCIE_5L10
VDDC_1 K12VDDC_2 J14VDDC_3 U16
VDDPCIE_11 M9
VDDC_4 J11VDDC_5 K15
VDDPCIE_10 K9
VDDC_6 M12VDDC_7 L14VDDC_8 L11VDDC_9 M13
VDDC_10 M15VDDC_11 N12VDDC_12 N14VDDC_13 P11VDDC_14 P13VDDC_15 P14VDDC_16 R12VDDC_17 R15VDDC_18 T11VDDC_19 T15VDDC_20 U12VDDC_21 T14
VDD33_1(NC) H11VDD33_2(NC) H12
VDD_MEM1(NC) AE10VDD_MEM2(NC) AA11VDD_MEM3(NC) Y11VDD_MEM4(NC) AD10
VDD_MEM6(NC) AC10VDD_MEM5(NC) AB10
VDDA18PCIE_8T10
VDDC_22 J16
VDDPCIE_12 L9
VDDA18PCIE_9R10
VDDPCIE_13 P9VDDPCIE_14 R9VDDPCIE_15 T9VDDPCIE_16 V9VDDPCIE_17 U9
VDDA18PCIE_15U10
VDDHTRX_6B23VDDHTRX_7A23
VDDHTTX_9U17VDDHTTX_10T17VDDHTTX_11R17VDDHTTX_12P17VDDHTTX_13M17
C24
20.
1U_0
402_
16V4
Z
1
2
C2170.1U_0402_16V4Z
1
2
C1064
10U_0805_10V4Z@
1
2
L17
FBMA-L11-201209-221LMA30T_0805
1 2
C236
0.1U_0402_16V4Z
1
2
C229
0.1U_0402_16V4Z
1
2
C2521U_0402_6.3V4Z
1
2
C219 1U_0402_6.3V4Z
1 2
C212 10U_0805_10V4Z
C226
0.1U_0402_16V4Z
1
2
C24
70.
1U_0
402_
16V4
Z
1
2
C2154.7U_0805_10V4Z
1
2
L20FBMA-L11-201209-221LMA30T_0805
1 2
C598 0.1U_0402_16V4ZSIDE@12
C23
10.
1U_0
402_
16V4
Z
1
2
C222 1U_0402_6.3V4Z
1 2C214
0.1U_0402_16V4Z 1
2
C249 4.7U_0805_10V4ZSIDE@12
C23
20.
1U_0
402_
16V4
Z
1
2
C220 1U_0402_6.3V4Z
1 2
C24
30.
1U_0
402_
16V4
Z
1
2C238
0.1U_0402_16V4Z
1
2
R1054
0_0603_5%SIDE@1 2
R1017 0_0402_5%@1 2
C2094.7U_0805_10V4Z
1
2
C246
4.7U_0805_10V4Z
1
2
C2060.1U_0402_16V4Z
1
2
L21FBMA-L11-201209-221LMA30T_0805
1 2
C221 1U_0402_6.3V4Z
1 2
C227
0.1U_0402_16V4Z
1
2
C24
510
U_0
805_
10V4
Z
1
2
C216
0.1U_0402_16V4Z
1
2
C228
0.1U_0402_16V4Z
1
2
C224 0.1U_0402_16V4Z 12
U64
G2992F1U_SO8@
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
C237
0.1U_0402_16V4Z
1
2
C1066
0.1U_0402_16V7K@
1
2
PART 6/6
GR
OU
ND
U3F
RS780M_FCBGA528
VSSAHT1A25VSSAHT2D23VSSAHT3E22VSSAHT4G22VSSAHT5G24VSSAHT6G25VSSAHT7H19VSSAHT8J22VSSAHT9L17VSSAHT10L22VSSAHT11L24VSSAHT12L25VSSAHT13M20VSSAHT14N22VSSAHT15P20VSSAHT16R19VSSAHT17R22VSSAHT18R24VSSAHT19R25
VSSAHT21U22VSSAHT22V19VSSAHT23W22VSSAHT24W24VSSAHT25W25VSSAHT26Y21VSSAHT27AD25
VSS2 D11VSS3 G8VSS4 E14VSS5 E15
VSS7 J12VSS8 K14VSS9 M11
VSS10 L15
VSS11L12VSS12M14VSS13N13VSS14P12VSS15P15VSS16R11VSS17R14VSS18T12VSS19U14VSS20U11VSS21U15VSS22V12VSS23W11VSS24W15VSS25AC12VSS26AA14VSS27Y18VSS28AB11VSS29AB15VSS30AB17VSS31AB19VSS32AE20
VSSAPCIE1 A2VSSAPCIE2 B1VSSAPCIE3 D3VSSAPCIE4 D5VSSAPCIE5 E4VSSAPCIE6 G1VSSAPCIE7 G2VSSAPCIE8 G4VSSAPCIE9 H7
VSSAPCIE10 J4VSSAPCIE11 R7VSSAPCIE12 L1VSSAPCIE13 L2VSSAPCIE14 L4VSSAPCIE15 L7
VSS34K11
VSSAPCIE16 M6VSSAPCIE17 N4VSSAPCIE18 P6VSSAPCIE19 R1VSSAPCIE20 R2VSSAPCIE21 R4VSSAPCIE22 V7VSSAPCIE23 U4VSSAPCIE24 V8VSSAPCIE25 V6VSSAPCIE26 W1VSSAPCIE27 W2VSSAPCIE28 W4VSSAPCIE29 W7VSSAPCIE30 W8VSSAPCIE31 Y6VSSAPCIE32 AA4VSSAPCIE33 AB5VSSAPCIE34 AB1VSSAPCIE35 AB7VSSAPCIE36 AC3VSSAPCIE37 AC4VSSAPCIE38 AE1VSSAPCIE39 AE4VSSAPCIE40 AB2
VSS1 AE14
VSSAHT20H20
VSS33AB21
VSS6 J15
C1065
1U_0603_10V6K@
1
2
C248 0.1U_0402_16V4ZSIDE@12
G
D
S
Q1632N7002_SOT23-3@
2
13
L95
FBMA-L11-201209-221LMA30T_0805@12
R1016
3K_0402_5%@
12
C23
310
U_0
805_
10V4
Z
1
2
C597 0.1U_0402_16V4ZSIDE@12
C24
10.
1U_0
402_
16V4
Z
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUS_STAT_R#<11> PLT_RST# <11,19,25,26,27,32,33>
RS780_DFT_GPIO_0<11>
CRT_HSYNC<11,16>
CRT_VSYNC<11,16>
AUX_CAL<11>
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RS780 STRAPSCustom
14 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)1. Disable (RS740/RS780) 0 : Enable (RS740/RS780)
RX780: Enables the Test Debug Bus using PCIE bus1 : Disable ( Can still be enabled using nbcfg register access )0 : Enable
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
Enables the Test Debug Bus using GPIO.1 : Disable (RS780) Enable (RX780)0 : Enable (RS780) Disable (RX780)PIN: RX780:NB_TV_C; RS740: RS740_DFT_GPIO5; RS780: VSYNC#
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Selects Loading of STRAPS from EPROM1 : Bypass the loading of EEPROM straps and use Hardware Default Values0 : I2C Master can load strap values from EEPROM if connected, or usedefault values if not connectedRS740/RX780: DFT_GPIO1 RS780:SUS_STAT
DFT_GPIO1: LOAD_EEPROM_STRAPS
RS780 use HSYNC to enable SIDE PORT (internal pull high)
RS780 DFT_GPIO1
RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K
10/09 update
11/28 update
11/28 update
R101 1K_0402_5%12
D4 CH751H-40PT_SOD323-2@2 1
R105 1K_0402_5%@12
R104 150_0402_1%@1 2
R102 1K_0402_5%@12
R107 3K_0402_5%SIDE@12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLKREQ_MCARD2#
CLK
_XTA
L_O
UT
CLK
_XTA
L_IN
CLKREQ_NCARD#CLKREQ_MCARD2#
CLK
_48M
_USB
_R
CLK_XTAL_IN
CLK_XTAL_OUT
NB
_OS
C_1
4.31
8M_R
SEL_
SATA
27M
_SEL
SEL_SATA
27M_SEL
CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R
CLKREQ_NCARD#
CLKREQ_MCARD1#
CLKREQ_MCARD1#
CLKREQ_LAN#
CLKREQ_LAN#
CLKREQ4
CLKREQ4
CLK_48M_USB
NB_OSC_14.318M
CLK_14M_SIO
CLK_PCIE_MCARD0# <27>CLK_PCIE_MCARD0 <27>
NB_OSC_14.318M <11>
CLK_PCIE_MCARD2<26>CLK_PCIE_MCARD2#<26>
CLK_PCIE_MCARD1#<26>CLK_PCIE_MCARD1<26>
CLK_CPU_BCLK# <6>
CLK_CPU_BCLK <6>
NBGFX_CLK <11>NBGFX_CLK# <11>
CLK_PCIE_NCARD <26>CLK_PCIE_NCARD# <26>
CLKREQ_NCARD# <26>CLKREQ_MCARD2# <26>
SMB_CK_CLK0<8,9,20,30>SMB_CK_DAT0<8,9,20,30>
CLK_NBHT# <11>CLK_NBHT <11>
CLK_48M_USB <20>
CLK_PCIE_LAN <25>CLK_PCIE_LAN# <25>
CLK_SBLINK_BCLK#<11>CLK_SBLINK_BCLK<11>
CLK_14M_SIO <32>
CLK_SBSRC_BCLK# <19>CLK_SBSRC_BCLK <19>
CLKREQ_MCARD1# <26>
CLKREQ_LAN# <25>
+3VS_CLK
+VDDCLK_IO
+3VS_CLK
+3VS
_CLK
+VD
DC
LK_I
O
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+VDDCLK_IO+1.2V_HT
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS_CLK
+3VS
_CLK
+3VS
_CLK
+3VS
_CLK
+VDDCLK_IO
+VDDCLK_IO
+VDDCLK_IO
+3VS_CLK
+3VS_CLK
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
Clock generatorCustom
15 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
100M DIFF(IN/OUT)*
HT_REFCLKP
RX780 RS780
NB CLOCK INPUT TABLE
100M DIFF100M DIFF
100M DIFF100M DIFF
14M SE (1.8V) 14M SE (1.1V)
NB CLOCKS
NC vref
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK 100M DIFF
Card Reader
SEL_SATA
* defaultconfigure as normal SRC(SRC_6) output
1*
0
configure as SATA output
MiniCard_2
CPU
MiniCard_1
GLAN
New Card
configure as single-ended 66MHz output1
*0 configure as differential 100MHz output
NB
NB GFX
configure as 27M and 27M_SS output
NB_OSC_14.318M
1 *
0 configure as SRC_7 output* default
RS780
1.8V 75R/100RRX780
1.1V 200R/100R
OSC_14M_NB
27M_SEL
PA_RS7X0A1
* default
Routing the trace at least 10mil
SB LINK SB SRC
Use voltage divider resistor R379 & R380 to pull low
PA_RS7X0A1
9/20 SA00001Z300 S IC SLG8SP626VTR QFN 72P CLK GEN9/20 SA000025B00 S IC RTM880N-795-GRT QFN 72P CLK GEN
For ICS need to pull high.For SLG is NC
EMI Caps for single end clock.
09/21 update09/29 update
10/03 update
11/28 update
R326 8.2K_0402_5%
1 2
Y2
14.31818MHZ_20P_6X1430004201
12
C460
0.1U_0402_16V4Z
1
2
C448
0.1U_0402_16V4Z
1
2
R946 0_0402_1%
1 2
C457
0.1U_0402_16V4Z1
2
R945 0_0402_1%
1 2
R167
0_0805_5%
1 2
R1039 8.2K_0402_5%
1 2
C456
0.1U_0402_16V4Z
1
2
C461
0.1U_0402_16V4Z
1
2
R324 8.2K_0402_5%
1 2
C464
22P_0402_50V8J
1
2
C465
22P_0402_50V8J
1
2
C458
0.1U_0402_16V4Z
1
2
R1808.2K_0402_5%
12
R220 33_0402_5% 1 2
C1074
5P_0402_50V8C@
1
2
R170 33_0402_5% 1 2
C454
0.1U_0402_16V4Z
1
2
C1076
5P_0402_50V8C@
1
2
C451
1U_0402_6.3V4Z
@1
2
C10755P_0402_50V8C@
1
2
C453
0.1U_0402_16V4Z1
2
C450
0.1U_0402_16V4Z
1
2
R1798.2K_0402_5%
@
12
R372 10K_0402_5% 1 2
R174 8.2K_0402_5%
1 2
C459
0.1U_0402_16V4Z
1
2
C449
0.1U_0402_16V4Z
1
2
R1818.2K_0402_5%
12
C44410U_0805_10V4Z
1
2
C446
0.1U_0402_16V4Z
1
2
C447
0.1U_0402_16V4Z
1
2
R325 8.2K_0402_5%
1 2
R379 200_0402_1% 1 2
C455
0.1U_0402_16V4Z1
2
R168
0_0805_5%
1 2
SLG8SP626VTR_QFN72_10x10
U10
VDD_CPU 54VDD_CPU_I/O 53
VSS_CPU 52CLKREQ_1# 51CLKREQ_2# 50
VDD_A 49
VSS_
SRC
19SR
C_1
#20
SR
C_1
21SR
C_0
#22
SR
C_0
23C
LKR
EQ_0
#24
ATIG
CLK
_2#
25AT
IGC
LK_2
26VS
S_AT
IG27
VD
D_A
TIG
_IO
28VD
D_A
TIG
29AT
IGC
LK_1
#30
ATIG
CLK
_131
ATIG
CLK
_0#
32
VSS_
SB_S
RC
36SB
_SR
C_1
35SB
_SR
C_1
#34
ATIG
CLK
_033
VSS_A 48VSS_SATA 47
SRC_6/SATA 46SRC_6#/SATA# 45
VDD_SATA 44CLKREQ_3# 43CLKREQ_4# 42
SB_SRC_SLOW# 41SB_SRC_0 40
SB_SRC_0# 39VDD_SB_SRC 38
VDD_SB_SRC_IO 37
REF
_1/S
EL_S
ATA
64R
EF_2
/SEL
_27
63VD
D_R
EF62
VD
D_H
TT61
HTT
_0/6
6M_0
60H
TT_0
#/66
M_1
59VS
S_H
TT58
PD#
57C
PU
_K8_
056
CPU
_K8_
0#55
SCL1SDA2VDD_DOT3SRC_7#/27M4SRC_7/27M_SS5VSS_DOT6SRC_5#7SRC_58SRC_4#9SRC_410VSS_SRC11VDD_SRC_IO12SRC_3#13SRC_314SRC_2#15SRC_216VDD_SRC17VDD_SRC_IO18
REF
_0/S
EL_H
TT66
65VS
S_R
EF66
XTAL
_IN
67XT
AL_O
UT
68VD
D_4
869
48M
Hz_
170
48M
Hz_
071
VSS_
4872
GN
D73
R186261_0402_1%@
12
C45210U_0805_10V4Z
1
2
R1045 8.2K_0402_5%@1 2
R380 100_0402_1%1 2
C445
0.1U_0402_16V4Z
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GREEN_L
D_DDCCLK
D_DDCDATA
HSYNC
VSYNC
BLUE_L
GREEN
RED
BLUE
RED_L
D_HSYNC
D_DDCCLK
VSYNC
HSYNC
D_VSYNC
D_DDCDATA
D_HSYNC <35>
D_VSYNC <35>
RED_L <35>
GREEN_L <35>
BLUE_L <35>
RED<11>
GREEN<11>
BLUE<11>
UMA_CRT_CLK<11>
UMA_CRT_DAT<11> D_DDCDATA <35>
D_DDCCLK <35>
CRT_HSYNC<11,14>
CRT_VSYNC<11,14>
+3VS
+CRT_VCC+CRT_VCC
+CRT_VCC+5VS
+CRT_VCC
+R_CRT_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
CRT ConnectorCustom
16 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
CRT CONNECTOR
11/14 update
Update PCBFootprint SUYIN_070546FR015S263ZR_15P-T: Change backJCRT.5<->JCRT.15 ;JCRT.14<->JCRT.4 ;JCRT.13<->JCRT.3 ;JCRT.12<->JCRT.2 ;JCRT.11<->JCRT.1
11/07 update
C858
22P_
0402
_50V
8J
1
2
C4730.1U_0402_16V4Z
1 2
U13SN74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1G
3P
5
L47
BLM15AG121SN1D_0402
1 2
U14SN74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1G
3P
5
R240 0_0603_5%
1 2
D34
DAN217_SC59
@
2 31
R2384.7K_0402_5%
12
JCRT
SUYIN_070546FR015S263ZRCONN@
RGND6ID011Red1GGND7SDA12Green2BGND8Hsync13Blue3+5V9Vsync14res4SGND10SCL15GND5
GND16GND17
L49
BLM15AG121SN1D_0402
1 2
D35
DAN217_SC59
@
2 31
R100
6.8K_0402_5%
R2374.7K_0402_5%
12
C856
470P_0402_50V8J
@
1
2
R211
150_
0402
_1%
12
C472
22P_
0402
_50V
8J
1
2
R241 0_0603_5%
1 2
C471
6P_0
402_
50V8
K
1
2
F2
1A_6VDC_MINISMDC110
21
Q10A2N7002DW-7-F_SOT363-6
61
2
L48
BLM15AG121SN1D_0402
1 2
C469
6P_0
402_
50V8
K
1
2
C857
470P_0402_50V8J
@
1
2
C470
10P_
0402
_50V
8J
@
1
2
R217
150_
0402
_1%
12
C859
6P_0
402_
50V8
K
1
2
Q10B2N7002DW-7-F_SOT363-6
3
5
4
C474
10P_
0402
_50V
8J
@
1
2
R218
6.8K_0402_5%
C4750.1U_0402_16V4Z
1
2
C476
22P_
0402
_50V
8J
1
2
C4770.1U_0402_16V4Z
@1 2
D37
DAN217_SC59
@
2 31
R214
150_
0402
_1%
12
D36
RB491D_SOT23
2 1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LVDS_A1+LVDS_A1-
BKOFF#
LVDS_A2+
LVDS_B0-LVDS_B0+
LVDS_B1-LVDS_B1+
LVDS_B2-LVDS_B2+
LVDS_BCLK-LVDS_BCLK+
LCD_DDC_DAT
DAC_BRIG
INV_PWM
LVDS_A0+LVDS_A0-
DMIC_CLKDMIC_DAT
LVDS_A2-
LCD_DDC_DATLCD_DDC_CLK
LCD_DDC_CLK
BKOFF#
LVDS_ACLK-LVDS_ACLK+
USB20_P5
USB20_N5
LVDS_A1+LVDS_A1-
LVDS_A2+
LVDS_A0+LVDS_A0-
LVDS_A2-
LVDS_ACLK- LVDS_ACLK+
LVDS_B2- LVDS_B2+
LVDS_B1- LVDS_B1+
LVDS_B0- LVDS_B0+
LVDS_BCLK- LVDS_BCLK+
USB20_P5USB20_N5
USB20N5USB20P5
DMICDATDMICCLK
USB20P5
USB20N5
USB20N5USB20P5USB20_P5
USB20_N5
DMIC_DATDMIC_CLK
DMICDATDMICCLK
INV_PWM <33>
DAC_BRIG <33>BKOFF# <33>
LVDS_B0+<11>LVDS_B0-<11>LVDS_B1+<11>LVDS_B1-<11>LVDS_B2+<11>LVDS_B2-<11>
LVDS_BCLK+<11>LVDS_BCLK-<11>
DMIC_DAT <28>DMIC_CLK <28>
LCD_DDC_DAT <11>LCD_DDC_CLK <11>
LVDS_A2+ <11>LVDS_A2- <11>
LVDS_A1+ <11>LVDS_A1- <11>
LVDS_ACLK+ <11>LVDS_ACLK- <11>LVDS_A0+ <11>LVDS_A0- <11>
UMA_ENVDD<11>
CAM_SHDN# <21>
USB20_P5<20>USB20_N5<20>
+3VS
+3VS
INVPWR_B++LCDVDD
+USB_CAM
+LCDVDD
+LCDVDD
+5VALW
+5VS
B+
+USB_CAM
+5VALW +USB_CAM
+USB_CAM
+USB_CAM
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
LCD CONN. / WebCamCustom
17 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
LVDS CONN
80mil
USB_VCCA is +3.9V, R892:100K;R891:215KKohm G916 Vref=1.25V when U54 installG916-390T1UF
11/09 update
09/19 update
9/20 SP02000EA00/SP02000BW00
09/26 update
WebCam+Digital Mic Reserve
L Close to JP7
L Close to JLVDS
10/08 update
11/07 update
80mil
11/07 update
L C718 install when U54 isRT9193-39GB
11/13 update
L Place R1027~R1030close to JLVDS
C1057 10P_0402_50V8J@1 2
C480
680P_0402_50V7K
12
C1059 10P_0402_50V8J@1 2
D52
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
C86
668
0P_0
402_
50V7
K
@1
2
R1030 0_0402_5%@1 2
C479680P_0402_50V7K
1
2
R4834.7K_0402_5%@1 2
R2754.7K_0402_5% 1 2
C86
768
0P_0
402_
50V7
K
@
12
R892
100K_0402_1%@
12
C1060 10P_0402_50V8J@1 2
R2762.2K_0402_5%
12
C720
10U_0805_10V4Z1
2
C1056 10P_0402_50V8J@1 2
Q45B2N7002DW-7-F_SOT363-6
3
5
4
C718
0.1U_0402_16V4Z
1
2
Q45A2N7002DW-7-F_SOT363-6
61
2
C863
1000P_0402_50V7K1
2
R1027 0_0402_5%@1 2
D22
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
R491200_0805_5%
1 2
C1061 10P_0402_50V8J@1 2
U54
RT9193-39GB_SOT23-5
VIN1
GND2
EN3
VOUT 5
BP 4
C1063 10P_0402_50V8J@1 2
R891
215K_0402_1%@
12
G
D
S
Q43SI2301BDS-T1-E3_SOT23-3
2
13
R225470_0805_5%
12
C4874.7U_0805_10V4Z
R2744.7K_0402_5% 1 2
C1062 10P_0402_50V8J@1 2
JP7
ACES_88231-06001CONN@
112233445566
G1 7
G2 8
R1013
0_0402_5%
12
C481
680P_0402_50V7K
12
R1029 0_0402_5%@1 2
JLVDS
ACES_88242-4001CONN@
1133557799111113131515171719192121232325252727292931313333353537373939
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
GND41 GND 42
C48
368
0P_0
402_
50V7
K
@
1
2
R222
100K_0402_5%1 2
C1072
10U_0805_10V4Z
@
1
2
R1014
0_0402_5%
@1 2
C48
268
0P_0
402_
50V7
K
@
1
2
C4910.1U_0402_16V4Z
1
2
PJP4PAD-OPEN 2x2m
21
L44
FBMA-L11-201209-221LMA30T_0805
1 2
R2241M_0402_5%
12
R1028 0_0402_5%@1 2
C1058 10P_0402_50V8J@1 2
C719
10U_0805_10V4Z1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDMI_R_D0-
HDMI_CLK-
HDMI_CLK+
HDMI_TX0+
HDMI_TX0-
HDMI_R_D0+
HDMI_TX1-
HDMI_R_D2-
HDMI_R_D2+HDMI_TX2+
HDMI_TX2-
HDMI_R_D1+
HDMI_R_D1-
HDMI_TX1+
HDMI_SDATA
HDMI_SCLK
HDMI_CLK+HDMI_TX0-HDMI_TX0+
HDMI_TX1-HDMI_TX1+
HDMI_TX2-HDMI_TX2+
HDMI_HPD
HDMI_CLK+HDMI_CLK-
HDMI_TX0+HDMI_TX0-
HDMI_TX1+HDMI_TX1-
HDMI_TX2+HDMI_TX2-
HDMI_CLK-
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D2-HDMI_R_D2+
HDMI_R_D1+HDMI_R_D1-HDMI_R_D0+HDMI_R_D0-HDMI_R_CK+HDMI_R_CK-
HDMI_SCLKHDMI_SDATA
HDMI_HPD
HDMICLK_UMA<11>
HDMIDAT_UMA<11>
HPD <11>
TMDS_B_CLK<10>TMDS_B_CLK#<10>
TMDS_B_DATA0<10>TMDS_B_DATA0#<10>
TMDS_B_DATA1<10>TMDS_B_DATA1#<10>
TMDS_B_DATA2<10>TMDS_B_DATA2#<10>
+HDMI_5V_OUT+3VS
+5VS +HDMI_5V_OUT
+5VS +5VS +5VS +5VS
+HDMI_5V_OUT
+3VS
+HDMI_5V_OUT
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HDMICustom
18 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
C:Chg. PN to SB770020010.
MP:Update D10 to meet HDMI.
UMA use 750 ohmVGA use 499 ohm
Just change P/N to SD034750080
11/13 update
L Change PCB Footprint from SW_WCM2012F2S_4P to KING_WCM-2012-900T_4P
11/13 update
HDMI Connector
11/14 update
C655 0.1U_0402_16V7K1 2
Q134A2N7002DW-7-F_SOT363-6
61
2
C850
0.1U_0402_16V4Z
1
2
C853 0.1U_0402_16V7K1 2
R116 0_0402_5%
1 2
R297750_0402_1%
12
L88
WCM-2012-900T_4P@
11
44 3 3
2 2
R139750_0402_1%
12
Q162A2N7002DW-7-F_SOT363-6
61
2
R6152.2K_0402_5%
12
C852 0.1U_0402_16V7K1 2
R112 0_0402_5%
1 2
C827 0.1U_0402_16V7K1 2
C508 0.1U_0402_16V7K1 2
L85
WCM-2012-900T_4P@
11
44 3 3
2 2
Q134B2N7002DW-7-F_SOT363-6
3
5
4
R115 0_0402_5%
1 2
R118 0_0402_5%
1 2
Q136B
2N7002DW-7-F_SOT363-6
3
5
4
U39SN74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1G
3P
5
C675 0.1U_0402_16V7K1 2
JHDMI
SUYIN_100042MR019S153ZLCONN@
D2+1
GND 2
D2-3 D1+4
GND 5
D1-6 D0+7
GND 8D0-9 CK+10
GND 11
CK-12
CEC 13Reserved 14SCL15 SDA16
DDC/CEC_GND 17
+5V18
HP_DET19
GND 20GND 21GND 22GND 23
R173750_0402_1%
12
C804 0.1U_0402_16V7K1 2
C851
0.1U_0402_16V4Z
1
2
R172750_0402_1%
12
R307750_0402_1%
12
R2366.8K_0402_5%
C468
0.1U_0402_16V4Z
1
2
R120 0_0402_5%
1 2
R117 0_0402_5%
1 2
L87
WCM-2012-900T_4P@
11
44 3 3
2 2
Q162B2N7002DW-7-F_SOT363-6
3
5
4Q136A2N7002DW-7-F_SOT363-6
61
2
R141750_0402_1%
12R315
750_0402_1%
12
R628100K_0402_5%
12
R1764.7K_0402_5%
12
R2106.8K_0402_5%
R304750_0402_1%
12
R2094.7K_0402_5%
12
L86
WCM-2012-900T_4P@
11
44 3 3
2 2
R119 0_0402_5%
1 2
R113 0_0402_5%
1 2
D10
RB491D_SOT23
2 1
C507 0.1U_0402_16V7K1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLK_PCI_SIO_R CLK_PCI_SIO
CPU_LDT_REQ#
PLT_RST#NB_RST#_R
SB_RX0P_CSB_RX0N_CSB_RX1P_CSB_RX1N_C
CPU_LDT_REQ#H_PROCHOT#
NB_RST#_R
SB_32KHI
SB_32KHO
NB_RST#_R
+SB_PCIEVDD
PCI_PIRQH#
SB_RX2P_CSB_RX2N_CSB_RX3P_CSB_RX3N_C
CLK_PCI_EC_RLPCCLK1
H_PROCHOT#
SB_32KHI
SB_32KHO
PCI_AD23PCI_AD24PCI_AD25PCI_AD26PCI_AD27PCI_AD28
H_PWRGD
H_PWRGD
CLK_PCI_EC
CLK_PCI_SIO2
LPCCLK1 CLK_PCI_SIO
CLK_PCI_SIO <23,32>
PCI_CLK5 <23>
PLT_RST# <11,14,25,26,27,32,33>
PCI_CLK4 <23>
PCICLK2 <23>
SB_RX0P<10>SB_RX0N<10>SB_RX1P<10>SB_RX1N<10>
SB_TX1P<10>SB_TX1N<10>
SB_TX0P<10>SB_TX0N<10>
SB_TX2P<10>SB_TX2N<10>SB_TX3P<10>SB_TX3N<10>
SB_RX2P<10>SB_RX2N<10>SB_RX3P<10>SB_RX3N<10>
RTC_CLK <23>
LPC_FRAME# <32,33>
LPC_AD1 <32,33>LPC_AD2 <32,33>
LPC_AD0 <32,33>
LPC_AD3 <32,33>
LDT_STOP#<6,11>
CPU_LDT_REQ#<6,11>H_PROCHOT#<6>
SIRQ <32,33>
CLK_SBSRC_BCLK<15>CLK_SBSRC_BCLK#<15>
LDT_RST#<6>
ACCEL_INT <30>
PCI_AD23 <23>
PCI_SERR# <33>
PCI_AD24 <23>PCI_AD25 <23>PCI_AD26 <23>PCI_AD27 <23>PCI_AD28 <23>
H_PWRGD_CPU<6>
H_PWRGD
LPC_DRQ# <32>
CLK_PCI_EC <23,33>LPCCLK1 <23>
CLK_PCI_SIO2 <32>
+RTCVCC+SB_VBAT
+1.8VS
+3VALW
+RTCBATT
+3VL
+3VS
+PCIE_VDDR
+1.2V_HT
+SB_VBAT +RTCVCC_R
+RTCBATT_R
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
SB700-PCIE/PCI/ACPI/LPC/RTCCustom
19 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
W=20mils
EC & Debug
STRAP PIN
STRAP PIN
Check AMD need pull low or not
W=20milsW=20mils
Close to SB
Close to SB
09/11 update
11/13 update
9/20 SA00001S510 S IC 218S7EALA11FG SB700 BGA 528P SB 0FH
9/20 SP020008T00
09/29 update
09/29 update
09/29 update
11/09 update
11/13 update
11/22 update11/23 update
11/29 update
L Need use new P/N with 10PPM
11/30 update
R967 0_0402_5%
12
C499 0.1U_0402_16V7K 1 2
JBATT1
ACES_85205-02001CONN@
1122GND3GND4
C497 0.1U_0402_16V7K 1 2C496 0.1U_0402_16V7K 1 2
C50410U_0805_10V4Z
1
2
R303 22_0402_5%@1 2C492 0.1U_0402_16V7K 1 2
C495 0.1U_0402_16V7K 1 2
PC
I EX
PR
ESS
INTE
RFA
CE
Part 1 of 5SB700
PC
I IN
TER
FAC
E
LP
CR
TC
CP
U
RTC
XTA
L
PC
I CLK
S
CLO
CK
GE
NE
RA
TOR
U15A
218S7EALA11FG_BGA528_SB700
A_RST#N2
PCIE_RX2PR20PCIE_RX2NR21PCIE_RX3PR18
PCIE_TX3NT22 PCIE_TX3PT23 PCIE_TX2NU24 PCIE_TX2PU25
PCIE_RX1PU19PCIE_RX1NV19
PCIE_RX0PU22PCIE_RX0NU21
PCIE_TX1NV25 PCIE_TX1PV24 PCIE_TX0NV22 PCIE_TX0PV23
PCIE_RCLKP/NB_LNK_CLKPN25PCIE_RCLKN/NB_LNK_CLKNN24
PCIE_CALRPT25PCIE_CALRNT24
PCIE_PVDDP24
GPP_CLK1NL19
X1A3
X2B3
VBAT B2
GPP_CLK0NJ18
GPP_CLK2PM19
ALLOW_LDTSTPF23
CPU_HT_CLKNM18
GPP_CLK2NM20
SLT_GFX_CLKPM23
CPU_HT_CLKPP17
LDT_RST#G24
PCICLK0 P4PCICLK1 P3PCICLK2 P1PCICLK3 P2
PCIRST# N1
CBE0# W2CBE1# U7CBE2# AA7CBE3# Y1
FRAME# AA6DEVSEL# W5
IRDY# AA5TRDY# Y5
PAR U6STOP# W6PERR# W4
REQ0# AC3REQ1# AD4REQ2# AB7
REQ3#/GPIO70 AE6
GNT0# AD2GNT1# AE4GNT2# AD5
GNT3#/GPIO72 AC6
SERR# V7
CLKRUN# AD6
LAD0 H24LAD1 H23LAD2 J25LAD3 J24
LFRAME# H25LDRQ0# H22
SERIRQ V15
PCICLK4 T4
LPCCLK0 G22LPCCLK1 E22
AD0 U2AD1 P7AD2 V4AD3 T1AD4 V3AD5 U1AD6 V1AD7 V2AD8 T2AD9 W1
AD10 T9
AD12 R7AD13 R5AD14 U8AD15 U5AD16 Y7AD17 W8AD18 V9AD19 Y8AD20 AA8AD21 Y4AD22 Y3AD23 Y2AD24 AA2AD25 AB4AD26 AA1AD27 AB3AD28 AB2AD29 AC1AD30 AC2AD31 AD1
AD11 R6
REQ4#/GPIO71 AB6
GNT4#/GPIO73 AE5
LDRQ1#/GNT5#/GPIO68 AB8
GPP_CLK1PL20
RTCCLK C3
PCIE_RX3NR17
INTE#/GPIO33 AD3INTF#/GPIO34 AC4INTG#/GPIO35 AE2INTH#/GPIO36 AE3
LOCK# V5
PCIE_PVSSP25
PCICLK5/GPIO41 T3
BMREQ#/REQ5#/GPIO65 AD7
NB_HT_CLKPM24
LDT_PGF22LDT_STP#G25
GPP_CLK3NP22
INTRUDER_ALERT# C2
NB_DISP_CLKPK23
25M_48M_66M_OSCL18
GPP_CLK0PJ19
NB_HT_CLKNM25
SLT_GFX_CLKNM22
GPP_CLK3PN22
25M_X1J21
25M_X2J20
NB_DISP_CLKNK22
PROCHOT#F24
T18PAD
R300 8.2K_0402_5%@1 2
R305 562_0402_1% 12
C643
18P_0402_50V8J
1 2
C510
1U_0402_6.3V4Z
1
2
R876
1K_0402_5%
1 2
R316120_0402_5%
1 2
R30222_0402_5%1 2
J1 JUMP_43X39@
11
22
R312 33_0402_5%
12
R314 20M_0402_5%@1 2
C509
0.1U_0402_16V4Z
1
2
D42
DAN202U_SC70
2
31
R311
0_0402_5%
1 2
L53
BLM18PG121SN1D_0603 1 2
R301 22_0402_5%@1 2
C498 0.1U_0402_16V7K 1 2
R389
20M_0402_5%
12C652
18P_0402_50V8J
1 2
R308 22_0402_5%1 2
ZZZ
PCB-MB
T16PAD
C493 0.1U_0402_16V7K 1 2
R318 10K_0402_5%@12
U16
NC7SZ08P5X_NL_SC70-5@
B2
A1 Y 4
P5
G3
C506
0.1U_0402_16V4Z@
12
C494 0.1U_0402_16V7K 1 2
C5051U_0402_6.3V4Z
1
2
Y3
32.768KHZ_12.5PF_Q13MC14610050_10PPM
OSC4
OSC1
NC 3
NC 2
R317120_0402_5%
1 2
R306 2.05K_0402_1% 12
R319 10K_0402_5%12
T17PAD
T15PAD
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
NBPWRGD
USB20_N0USB20_P0
USB20_N1USB20_P1
USB20_P2USB20_N2
USB20_P3USB20_N3
USB20_N5USB20_P5
USB20_N6USB20_P6
USB20_P7USB20_N7
USB20_N11USB20_P11
USB20_P10USB20_N10
USB20_N8USB20_P8
SMB_CK_DAT1SMB_CK_CLK1
SUS_STAT#
H_THERMTRIP#
USB_RCOMP
SMB_CK_CLK0
SMB_CK_DAT0
SUS_STAT#
HDA_SDIN1HDA_SDIN0HDA_SDOUT
HDA_BITCLK
HDA_SYNC
HDARST#
SB_TEST2SB_TEST1SB_TEST0
SB_TEST2
SB_TEST1
SB_TEST0
SMB_CK_DAT0SMB_CK_CLK0
SMB_CK_CLK1
SMB_CK_DAT1
EC_RSMRST#
EXP_CPPE#
NBPWRGD
PCIE_WAKE#
PCIE_WAKE#
CR_CPPE#
SB_GPIO5
EC_LID_OUT#<33>
EC_SCI#<33>
USB20_N0 <31>USB20_P0 <31>
USB20_N1 <31>USB20_P1 <31>
USB20_P2 <31>USB20_N2 <31>
USB20_P3 <35>USB20_N3 <35>
USB20_N5 <17>USB20_P5 <17>
USB20_N6 <31>USB20_P6 <31>
USB20_P7 <31>USB20_N7 <31>
USB20_N11 <26>USB20_P11 <26>
USB20_P10 <26>USB20_N10 <26>
USB20_N8 <26>USB20_P8 <26>
HDARST#<23,33>
SMB_CK_DAT1<26>SMB_CK_CLK1<26>
EC_RSMRST#<33>
SMB_CK_DAT0<8,9,15,30>SMB_CK_CLK0<8,9,15,30>
H_THERMTRIP#<6>
SB_SPKR<28>
CLK_48M_USB <15>
SUS_STAT#<11>
HDA_SDIN0<28>HDA_SDIN1<34>
HDA_SDOUT_MDC<34>HDA_SDOUT_CODEC<28>
HDA_BITCLK_CODEC<28>HDA_BITCLK_MDC<34>
HDA_SYNC_MDC<34>HDA_SYNC_CODEC<28>
HDA_RST#_CODEC<28>HDA_RST#_MDC<34>
SLP_S3#<33>SLP_S5#<33>
PWRBTN_OUT#<33>SB_PWRGD<6,33,43>
KB_RST#<33>GATEA20<33>
EC_SMI#<33>
GPIO16 <23>GPIO17 <23>
EXP_CPPE#<26>
NB_PWRGD<11>
LAN_PCIE_WAKE#<25>
MINI_PCIE_WAKE#<26>
CR_CPPE#<27>
+3VS
+3VALW
+3VALW
+3VS
+3VALW+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
SB700 USB/AC97Custom
20 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Touch Screen (delete)
STRAP PIN
USB-0 Right side (S/W Debug Port)
USB-7 Fingerprint
USB-5 USB Camera
USB-10 MiniCard(TV)
USB-4 Left side
STRAP PIN
USB-2 Left Side
USB-6 Bluetooth
SB700 has internal PD
USB-3 Dock
USB-1 Right side
USB-11 New Card
USB-8 MiniCard(WWAN)
USB-9 Card Reader (delete)
STRAP PIN
demo circuit LID use RI#
09/04 update
For SB700 A11 divider to 1.8V for RS & RX780 11/13 update
11/13 update
10/08 update11/13 update
11/13 update
11/16 update
US
B 2
.0
Part 4 of 5SB700
ACPI
/ W
AKE
UP
EVEN
TS
GPI
O
HD
AU
DIO
US
B O
C
US
B 1
.1
US
B M
ISC
INTE
GR
ATE
D u
C
INTE
GR
ATE
D u
C
U15D
218S7EALA11FG_BGA528_SB700
USBCLK/14M_25M_48M_OSC C8
USB_RCOMP G8
USB_OC6#/IR_TX1/GEVENT6#B9
USB_HSD5P C12USB_HSD5N D12
USB_HSD4P B12USB_HSD4N A12
USB_HSD3P G12USB_HSD3N G14
USB_HSD2P H14USB_HSD2N H15
USB_HSD1P A13USB_HSD1N B13
USB_HSD0P B14USB_HSD0N A14
USB_OC4#/IR_RX0/GPM4#A8USB_OC3#/IR_RX1/GPM3#A9
USB_OC1#/GPM1#F8 USB_OC2#/GPM2#E5
USB_HSD7P G11USB_HSD7N H12
USB_HSD6P E12USB_HSD6N E14
USB_OC0#/GPM0#E4
DDR3_RST#/GEVENT7#G5
SATA_IS0#/GPIO10AE18
AZ_SDIN3/GPIO46M3
PCI_PME#/GEVENT4#E1RI#/EXTEVNT0#E2
SLP_S3#F5SLP_S5#G1PWR_BTN#H2PWR_GOODH1SUS_STAT#K3
TEST1H4TEST0H3GA20IN/GEVENT0#Y15KBRST#/GEVENT1#W15
SMBALERT#/THRMTRIP#/GEVENT2#J6
LPC_PME#/GEVENT3#K4LPC_SMI#/EXTEVNT1#K24S3_STATE/GEVENT5#F1SYS_RESET#/GPM7#J2WAKE#/GEVENT8#H6
RSMRST#D3
CLK_REQ3#/SATA_IS1#/GPIO6AD18
NB_PWRGDW14
SMARTVOLT1/SATA_IS2#/GPIO4AA19
SMARTVOLT2/SHUTDOWN#/GPIO5Y19
SPKR/GPIO2W21SCL0/GPOC0#AA18SDA0/GPOC1#W18
DDC1_SCL/GPIO9AA20DDC1_SDA/GPIO8Y18
AZ_BITCLKM1AZ_SDOUTM2
AZ_SYNCL6AZ_RST#M4
USB_HSD9P A11USB_HSD9N B11
USB_HSD8P C10USB_HSD8N D10
LLB#/GPIO66C1
AZ_DOCK_RST#/GPM8#L5
SLP_S2/GPM9#H7
USB_OC5#/IR_TX0/GPM5#B8
BLINK/GPM6#F2
SCL1/GPOC2#K1SDA1/GPOC3#K2
TEST2H5
CLK_REQ0#/SATA_IS3#/GPIO0W17
AZ_SDIN2/GPIO44L8 AZ_SDIN1/GPIO43J8 AZ_SDIN0/GPIO42J7
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39V17CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40W20
USB_FSD13P E6USB_FSD13N E7
USB_FSD12P F7USB_FSD12N E8
USB_HSD11P H11USB_HSD11N J10
USB_HSD10P E11USB_HSD10N F11
IMC_GPIO9 B18IMC_PWM0/IMC_GPIO10 F21
SCL2/IMC_GPIO11 D21SDA2/IMC_GPIO12 F19
SCL3_LV/IMC_GPIO13 E20SDA3_LV/IMC_GPIO14 E21
IMC_PWM1/IMC_GPIO15 E19IMC_PWM2/IMC_GPO16 D19IMC_PWM3/IMC_GPO17 E18
IMC_GPIO18 G20IMC_GPIO19 G21IMC_GPIO20 D25IMC_GPIO21 D24IMC_GPIO22 C25IMC_GPIO23 C24IMC_GPIO24 B25IMC_GPIO25 C23
IMC_GPIO0H19IMC_GPIO1H20SPI_CS2#/IMC_GPIO2H21IDE_RST#/F_RST#/IMC_GPO3F25
IMC_GPIO4D22IMC_GPIO5E24IMC_GPIO6E25IMC_GPIO7D23
IMC_GPIO8 A18
IMC_GPIO26 B24IMC_GPIO27 B23IMC_GPIO28 A23IMC_GPIO29 C22IMC_GPIO30 A22IMC_GPIO31 B22IMC_GPIO32 B21IMC_GPIO33 A21IMC_GPIO34 D20IMC_GPIO35 C20IMC_GPIO36 A20IMC_GPIO37 B20IMC_GPIO38 B19IMC_GPIO39 A19IMC_GPIO40 D18IMC_GPIO41 C18
R32311.8K_0402_1%
1 2
R339 33_0402_5%
1 2
R54010K_0402_5%
12
R340 33_0402_5%
1 2
R3272.2K_0402_5%
12
T19PAD
R994 0_0402_5%@12
T41PAD
R321 2.2K_0402_5%@1 2
R82 0_0402_5%
1 2
R331 2.2K_0402_5% 1 2
R329 2.2K_0402_5% 1 2
R332 2.2K_0402_5% 1 2
R334 33_0402_5%
1 2
R993 0_0402_5%
12
R81 0_0402_5%D3E@1 2
R322 2.2K_0402_5%@1 2
R320 2.2K_0402_5%@1 2
R336 33_0402_5%
1 2
R10520_0402_5%
12
R338 33_0402_5%
1 2
R328 2.2K_0402_5% 1 2
R1053100_0402_5%@
12
R388 4.7K_0402_5%
1 2
R337 33_0402_5%
1 2
R83
10K_0402_5%@1 2
R333 33_0402_5%
1 2
R335 33_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+PLLVDD_SATA
+XTLVDD_SATA
LFB_ID1LFB_ID2
LFB_ID0
+SB_AVDD
LFB_ID2
THERMAL_DC
SATA_STX_DRX_P1SATA_STX_DRX_N1
SATA_STX_DRX_P0SATA_STX_DRX_N0
SATA_X2
SATA_X1
SATA_CAL
LFB_ID1
LFB_ID0
SATA_X2
SATA_X1
SATA_STX_DRX_P2SATA_STX_DRX_N2
SATA_STX_DRX_P3SATA_STX_DRX_N3
SATA_TXP0<24>SATA_TXN0<24>
SATA_RXP0_C<24>SATA_RXN0_C<24>
SATA_LED#<34>
SATA_TXP1<24>SATA_TXN1<24>
SATA_RXP1_C<24>SATA_RXN1_C<24>
EC_THERM# <33>
CAM_SHDN# <17>BT_OFF <31>
SATA_TXP2<31>SATA_TXN2<31>
SATA_RXP2_C<31>SATA_RXN2_C<31>
WLOFF# <26>BT_COMBO_EN# <26>WWOFF# <26>
SATA_TXP3<24>SATA_TXN3<24>
SATA_RXP3_C<24>SATA_RXN3_C<24>
HDD_HALTLED# <34>SB_INT_FLASH_SEL <32>
CR_WAKE# <27>
AC_IN_D <33>
+3VALW
+3VS
+1.2V_HT
+3VS
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
SB700 SATA/IDE/SPICustom
21 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
LFB_ID0 to LFB_ID2 got internal PU 10K to S5.
Hynix
Qimonda
Samsung
LFB_ID0LFB_ID1LFB_ID2
0 0 0
0 0 1
0 01
Local Frame Buffer Strapping ListCopy from Becks.
11/05 update
10/09 update
LChange the PCB Footprint fromY_KDS_1BX25000CK1A_2P toY_6X25000017_2P
11/05 update
11/05 update
11/06 update
11/13 update
11/13 update
11/13 update
C519 0.01U_0402_25V7K
1 2
C515 0.01U_0402_25V7K
1 2
C5241U_0402_6.3V4Z
1
2
R367 1K_0402_5%1 2
C51710P_0402_50V8J
12
R1062 0_0402_5%
1 2
R344 1K_0402_5%1 2
C5250.1U_0402_16V4Z
1
2
C512 0.01U_0402_25V7K
1 2
ATA
66/
100/
133
Part 2 of 5SB700
SAT
A PW
RSE
RIA
L AT
A
SPI R
OM
HW
MO
NIT
OR
U15B
218S7EALA11FG_BGA528_SB700
IDE_IORDY AA24IDE_IRQ AA25
IDE_A0 Y22IDE_A1 AB23IDE_A2 Y23
IDE_DACK# AB24IDE_DRQ AD25IDE_IOR# AC25
IDE_IOW# AC24IDE_CS1# Y25IDE_CS3# Y24
IDE_D0/GPIO15 AD24IDE_D1/GPIO16 AD23IDE_D2/GPIO17 AE22IDE_D3/GPIO18 AC22IDE_D4/GPIO19 AD21IDE_D5/GPIO20 AE20IDE_D6/GPIO21 AB20IDE_D7/GPIO22 AD19IDE_D8/GPIO23 AE19IDE_D9/GPIO24 AC20
IDE_D10/GPIO25 AD20IDE_D11/GPIO26 AE21IDE_D12/GPIO27 AB22IDE_D13/GPIO28 AD22IDE_D14/GPIO29 AE23IDE_D15/GPIO30 AC23
XTLVDD_SATAW12
PLLVDD_SATAAA11
SATA_TX2PAB12SATA_TX2NAC12
SATA_RX2PAD12 SATA_RX2NAE12
SATA_TX3PAD13SATA_TX3NAE13
SATA_RX3PAC14 SATA_RX3NAB14
SATA_TX0PAD9SATA_TX0NAE9
SATA_RX0NAB10SATA_RX0PAC10
SATA_TX1PAE10SATA_TX1NAD10
SATA_RX1NAD11SATA_RX1PAE11
SATA_CALV12
SATA_X1Y12
SATA_X2AA12
SATA_ACT#/GPIO67W11
SPI_DI/GPIO12 G6SPI_DO/GPIO11 D2
SPI_CLK/GPIO47 D1SPI_HOLD#/GPIO31 F4
SPI_CS1#/GPIO32 F3
FANOUT1/GPIO48 M5FANOUT2/GPIO49 M7
FANIN0/GPIO50 P5FANIN1/GPIO51 P8FANIN2/GPIO52 R8
LAN_RST#/GPIO13 U15ROM_RST#/GPIO14 J1
VIN0/GPIO53 A4VIN1/GPIO54 B4VIN2/GPIO55 C4VIN3/GPIO56 D4VIN4/GPIO57 D5VIN5/GPIO58 D6VIN6/GPIO59 A7VIN7/GPIO60 B7
TEMPIN0/GPIO61 B6TEMPIN1/GPIO62 A6TEMPIN2/GPIO63 A5
TEMPIN3/TALERT#/GPIO64 B5
FANOUT0/GPIO3 M8
AVDD F6
AVSS G7
TEMP_COMM C6
SATA_TX4PAE14SATA_TX4NAD14
SATA_RX4NAD15SATA_RX4PAE15
SATA_TX5PAB16SATA_TX5NAC16
SATA_RX5NAE16SATA_RX5PAD16
L54
BLM18PG121SN1D_0603 12
C5221U_0402_6.3V4Z
1
2
Y4
25MHz_20pF_6X25000017
12
C513 0.01U_0402_25V7K
1 2
C520 0.01U_0402_25V7K
1 2
C514 0.01U_0402_25V7K
1 2
C5262.2U_0603_6.3V4Z
1
2
R1032
10K_0402_5%@1 2
R341
10M_0402_5%
12
R103310K_0402_5%@
1 2 R345 1K_0402_5%1 2
L55
BLM18PG121SN1D_0603 12
C521 0.01U_0402_25V7K
1 2
R343 10K_0402_5%1 2
C518 0.01U_0402_25V7K
1 2
C51610P_0402_50V8J
12
C5231U_0402_6.3V4Z
1
2
R342 1K_0402_1%
12
L56
BLM18PG121SN1D_0603 12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+AVDDCK_1.2V
+1.2V_CKVDD
+AVDDCK_3.3V
+V5_VREF
+S5_3V
+AVDDCK_3.3V
+AVDDCK_1.2V
+AVDDC
+S5_1.2V
+1.2V_SB_CORE
+1.2_USB
+3.3V_SB_IDE
+3VS
+1.2V_HT
+1.2V_HT
+3VALW
+3VS
+3VS
+5VS
+1.2V_HT
+1.2V_HT
+PCIE_VDDR
+1.2V_SATA
+3VALW
+AVDD_USB
+1.2VALW
+1.2VALW
+1.2V_HT
+1.2VALW
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
SB700 PWR/GNDCustom
22 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
11/20 update
L 0.45A/40mil/3vias ?
L 0.45A/30mil/3vias
L 0.8A/50mil/4vias
L <1.25A/50mil/4vias
L <1.25A/50mil/4vias?
L 0.6A/50mil/4vias
L 0.3A/30mil/2vias
L 0.1A/30mil/2vias ?
11/20 update
L C567,C568 change to 1U_0402 when SI-2
C5872.2U_0603_6.3V4Z
12
C544 1U_0402_6.3V4Z@1 2
+
C52922U_A_4VM
1 2
C539 1U_0402_6.3V4Z
1 2
C576 10U_0805_10V4Z
1 2
C5741U_0402_6.3V4Z
12
C5860.1U_0402_16V4Z 12
Part 3 of 5SB700
POWER
PC
I/GPI
O I/
O
CO
RE
S0
3.3V
_S5
I/OC
OR
E S
5
A-LI
NK
I/OSA
TA I/
O
USB
I/O P
LLC
LKG
EN
I/O
IDE/
FLSH
I/O
U15C
218S7EALA11FG_BGA528_SB700
VDDQ_2M9
VDDQ_6U17
VDDQ_3T15
VDDQ_11AB5
VDDQ_1L9
VDDQ_4U9VDDQ_5U16
VDDQ_12AB21
VDDQ_10AA4
VDDQ_7V8VDDQ_8W7VDDQ_9Y6
S5_3.3V_1 A17S5_3.3V_2 A24S5_3.3V_3 B17S5_3.3V_4 J4S5_3.3V_5 J5
S5_1.2V_2 G4S5_1.2V_1 G2
USB_PHY_1.2V_1 A10USB_PHY_1.2V_2 B10
V5_VREF AE7
AVDDCK_3.3V J16
AVDDCK_1.2V K17
AVDDC E9
AVDDTX_0A16AVDDTX_1B16AVDDTX_2C16AVDDTX_3D16
AVDDTX_5E17 AVDDTX_4D17
AVDDRX_2F18
AVDDRX_0F15
AVDDRX_5G18 AVDDRX_4G17
PCIE_VDDR_4P21 PCIE_VDDR_3P20
PCIE_VDDR_7R25
PCIE_VDDR_2P19
PCIE_VDDR_5R22
PCIE_VDDR_1P18
PCIE_VDDR_6R24
AVDD_SATA_1AA14AVDD_SATA_4AB18AVDD_SATA_2AA15AVDD_SATA_3AA17AVDD_SATA_5AC18AVDD_SATA_6AD17AVDD_SATA_7AE17
VDD_1 L15VDD_2 M12VDD_3 M14VDD_4 N13VDD_5 P12VDD_6 P14VDD_7 R11
VDD_9 T16VDD_8 R15
AVDDRX_1F17
AVDDRX_3G15
VDD33_18_2AA21
VDD33_18_4AE25 VDD33_18_3AA22
VDD33_18_1Y20CKVDD_1.2V_2 L22CKVDD_1.2V_1 L21
CKVDD_1.2V_4 L25CKVDD_1.2V_3 L24
S5_3.3V_7 L2S5_3.3V_6 L1
C550 10U_0805_10V4Z
1 2
L61
FBMA-L11-201209-221LMA30T_0805
12
L67
BLM18PG121SN1D_0603 12
C533 1U_0402_6.3V4Z
1 2C549 1U_0402_6.3V4Z
1 2
C5751U_0402_6.3V4Z
12
C583 0.1U_0402_16V4Z
1 2
C554 1U_0402_6.3V4Z
1 2
C553 1U_0402_6.3V4Z
1 2
C5621U_0402_6.3V4Z
12
C582 0.1U_0402_16V4Z
1 2
C5381U_0402_6.3V4Z
12
C5880.1U_0402_16V4Z 12
C5341U_0402_6.3V4Z
12
D14
CH751H-40PT_SOD323-2
21
+
C528 22U_A_4VM
12
C567 1U_0805_16V7K
1 2
C536 1U_0402_6.3V4Z@1 2
C5321U_0402_6.3V4Z
12
C5791U_0603_10V4Z
1
2
R592 0_0805_5%@1 2
C5270.1U_0402_16V4Z
12
L60
BLM18PG121SN1D_0603 12
L68
BLM18PG121SN1D_0603 12
R3461K_0402_5%
12
C5591U_0402_6.3V4Z
12
L69
BLM18PG121SN1D_0603 12
L65 0_0603_5%
C557 0.1U_0402_16V4Z
1 2
C530 1U_0402_6.3V4Z
1 2
C5892.2U_0603_6.3V4Z
12
C5630.1U_0402_16V4Z
12
C5900.1U_0402_16V4Z 12
C542 0.1U_0402_16V4Z
1 2
+
C57322U_A_4VM
1 2
C571 0.1U_0402_16V4Z
1 2
L66
FBMA-L11-201209-221LMA30T_0805 12
C5700.1U_0402_16V4Z
12
C551 0.1U_0402_16V4Z 12
+
C55622U_A_4VM
1 2
C541 0.1U_0402_16V4Z
1 2
C560 0.1U_0402_16V4Z
1 2
C581 1U_0402_6.3V4Z
1 2
L64 0_0603_5%
C5650.1U_0402_16V4Z
12
+
C566 22U_A_4VM
12
C548 0.1U_0402_16V4Z 12
C5611U_0402_6.3V4Z
12
R564 0_0805_5%1 2
C555 1U_0402_6.3V4Z
1 2
C545 1U_0402_6.3V4Z
1 2
+
C552 22U_A_4VM
12
C572 0.1U_0402_16V4Z
1 2
R593 0_0805_5%1 2
L63
FBMA-L11-201209-221LMA30T_0805 12
C580 1U_0402_6.3V4Z
1 2
C535 1U_0402_6.3V4Z
1 2
+
C543 22U_A_4VM@12
R120_0603_5%@1 2
C568 1U_0805_16V7K
1 2
C5852.2U_0603_6.3V4Z
12
C5780.1U_0402_16V4Z
1
2
C5371U_0402_6.3V4Z
12
C531 1U_0402_6.3V4Z
1 2
C5640.1U_0402_16V4Z
12
C577 10U_0805_10V4Z
1 2
C547 1U_0402_6.3V4Z@1 2
C558 1U_0402_6.3V4Z
1 2
C5691U_0402_6.3V4Z
12
C584 0.1U_0402_16V4Z
1 2
C546 1U_0402_6.3V4Z
1 2
SB700
GR
OU
ND
Part 5 of 5218S7EALA11FG_BGA528_SB700
U15E
VSS_4 D7
VSS_2 A25
VSS_21 M13
VSS_10 K16VSS_11 L4
VSS_1 A2
VSS_17 L16
VSS_8 K9VSS_9 K11
VSS_46 AB1
VSS_13 L10VSS_14 L11VSS_15 L12VSS_16 L14
VSS_18 M6VSS_19 M10VSS_20 M11
VSS_22 M15VSS_23 N4
VSS_26 P6VSS_27 P9VSS_28 P10VSS_29 P11
VSS_32 R1VSS_33 R2VSS_34 R4
VSS_36 R10VSS_37 R12
VSS_3 B1
VSS_35 R9
VSS_30 P13
AVSS_SATA_15AB13
AVSS_SATA_18AC8
AVSS_SATA_5V11
AVSS_SATA_11Y17
AVSS_SATA_19AD8
VSS_31 P15
VSS_24 N12
AVSS_SATA_14AB11
AVSS_SATA_2U10AVSS_SATA_3U11
AVSS_SATA_1T10
AVSS_SATA_17AB17
AVSS_SATA_4U12
AVSS_SATA_12AA9
AVSS_SATA_6V14
AVSS_SATA_10Y14
AVSS_SATA_7W9AVSS_SATA_8Y9
AVSS_SATA_16AB15
AVSS_SATA_20AE8
AVSS_SATA_13AB9
AVSS_USB_5D9
AVSS_USB_8D14
AVSS_USB_4D8 AVSS_USB_3C14
AVSS_USB_6D11AVSS_USB_7D13
AVSS_USB_2B15
AVSS_USB_21K10
AVSS_USB_10E15
AVSS_USB_20J15
AVSS_USB_22K12
AVSS_USB_11F12AVSS_USB_12F14
AVSS_USB_23K14
AVSS_USB_16J9 AVSS_USB_15H17
AVSS_USB_19J14
AVSS_USB_14H9
AVSS_USB_1A15
AVSS_USB_24K15
VSS_12 L7
AVSS_USB_17J11AVSS_USB_18J12
VSS_7 H8
VSS_25 N14
VSS_6 G19
AVSS_USB_13G9
AVSS_USB_9D15
AVSSCK L17
PCIE_CK_VSS_3J22
PCIE_CK_VSS_14 U20PCIE_CK_VSS_13 U18PCIE_CK_VSS_12 T17
PCIE_CK_VSS_18 W19PCIE_CK_VSS_6M17
PCIE_CK_VSS_11 R19
PCIE_CK_VSS_8P16 PCIE_CK_VSS_7M21
PCIE_CK_VSS_17 V21PCIE_CK_VSS_16 V20PCIE_CK_VSS_15 V18
VSS_50 AE24
PCIE_CK_VSS_21 W25
PCIE_CK_VSS_19 W22PCIE_CK_VSS_20 W24
AVSSCF9
PCIE_CK_VSS_2J17 PCIE_CK_VSS_1H18
PCIE_CK_VSS_4K25
VSS_5 F20
PCIE_CK_VSS_5M16
PCIE_CK_VSS_9 P23PCIE_CK_VSS_10 R16
VSS_49 AE1
VSS_44 V6VSS_45 Y21
VSS_42 U4
VSS_48 AB25VSS_47 AB19
VSS_41 T14
VSS_43 U14
VSS_38 R14VSS_39 T11VSS_40 T12
AVSS_SATA_9Y11
C5400.1U_0402_16V4Z
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD28<19>PCI_AD27<19>PCI_AD26<19>PCI_AD25<19>PCI_AD24<19>PCI_AD23<19>
PCICLK2<19>CLK_PCI_SIO<19,32>
PCI_CLK4<19>PCI_CLK5<19>
CLK_PCI_EC<19,33>LPCCLK1<19>RTC_CLK<19>HDARST#<20,33>
GPIO17<20>GPIO16<20>
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
SB700 STRAPSCustom
23 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Internal pull up
RESERVED
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROMPCIE STRAPS
USE DEFAULTPCIE STRAPS
DEFAULT
BYPASSACPIBCLK
USE ACPIBCLK
DEFAULT
USE IDEPLL
USELONGRESET
USESHORTRESET
USE PCIPLL
DEFAULT
BYPASS IDEPLL
PULLHIGH
DEFAULT
BYPASSPCI PLL
PCI_AD27 PCI_AD26
PULLLOW
DEFAULT
PCI_AD28
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD23
LPC_CLK0
ENABLE PCIMEM BOOT
EXT. RTC (PD on X1,apply32KHz toRTC_CLK)DEFAULT
GP17
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
DISABLE PCIMEM BOOT
PULLLOW
PULLHIGH
REQUIRED STRAPS
INTERNALRTC
DEFAULT
RTC_CLKLPC_CLK1
CLKGENENABLED
DEFAULT
CLKGENDISABLED
AZ_RST_CD#
ECENABLED
ECDISABLEDDEFAULT
GP16PCI_CLK2
BOOTFAILTIMERENABLED
DEFAULT
BOOTFAILTIMERDISABLED
PCI_CLK3
RESERVED
DEFAULT
IGNOREDEBUGSTRAPS
USEDEBUGSTRAPS
PCI_CLK4 PCI_CLK5
RESERVED
L,H = LPC ROM (Default)
H,H = Reserved
H,L = SPI ROM
L,L = FWH ROM
09/29 update
11/30 update
R35
410
K_04
02_5
%
@
12
R35
010
K_04
02_5
%
@
12
R34
710
K_04
02_5
%
@
12
R34
810
K_04
02_5
%
@
12
R37
62.
2K_0
402_
5%
@
12
R36
52.
2K_0
402_
5%1
2
R35
110
K_04
02_5
%
@
12
R356
2.2K_0402_5%
12
R36
210
K_04
02_5
% 12
R36
010
K_04
02_5
%
@
12
R35
910
K_04
02_5
%
@
12
R37
52.
2K_0
402_
5%
@
12
R36
62.
2K_0
402_
5%
@
12
R34
910
K_04
02_5
%
@
12
R37
42.
2K_0
402_
5%
@
12
R36
410
K_04
02_5
% 12
R35
310
K_04
02_5
%
@
12
R37
82.
2K_0
402_
5%
@
12
R36
110
K_04
02_5
% 12
R35
710
K_04
02_5
% 12
R37
32.
2K_0
402_
5%
@
12
R37
72.
2K_0
402_
5%
@
12
R36
32.
2K_0
402_
5%
@
12
R35
510
K_04
02_5
%
@
12
R35
210
K_04
02_5
%
@
12
R35
810
K_04
02_5
%
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_RXP1 SATA_RXP1_C
SATA_TXP1SATA_TXN1
SATA_RXN1 SATA_RXN1_C
SATA_RXP0_CSATA_RXP0SATA_RXN0 SATA_RXN0_C
SATA_TXP0SATA_TXN0
SATA_TXP3SATA_TXN3
SATA_RXP3_CSATA_RXN3 SATA_RXN3_CSATA_RXP3
SATA_RXP1_C <21>
SATA_TXP1 <21>SATA_TXN1 <21>
SATA_RXN1_C <21>
SATA_RXN0_C <21>SATA_RXP0_C <21>
SATA_TXN0 <21>SATA_TXP0 <21>
SATA_TXP3 <21>SATA_TXN3 <21>
SATA_RXN3_C <21>SATA_RXP3_C <21>
+5VS
+5VS
+5VS
+3VS +3VS_HDD1
+3VS +3VS_HDD2
+5VS+3VS_HDD2
+5VS
+3VS_HDD1
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HDD/CDROMCustom
24 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
CD-ROM Connector
Placea caps. near ODD CONN.
Multi-Bay Connector-option
Pleace near HD CONN (JP23)
HDD Connector
Pleace near HD CONN (JP23)
Pleace near HD CONN (JP23)
Pleace near HD CONN (JP23)
11/14 update
Max 3A
Near CONN side.
11/14 update
Near CONN side.
Near CONN side.
11/14 update
C5960.01U_0402_16V7K
12
C59
310
U_0
805_
10V4
Z
1
2
R970 0_0402_5%1 2
C59
50.
1U_0
402_
16V4
Z
1
2
C10
3210
U_0
805_
10V4
Z
@
1
2
C614
1U_0603_10V4Z
1
2
C6060.01U_0402_16V7K
12
C10
350.
1U_0
402_
16V4
Z
@
1
2
C602
0.1U_0402_16V4Z
1
2
JP11
SUYIN_127382FR013G509ZRCONN@
GND 1A+ 2A- 3
GND 4B- 5B+ 6
GND 7
DP 8V5 9V5 10
MD 11GND 12GND 13
C61610U_0805_10V4Z
1
2
C5920.01U_0402_16V7K
12
C1038
0.1U_0402_16V4Z
@
1
2
C1037
0.1U_0402_16V4Z
@
1
2
C594
0.1U_0402_16V4Z
1
2
C10
3610
U_0
805_
10V4
Z
@
1
2
C10
390.
1U_0
402_
16V4
Z
@
1
2
C6050.01U_0402_16V7K
12
C60
110
U_0
805_
10V4
Z
1
2
JP9
SUYIN_127072FR022G523_RVCONN@
GND 1A+ 2A- 3
GND 4B- 5B+ 6
GND 7
V33 8V33 9V33 10
GND 11GND 12GND 13
V5 14V5 15V5 16
GND 17Reserved 18
GND 19V12 20V12 21V12 22
C1034
0.1U_0402_16V4Z
@
1
2
JP10
TYCO_2023087CONN@
GND 1VCC515 VCC516
TX- 3TX+ 2VCC514
GND 4VCC313RX- 5VCC312RX+ 6VCC311GND 7GND10GND 8GND9
GND 17GND18
C60
40.
1U_0
402_
16V4
Z
1
2
C591
0.1U_0402_16V4Z
1
2
R1009
0_0805_5%
@1 2
C603
0.1U_0402_16V4Z
1
2
C6110.01U_0402_16V7K
12
C613
0.1U_0402_16V4Z
1
2
C1033
0.1U_0402_16V4Z
@
1
2
C615
10U_0805_10V4Z
1
2
R1010
0_0805_5%
@1 2
C6120.01U_0402_16V7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LAN_SK_LAN_LINK#
LAN_MDI0+LAN_MDI0-
LANGND
RJ45_MIDI1-
RJ45_MIDI0+
LAN_ACTIVITY#
RJ45_MIDI1+
RJ45_MIDI0-
LAN_CT0
RJ45_MIDI0+RJ45_MIDI0-
LAN_MDI1+
LAN_X1 LAN_X2
RJ45_CT0
LAN_MDI1-
RJ45_CT1
RJ45_MIDI1-RJ45_MIDI1+
LAN_CT1
VCTRL12
LAN_CS
LAN_DO
LAN_SK_LAN_LINK#LAN_DI
LAN_ACTIVITY#
VCTRL12
LAN_MDI1+LAN_MDI1-
LAN_MDI0-LAN_MDI0+
ISOLATEB
LAN_X2LAN_X1
ISOLATEB
PCIE_PTX_IRX_P3
PCIE_PTX_IRX_N3
LAN_DOLAN_DILAN_SK_LAN_LINK#LAN_CS
RJ45_GNDRJ45_CT0_CRJ45_CT1_C
RJ45_MIDI0+ <35>RJ45_MIDI0- <35>
RJ45_MIDI1- <35>RJ45_MIDI1+ <35>
PCIE_ITX_C_PRX_P3<10>
PCIE_ITX_C_PRX_N3<10>
CLK_PCIE_LAN#<15>CLK_PCIE_LAN<15>
CLKREQ_LAN#<15>
PLT_RST#<11,14,19,26,27,32,33>
LAN_PCIE_WAKE#<20>
PCIE_PTX_C_IRX_P3<10>
PCIE_PTX_C_IRX_N3<10>
LAN_POWER_OFF<33>
+3V_LAN
+3V_LAN
+3V_LAN
+LAN_VDD12
+LAN_VDD12
+EVDD12
+EVDD12+LAN_VDD12
+3VS
+LAN_VDD12
+3V_LAN
+3V_LAN
+3V_LAN
+3VALW
+3V_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
RTL8111C/8102E 10/100/1000 LANCustom
25 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
LAN Conn.
9/20 DC234001G00
10/09 update Change the PCB Footprint fromY_KDS_1BX25000CK1A_2P toY_6X25000017_2P
L
Close to Pin48
Close to Pin1,37,29
Close to Pin45
Close to Pin10,13,30,36
Close to Pin19
Place Close to Chip
40 mils
10/29 update11/09 update
11/09 update11/05 update
11/13 update
R39675_0402_1%
1 2
C661
0.1U_0402_16V4Z
1
2
C629
0.1U_0402_16V4Z1
2
C1079
10U_0805_10V4Z@
1
2
RTL8102EL
U20
RTL8102EL-GR_LQFP48_7X7
AVDD33 1
MDIP0 2MDIN0 3
NC 4
MDIP1 5MDIN1 6
GND7
NC 8NC 9
DVDD12 10
NC 11NC 12
RSET46
VCTRL12A 48
GND47
CKXTAL242 CKXTAL141
NC 40
NC 44
LED0 38
VDD33 37
NC 43
DVDD12 13
GND14
HSIP15
HSIN16
REFCLK_P17REFCLK_M18
VDDTX 19
HSOP20
HSON21
GNDTX22
NC23NC24
LED1/EESK 35LED2/EEDI/AUX 34LED3/EEDO 33
EECS 32
DVDD12 36
GND31
DVDD12 30
VDD33 29
ISOLATEB28
PERSTB27
LANWAKEB26
CLKREQB25
NC 39
VCTRL12D 45
C488 0.1U_0402_16V7K 12
C485 0.1U_0402_16V7K 12
U19
LEF8423A-R
RD+1RD-2CT3
CT6TD+7TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
NC4NC5 NC 13
NC 12
C631
0.1U_0402_16V4Z1
2
C6320.1U_0402_16V4Z
1
2
R1056100K_0402_5%
12
C1083 0.01U_0603_100V7-M
1 2
C65768P_0402_50V8K
@
1
2
Y5
25MHz_20pF_6X25000017
12
C1078
0.1U_0402_16V4Z1
2
R10601K_0402_1%
12
R1057 10K_0402_5%
1 2
C648 0.01U_0402_16V7K
1 2
C630
0.1U_0402_16V4Z1
2
R1058 10K_0402_5%12
C1084 0.01U_0603_100V7-M
1 2
G
DS
Q144SI2301BDS-T1-E3_SOT23-3
2
13
PJP605
PAD-OPEN 4x4m
1 2
C10811U_0402_6.3V4Z1
2
C620
0.1U_0402_16V4Z1
2
R39475_0402_1%
1 2
C63310U_0805_10V4Z@
1
2
C662
4.7U_0805_10V4Z
1
2
C1082
0.1U_0402_16V4Z1
2
C1080
0.1U_0402_16V4Z
1
2
C622
0.1U_0402_16V4Z1
2
C1077
0.1U_0402_16V4Z
1
2
R395 300_0402_5%12
C621
0.1U_0402_16V4Z1
2C628
0.1U_0402_16V4Z1
2
C647 0.01U_0402_16V7K
1 2
C658
1000P_1206_2KV7K
1
2
R391 300_0402_5%12
R1055 3.6K_0402_5%1 2
R106115K_0402_5%
C65668P_0402_50V8K@
1
2
U17
AT93C46-10SI-2.7_SO8CS1 SK2 DI3 DO4
VCC 8NC 7NC 6GND 5
C654
27P_0402_50V8J
1
2
C653
27P_0402_50V8J
1
2
JRJ45
FOX_JM36113-P1122-7FCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED-12
Green LED+11
Yellow LED-14
Yellow LED+13
SHLD1 15
SHLD1 16
DETECT PIN1 9
DETCET PIN2 10
R1059 2.49K_0402_1%1 2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SMB_CK_DAT1SMB_CK_CLK1
MINI_PCIE_WAKE#
CLKREQ_NCARD#
PERST#
EXP_CPPE#
EXP_CPPE#
PERST#
PLT_RST#
PLT_RST#
SMB_CK_CLK1SMB_CK_DAT1
WW_LED#
UIM_RST
UIM_PWR
UIM_CLKUIM_DATA
UIM_VPP
WW_OFF#
WL_LED#
PLT_RST#
SMB_CK_DAT1SMB_CK_CLK1
CH_DATACH_CLK
MINI_PCIE_WAKE#
WL_OFF#
EXP_CPPE#
CH_CLK
UIM_PWRUIM_DATA
UIM_RST
UIM_PWRUIM_DATAUIM_CLK
UIM_VPP
SMB_CK_CLK1<20>SMB_CK_DAT1<20>
CLK_PCIE_NCARD<15>
USB20_P11<20>USB20_N11<20>
PCIE_ITX_C_PRX_N0<10>PCIE_ITX_C_PRX_P0<10>
PCIE_PTX_C_IRX_P0<10>PCIE_PTX_C_IRX_N0<10>
CLK_PCIE_NCARD#<15>
CLKREQ_NCARD#<15>
PLT_RST#<11,14,19,25,27,32,33>
SUSP#<28,33,36,38,41>
SYSON<33,34,36,40>
USB20_N10 <20>USB20_P10 <20>
CLKREQ_MCARD1#<15>
CLK_PCIE_MCARD1<15>CLK_PCIE_MCARD1#<15>
PCIE_PTX_C_IRX_P5<10>PCIE_PTX_C_IRX_N5<10>
PCIE_ITX_C_PRX_P5<10>PCIE_ITX_C_PRX_N5<10>
MINI_PCIE_WAKE#<20>
WWOFF# <21>
WW_LED# <34>
WL_LED# <34>
WLOFF# <21>
USB20_P8 <20>USB20_N8 <20>
CLKREQ_MCARD2#<15>
CH_DATA<31>CH_CLK<31>
CLK_PCIE_MCARD2<15>CLK_PCIE_MCARD2#<15>
PCIE_PTX_C_IRX_P2<10>PCIE_PTX_C_IRX_N2<10>
PCIE_ITX_C_PRX_N2<10>PCIE_ITX_C_PRX_P2<10>
EXP_CPPE#<20>
BT_COMBO_EN#<21>
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+3V_PEC
+1.5VS_PEC
+3VS_MINI +1.5VS_MINI+3VALW_WWAN+3VS_MINI+3VALW +3VS +1.5VS
+1.5VS_PEC
+3V_PEC
+3VS_PEC
+3VALW
+1.5VS
+3VS
+3VALW_WWAN
+3VS_MINI
+1.5VS_MINI
+3VS_MINI
+3VALW_WLAN
+3VS_WLAN
+1.5VS_WLAN
+3VS_WLAN+3VALW
+3VS +1.5VS+3VS_WLAN +1.5VS_WLAN +3VALW_WLAN
+3VS_WLAN
+3VS_MINI
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
WLAN/TV tuner/Express CardCustom
26 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Express Card Power Switch
Mini Card Slot 2---TV tuner / WWAN / Robson
New Card
Near to Express Card slot.
09/13 Update
USE TI TPS2231MRGPR9/20 SP02000B000
9/20 SP01000HS00/SP01000LX00
9/20 STANDOFF (H=7.5 mm) ES000000D00
9/20 SP02000IQ00
Mini Card Slot 1---WLAN
9/20 STANDOFF (H=7.5 mm) ES000000D00
9/20 SP01000HS00/SP01000LX00
Max 2.7A
09/29 update
Max 1.3A
Max 0.65A
Max 0.3A
Max 0.3A
Max 0.5A
Max 1A Max 0.5A
Max 0.275A
11/09 update11/09 update
11/09 update
11/22 update
JP6
ACES_88266-07001CONN@
11223344556677 G1 8
G2 9
C1071
4.7U_0805_10V4Z
1
2
U21
R5538D001-TR-F_QFN20_4X4~D
3.3Vin23.3Vin4 3.3Vout 3
3.3Vout 5
SYSRST#6
SHDN#20
STBY#1
PERST# 8
OC# 19
RCLKEN18
AUX_IN17 AUX_OUT 15
CPPE#10
CPUSB#9
NC 16
GND 7
1.5Vin121.5Vin14 1.5Vout 11
1.5Vout 13
THERMAL_PAD 21
C667
0.1U_0402_16V4Z
1
2
L790_0805_5%@ 12
R401 0_0603_5%1 2
C678
4.7U_0805_10V4Z
1
2
C7840.1U_0402_16V7K@
1
2
C781
0.01U_0402_16V7K
@1
2
R1042 0_0603_5%1 2
C1070
0.1U_0402_16V4Z
1
2
C786
0.1U_0402_16V4Z
1
2
R971 0_0603_5%12
C785
0.01U_0402_16V7K
1
2
C668
0.01U_0402_16V7K
1
2
R47 0_0603_5%1 2
R53
0_0402_5%
1 2
C787
4.7U_0805_10V4Z
1
2
C670
4.7U_0805_10V4Z
1
2
JP13
FOX_AS0B226-S99N-7FCONN@
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 16
1717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
11 2 2
G1
53G
254
G3
55G
356
R52
0_0402_5%
1 2
L780_1206_5%
1 2
C783
4.7U_0805_10V4Z
@1
2
JEXP
SANTA_130801-5_LTCONN@
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28 C684
0.1U_0402_16V4Z
1
2
C6790.1U_0402_16V4Z12
C73839P_0402_50V8J
@
1
2
C6810.1U_0402_16V4Z12
R4060_0805_5%1 2
C782
0.1U_0402_16V4Z
@1
2
C669
0.1U_0402_16V4Z
1
2
R1043 0_0603_5%@1 2
C683
0.1U_0402_16V4Z
1
2
R972 0_0603_5%@12
C6800.1U_0402_16V4Z12
C666
4.7U_0805_10V4Z
1
2
C682
4.7U_0805_10V4Z
1
2
R49
0_0402_5%
1 2
R4070_0805_5%
12
JP14
FOX_AS0B226-S99N-7FCONN@
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 16
1717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
11 2 2
G1
53G
254
G3
55G
356
C685
4.7U_0805_10V4Z
1
2
R1037
10K_0402_5%@
1 2
C665
0.1U_0402_16V4Z
1
2
C677
0.1U_0402_16V4Z
1
2
R540_0402_5%
1 2
R48
4.7K_0402_5%
12
C671
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
XD_CD#
APREXT
PCIE_PTX_IRX_P1PCIE_PTX_IRX_N1
XDCD0#_SDCD#XDCD1#_MSCD#
XD_RB#XD_ALE
XD_SD_D6XD_SD_D7XD_RE#
XD_SD_D4XD_SD_D5
XD_CLEXDWP#_SDWP#
SDCMD_MSBS_XDWE#XD_SD_MS_D3
XD_SD_MS_D0XD_SD_MS_D1XD_SD_MS_D2
XDCD0#_SDCD#
XDCD1#_MSCD#
XD_RB#
XDWP#_SDWP#
XD_RE#
XD_CLE
CPPE#
CR_LED
SDCMD_MSBS_XDWE#
SDCMD_MSBS_XDWE#
MSCLK
XDCD1#_MSCD#
XD_SD_MS_D0SDCLK
XD_SD_MS_D3XD_SD_MS_D2XD_SD_MS_D1
XD_SD_MS_D0
XD_SD_MS_D3XD_SD_MS_D2XD_SD_MS_D1
XD_ALE
XD_CLE
XDWP#_SDWP#
XDCE#
XD_RB#
SDCMD_MSBS_XDWE#
XD_CD#
XD_RE#XDWP#_SDWP#
XD_SD_D6XD_SD_D7
XD_SD_D4XD_SD_D5
XD_SD_MS_D2XD_SD_MS_D1XD_SD_MS_D0
XD_SD_MS_D3
XDCD0#_SDCD#
XD_SD_D6
XD_SD_D4XD_SD_D5
XD_SD_D7
SDCLK
XDCE#
SDCLKMSCLK
SDCLK_MSCLK_XDCE#
MSCLK XDCE#
XD_ALE
CPPE#
XDCD0#_SDCD#
PCIE_ITX_C_PRX_P1<10>PCIE_ITX_C_PRX_N1<10>
PCIE_PTX_C_IRX_P1<10>PCIE_PTX_C_IRX_N1<10>
PLT_RST#<11,14,19,25,26,32,33>
CLK_PCIE_MCARD0#<15>CLK_PCIE_MCARD0<15>
CR_CPPE#<20>
CR_WAKE#<21>
+VCC_4IN1+VCC_OUT
+1.8VS_OUT
+3VS_CR
+1.8VS_OUT
+VCC_OUT
+3VS_CR
+VCC_4IN1
+3VS_CR
+1.8VS
+3VS+3VS_CR
+5VS_LED
+3VS
+VCC_OUT +VCC_4IN1
+VCC_4IN1 +VCC_4IN1
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
PCI-E I/F Card Reader-JM385Custom
27 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Card Reader Connector
Use 0805 type and over 20 mils trace width on both side
8mA sink current
White LED: VF=3V, IF = 10mA, Res = 200 ohm
use for PWR_EN#
Power Circuit
Strap pin for JMicro
25mA
45mA
58mA
1mA
D3 Normal 30mA Deepest 3mA
Ripple 100mV
Ripple 100mV
Ripple 250mV
Ripple 250mV
place near pin 5 andpin 10.
20mil
12mil
11/06 update
reserved power circuit
40mil
11/06 update
11/06 update
L Place R413,C902 close to JREAD.20; R412,C901close to JREAD.26; R411,C900 close to JREAD.37
11/06 update
11/06 update
L At least 20mils
11/06 update
11/07 update
L Place R455~R457 close to U23.42
11/10 update
11/13 update
R10210_0603_5%
12
C6940.1U_0402_16V4Z
1
2
C6860.1U_0402_16V4Z
1
2
R40510K_0402_5%
12
R10200_0603_5%
12
C68910U_0805_10V4Z
1
2
7 IN 1 CONN
JREAD
TAITW_R015-B10-LMCONN@
XD-WP33
XD-D47
MS-DATA3 24
MS-DATA0 17
SD-DAT2 30
SD-DAT0 14
SD-CMD 25
MS-DATA1 15
XD-D65 SD-DAT3 29
SD-DAT1 12
XD-ALE35
XD-D032SD_CLK 20
XD-D29
MS-INS 22
MS-DATA2 19
MS-SCLK 26
XD-RE38
MS-BS 13
XD-D56
XD-D74
XD-D110
XD-CE37
XD-R/B39
XD-D38
XD-WE34
MS-VCC 28
7IN1 GND11
XD-CLE36
7IN1 GND31
SD-VCC 21XD-VCC3
XD-CD40 SD-CD-SW 1
SD-WP-SW 2
7IN1 GND417IN1 GND42
SD-DAT4 27SD-DAT5 23SD-DAT6 18SD-DAT7 16
R456 22_0402_5%12
C696270P_0402_50V7K
1
2
R106 10K_0402_5%
12
C895
0.1U_0402_16V4Z@
1
2
R111 4.7K_0402_5%
12
C902100P_0402_25V8K
@
1
2
R40910K_0402_5%
12
U22
G5250C2T1U_SOT23-5@
IN3EN4 OUT 1
OUT 5
GND2
R124
10K_0402_5%
12
R45 10K_0402_5%12
T45PAD
R457 22_0402_5%12
G
D
S
Q53
2N7002_SOT23-3
2
13
R121 4.7K_0402_5%
12
C688
0.1U_0402_16V4Z1
2
G
D S
Q54
2N7002_SOT23-3
2
1 3
C697 0.1U_0402_16V7K1 2
C900100P_0402_25V8K
@
1
2
C6950.1U_0402_16V4Z12
R369
0_0402_5%D3E@1 2
R123
150K_0402_5%
@
12
C896
1U_0603_10V4Z
@
1
2
R412100_0402_5%
@
12
C892
10U_0805_10V4Z
1
2
C893
0.1U_0402_16V4Z
1
2
R454
4.7K_0402_5%
12
JMB385
U23
JMB385-LGEZ0A_LQFP48_7X7
XRSTN1XTEST2
APCLKN3APCLKP4 APVDD 5
APGND 6
APREXT7
APRXP8 APRXN9
APV18 10
APTXN11APTXP12
SEEDAT13SEECLK14
CR1_CD1N15CR1_CD0N16
CR1_PCTLN17
DV18 18
DV33 19DV33 20
CR1_LEDN21
MDIO14 22MDIO13 23
GND 24
MDIO12 25MDIO11 26MDIO10 27MDIO9 28MDIO8 29
TAV33 30
GND 31GND 32GND 33
NC 34NC 35NC 36
DV18 37
PCIES_EN38PCIES39
MDIO7 40MDIO6 41MDIO5 42MDIO4 43
DV33 44
MDIO3 45MDIO2 46MDIO1 47MDIO0 48
R370
470_0402_5%
12
D40
DAN202U_SC70
2
31
R455 22_0402_5%12
C692
0.1U_0402_16V4Z
1
2
C693 0.1U_0402_16V7K1 2
C687
1000P_0402_50V7K1
2
R3830_0805_5%1 2
C691
0.1U_0402_16V4Z
1
2
C901100P_0402_25V8K
@
1
2
R413100_0402_5%
@
12
R11410K_0402_1%
12
R411100_0402_5%
@
12
C6900.1U_0402_16V4Z
1
2
R86200K_0402_5%
12
R12210K_0402_5%
12
D5HT-F196BP5_WHITE
21
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDA_BITCLK_CODEC
EAPD_CODEC
MIC_EXTR
MIC_EXTL
MIC_INR
MIC_INL
LINE_OUT_L
LINE_OUT_R
VREFOUT_B
SENSE
HP_OUTL
HP_OUTR
DOCK_MICR
DOCK_MICL
HDA_SYNC_CODEC
HDA_RST#_CODEC
MONO_INR
SENSEB#
VC_REFA
HDA_BITCLK_CODEC
HDA_SDOUT_CODEC
SPDIF_OUT
SUSP#<26,33,36,38,41>
GNDA <29,35>
EAPD_CODEC <33>
DMIC_DAT <17>
HP_OUTR <29>
INTMIC_DET# <29>
LINE_OUT_L <29>
LINE_OUT_R <29>
VREFOUT_B <29>
EXTMIC_DET# <29>
HP_OUTL <29>
MIC_EXT_L <29>
MIC_EXT_R <29>
MIC_IN_L <29>
MIC_IN_R <29>
DOCK_MIC_L <35>
DOCK_MIC_R <35>
HDA_BITCLK_CODEC<20>
HDA_SDOUT_CODEC<20>
HDA_SDIN0<20>
HDA_SYNC_CODEC<20>
HDA_RST#_CODEC<20>
SB_SPKR<20>
SENSE_B#<35>
DMIC_CLK<17>JACK_DET# <29,35>
EC_BEEP<33>
SPDIF_OUT <35>
+5VALW +VDDA_CODEC+3VS_HDA
+3VS
+3VDD_CODEC +VDDA_CODEC
+3VDD_CODEC
+VDDA_CODEC_R
+3VS_HDA
+VDDA_CODEC_R
+VDDA_CODEC_R
+VDDA_CODEC_R+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
Audio Codec-IDT9271B7Custom
28 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
CODEC POWER
W=40Mil
300mA(4.75V(4.56~4.94V))
Use an 80mil toconnection or placea 1206 resistor underCODEC with doublevias.
GNDAGND
DOCK MIC
HP Jack & Dock
Internal SPKR.
Internal MIC
Jack MIC
F
H
39.2K
5.11K
SENSE A
10K
Port
D
G
A
20K
C
Resistor
B
10K
5.11K
39.2K E
PortResistor
20K
SENSE B
11/18 update
11/26 update
11/28 update
C747
0.1U_0402_16V4Z
@1 2
C749
0.1U_0402_16V4Z
@1 2
C986 1U_0603_10V6K 1 2
R195
0_0805_5%
@1 2
U27
92HD71B7X5NLGXA1X8_QFN48_7X7
DVDD_CORE1
BITCLK6
VOL_DN/DMIC_1/GPIO 2 4
SDO5
VOL_UP/DMIC_0/GPIO 1 2
DVDD_IO3
SDI_CODEC8
DVSS**7
PCBEEP12
RESET#11
SYNC10
DVDD_CORE*9
SENSE_A 13
PORTE_L 14
PORTE_R 15
PORTF_L 16
PORTF_R 17
NC18
NC19
NC20
PORTB_L 21
PORTB_R 22
PORTC_L 23
PORTC_R 24
PORTD_R 36
PORTD_L 35
SENSE_B / NC34
CAP233
MONO_OUT32
VREFOUT-E / GPIO 4 31
GPIO 3 30
VREFOUT-C 29
VREFOUT-B 28
VREFFILT27
AVSS1*26
AVDD1*25
SPDIF OUT0 48
EAPD/ SPDIF OUT 0 or 1 / GPIO 0 47
DMIC_CLK46
SPDIF OUT1 / GPIO 7 45
GPIO 6 44
GPIO 5 43
AVSS2**42
PORTA_R 41
NC / OTP40
PORTA_L 39
AVDD2**38
NC37
C748
0.1U_0402_16V4Z
@1 2
C951 0.1U_0402_16V4Z1 2
R198
0_1206_5%1 2
R23022_0402_5%
1 2
C979
0.1U_0402_16V4Z
1
2
R978
BLM18BD601SN1D_06031 2
R563 47K_0402_5%@1 2
R910 39.2K_0402_1%1 2
C729
2.2U_0805_16V4Z
1
2
R885
BLM18BD601SN1D_06031 2
C731
1U_0603_10V4Z
1
2
R979
0_0603_5%
1 2
C732
0.1U_0402_16V4Z
1
2
T21PAD
R523 10K_0402_5%1 2
C985 1U_0603_10V6K 1 2
C956 0.1U_0402_16V4Z1 2
R570 10K_0402_1%
1 2
C74410U_0805_10V4Z
1 2
C981 1U_0603_10V6K 1 2
C734
1U_0603_10V4Z
1
2
R569 20K_0402_1%1 2
R982 5.1K_0402_1%1 2
U32
G9191-475T1U_SOT23-5
IN1
GND2
SHDN3
OUT 5
BYP 4
C913 1U_0603_10V4Z12
R9110_0603_5%@
12
C982 1U_0603_10V6K 1 2
R522 33_0402_5% 1 2
C1046
0.1U_0402_16V4Z
1
2
R52547_0402_5%
@ 12
R524 47K_0402_5%1 2
C730
0.1U_0402_16V4Z
1
2
C746
0.1U_0402_16V4Z
@1 2
R548 5.1K_0402_1%1 2
R571 39.2K_0402_1%
1 2
C74533P_0402_50V8K
@
1
2
C984 0.022U_0603_25V7K 1 2
R1006
0_0402_5%
@1 2
C983 0.022U_0603_25V7K 1 2
C733
0.1U_0402_16V4Z
1
2
C728 0.1U_0402_16V4Z1 2
C9550.1U_0402_16V4Z
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPKR+
HP_OUT_RHP_OUT_L
EXTMIC_DET#HP_DET#
CIR_IN
MIC_EXT_RMIC_EXT_L
MIC_EXT_L
MIC_EXT_R
DOCK_LOUT_R
DOCK_LOUT_L
HP_OUT_L
HP_OUT_R
SPKL-
SPKL+
SPKR-
EC_MUTE#
SPKR+
SPKR-
SPKL-SPKL+
HP_DET#
DOCK_LOUT_C_R
DOCK_LOUT_C_L
DOCK_LOUT_CR_R
DOCK_LOUT_CR_L
MIC_IN_R<28>MIC_IN_L<28>
INTMIC_DET#<28>
ANA_MIC_DET<33>
EXTMIC_DET#<28>
CIR_IN<33,35>
MIC_EXT_L<28>
MIC_EXT_R<28>
VREFOUT_B<28>
JACK_DET#<28,35>
HP_OUTR<28>
HP_OUTL<28>
LINE_OUT_L<28>
LINE_OUT_R<28>
EC_MUTE#<33>
DOCK_LOUT_C_R <35>
DOCK_LOUT_C_L <35>
+3VS
+VDDA_CODEC
+5VL
+VDDA_CODEC
B+
+3VALW
+5VS+5VAMP
+5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AMP & Audio JackCustom
29 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
SPEAKER
INTMIC IN
Audio/B & CIR
09/13 update
EXTMIC IN
HP OUT For Docking
HP OUT For M/B
Keep 10 mil width
15.6dB
GAIN0 GAIN1 Av(inv)
0 6dB
15.6dB
21.6dB
0
1
0
1
1
9/20 SP02000H700/SP02000H900
9/20 SP02000H800
Close to CODEC U27
Close to CODEC U27
10/30 update
11/14 update
Change JP20 PCB Footprintfrom ACES_88231-04001_4Pto E-T_3806-F04N-02R_4P
11/05 update 11/19 update
11/18 update
11/18 update
0 1 10dB
11/18 update
R594
0_1206_5%1 2
R908
4.7K_0402_5%
12
C742
1U_0603_10V4Z
1 2
G
D
S
Q151
2N7002_SOT23-3
2
13
+
C774 150U_Y_6.3VM
1 2
Q147B2N7002DW-7-F_SOT363-6
3
5
4
R1002
0_0402_5%
12
JP42
ACES_88231-04001CONN@
11223344
GND15GND26
C760
100P_0402_50V8J
1
2
R968
47_0603_1%
1 2
C7431U_0603_10V4Z
1 2
+
C773 150U_Y_6.3VM
1 2
C761
100P_0402_50V8J
1
2
R1005
0_0402_5%
12
R1004100K_0402_5%@
12
R969
47_0603_1%
1 2
U28
TPA6017A2_TSSOP20
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VDD
16PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PVD
D2
6
SHUTDOWN19
THER
MAL
PAD
21
+
C775 150U_Y_6.3VM
1 2
JP20
E&T_3806-F04N-02RCONN@
11223344
GND15GND26
C1054 47P_0402_50V8J1 2
C1051
0.1U_0402_16V4Z
1
2
C76610U_0805_10V4Z
1
2
R975330K_0402_5%
12
C1040 0.022U_0603_25V7K 1 2
C762
100P_0402_50V8J
1
2
Q145B2N7002DW-7-F_SOT363-6
3
5
4
G
D
S
Q160
2N7002_SOT23-3
2
13
R1000100K_0402_5%@
12
C1053 47P_0402_50V8J1 2
R97310K_0402_5%
12
+
C776 150U_Y_6.3VM
1 2
Q145A2N7002DW-7-F_SOT363-6
61
2
G
D
S Q1612N7002_SOT23-3
2
13
C1052 47P_0402_50V8J1 2
R907
4.7K_0402_5%
12
C1044
4.7U_0805_10V4Z
1
2
C1055 47P_0402_50V8J1 2
R951100K_0402_5%
12
R1003
100K_0402_5%
12
R97410K_0402_5%
12
JP43
ACES_87213-1400GCONN@
11223344556677889910101111121213131414
C1050 0.022U_0603_25V7K 1 2
R9054.7K_0402_5%
12
R9044.7K_0402_5%
12
R909
0_0402_5%
12
C1041 0.022U_0603_25V7K 1 2 R9060_0402_5%
12
R1001100K_0402_5%
12
R955 10K_0402_5%12
C1049 0.022U_0603_25V7K 1 2
Q147A2N7002DW-7-F_SOT363-6
6 1
2
C763
100P_0402_50V8J
1
2
C767
0.1U_0402_16V4Z
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SMB_CK_CLK0
SMB_CK_DAT0
ACCEL_INT <19>
HDD_HALTLED <34>
SMB_CK_DAT0 <8,9,15,20>
SMB_CK_CLK0 <8,9,15,20>
+3VS_ACL_IO
+3VS_ACL
+3VS_ACL+3VS +3VS_ACL_IO
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
AccelerometerCustom
30 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
ACCELEROMETER
0011101b
L Must be placed in the center of the system.
VDDIO absolute manrating is VDD+0.1
U63
LIS302DLTR_LGA14_3x5
SCL
/ SPC
14
GND2
Reserved3
GND4
GND5
CS
7
Vdd_IO1
Vdd6
SDA / SDI / SDO 13
SDO 12
Reserved 11
GND 10
INT 2 9
INT 1 8
C1030
0.1U_0402_16V4Z
1
2
C1031
10U_0805_6.3V6M
1
2
R9980_0402_5%
1 2
R9970_0402_5%1 2
R959 0_0603_5%1 2
D44
CH751H-40PT_SOD323-2
2 1
R999 10K_0402_5%12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB20_P6
USB20_N6
USB20_P6USB20_N6
USB20_N2_R
USB20_P2_R
USB_EN#
SATA_TXP2
SATA_TXN2
USB20_N2_RUSB20_P2_R
SATA_RXP2SATA_RXN2
SATA_TXP2SATA_TXN2
USB_EN#
USB_EN#
+3VS_FB
USB20_N7USB20_P7
+3VS_FB
USB20_N7
USB20_P7
BT_LED <34>CH_DATA <26>CH_CLK <26>
USB20_N6 <20>USB20_P6 <20>
USB20_P2<20>
USB20_N2<20>
SATA_TXP2<21>SATA_TXN2<21>
SATA_RXN2_C<21>SATA_RXP2_C<21>
USB_EN#<33>USB20_N0<20>USB20_P0<20>
USB20_N1<20>USB20_P1<20>
USB20_P7<20>USB20_N7<20>
BT_OFF<21>
+3VAUX_BT
+3VAUX_BT+3VALW
+3VAUX_BT
+USB_VCCA
+USB_VCCA
+USB_VCCA+5VALW+USB_VCCA +5VALW
+3VS+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
USB, BT, eSATA,FPRCustom
31 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
BT Connector
0612 no install
Check BT power consumption < 1A
W=100mils
Left side USB CONNECTOR Left side ESATA5/USB2 combination Connector Right side USB 0&1 Board Conn
9/20 SP02000DX00
9/20 SP02000HC00/SP02000HB00
9/20 SP01000B000
Finger printer
20070209 Add for FPR
Max 0.5AMax 2.5A
L Change PCB Footprint from SW_WCM2012F2S_4P to KING_WCM-2012-900T_4P10/09 update
11/14 update
Update Symbol TYCO_1759576-1_11P-T
11/14 update
11/20 update
U40
TPS2061IDGN_MSOP8~N
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
R622
0_0603_5%@1 2
C801
4.7U_0805_10V4Z
1
2
C800
0.1U_0402_16V4Z
1
2
R519
100K_0402_5%
12
C792 0.01U_0402_16V7K12
JP39
ACES_85201-06051CONN@
GND7GND8
112233445566
D16
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
G
DS
Q31 SI2301BDS-T1-E3_SOT23-3@
2
13
L51
WCM-2012-900T_4P
11
44 3 3
2 2
C79
110
00P_
0402
_50V
7K
1
2
C8320.1U_0402_16V4Z
1
2
C793 0.01U_0402_16V7K12
C788
4.7U_0805_10V4Z
1
2
C802 0.1U_0402_16V4Z1 2
G
DS
Q24 SI2301BDS-T1-E3_SOT23-3
2
13
D21
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
JP32
ACES_88231-08001CONN@
1 12 23 34 45 56 67 78 8
GND1 9GND2 10
JP47
ACES_87213-1000G
CONN@
1122334455667788991010
GND111GND212
+
C78
915
0U_D
_6.3
VM
1
2
R517 1K_0402_5%@ 1 2
C799
0.01U_0402_16V7K
1
2
D12
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
R520
10K_0402_5%
1 2
D11
PRTR5V0U2X_SOT143-4@GND 1
IO1 2
IO23
VIN4
C798
1U_0603_10V4Z
1
2
R581
0_0603_5%1 2
USB
ESATA
JESAT
TYCO_1759576-1CONN@
VBUS1D-2D+3GND4
GND5A+6A-7GND8B-9B+10GND11
GND12GND13GND14GND15
C79
00.
1U_0
402_
16V4
Z
1
2
R518 1K_0402_5%@ 1 2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPI_CS# INT_SPI_CS#
SPI_CLK_R
EC_SO_SPI_SI_R EC_SI_SPI_SO_R
LPC_AD2
CLK_PCI_SIO
PLT_RST#
LPC_DRQ#
LPC_AD1
LPC_FRAME#
SIRQ
LPC_AD0
LPC_AD3
LPC_AD0
LPC_FRAME#
PLT_RST#
LPC_AD3LPC_AD2LPC_AD1
SIRQ
LPC_DRQ#
CLK_PCI_SIO2
CLK_14M_SIOCLK_14M_SIO
SPI_CS#INT_FLASH_EN#SPI_CLK_REC_SO_SPI_SI_R
EC_SI_SPI_SO_R
INT_FLASH_EN#INT_SPI_CS#
SPI_CS#
EC_SI_SPI_SO <33>
SMB_EC_CK1<33,34,37>SMB_EC_DA1<33,34,37>
SPI_CLK<33>
EC_SO_SPI_SI<33>
SPI_CS#<33>
LPC_FRAME#<19,33>
LPC_AD0 <19,33>
PLT_RST# <11,14,19,25,26,27,33>
LPC_AD2 <19,33>
SIRQ<19,33>
LPC_AD3<19,33>
LPC_AD1<19,33>
CLK_PCI_SIO <19,23>
LPC_DRQ# <19>
CLK_14M_SIO <15>
CLK_PCI_SIO2 <19>
SB_INT_FLASH_SEL<21>
+3VL
+3VALW
+3VS
+3VAL
+3VALW
+3VL
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
BIOS ROM/Debug ToolCustom
32 48Monday, December 03, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
SPI Flash (8Mb*1)20mils
LPC Debug Port LPC Debug Port
9/20 SP07000F500
9/20 SA000012E00/SA00000XT00
9/20 DC233105000
9/20 ??????
11/09 update
C:Chg. PN to LTC0000020011/13 update
11/28 update
L Need add back R221 if no ext BIOS design U30 install.
12/03 update
JP41
ACES_85201-2005@
1 12 23 34 45 56 67 78 89 9
10 1011 1112 1213 1314 14
16 1617 1718 18
15 15
20 2019 19
R227 0_0402_5%
1 2R221 0_0402_5%
1 2
R995 0_0402_5%@1 2
R521100K_0402_5%
12
&U29
SST25VF080B-50-4C-S2AF_SO845@
R223 0_0402_5%
12
H31
DEBUG_PAD@
1
2
3
4
56
7
8
9
10
R23222_0402_5%
@
12
R226100K_0402_5%@
1 2
R137 0_0402_5%@1 2
C48622P_0402_50V8J@
1
2
U29
WIESON G6179 8P SPI
CONN@
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3
R996 0_0402_5%1 2
R310100_0402_5%@
12
U31
AT24C16AN-10SI-2.7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
C502100P_0402_25V8K@
1
2
C803
0.1U_0402_16V4Z
1
2
C489
0.1U_0402_16V4Z@
12
U30
NC7SZ32P5X_NL_SC70-5@
B 2
A 1Y4
G3
Vcc
5
C484
0.1U_0402_16V4Z
1
2
R526100K_0402_5%
12
JP12
E&T_2941-G08N-00E~D@
11 2 233 4 455 6 677 8 8
R228
22_0402_5%@
1 2
R229 0_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LID_SW#
ON/OFF#
KSO8
KSO12
KSI7
KSO13
KSO4
KSO14
FSTCHG
KSO5
KSO0KSO1
KSO6
KSO9
KSO7
KSO2KSO3
BATT_OVP
KSO11KSO10
SYSONSMB_EC_CK2SMB_EC_DA2
SB_PWRGD
ECRST#
ACOFF
SLP_S3#
TP_CLK
TP_DATA
ON/OFFBTN_LED#
SLP_S5#
E51_RXD
PWRBTN_OUT#
ESB_DAT
TP_BTN#
E51_TXD
KSI6
KSI1
KSI5
KSI2
KSO15
KSI4
BKOFF#
EC_RSMRST#
SMB_EC_CK1SMB_EC_DA1
SUSP#
E51_RXDE51_TXD
ESB_CLK
TP_LED#
NMI_DBG#
BAT_LED#
EC_SMI#
LPC_LFRAME#
LID_SW#
IREF
KSO17
SIRQ
GATEA20
LPC_AD2
KSO16
LPC_AD1
LPC_AD3
KB_RST#
LPC_AD0
EC
AG
ND
ECAGND
INV_PWM
TP_CLK
PLT_RST#
TP_DATA
CLK_PCI_EC
FAN_PWM
EC_SCI#
BATT_TEMP
C RY2
KSI3
KSI0
C RY1
EC_BEEP
KSI5
KSO11
KSO0
KSO1KSI0
KSI7
KSO13
KSO2
KSI2
KSO4
KSO8
KSO15KSO10
KSO3
KSO5
KSI4
KSO7
KSO14
KSI3
KSO6
KSO12
KSI6
KSI1
KSO9
KSI5
KSO11
KSO0
KSO1KSI0
KSI7
KSO13
KSO2
KSI2
KSO4
KSO8
KSO15KSO10
KSO3
KSO5
KSI4
KSO7
KSO14
KSI3
KSO6
KSO12
KSI6
KSI1
KSO9
VR_ON
SUSP# SYSON
SMB_EC_CK2
SMB_EC_DA2
SMB_EC_DA1
SMB_EC_CK1
DOCK_VOL_UP#
DOCK_VOL_DWN#
TP_BTN#
H_THERMTRIP#_EC
CIR_IN
ESB_DAT
ESB_CLK
AC_IN_D
LAN_POWER_OFF E51_RXD
WL_BLUE_BTN
WL_BLUE_BTN
PLT_RST#<11,14,19,25,26,27,32>ANA_MIC_DET <29>
CONA#<35>
LPC_AD1<19,32>
CIR_IN <29,35>
LPC_FRAME#<19,32>SIRQ<19,32>
LPC_AD2<19,32>
LPC_AD0<19,32>
LPC_AD3<19,32>
CLK_PCI_EC<19,23>
SMB_EC_CK1<32,34,37>
EC_SCI#<20>
SMB_EC_DA1<32,34,37>
EC_SO_SPI_SI <32>
SMB_EC_CK2<6>SMB_EC_DA2<6>
EC_SI_SPI_SO <32>
SPI_CS# <32>SPI_CLK <32>
BATT_OVP <37>BATT_TEMP <37>
DAC_BRIG <17>
SYSON <26,34,36,40>
FAN_PWM <4>
EC_RSMRST# <20>
EC_ON <36,39>
BAT_LED# <34>
LID_SW#<34>
ADP_I <38>
VR_ON <43>
GATEA20<20>KB_RST#<20>
EC_THERM# <21>
ON/OFFBTN_LED# <34>
EC_LID_OUT# <20>
INV_PWM <17>
SLP_S3#<20>SLP_S5#<20>EC_SMI#<20>
TP_CLK <34>TP_DATA <34>
ON/OFF#<34>
SB_PWRGD <6,20,43>BKOFF# <17>
EAPD_CODEC <28>DIM_LED<36>
ESB_DAT<34>
TP_BTN# <34>
MUTE_LED <35>
ACOFF <38>
I2C_INT <34>
DOCK_VOL_DWN# <35>DOCK_VOL_UP# <35>
USB_EN# <31>EC_MUTE# <29>
ESB_CLK<34>
STD_ADP <38>
ENBKL <11>
AC_SET <38>
VLDT_EN<36>
TP_LED# <34>
FSTCHG <38>
ADP_ID <37>
PCI_SERR# <19>
HDARST#<20,23>
IREF <38>
CAPS_LED# <34>
EC_BEEP <28>
WL_BLUE_LED# <34>
AC_IN <38,39>
NUM_LED#<34>DOCK_SLP_BTN#<35>
PWRBTN_OUT# <20>
VCTRL <38>
VGATE <43>
SUSP# <26,28,36,38,41>
H_THERMTRIP#_EC<6>
AC_IN_D <21>
LAN_POWER_OFF<25>
WL_BLUE_BTN<34>
+EC_AVCC
+3VL_EC
+3VL_EC
+EC_AVCC
+3VL_EC
+5V_TP
+3VL_EC+3VL
+3VALW
+5VL
+3VL_EC
+3VALW
+3VS
+3VL+3VS
+3VS
+5VS_LED
+5VL
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
EC KB926/KB connCustom
33 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
select SPI ROM or LPC ROM
KB Back Light Conn
For EMI
EC DEBUG port
Need 4.7uf for 926 C version
9/20 SP020007200
9/20 SP01000KC00/SP010009O10
9/20 SP01000FF00/SP01000G300
Keyboard Connector
10/08 update
11/07 update
L 2nd source : SJ100004N00 same as IAL80
11/13 update
11/11 update
11/11 update11/13 update
11/13 update
11/13 update
11/13 update
11/22 update
11/13 update
11/13 update
L TP_LED#=L, T/P disableTP_LED#=float (GPO), T/P enable
11/16 update
11/20 update
C825 100P_0402_25V8K@ 1 2
C884 100P_0402_25V8K@ 1 2
C888 100P_0402_25V8K@ 1 2
C826 100P_0402_25V8K@ 1 2
R536100K_0402_5%
12R542 0_0402_5%
1 2
C768 100P_0402_25V8K@ 1 2
R51510K_0402_5%
1 2
R53810K_0402_5%
12
R54520M_0402_5%
@
12
R547
0_0402_5%
1 2
R53410K_0402_5%
1 2
JP48
ACES_85201-04051CONN@
1 12 23 34 4G15
G26
C809
1000P_0402_50V7K1
2
C814 4.7U_0805_10V4Z
12
R5284.7K_0402_5%
12
C808
0.1U_0402_16V4Z1
2
C805
0.1U_0402_16V4Z
1
2
C81315P_0402_50V8J1 2
L81
0_0603_5%
1 2
C810
15P_0402_50V8J@
1 2
R516
150_0603_1%
12
C822 100P_0402_25V8K@ 1 2
C875 100P_0402_25V8K@ 1 2
JP34
ACES_85205-0400
@
1 12 23 34 4
R51310K_0402_5%
1 2
C823 100P_0402_25V8K@ 1 2
R53347K_0402_5%
1 2
JP33
ACES_85201-24051CONN@
112233445566778899101011111212131314141515161617171818191920202121222223232424
GND125GND226
R541 10K_0402_5%
12
C609 100P_0402_25V8K@ 1 2
C8110.1U_0402_16V4Z
12
R527
0_0805_5%1 2
C824 100P_0402_25V8K@ 1 2
R539100K_0402_5%
12
C806
0.1U_0402_16V4Z1
2
R53510K_0402_5%
1 2
R1044 100K_0402_5%1 2
R5294.7K_0402_5%
12R590
10K_0402_5%DOCK@
12
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U33
KB926QFC0_LQFP128_14X14
GA20/GPIO001KBRST#/GPIO012SERIRQ#3LFRAME#4LAD35
PM_SLP_S3#/GPIO046
LAD27LAD18
VCC
9
LAD010
GN
D11
PCICLK12PCIRST#/GPIO0513
PM_SLP_S5#/GPIO0714EC_SMI#/GPIO0815LID_SW#/GPIO0A16SUSP#/GPIO0B17PBTN_OUT#/GPIO0C18EC_PME#/GPIO0D19
SCI#/GPIO0E20
INVT_PWM/PWM1/GPIO0F 21
VCC
22
BEEP#/PWM2/GPIO10 23
GN
D24
EC_THERM#/GPIO1125
FANPWM1/GPIO12 26ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO1428FANFB2/GPIO1529EC_TX/GPIO1630EC_RX/GPIO1731ON_OFF/GPIO1832
VCC
33
PWR_LED#/GPIO1934
GN
D35
NUMLED#/GPIO1A36
ECRST#37
CLKRUN#/GPIO1D38
KSO0/GPIO2039KSO1/GPIO2140KSO2/GPIO2241KSO3/GPIO2342KSO4/GPIO2443KSO5/GPIO2544KSO6/GPIO2645KSO7/GPIO2746KSO8/GPIO2847KSO9/GPIO2948KSO10/GPIO2A49KSO11/GPIO2B50KSO12/GPIO2C51KSO13/GPIO2D52KSO14/GPIO2E53KSO15/GPIO2F54
KSI0/GPIO3055KSI1/GPIO3156KSI2/GPIO3257KSI3/GPIO3358KSI4/GPIO3459KSI5/GPIO3560KSI6/GPIO3661KSI7/GPIO3762
BATT_TEMP/AD0/GPIO38 63BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65AD3/GPIO3B 66
AVC
C67
DAC_BRIG/DA0/GPIO3C 68
AGN
D69
EN_DFAN1/DA1/GPIO3D 70IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75SELIO2#/AD5/GPIO43 76
SCL1/GPIO4477SDA1/GPIO4578SCL2/GPIO4679SDA2/GPIO4780
KSO16/GPIO4881KSO17/GPIO4982
PSCLK1/GPIO4A 83PSDAT1/GPIO4B 84PSCLK2/GPIO4C 85PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GN
D94
SYSON/GPIO56 95
VCC
96
SDICS#/GPXOA00 97SDICLK/GPXOA01 98SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106GPXO10 107GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC
111
ENBKL/GPXID2 112
GN
D11
3
GPXID3 114GPXID4 115GPXID5 116GPXID6 117GPXID7 118
SPIDI/RD# 119SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1122XCLK0123 V18R 124
VCC
125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C769 100P_0402_25V8K@ 1 2
L800_0603_5%
12
R530
33_0402_5%@1 2
C1073100P_0402_50V8J
1 2
Y7
32.768KHZ_12.5PF_Q13MC30610003
OUT 4
IN 1
NC3
NC2
C877 100P_0402_25V8K@ 1 2
C885 100P_0402_25V8K@ 1 2
C758 100P_0402_25V8K@ 1 2
D54CH751H-40PT_SOD323-2
2 1
C878 100P_0402_25V8K@ 1 2
R1050
10K_0402_5%1 2
T20 PAD
R51410K_0402_5%
1 2
R5324.7K_0402_5%
12
C213 100P_0402_25V8K@ 1 2
C759 100P_0402_25V8K@ 1 2
C754 100P_0402_25V8K@ 1 2
C81515P_0402_50V8J
1 2
C807
1000P_0402_50V7K
1
2
C886 100P_0402_25V8K@ 1 2
C876 100P_0402_25V8K@ 1 2
R1040100K_0402_5%
12
R58910K_0402_5%
DOCK@
12
C757 100P_0402_25V8K@ 1 2
C816 0.1U_0402_16V4Z
1 2
C764 100P_0402_25V8K@ 1 2
R544
0_0402_5%
1 2
C8120.01U_0402_16V7K
1 2
R5314.7K_0402_5%
12
R5434.7K_0402_5%
12
C887 100P_0402_25V8K@ 1 2
C756 100P_0402_25V8K@ 1 2
R46 10K_0402_5%
1 2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
TP_DATATP_CLK
TP_DATATP_CLK
ON/OFFBTN_LED#
HDA_SDIN1_MDC
ON/OFFBTN_LED#ON/OFF#
TP_BTN#
TP_LED#
WL/WW_LED
WL_BLUE_LED#
WL_BLUE_LED#
ON/OFFBTN_LED#
ON/OFF#
ON/OFF#
TP_CLK <33>TP_DATA <33>
LID_SW#<33>
ON/OFF#<33>ON/OFFBTN_LED#<33>
HDD_HALTLED <30>
CAPS_LED#<33>
HDA_BITCLK_MDC <20>
HDA_SYNC_MDC<20>HDA_SDIN1<20>
HDA_SDOUT_MDC<20>
HDA_RST#_MDC<20>
SYSON<26,33,36,40>
TP_BTN# <33>
TP_LED# <33>
BAT_LED#<33>
WL_LED# <26>
WW_LED# <26>
BT_LED <31>
WL_BLUE_LED#<33>
SATA_LED#<21>
HDD_HALTLED# <21>
SMB_EC_CK1<32,33,37>
NUM_LED#<33>
ESB_CLK<33>
I2C_INT<33>ESB_DAT<33>
SMB_EC_DA1<32,33,37>
WL_BLUE_BTN<33>
+5V_TP
+3VALW
+5VS_LED
+5VALW_LED
+5VS_LED
+3VS
+3VS
+3VS
+5VALW_LED
+5VALW +5V_TP
+3VALW
+5VS_LED
+5VS
+5VALW_LED
+3VS
+3VS+3VS
+5VS
+3VS
+3VL
+5VS_LED
+5VALW_LED
+5VALW_LED
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
TP,MDC,ON/OFF,S/W,LED,ReedCustom
34 48Monday, December 03, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
9/20SP01000KC00/SP01E000900
M/B TO TP/B
Reed switch BOARD.
9/20 SP01000J100
HDD/G-Sensor LED
CAPS LOCK LED
WHITEPOWER LED
WHITE
MDC 1.5 Conn.
for debug only
BTN
ON/OFF Button Connector
9/20 STANDOFF (H= 5.0 mm) ES000000800
Battery Charge LED
White LED: VF=3V, IF = 10mA, Res = 200 ohmAmber LED: VF=1.8V, IF = 8mA, Res = 390 ohm
TP ON/OFF
TouchPAD ON/OFF LED
T/P Enable (TP_LED#=X)-> WhiteT/P Disable (TP_LED#=L)-> Amber
WLAN and BT LED inform pin to KBCWHITE
09/29 update
Max 0.5A
Max 0.5A
11/14 update
10/08 update
10/08 update
11/01 update
Change JP25 PCB Footprintfrom ACES_88018-124G_12Pto ACES_88020-12101_12P
11/10 update
11/10 update
L D18 need correct pinconnection after netin
L D18 need correct pinconnection after netin11/10 update
11/14 update
11/14 update
Change JP40 PCB Footprint from ACES_85204-03001_3P to ACES_88231-03041_3P
9/20 SP01000H400
SWITCH BOARD.
09/29 update
10/08 update
11/13 update
11/20 update
11/13 update
11/20 update
11/22 update
11/28 update
11/28 update
12/03 update
R1046 0_0402_5%CY@1 2
WHIT
E
YELL
OW
D18
HT-297UY5/BP5_YELLOW-WHITE
21
43
R1024
100K_0402_5%
12
R987
200_0402_5%
12
C777
10P_0402_50V8J@
1
2
G
D
SQ1532N7002_SOT23-3
21
3
SW1SMT1-05-A_4P
3
2
1
4
5 6
R1047 0_0402_5%CY@1 2
C820100P_0402_50V8J
@
1
2
R555
0_0603_5%RM@
12
C7804.7U_0805_10V4Z@
1
2C779
0.1U_0402_16V4Z
1
2
R49533_0402_5%1 2 R557
4.7K_0402_5%@
12
G
D
S
Q342N7002_SOT23-3
2
13
JP36
ACES_85201-1005NCONN@
1122334455667788991010GND11GND12
D8
HT-F196BP5_WHITE
21
WHIT
E
YELL
OW
D17
HT-297UY5/BP5_YELLOW-WHITE
21
43
10K
47K
Q168DTA114YKAT146_SOT23-3
2
13
R420_0402_5%
1 2Q7A
2N7002DW-7-F_SOT363-6
61
2
R1025
100K_0402_5%
12
R1041
10K_0402_5%@12
R49610_0402_5%@
12
C821100P_0402_50V8J@
1
2
R552200_0402_5%1 2
R645
10K_0402_5%
12
R983200_0402_5%
12
R550200_0402_5%1 2
C8190.1U_0402_16V4Z
@
1
2
R1007 0_0402_5% 1 2
R556
4.7K_0402_5%@
12
R1035 0_0402_5%RM@1 2
SW2SMT1-05_4P
3
2
1
4
56
R554
0_0603_5%RP@
12
Q158B
2N7002DW-7-F_SOT363-6
3
5
4
JP1
ACES_85201-04051CONN@
11223344 G1 5
G2 6
R984390_0402_5%
12
JP37
ACES_85201-04051CONN@
1 12 23 34 4G15
G26
G
D
S
Q156
2N7002_SOT23-3@
2
13
R549200_0402_5%1 2
Q7B
2N7002DW-7-F_SOT363-6
3
5
4
R1049 0_0402_5%ENE@1 2
R235 0_0603_5%1 2
R20
10K_0402_5%
12
R1034 0_0402_5%RM@1 2
R1048 0_0402_5%ENE@1 2
R985
10K_0402_5%@
12
D6
HT-F196BP5_WHITE
21
R1008 0_0402_5% 1 2
Q158A
2N7002DW-7-F_SOT363-6
61
2
R103810K_0402_5%@
12
R1036150_0402_5%@
1 2
D7
HT-F196BP5_WHITE
21
C778
1000P_0402_50V7K
1
2
JP40
ACES_88231-03041CONN@
112233 GND 4
GND 5
G
DS
Q85SI2301BDS-T1-E3_SOT23-32
13
R55810K_0402_5%
12
D31PSOT24C_SOT23-3
@
231
R988
390_0402_5%
12
JP25
ACES_88020-12101CONN@
11335577991111
2 24 46 68 8
10 1012 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
R989
10K_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
JACK_DET#DOCK_SLP_BTN#MUTELEDDOCK_PWR_ONCIR_IN
TV_LUMA_LTV_CRMA_LTV_COMPS_L
AUDIO_IGNDDOCK_PRESENT
DOCK_MIC_L_CDOCK_MIC_R_CDOCK_LOUT_C_LDOCK_LOUT_C_RAUDIO_OGND
R_VOL_DWN# DOCK_VOL_DWN#R_VOL_UP# DOCK_VOL_UP#
+V_BATTERY
DOCK_PWR_ON
DOCK_PRESENT
SPDIFO_L
DOCK_MIC_L_C
DOCK_MIC_R_CDOCK_MIC_R_R
DOCK_MIC_L_C
DOCK_MIC_L_R
R_VOL_UP# R_VOL_DWN#
DOCK_LOUT_C_LDOCK_LOUT_C_R
SPDIFO_L
RJ45_MIDI1-
RJ45_MIDI0-
D_DDCDATA
D_HSYNC
USB20_N3
RJ45_MIDI1+
RJ45_MIDI0+
D_DDCCLK
D_VSYNC
USB20_P3
CONA# <33>
DOCK_VOL_DWN# <33>
JACK_DET# <28,29>DOCK_SLP_BTN# <33>
DOCK_LOUT_C_R <29>DOCK_LOUT_C_L <29>
DOCK_VOL_UP# <33>
CIR_IN <29,33>
MUTE_LED <33>
SYSON#<36,42>
DOCK_MIC_R<28>
DOCK_MIC_L<28>
SENSE_B# <28>
SPDIF_OUT <28>
USB20_P3<20>
RJ45_MIDI1-<25>
RJ45_MIDI0-<25>
GREEN_L<16>
D_DDCDATA<16>
D_HSYNC<16>
USB20_N3<20>
RJ45_MIDI1+<25>
RJ45_MIDI0+<25>
BLUE_L<16>
RED_L<16>
D_DDCCLK<16>
D_VSYNC<16>
+3VL_EC
B+
+3VALW
+5VS
+3VS
+DOCKVIN
+1.5VS
+DOCKVIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
DOCK CONNCustom
35 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
DOCK_PWR_ON Spec0V = Notebook S4/S5, Dock off2.5V = Notebook S3, Dock on4V = Notebook S0, Dock on
Atlas/ Saturn Dock
Need 600 Ohm 500 mAMIC_Dock
SPDIF
09/19 update
Close to CODEC U27
L R976/Q149/R646 be option with R992/C945
09/29 update
LUpdate symbol finish and swap backJDOCK Pin38/40 , 34/36 , 30/32, 26/28,22/24, 10/12, 6/8 Add pin 45/46 to GND
11/14 update
10/09 update
L Change PCB Footprint from L_FBM-11-160808_2P to TAI-T_FCM1608KF-601T02_2P
11/09 update
11/05 update
H32H_2P8@
1
H47H_3P3@
1
G
D
S
Q332N7002_SOT23-3DOCK@
2
13
C8431000P_0402_50V7K
DOCK@1
2
C943
220P_0402_50V7KDOCK@
1
2
R573
110_0402_5%DOCK@
12
H46H_4P2@
1
R976
33_0402_5%@
12
C945
0.1U_0402_16V7K
DOCK@1 2
H34H_2P8@
1
R992
0_0603_5%DOCK@1 2
H42H_2P8@
1
R591 1K_0402_5%DOCK@1 2
R914
10K_0402_5%DOCK@
12
H48H_3P3@
1
R585 1K_0402_5%DOCK@
1 2
R572 1K_0402_5%DOCK@
1 2
PJP5
PAD-OPEN 2x2m
21
C922220P_0402_50V7KDOCK@
1
2
C944
220P_0402_50V7K
DOCK@ 1
2
R586 1K_0402_5%
DOCK@1 2
G
D
SQ362N7002_SOT23-3DOCK@
2
13
G
D
S
Q182N7002_SOT23-3
DOCK@
2
13
R91510K_0402_5%
DOCK@
12
C8441000P_0402_50V7K
DOCK@1
2
H55H_5P6N@
1
R646
0_0402_5%@1 2
T53PAD
H37H_2P8@
1
R56510K_0402_5%DOCK@
12
H52H_1P5N@
1
H43H_4P2@
1
R647
220_0402_5%DOCK@ 1 2
R912
10K_0402_5%
DOCK@
1 2
L93FCM1608KF-601T02_2PDOCK@
1 2H35
H_2P8@
1
H41H_2P8@
1
R9441.21K_0402_1%DOCK@
12
C8311000P_0402_50V7K
DOCK@1
2
H40H_2P8@
1
H39H_2P8@
1
H44H_4P2@
1
H51H_6P0X5P0N@
1
H54H_3P3X0P6N@
1
R943 10K_0402_5%DOCK@12
H36H_2P8@
1
H53H_3P3X0P6N@
1
R58810K_0402_5%DOCK@
12
R913
47K_0402_5%DOCK@ 12
EB
CQ149
MMBT3904_NL_SOT23-3@2
31
C978
1U_0603_10V6KDOCK@
1
2
JDOCK
FOX_QL1122L-H212AR-7FCONN@
CRT_Green40
TV composite 33CRT_Blue34
TV ground 31
Vsync26 CIR input 29
USB-28USB+22
PWR_ON 27
Digital gnd24
MDI0-6
MDI3-18
Mute_LED 25
DDC_Clock30 DDC_DATA36
Digital gnd 39
TV chroma 35TV Luma 37CRT_Red38
Hsync32
MDI3+20MD2I-14MDI2+16MDI1-10MDI1+12
Sleep Botton 23Jack Detect 21
VOL_up 19VOL_down 17
MDI0+8Battery out2Battery out4
SPDIF 15Audio Output gnd 13
Left headphone 9Right headphone 11
Mic_Right 7
Dock_present 1Mic gnd 3Mic_Left 5
GND 41GND 42GND 43GND 44GND45
GND46
H33H_2P8@
1
L94FCM1608KF-601T02_2PDOCK@
1 2
T52PADT51PAD
G
D
S
Q100
2N7002_SOT23-3DOCK@
2
13
D43
DAN202U_SC70
DOCK@2
31
R567 200_0402_5%DOCK@ 1 2R568 200_0402_5%DOCK@ 1 2
C942
220P_0402_50V7KDOCK@
1
2
EB
C
Q16MMBT3904_NL_SOT23-3
DOCK@
2
31
C921220P_0402_50V7K
DOCK@
1
2
R9801.21K_0402_1%DOCK@
12
R942 10K_0402_5%DOCK@12
R56647K_0402_5%DOCK@
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RUNON
VLDT_EN#
EC_ON#
SUSPSYSON#
VLDT_EN# SYSON#
VLDT_EN
VLDT_EN#
SUSP SUSP
SYSON
SYSON#
SUSP
SUSP
RUNON
SUSP
SUSP
EC_ON#
RUNON_S4
SYSON# SYSON#
RUNON_S4
SYSON#
DIM_LED#
DIM_LED
DIM_LED#
SUSP
1.8VS_ENABLE
SYSON#<35,42> SUSP <42>
EC_ON<33,39>
SUSP# <26,28,33,38,41>SYSON<26,33,34,40> VLDT_EN<33>
DIM_LED<33>
VLDT_EN#<13>
+5VL
B+
+1.2VALW +1.2V_HT
+5VALW +5VS
+5VL+5VL
+5VS
+3VS
+1.8VS
+0.9V
+5VL
+1.8VS+1.8V
+1.2V_HT +1.8V +1.2VALW
B+
+3VALW +3VS
+1.5VS +1.1VS
+1.2VALW +1.2V
+1.2V +3V
B+
+3VALW +3V
+5VALW
+5VALW_LED
+5VS
+5VS_LED
B+
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
DC/DC CircuitsCustom
36 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
+1.2VALW TO +1.2V_HT
+5VALW TO +5VS
+1.8V TO +1.8VS
Discharge circuit
Change to +3VL(same as EC) to avoid leakage
+3VALW TO +3VS
+1.2VALW TO +1.2V
08/23 new add
+3VALW TO +3V
DIM LED
09/13 update
09/13 update (Del +V_DDR_MCH_REFP)
09/13 update 09/13 update
09/13 update
Reserve until SI-1 stage after SBUSB PHY power saving report
09/29 update (Wait EC Code fix)
09/29 update
10/8 update
10/8 update
11/06 update
PJP7
PAD-OPEN 2x2m
21
C846
1U_0402_6.3V4Z
1
2
C1029
4.7U
_080
5_10
V4Z
1
2
C839
1U_0402_6.3V4Z
1
2
G
D
S
Q46
2N7002_SOT23-3
2
13
PJP8
PAD-OPEN 2x2m
21
C8360.1U_0402_16V4Z
1
2
C847
4.7U
_080
5_10
V4Z
1
2
G
DS
Q32 SI2301BDS-T1-E3_SOT23-3
2
13
R233330K_0402_5%
12
R500_0603_5%@
1 2
C1025
4.7U
_080
5_10
V4Z 1
2
G
D
S
Q512N7002_SOT23-3
2
13
Q139
IRF8113PBF_SO8
365
78
2
4
1
C1026
0.01
U_0
402_
25V7
K 1
2
FM11
R292470_0805_5%
12
R510_0603_5%@
1 2
C837
0.01
U_0
402_
25V7
K
1
2
R368
470_0805_5%@12
R293470_0805_5%
12
G
D
S
Q39
2N7002_SOT23-3
2
13
C1028 4.7U_0805_10V4Z
1
2
R598
100K_0402_5%
12
R239470_0805_5%
12
G
D
S
Q52
2N7002_SOT23-3
2
13
R956330K_0402_5%
12
R597
100K_0402_5%
12
R958470_0805_5%
12
C833
1U_0402_6.3V4Z
1
2
G
DS
Q166 SI2301BDS-T1-E3_SOT23-3
2
13
Q11IRF8113PBF_SO8
365
78
24
1
R957470_0805_5%
12
G
D
S
Q138
2N7002_SOT23-3
2
13
G
D
S
Q42
2N7002_SOT23-3@
2
13
CF31
C864
4.7U
_080
5_10
V4Z
1
2
C842
4.7U
_080
5_10
V4Z
1
2
G
D
S
Q402N7002_SOT23-3
2
13
Q4IRF8113PBF_SO8
365
78
2
4
1
C835
4.7U_0805_10V4Z
1
2
R294470_0805_5%
12
R58710K_0402_5%
12C838 4.7U_0805_10V4Z
1
2
G
D
S
Q172N7002_SOT23-3
2
13
G
D
S
Q1402N7002_SOT23-3
2
13
R138330K_0402_5%
1 2
R152330K_0402_5%
12
R595
100K_0402_5%
12
C10690.1U_0402_16V4Z
1
2
G
D
S
Q37
2N7002_SOT23-3
2
13
R280470_0805_5%
12
G
D
S Q132N7002_SOT23-3
2
13
Q14
SI4800BDY_SO8
S 1S 2S 3G 4
D8D7D6D5
R288470_0805_5%
12
C1023
1U_0402_6.3V4Z
1
2
FM21
G
D
S
Q38
2N7002_SOT23-3
21
3G
D
S
Q47
2N7002_SOT23-3
2
13
CF11
C848
1U_0402_6.3V4Z
1
2
C840
4.7U
_080
5_10
V4Z
1
2
G
D
S
Q41
2N7002_SOT23-3
2
13
C1024 4.7U_0805_10V4Z1
2
C862 4.7U_0805_10V4Z
1
2
R284470_0805_5%
12
Q35
SI4800BDY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q1412N7002_SOT23-3
2
13
C834
0.01
U_0
402_
25V7
K
1
2
G
D
S
Q50
2N7002_SOT23-3
2
13
R596
100K_0402_5%
12
G
D
S
Q48
2N7002_SOT23-3
2
13
FM31
G
D
S
Q122N7002_SOT23-3
2
13
C849
0.01U_0402_25V7K
1
2
Q137
SI4800BDY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S
Q442N7002_SOT23-3
2
13
C84110U_0805_10V4Z
1
2
G
D
S
Q49
2N7002_SOT23-3
2
13
CF21
C1027
1U_0402_6.3V4Z
1
2
R279470_0805_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
EC_SMDEC_SMC
SMB_EC_DA1
SMB_EC_CK1
ADP_SIGNAL
ADPINADPIN
ENTRIP1 <39>
BATT_OVP <33>
ENTRIP2 <6,39>
SMB_EC_CK1 <32,33,34>
SMB_EC_DA1 <32,33,34>
BAT_ID <38>
BATT_TEMP <33>
ADP_ID <33>
AC_LED <38>
+5VS
+5VALW
BATT
+5VALW
VMB
+3VL
+3VL
BATT
VIN +DOCKVIN
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
DC Connector/CPU_OTPCustom
37 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
CPU
Recovery at 47 +-3 degree C
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
PU1BLM358ADT_SO8
+5
-6 0 7
P8
G4
PR210K_0402_5%
12
G
D
S
PQ1SSM3K7002FU_SC70-3
2
13
PD2@SM05_SOT23
2
31
PR1015K_0402_1%1 2
PR
610
5K_0
402_
1% 12
PJP1
ACES_88334-057N
1 1
3 34 45 5
2 2
PR122.55K_0402_1%
12
PC
210
0P_0
402_
50V8
J
12
PR
134
0K_0
402_
1% 12
PL4HCB2012KF-121T50_0805
1 2
PC90.01U_0402_50V4Z
12
PC
410
0P_0
402_
50V8
J1
2
PC81000P_0402_50V7K
12
PU1ALM358ADT_SO8
+3
-2 0 1
P8
G4
PL3HCB2012KF-121T50_0805
1 2
PD1
PJSOT24C_SOT23-3
2 31
PD4
RLZ3.6B_LL34
12
PC100.22U_0603_10V7K
12 PR15
150K_0402_1%
12PR17
1K_0402_5%
12
BATT1
CR2032 RTC BATTERY45@
PR13100_0402_5%
12
PC
510
00P_
0402
_50V
7K1
2
PL2SMB3025500YA_2P
12
PC12
@1000P_0402_50V7K12 P
R4
499K
_040
2_1% 1
2
PH1
10KB_0603_1%_TH11-3H103FT
12
PJP2
SUYIN_200275MR008GXOLZR
1 1
3 34 45 56 6
GND 9GND 10
2 2
7 78 8
PR166.49K_0402_1%1 2
PR510K_0402_5%
12
[email protected]_SOT23-3
231
PL1SMB3025500YA_2P
1 2
PR11150K_0402_1%
1 2
PR747K_0402_1%1 2
PC
10.
01U
_040
2_25
V7K
12
PC
60.
01U
_040
2_25
V7K
12
G
D
S
PQ2SSM3K7002FU_SC70-3
2
13
PR310K_0402_5%
1 2
PC111000P_0402_50V7K
12
PR14100_0402_5%
12
PC31000P_0402_50V7K
12
PR910K_0402_5%
1 2
PR8100_0402_5%
12
PQ3TP0610K-T1-E3_SOT23-3
2
13
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
DH_CHG
LX_CHG
CHGEN#
BST_CHG
REGNVADJ
BATT
ACDET
ACSET
IAD
AP
T
CHGEN#
FSTCHG#
ACDET
PACIN
ACOFF#
ACOFF#
PACIN
PACIN
IREF <33>
VCTRL<33>
ADP_I<33>
BAT_ID <37>
AC_SET<33>
SUSP#<26,28,33,36,41>
AC_IN <33,39>
STD_ADP <33>
FSTCHG<33>
ACOFF <33>
AC_LED<37>
VIN
P4
BATT
VIN
VIN
BATT
B+
P2
CHG_B+
CHG_B+
P2
VIN
+3VL
BQ24740VREF
1.24VREF
BQ24740VREF
+3VL
BQ24740VREF
+3VL
1.24VREF
P2
VIN
+3VLP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3941P 0.1
Charger
38 48Friday, November 30, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
Charge Detector
PR139100K_0402_5%
1 2
PQ104DTA144EUA_SC70-3
2
13
PU102B
LM393DG_SO8
+5
-6 O 7
P8
G4
PC
120
0.22
U_0
603_
10V
7K 12
PC
122
@0.
1U_0
603_
25V
7K
12
G
D
S
PQ109SSM3K7002FU_SC70-3
2
13
PC
121
100P
_040
2_50
V8J
12
PR13510K_0603_0.1%
12
PR115100K_0402_1%
12
PR1241K_0402_5%1 2
PQ101AM4835EP-T1-PF_SO8
365
78
2
4
1
PC1250.1U_0603_25V7K
12
PQ108AO4466_SO8
365 7 8
2
4
1
PR10147K_0402_5%
1 2
PR114@0_0402_5%
1 2
PR1040_0402_5%
1 2
PU103
APL1431LBBC-TR_SOT23-5
NC 2
REF4
NC 1
CATHODE 3
ANODE5
PR
132
100K
_040
2_5%
12
PC
105
4.7U
_080
5_25
V6-
K
12
BQ24740RHDR_QFN28_5X5PU101
AC
P3
LPM
D4
CH
GE
N1
AC
N2
AC
DE
T5
AC
SE
T6
IADSLP8
SR
P19
BA
T17
IAD
AP
T15
PGND 22
SR
SE
T16
ISYNSET14
VADJ12
VDAC11
LPR
EF
7
VREF10
DP
MD
ET
21
LODRV 23
CE
LLS
20
SR
N18
AGND9
REGN 24
EXTPWR13
PH 25
HIDRV 26
BTST 27
PVCC 28
TP 29
PR12710K_0402_1%
12
G
D
SPQ107SSM3K7002FU_SC70-3
2
13
PC1180.1U_0402_10V7K
1 2
PC
104
4.7U
_080
5_25
V6-
K
12
PR10347K_0402_5%
1 2
G
D
S
PQ111SSM3K7002FU_SC70-3
2
13
PC
124
0.1U
_060
3_25
V7K
12
PC
115
4.7U
_080
5_25
V6-
K
12
[email protected]_0402_16V7K
12
PR11639K_0402_5%
12
PR1113K_0402_1%
1 2
PR10747K_0402_1%1 2
PR122681K_0402_1% 1 2
PD103RLZ4.3B_LL34
12
PQ110AO4466_SO8
365 7 8
2
4
1
PR109150K_0402_5%
12
PR1100_0402_5%1 2
[email protected]_0603_25V7K
12
PQ105DTC115EUA_SC70-3
2
13
PR131133K_0402_1%
12
PR1120.015_1206_1% 1 2
PR13310K_0603_0.1%
12
PD101RLS4148_LL34-2
1 2
PR121200K_0402_1%
12
PC112
1U_0603_6.3V6M
1 2
PC
106
0.22
U_0
603_
16V
7K1
2
PC
116
4.7U
_080
5_25
V6-
K
12
PC1101U_0805_25V6K1 2
PC1230.1U_0402_10V7K 1
2
PC
113
4.7U
_080
5_25
V6-
K
12
PQ103AM4835EP-T1-PF_SO8
3 65
78
2
4
1
PR113143K_0402_1%
12
PC1260.047U_0402_16V7K
12
PC119
1U_0603_10V6K
12
PR119@47K_0402_5%
12
PQ102AM4835EP-T1-PF_SO8
3 65
78
2
4
1
PR13720K_0402_1%
1 2
G
D
S
PQ113SSM3K7002FU_SC70-3
2
13
PR13649.9K_0402_1%
1 2
PC1171U_0603_10V6K
12
PR1020.012_2512_1%1 2
PC
101
47P
_040
2_50
V8J
12
PC1110.1U_0402_10V7K
1 2
PR
138
100K
_040
2_1%
12
PD102
RLS4148_LL34-2
12
PR126100K_0402_1%
12
PL10210U_LF919AS-100M-P3_4.5A_20%1 2
PR117100K_0402_5%1 2
PR1302.15K_0402_1%1 2
PL101HCB2012KF-121T50_0805
1 2
PR10810_1206_5%1 2
PR
129
10K
_040
2_1%
12
PR10510K_0402_5%
12
PR13410K_0402_5%
12
PQ106DTC115EUA_SC70-3
2
13
PC
103
4.7U
_080
5_25
V6-
K
12
PR11810K_0402_5%1 2
PC
108
0.1U
_060
3_25
V7K
12
PC1021U_0603_6.3V6M
1 2
PC
114
4.7U
_080
5_25
V6-
K
12
PR1231M_0402_5%1 2
G
D
S PQ114SSM3K7002FU_SC70-3
2
13
PR120
133K_0402_1%
12
PR12547_1206_5%
12
PR
128
10K
_040
2_5%
12
PR
106
200K
_040
2_5%
12
PC127
22P_0402_50V8J
12
G
D
S
PQ112SSM3K7002FU_SC70-3
2
13PU102A
LM393DG_SO8
+3
-2 O 1
P8
G4
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
LX_5V
LG_3V
LX_3V
UG_3V
UG
1_3V
UG_5V
BST_3V
EN
TRIP
2
EN
TRIP
1
LG_5V
AC_IN<33,38> EC_ON <33,36>
ENTRIP2<6,37>ENTRIP1<37>
3/5V_OK <41>
B++
+5VALWP
VL
+3VALWP
B++
B++
2VREF_51125
B+
+3VL+3VLP
+3VLP
2VREF_51125
VL
+5VALWP
+3VALW
+5VALW
+3VALWP +5VLVL
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
3.3VALWP/5VALWPCustom
39 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
PR318330K_0402_1%
1 2
PC315@680P_0603_50V8J
12
PC30610U_0805_6.3V6M
12
+ PC310150U_D_6.3VM
1
2
PL3024.7UH_SIQB74B-4R7PF_4A_20%
12
PJP304
PAD-OPEN 2x2m
2 1
PJP303
PAD-OPEN 4x4m
1 2
PR305174K_0402_1% 1 2
PR307
0_0402_5%1 2PR309
0_0402_5%1 2
PR30230.9K_0402_1%
1 2
[email protected]_1206_5%
12
PC
313
4.7U
_080
5_25
V6-K
12
PC
316
@0.
1U_0
402_
25V4
K1
2
PR30320K_0402_1%
1 2
PR313100K_0402_5%
1 2
PC3180.022U_0603_25V7K
12
[email protected]_1206_5%
12
PR3080_0402_5%1 2
PQ302AO4466_SO8
365 7 8
2
4
1
PC
317
@0.
1U_0
402_
25V4
K1
2
G
D
S
PQ305SSM3K7002FU_SC70-3
2
13
PR30420K_0402_1%
1 2
G
D
S
PQ306SSM3K7002FU_SC70-3
2
13
PC
305
4.7U
_080
5_25
V6-K
12
PC31110U_0805_10V6K
12
PC3080.1U_0402_10V7K1 2
G
D
S
PQ308SSM3K7002FU_SC70-3
2
13
PR314100K_0402_5%
12
PQ304FDS6690AS_NL_SO8
365 7 8
2
4
1
PC
304
2200
P_04
02_5
0V7K
12
PC3120.1U_0603_25V7K
12
PR3100_0402_5%
1 2
PC3020.22U_0603_10V7K
12
PJP301
PAD-OPEN 2x2m
2 1
PC3070.1U_0402_10V7K
1 2
PL301HCB2012KF-121T50_0805
1 2
PJP302
PAD-OPEN 4x4m
1 2
SP8K10S-FD5_SO8
PQ301
D12 1G 8
G231S/2D 5
D111S/2D 7
S24 1S/2D 6
G
D
S
PQ307SSM3K7002FU_SC70-3
2
13
+PC309220U_6.3VM_R15
1
2PC314
@680P_0603_50V8J
12
PU301TPS51125RGER_QFN24_4X4
VREF
3
TON
SEL
4
ENTR
IP1
1
VFB1
2
VFB2
5
ENTR
IP2
6
VREG38
DRVL1 19
VREG
517
GN
D15
VBST1 22
VIN
16
SKIP
SEL
14
DRVL212
LL211
VO27
DRVH210 DRVH1 21
PGOOD 23
LL1 20
VCLK
18
VBST29
VO1 24
EN0
13
P PAD25
PR311620K_0402_5%
12
PC
303
4.7U
_080
5_25
V6-K1
2
PC319@22U_0805_6.3V6M
12
PL3034.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PR30113.7K_0402_1%
1 2
PR306133K_0402_1%
1 2
PC
301
2200
P_04
02_5
0V7K 1
2
PR317100K_0402_5%
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+5V
ALW
DH_1.8V
1.8V_B+
DL_1.8V
LX_1.8V
BST1_1.8VBST_1.8V
DH_1.8V_1
+5VALW+5VALW
SYSON<26,33,34,36>
+1.8VP
+1.8VP
+5VALW
+1.8VP
B+
+1.8V+1.8VP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3941P 0.1
1.8VP
40 48Friday, November 30, 2007
2007/05/29 2008/05/29Compal Electronics, Inc.
(7A,280mils ,Via NO.= 14)
PR403316_0402_1%
12
PL401
HCB1608KF-121T30_06031 2
+
PC
408
220U
_D2_
4VY
_R25
M
1
2
PR404255K_0402_1%
1 2
PC4020.1U_0402_10V7K
1 2
PJP401
PAD-OPEN 4x4m
1 2
PC
403
4.7U
_080
5_25
V6-
K
12
PR408
14.3K_0603_0.1%1 2
PR405
0_0402_5%12
PL4022.2UH_PCMC063T-2R2MN_8A_20%
1 2
PC413@10P_0402_50V8J
1 2
PC4154.7U_0805_10V6K
12
PR40615.4K_0402_1%
1 2
PC4091U_0603_10V6K
12
PQ401AO4466_SO83
65 7 82
4
1
PC412@680P_0603_50V7K1
2
PR40910K_0603_0.1%
12
PQ402FDS6690AS_NL_SO83
65 7 82
4
1
PR4020_0402_5%
1 2
PR4010_0402_5%1 2
PC
414
@0.
1U_0
402_
25V
4K
12
PC401@1000P_0402_50V7K
12
PC
404
4.7U
_080
5_25
V6-
K
12
PC406@680P_0402_50V7K
12
PR410
0_0402_5%1 2
PU401
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_PS
V1
TON2
VFB5
PGOOD6 DRVL 9
DRVH 13
LL 12
GN
D7
PG
ND
8
TRIP 11
V5DRV 10
VB
ST
14
TP15
[email protected]_1206_5%
12
PC
405
2200
P_0
402_
50V
7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
LX_1.2V
UG1_1.1V
BST_1.2V
+1.2VALWP
LG_1.2V
UG1_1.2V
LG_1.1V
+1.1VSP
UG_1.2V
+1.1VSP
BST_1.1V
LX_1.1V
UG_1.1V
+1.2VALWP
B+++
+1.1VS
+1.1VSP
VCCP_POK
SUSP#<26,28,33,36,38>
3/5V_OK <39>
B+++
+1.2VALWP
B+
+1.1VSP
+5VALW
B+++
+1.1VS+1.1VSP +1.2VALW+1.2VALWP
+1.1VSP +1.1VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
1.1VSP/1.2VALWPCustom
41 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
(4A,160mils ,Via NO.=8)(6A,240mils ,Via NO.=12)
PC
516
@0.
1U_0
402_
25V4
K1
2
[email protected]_1206_5%
12
PR50111.5K_0402_1%
1 2
PQ504AO4466_SO8
365 7 8
2
4
1
PL5033.3UH_SIQB74B-3R3PF_5.9A_20%
1 2
PR5130_0402_5%
12
+
PC
508
220U
_D2_
4VY
_R25
M 1
2
PC5060.1U_0402_10V7K
12
PQ502AO4466_SO8
365 7 8
2
4
1
PQ503FDS6690AS_NL_SO8
36 578
2
4
1
PR51233K_0402_5%
1 2
PR50411.5K_0402_1%
12
PU501
TPS51124RGER_QFN24_4x4
GN
D3
TON
SEL
4
VO1
1
VFB1
2
VFB2
5
VO2
6
EN28
DR VL1 19
TRIP
117
V5FI
LT15
VBST1 22
V5IN
16
TRIP
214
DR VL212
LL211
PGOOD27
DR VH210 DR VH1 21
EN1 23
LL1 20
PGN
D1
18
VBST29
PGOOD1 24
PGN
D2
13
P PAD25
PR5143.3_0402_5%
1 2
PR51710_0402_5%
1 2
PR5060_0402_5%
12
PR50318.7K_0402_1%
12
PR5050_0402_5%
12
[email protected]_0402_10V7K
12
PR5070_0402_5%
12
PR5180_0402_5%
1 2
PC
509
4.7U
_080
5_6.
3V6K
12
PL5012.2UH_PCMC063T-2R2MN_8A_20%
12
+
PC
511
220U
_D2_
4VY
_R25
M
1
2
PR51017.8K_0402_1%
12
PC520@680P_0603_50V8J
12
PC
504
4.7U
_080
5_25
V6-K
12
PJP503
PAD-OPEN 4x4m
1 2
PR5080_0402_5%12
PQ501
AO4466_SO8
36 578
2
4
1
PC5141U_0603_10V6K
12
PC519@680P_0603_50V8J
12
PC5154.7U_0805_10V6K
12
PC
502
2200
P_04
02_5
0V7K
12PC
517
4.7U
_080
5_25
V6-K
12
PR5090_0402_5%
12
PC
505
2200
P_04
02_5
0V7K
12
PC
510
4.7U
_080
5_6.
3V6K
12
PJP501
PAD-OPEN 4x4m
1 2
PC5070.1U_0402_10V7K
1 2
PC5120.1U_0402_16V7K
12
[email protected]_0603_25V7K
12
PR50224.9K_0402_1%
1 2
PL502HCB2012KF-121T50_0805
12
PR51119.1K_0402_1% 1 2
PC
518
@0.
1U_0
402_
25V4
K1
2
PJP502
PAD-OPEN 4x4m
1 2
[email protected]_1206_5%
12
PC
501
4.7U
_080
5_25
V6-K
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
VREF1.5V
SUSP<36>
SYSON#<35,36>
SUSP<36>
+5VALW
+0.9VP
+1.8V
+5VALW
+1.5VSP
+1.8V
+0.9VP +0.9V
+1.5VSP +1.5VS
+2.5VSP
+3VS
+2.5VSP +2.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
0.9VSP/2.5VSP/1.5VSPCustom
42 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
(2A,80mils ,Via NO.= 4)
(1A,40mils ,Via NO.= 2)
(500mA,40mils ,Via NO.= 1)
(500mA,40mils ,Via NO.= 1)
PC6121U_0603_16V6K
12
PR6020_0402_5%
1 2
PR6080_0402_5%
1 2
PC
611
0.1U
_040
2_16
V7K
12
PC
609
@10
U_0
805_
10V4
Z
12
PC60110U_0805_10V4Z
12
PJP602
PAD-OPEN 3x3m
1 2
PC
607
1U_0
603_
6.3V
6M12
[email protected]_0402_16V7K
12
PC
608
4.7U
_080
5_6.
3V6K
12
PR604@0_0402_5%
1 2
PR6061K_0402_1%
12
PJP603
PAD-OPEN 3x3m
1 2
PU601
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC61410U_0805_6.3V6M
12
PR6011K_0402_1%
12
PR6031K_0402_1%
12
[email protected]_0402_16V7K
12
PC60510U_0805_6.3V6M
12
PC
604
0.1U
_040
2_16
V7K
12
PC6031U_0603_16V6K
12
G
D
S
PQ602SSM3K7002FU_SC70-3
2
13
G
D
S
PQ601SSM3K7002FU_SC70-3
2
13
PJP601
PAD-OPEN 3x3m
1 2
PU603
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PR605@150_1206_5%
12
PR6075.1K_0402_1%
12
PC61310U_0805_10V4Z
12
PU602APL5508-25DC-TRL_SOT89-3
IN2
GND
1
OUT 3
PC
602
@10
U_0
805_
10V4
Z
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BOO
T_N
B1
ISP
0
+CP
U_C
OR
E_0
UGATE1_1BO
OT0
UGATE0
LGATE0
BOOT1
LGATE1
UGATE1
PHASE1
ISP 0PHASE0
ISP 1
UGATE0_1
+CPU_CORE_1
ISP 1
VS
EN
1
BOO
T_N
B
RTN
_NB
SVD
SVC
UG
ATE
NB
PH
AS
E N
B
PH
AS
E N
B
UG
ATE
NB
LGA
TE N
B
LGA
TE N
B
VS
EN
_NB
RTN
1
VS
EN
0
RTN
0
VDD_NB_FB_H<6>
VGATE<33>
SB_PWRGD<6,20,33>
CPU_SVD<6>
CPU_SVC<6>
VR_ON<33>
CPU_VDD0_FB_H<6>
CPU_VDD0_FB_L<6>
CPU_VDD1_FB_L<6>
CPU_VDD1_FB_H<6>
VDD_NB_FB_L<6>
+CPU_CORE_0
+5VS
B+
CPU_B+
CPU_B+
+CPU_CORE_NB
CPU_B+
+5VS
CPU_B+
+3VS+5VS
+CPU_CORE_1
+CPU_CORE_0 +CPU_CORE_1
+CPU_CORE_0 +CPU_CORE_1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
CPU_CORECustom
43 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
PC2102.2U_0603_6.3V6K
12
PR2366.81K_0402_1%
12
PC
244
@10
00P_
0402
_50V
7K1
2
PC
212
4.7U
_080
5_25
V6-K
12
PC227180P_0402_50V8J
1 2
PQ206SI4684DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
234
4.7U
_080
5_25
V6-K
12
PR2142.2_0603_5%
1 2
PC
209
33P_
0402
_50V
8K1
2
PR227
1K_0402_1%
1 2
PR2052_0402_5%1 2
PC
203
2200
P_04
02_5
0V7K
12
PC
208
1200
P_04
02_5
0V7K
12
PC
240
@0.
1U_0
402_
25V4
K1
2
PC2240.22U_0603_10V7K
1 2
PC
248
3300
P_04
02_5
0V7K
12
PC
218
470P
_060
3_50
V8J
12
PR2120_0402_5%
1 2
PQ201AO4466_SO8
3 65
78
2
4
1
PC
247
@10
00P_
0402
_50V
7K1
2
PQ203SI4684DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR232
6.81K_0402_1%
1 2
PC2070.1U_0402_16V7K
12
PR2282.2_0603_5%
1 2
PR
209
0_04
02_5
%12
PR2336.65K_0603_1%
1 2
PR2410_0402_5%
1 2
PR2401K_0402_1%
12
PU201
ISL6265IRZ-T_QFN48_6X6
PWROK3
SVD4
OFS/VFIXEN1
PGOOD2
SVC5
ENABLE6
OCSET8
VDIF
F119
RTN
117
VSEN
015
VW1
22
RTN
016
ISN
014
VW012
COMP011
RBIAS7
FB010
CO
MP1
21
ISP1
23
FB1
20
VSEN
118
VDIFF09
ISN
124
ISP0
13
BOOT1 25
UGATE1 26
PHASE1 27
PGND1 28
LGATE1 29
PVCC 30
LGATE0 31
PGND0 32
PHASE0 33
UGATE0 34
BOOT0 35
BOOT_NB 36
UG
ATE_
NB
37
PHAS
E_N
B38
LGAT
E_N
B39
PG
ND
_NB
40
OC
SET_
NB
41
RTN
_NB
42
VSEN
_NB
43
FSET
_NB
44
CO
MP_
NB
45
FB_N
B46
VCC
47
VIN
48
TP49
PR2370_0402_5%
1 2
PR215@10K_0402_5%
1 2
PR2294.7_1206_5%
12
PR20422K_0402_1%
1 2
PC
237
4.7U
_080
5_25
V6-K 1
2
PR2390_0402_5%
1 2PC2421000P_0402_50V7K
12
PC2051000P_0402_50V7K
1 2
PR213@0_0402_5%
1 2
PC231180P_0402_50V8J
12
PR
231
14K_
0402
_1% 1
2
PR224
95.3K_0402_1%
1 2
PR218
0_0402_5%1 2
PR
207
11.3
K_04
02_1
%12
PR225
255_0402_1%
1 2
PC2321200P_0402_50V7K
12
PC225
1200P_0402_50V7K
1 2
PC
220
4.7U
_080
5_25
V6-K 1
2
PC
201
10U
_080
5_6.
3V6M1
2
PJP202
PAD-OPEN 4x4m
1 2
PC
214
2200
P_04
02_5
0V7K
12
PR2220_0402_5%
1 2
PC
221
4.7U
_080
5_25
V6-K 1
2
PC
246
@10
00P_
0402
_50V
7K1
2
PR226
0_0603_5%1 2
PR2030_0402_5%
12
PJP201
PAD-OPEN 4x4m
1 2
PR2350_0402_5%
1 2
PQ204AO4456_SO8
365 7 8
2
4
1
+ PC202220U_D2_4VY_R25M
1
2
PR
220
4.7_
1206
_5% 1
2
PC
245
@10
00P_
0402
_50V
7K1
2P
R20
60_
0402
_5% 1
2
PL2040.36UH_PCMC104T-R36MN1R17_30A_20%
12
PQ207
AO4456_SO8
365 7 8
2
4
1
PL2014.7UH_SIQB74B-4R7PF_4A_20%
12
PC
222
2200
P_04
02_5
0V7K
12
PC
235
4.7U
_080
5_25
V6-K
12 P
C21
34.
7U_0
805_
25V6
-K1
2PC
243
1000
P_04
02_5
0V7K
1 2
PC2290.1U_0603_25V7K 1 2
PC2190.1U_0603_25V7K
1 2
PR
221
14K_
0402
_1% 1
2
PC
249
3300
P_04
02_5
0V7K
1
2
PL203
0.36UH_PCMC104T-R36MN1R17_30A_20%12
PC2334700P_0402_25V7K
12
PQ205AO4456_SO83
65 7 82
4
1
PL202SMB3025500YA_2P
12
PC
215
1000
P_04
02_5
0V7K
12
PC2281000P_0402_50V7K
1 2
PC2160.1U_0603_25V7K
12
PQ202AO4466_SO8
3 65
78
2
4
1
PR2190_0603_5%1 2
PR243255_0402_1%
12
PR223
21K_0402_1%
1 2
PC223
4700P_0402_25V7K
1 2
PC
238
470P
_040
2_50
V7K
12
PC2170.22U_0603_10V7K
1 2
PC2301000P_0402_50V7K
12
PC226470P_0603_50V8J
12
PR230
54.9K_0402_1%
1 2
PC
236
4.7U
_080
5_25
V6-K 1
2
PC
250
1800
P_04
02_5
0V7K
1
2
+
PC
211
@47
U_2
5V_M
1
2
PC2060.1U_0603_16V7K
12
PR2176.65K_0603_1%1 2
PC2044.7U_0805_25V6-K
12
PQ208
AO4456_SO8
365 7 8
2
4
1
PC
239
330P
_040
2_50
V7K
12
PR
216
10K_
0402
_1% 1
2
PC2411000P_0402_50V7K
12
PR23854.9K_0402_1%
12
PR2111_0603_5%
12
PR
210
44.2
K_04
02_1
%12
PR2082_0402_5%1 2
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.1
Power Changed-List History-1Custom
44 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for Power Circuit
Page# Title Rev.Issue DescriptionItem RequestOwner
Date Solution Description
1 37PL3 change the value from SMB3025500YA_2P to HCB2012KF-121T50_0805 and add PL4 the same of the value.
2 41PC508 and PC511 change the value from 220U_6.3VM_R15 to 220U_D24VY_R25M
3
4 43
Add PJP503
5
41
PC202 change the value from 220U_6.3VM_R15 to 220U_D24VY_R25M
7
43Add PC241 PC242 PC243, and the val、 、 ue are 1000P_0402_50V7K.Reserve PC244 PC245 PC246 PC2、 、 、 47, and the value are 1000P_0402_50V7K.
43 Add PJP201、PJP202
9/29
9/29
9/29
9/29
9/29
9/29
DC Connector /CPU_OTP for Layout
HW request
Compal
Compal1.1VSP/1.2VALWP
1.1VSP/1.2VALWP Compal HW request
CPU_CORE Compal HW request
CPU_CORE CompalTI FAE suggested that after he review the layout.
CPU_CORETI FAE suggested that after he review the layout.Compal6
38 Charger 9/29 Compal the footprint is wrong Change the footprint of PR102
8 37DC Connector /CPU_OTP 10/08 Compal for Layout These two choke are parallel ,it's not series.
9 38 Charger 10/08 Compal the footprint is wrong Change the footprint of PR102
10 40 1.8VP 10/08 Compal Delete PC410 and PC411
11 41 1.1VSP/1.2VALWP 10/08 Compal Add PR517、PR518PWR request
PWR request
12 37
3.3VALWP/5VALWP
11/01 Compal PWR request Add PD4、PC12
13 37 11/01 Compal for Layout change PQ301, Cencel PQ303
DC Connector /CPU_OTP
14 43 CPU_CORE EMI requestCompal11/02 Add PC248, PC249, PC250
15 37 3.3VALWP/5VALWP 11/12 Compal for Layout Change PC310, add PC319
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HW Changed-List History-1Custom
45 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW Circuit
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
1 2 5 LAN 10/29 HW Change LAN Chip U20 from Marvell 88E8042 toRealtek RTL8102EL
Update the LAN Design page and support circuit 0 .2
2 2 5 LAN 10/29 HPQ Add POE(Power Over Ethernet) design Update the LAN Design page and support circuit 0 .2
0 .23 1 6 CRT 10/29 HW CRT can not display Change the CRT Conn. signals connection first.Wait correct symbol for fix
4 2 9 Audio 0 .210/30 HW Speaker no sound Add R973(10K_0402) to +3VALW on HP_DET#
FAN45 0.2Change JP2 PCB Footprint from ACES_85204-02001_2P toACES_88231-02001_2P
FAN Conn. not correct partHW11/01
6 2 9 Speaker 0 .211/01 HW Speaker Conn. not correct part Change JP20 PCB Footprint from ACES_85204-04001_4P toACES_88231-04001_4P
7 3 4 MDC 11/01 HW MDC Conn. not correct part 0 .2Change JP20 PCB Footprint from ACES_88018-124G_12P toACES_88020-12101_12P
8 11,35 TV_OUT 11/05 HW TV-OUT Function no support Del R59,R60,R61,R115,R116,R117 and TV-OUT related design. 0 .29 11,21 NB/SB Thermal 11/05 HW NB Thermal Function no support (locate too far) Cancel NB_THERMAL_DA/DC connection between NB and
SB,del C5000 .2
0 .21 0 21,31 SB SATA 11/05 HW SB SATA Port 5 change to Port 2 for ATI CommonDesign
Change SB SATA port 5 to port 2
1 1 0 .22 1 SB SATA 11/05 HW SB SATA_ACT# Pull High become +3VS Change R343.1 power rail from +5VS to +3VS. Install R343.
1 2 2 1 0 .2SB GPIO 11/05 HW Change SB GPIO refer to JBK00 for common 1. Connect U15.C6 to GND by 0_0402.2. Change WLOFF# from GPIO50 to GPIO61.3. Change BT_COMBO_EN# from GPIO51 to GPIO62.4. Change WWOFF# from GPIO52 to GPIO63.
1 3 3 1 0 .2SB SATA 11/05 HW Vertical L51 1<-->4 , 2<-->3 for layout routing Vertical L51 1<-->4 , 2<-->3 for layout routing
1 4 2 9 Audio HP OUT 11/05 HW 0.2Add 150UF Caps for each DOCK_LOUT_R/L Add 150UF Caps for each DOCK_LOUT_R/L
1 5 2 5 LAN Transfermor11/05 HW Correct U19 LAN Transfermor pin definition Correct U19 LAN Transfermor pin definition 0 .21 6 0 .221,24 SB SATA 11/06 HW SB SATA Port 4 change to Port 3 for ATI Open Issue Change SB SATA port 4 to port 3
1 7 3 6 DIM LED 11/06 HW 0.2Reduce DIM LED unnecessary design Del R1026 and Q167, add Net "DIM_LED#" for connect.Change location from PJP604 to PJP8.
1 8 2 7 CardReader 11/06 HW 0.2Change CardReader Socket for M/E new part andChip for JMicron new version
Change JREAD to TAITW_R015-B10-LM.Reserve R413,C902 close to JREAD.20; R412,C901 close to JREAD.26; R411,C900 close to JREAD.37.Change R457 close to U23.42Add R455,R456 close to U23.42Del Q169,R1051.Change net CR_LED# become CR_LED connect U23.21 and Q53.2Add R454 pull down to GNDChange R405,R122 from 200K to 10K pull-highRemove C895,U22
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HW Changed-List History-2Custom
46 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW Circuit
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
1 9 1 6 CRT 11/07 HW Normalize CRT design for common Change L83,L84 (10_0402) become R241,R240 (0_0603) 0 .21 72 0 LCD 11/07 HW Normalize LCD design for common Change R491 from 200_0402 to 200_0805 0.2
2 1 1 8 LCD 11/07 CIC CIC feedback RMA concern for common Change Q43 from AOS3413 to SI2301 0.22 2 3 3 KBC 11/07 HW Normalize KB926 Crystal part for common Change Y7 from 9H03200413 small to 1TJS125DJ4A420P normal. 0 .2
1 72 3 WebCam 11/09 HW Change U54 WebCam power design and related Change U54 from G916-390T1UF to RT9193-39GB.Remove R891,R892 if no use G916-390T1UF.Add C718 close to U54.4 for RT9193-39GB.Remove R1027~R1030 for JP7 no install.Change JP7 from 8pin to 6pin
0 .2
1 82 4 HW11/09HDMI 0.2Remove R490(100K_0402)Reduce HDMI Design2 5 19,32 SB-CLK-Debug 11/09 HW Debug Card no function issue Del R1031,add R303 close to R301 and U15.P2
Connect for CLK_PCI_SIO2 to JP41.150 .2
2 6 2 5 LAN 11/09 HW RJ45 LED Power correct back Change JRJ45.13, JRJ45.11 from +3V_LAN_LED to +3V_LAN 0.22 7 1 8 HDMI 11/09 HW Reduce HDMI Design Remove R490(100K_0402) 0 .22 8 6 CPU 11/09 HW Add H_THERMTRIP# one more way Add R16 close to Q3.1 for H_THERMTRIP# 0.22 9 3 3 KBC 11/09 HW Update KBC Pin Definition for common Add H_THERMTRIP# to U33.25 0 .23 0 3 5 Holes 11/09 ME Update for M/E Drawing Del H49 H50 H38 H45 for M/E drawing change 0 .2
HW11/09Mini-Card2 63 1 0 .2Replace D17 and D47 become R52 and R53Del R400 and R46, Change JP6 pin definition for common
Reduce Mini-Card design, change SIM Card design
3 2 3 3 KBC 11/09 HW Reserve 0_0603 for KB Back Light Add R516 (0_0603) between JP48.1/4 and +5VS_LED 0.23 3 2 7 CardReader 11/10 HW Correct CardReader LED part Change D5 from SC500004E00(AQUA_WHITE) to
SC500004W00(WHITE)0 .2
3 4 3 4 LED Function 11/10 HW Correct LED function for common Change LED from D50,D30,D27 SC500004E00(AQUA_WHITE) to D6,D7,D8 SC500004W00(WHITE)Change LED from D45,D46 SC500004B00(AQUA_WHITE/AMBER) to D17,D18 SC500005M00(YELLOW/WHITE); Add Q7,R20 and R42 close to D18
0 .2
3 5 2 1 SB-GPIO 11/10 HW Add one more way for GSENSOR LED# inform pin Add HDD_HALTLED# connect from U15.P8 0 .23 6 3 3 KBC-GPIO 11/11 HW Add CIR_IN PH to +5VL
Add ESB_CLK/DAT PH to +3VLAdd R46 10K_0402 PH to +5VL close to U33Add R514,R515 10K_0402 PH to +3VL close to U33
0 .2
CPU,FPR
3 9 1 7 WebCam 11/13 HW Update the WebCam+Digital Mic reserver conn. Change JP7 from SP02000HC00(8pin)-->SP02000IL00(6pin) 0 .2
3 7 6,31 11/13 HW Reduce S3 power consumption Change R15.2,R21.2,R36.2,R30.2 connection from+1.8V to +1.8VS; Remove R622, install R581
0 .2
NB3 8 1 1 11/13 HW Reduce the level shift design for Chip A12. Del Q6,R87; Q5,R84 and replace by 0ohm (add R67,R68)connect directly. Install R371 (10K ohm)
0 .2
4 0 6,33 CPU,KBC 11/13 HW Update THERMTRIP# design to EC Change R16.2 connection from THERMTRIP# toTHERMTRIP#_EC for separate
0 .2
4 1 1 8 HDMI 11/13 HW Remove EMI solution become reserve for verify Add R112,R113,R115~R120 close to each L85~L88 for co-lay 0 .2
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HW Changed-List History-2Custom
47 48Friday, November 30, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW Circuit
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
4 2 19.32 SB,BIOS 11/13 HW Reduce SB related design for Chip A12 and others Del Q155,R986, and add R311 close to U15.Del R1011 become T18, Cancel R1012 and connect to H31and JP41 directly
0 .2
4 3 21,32 SB,BIOS 11/13 HW BIOS Debug Tool reserve 0 .2Add SB_INT_FLASH_SEL and related(JP12,U30,R228,R226,C489 close to U29)
4 4 2 5 LAN 11/13 HW Update LAN Chip Symbol link to CIS server Update LAN Chip U20 Symbol link to CIS server 0 .24 5 1 3 NB 11/13 HW Add 0ohm_0603 to separate VDD18_MEM Add R1051(0_0603) between +1.8VS & +1.8V_VDD_SP 0.24 6 1 8 HDMI 11/13 HW Reduce HDMI related design for common Del R490 (100K_0402) 0 .24 7 2 0 SB 11/13 HW Reduce SB related design for common and A12 chip Remove R994 (0_0402)
Change U15.F1 connection become test pointRemove R1053, change R1052 become 0_0402
0 .2
4 8 20,21,2 7
SB,Cardreader 11/13 HW Reserve Cardreader D3E function (CR_WAKE# &CR_CPPE#)
Add R81 close to U15;Q54,R124 close to U23 for connect U15.F8 to U23.13 ;Add R369 close to U23 for connect U15.M5 to U23.16
0 .2
4 9 21,33 SB,KBC 11/13 HW Reduce SB related design for common Del D51 and R1034, Change the net AC_IN become AC_IN_D 0.25 0 28,33 Codec,KBC 11/13 HPQ EC_BEEP function for KBC add Add R563 close to C955; Add R544 close to U33.31 0 .25 1 3 3 KBC 11/13 HW Reduce S5 Power Consumption Change R1040.1 connection from +3VL_EC to +3VALW
Del R546 PH to +3VL_EC, Del D26 replace by add R547 close toU33 for short
0 .2
5 2 3 3 KBC 11/13 HW Reduce KBC Design for common and Ver:C0 ChipChange from SA00001J530 to SA00001J540
Del R537 become Test Point, change R516 become 150_0603Remove R1044, change R1040 from 10K to 100KChange R528.2 , R529.2 connection from +5VALW to +5VLInstall C814 (4.7U_0805)
0 .2
5 3 3 4 Switch Design 11/13 HW Update CSD function board design for common Change JP36.1 connection become +3VL;Change R1046.1 and R1047.1 connection become SMB_EC_CK1/DA1Change JP36.7 connection from GND to +5VALW_LED by
0 .2
5 4 3 4 LED 11/14 HW Correct T/P On/Off LED design defineCorrect G-Sensor LED design define
Change Q153 from 2N7002DW to 2N7002Change R988.1 connection from +5VS_LED to +3VS
0 .2
2 9 Audio-Dock 11/14 HPQ For GS mark requirement Add R968,R969 close to C775/C776. 0 .25 5Holes 11/14 ME Update Holes to meet M/E Drawing Add back H52 become H_1P5N; Del CF4 0 .25 6 2 9Multi-Bay 11/145 7 ME Update Symbol to meet M/E Drawing Update JP2,JP9,JP10,JP11,JP20,JP40,JHDMI,JESAT,JCRT,
JDOCK Symbol0 .24,24
Holes 11/145 8 ME Update Holes to meet M/E Drawing Add back H52 become H_1P5N; Del CF4 0 .23 3SB 11/165 9 ATI Reserve to fix the OTS325055 Issue Reserve R83 PH to +3VS 0 .22 0
6 0 KBC 11/16 EC3 3 Change design for EC team debug Change JP34.1 from +5VALW to +5VL 0 .26 1 3 5 DOCK 11/16 EMC Connect DOCK guide pin to GND Add JDOCK.45/46 to GND 0.26 2 3 3 K/B 11/16 HW Fix KB matrix issue Del KSI6 and KSO9 out of page net connect 0 .26 3 28,29 AUDIO 11/18 HPQ Make some Audio related design change Change C983,C984 from 1UF to 0.022UF. Change C1049,C1050,C1040,C1041
from 0.47UF to 0.022UF. Change R1002,R1005 from 20K to 0 ohm. Change C1044 from 10UF to 4.7UF. Remove R1000,R1004; Install R1001,R1003.
0 .2
6 4 2 9 AUDIO 11/19 HPQ Make some Audio related design change Change R968,R969 from 40.2_0402 to 47_0603 0 .2
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4111P 0.2
HW Changed-List History-2Custom
48 48Monday, December 03, 2007
2007/08/02 2008/08/02Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW Circuit
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
6 5 1 3 NB 11/20 ATI Design Change for NB A12 Version chip Remove U64,C1064,C1065,C1066,C1067,R1015,R1016,Q163,R1017.Install L19, remove L95
0 .2
6 6 2 2 SB 11/20 ATI Design Change for SB A12 Version chip Install R593, remove R592 0 .26 7 2 2 SB 11/20 HW Reduce SB Power Design-No IDE support Remove R12,C543,C544,C547,C536 0 .26 8 33,34 Function Board 11/20 HW Reserve for Rachman UMA selective Reserve R555 for +5VALW_LED, add R554 for +3VL close to JP36.1
Reserve R1034 close to JP36.4,R1035 close JP36.5,Remove R1036Add R513 PH to +3VS close to U33.19
0 .2
6 9 2 3 SB 11/20 HW Make the SB Strap Seeting for common Install R356 (10K_0402) 0 .27 0 3 1 BlueTooth 11/20 HW Update BT design for common Change R520 from 47K_0402 to 10K_0402 0 .27 1 3 4 Power On Switch 11/22 HW Cancel one reserved power on switch Del SW3 0.27 2 3 3 KBC 11/22 HW Modify SMB_EC_DA1/CK1 PH for common Change R528,R529 pin 2 connection from +5VL to +3VL 0.27 3 6 CPU 11/22 HW Link PROCHOT# between CPU and NB Add R59 close to Q2 0 .27 4 1 9 SB 11/22 HW Reserve LPCCLK1 for debug card function Add R308 22_0402 for U15.E22 close to R362.1, remove R301 0 .27 5 2 6 Express Card 11/22 HW To avoid New Card Switch leakage issue Add R54(0_0402) close to U21.6 0 .27 6 2 8 Audio Codec 11/22 HW Reserve SPDIF OUT1 test point for verify Add T21 close to U27.45 0 .27 7 10~13 NB, 11/23 HW BOM correct for SI-1 SMT build Update U3(SA00001ZG00-->SA00001ZG20);U10(SA00001Z300-->
SA00001Z310);U15(SA00001S510-->SA00001S560)0 .2
7 8 1 9 SB 11/23 HW Change Crystal Res. size for layout space Change R389 from 0603 to 0402 0 .27 9 2 2 SB 11/26 HW Reduce SB SATA Power Caps (Confirm with ATI FAE) Change C567,C568 from 10U_0805 to 1U_0805 0 .28 0 2 8 Codec 11/26 HW SPDIF0 --> 1 design change to follow Vader Change U27.48/45 pin connection 0 .28 1 3 4 T/P 11/28 HW Change T/P Power for reduce S4/S5 power consumption Remove R235; Add Q85, R645, Q34 0 .28 2 1 4 HDMI 11/28 ATI Fix HDMI no function issue Remove R102; Add R101 0 .28 3 1 5 CLK Gen. 11/28 HW Change design for new version CLK Gen. Remove R1045 0 .28 4 2 8 Codec 11/28 HW Change EC_BEEP function become reserve Remove R563 0 .2
20,278 5 SB,CardReader 11/28 HW Disconnect D3E support for A version to avoid risk Remove R81,R369 0 .23 28 6 BIOS 11/28 HW Use Ext. BIOS as default Remove R221 0 .2
8 7 3 4 LED 11/28 HW Cancel WLAN/WWAN ext pull high Remove R1041 0 .28 8 1 9 SB 11/30 HW Fix PA M/E Interfere issue for SI-1 change Y3 from SJ100001U00 to SJ100006600 with 10PPM 0.28 9 06,19,
2 3SB 11/30 ATI ATI recommend for update Change R312 from 0_0402 to 33_0402; Change R356 from 10K_0402
to 2.2K_0402; Install C23 as 0.1UF_04020 .2
9 0 3 3 KBC 11/30 HW Change 32.768KHz Main Source Vendor become EPSON Change Y7 from SJ100001V00 to SJ132P7K220 0 .23 2 BIOS9 1 12/03 HW Cancel Ext. BIOS reflash design because of +3VL erroe Add R221; Remove U30,R226,R228,C489 0 .23 4 LED9 2 12/03 HW Cancel G-Sensor INT2 LED function Remove Q156 0 .2