HP-AN1244-1_Minimizing Intrusion Effects When Probing With a Logic Analyzer

8/14/2019 HP-AN1244-1_Minimizing Intrusion Effects When Probing With a Logic Analyzer

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Application Note 12441

Minimizing Int rusion

Effects When ProbingWith a Logic Analyzer

H


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En gineers a nd t echnicians frequent ly need to probe tar get systems

with a logic an alyzer to locat e problems and ver ify perform an ce. This

app licat ion n ote discusses four met hods of probing, which minim ize

probing effects on th ese tar get systems. These four meth ods are:

1. General-purpose probing with 16-chann el lead sets.

2. Direct connection th rough term ination adapt ers into stan dard,

20-pin conn ectors mount ed on th e ta rget system boards.

3. Direct connection through standard, 40-pin connectors and

termina tion ICs mount ed directly on t he ta rget system boar ds.

4. Direct connection thr ough th e high den sity cable term ination

system (HDCTS).

These four probing met hods are designed for u se with t he

Hewlett-Packard logic analyzers and logic analyzer cards shown

in ta ble 1.

_______________________________________________________________

HP Portable Logic Analyzers HP 16500 Logic Analyzer Cards_______________________________________________________________1650A, 1651A 16510A_______________________________________________________________

1650B, 1651B, 1652B, 16510B, 16511B1653B, 1654B_______________________________________________________________

1660A/AS, 1661A/AS, 1662A/AS, 1663A/AS 16540A, 16541A, 16542A_______________________________________________________________16540D, 16541D_______________________________________________________________

16550A_______________________________________________________________

Table 1. Hewlett-Packard logic an alyzers

General-Purpose Probing General-purpose probing requires connecting probe leads to individ-

ua l signa l lines. This met hod is generally the most cumbersome,especially when conn ecting large n um bers of cha nn els, but it is a lso

th e most flexible, and can be used in conjunction with other pr obing

techniques.

The Standard Probing System The sta nda rd pr obing system consists of gra bbers, probe leads,

pods, an d a probe cable. Becau se it is passive, the st an dar d probing

system is smaller, lighter, and m uch easier to use th an previous

active probing systems. This pa ssive probing system is similar to a

probing syst em u sed on a high-frequen cy oscilloscope. It consists of

a ser ies RC net work (90.9 k in par allel with 8 pF ) at th e probe tip

(see figure 1), and a shielded resistive tra nsmission line. The a dvan-

tages of this system a re:

2-ns rise t ime with 5% perturbat ions.

Low 8-pF capa citive loading a t t he pr obe tip.

Signal groun d at th e probe tip for high-speed timing signa ls.

Inexpensive, removable probe tip assem blies.

Probe leads are configured into lead sets, which can probe 16 data

chan nels, 1 clock cha nn el, and a comm on pod groun d. A 16-cha nn el

probe lead set (HP part number 01650-61608) is shown in figure 2,

along with t he replacement pa rt nu mbers for individua l component s.


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Each probe lead is a 12-inch, twisted-pair cable connected to the probe

cable at t he probe housing (see figur e 2). The probe tip includes a signal

lead, a connector for a ground lead, and th e housing for t he RC network

shown in figure 1. The inpu t system impedance is 100 k

in para llelwith a pproxima tely 8 pF.

The signal an d ground leads can be connected directly to the ta rget sys-

tem. This r equires insta lling 0.63 mm (0.025 in) squar e pins, or r ound

pins with a diameter of between 0.66 mm (0.026 in) and 0.84 mm

(0.033 in) directly on t he boar d. An IC test clip can a lso be used . The

sam e specificat ions a pply for the pin dimen sions of th e test clip.

The th rough-hole grabbers (HP part nu mber 5959-0288, conta ining 20

grabbers) have hooks th at fit ar oun d IC pins an d component leads.

They are sm all enough t o fit ar oun d adjacent IC pins. Ther e is also a

surface-mount grabber (HP part num ber 5090-4356, conta ining 20

grabber s) designed for fine sur face-moun ted componen t leads .

The probe cable (figure 4) conta ins 17 or 18 (availability of CLK2 signa l

is dependent on the logic analyzer) signal lines as shown in figure 5A,

two +5 volt power lines, an d ground lines for each of th e signal an d

power lines. All of these lines a re woven in to a 4.5-foot cable. The cable

grounds are chassis (earth) grounds, not floating grounds. The two

+5 volt power lines can be used to power active probing systems. Please

consu lt th e specificat ions for the individua l logic analyzers or logic an a-

lyzer cards for t he m aximum allowable curr ent thr ough each cable.

Grounding There ar e thr ee methods of groun ding the probe system. First, th e

entire probe lead set can be groun ded thr ough the pod groun d. This

requires only one conn ection, but the ground pat h will not be t he sa melength as th e signal path s. The second m ethod is to individually

ground each probe lead. This yields a groun ding path equal to th e sig-

nal pa th. Th is is required for h igh-speed signals. A third met hod is a

mixture of the first two. Groun ding th e ma in pod along with every

four th lead will pr ovide impr oved signa l fidelity.

Signal Line Loading Any probed signa l line m ust be able to supply a minimum of 600 mV to

the pr obe tip, and mu st be able to a h an dle an input impedance of

100 k shunt ed by 8 pF. If the signal lines a re incapable of th is, there

may be a significan t measu remen t error, or the system under t est may

malfunction. The m aximum inpu t voltage of each pr obe is 40 volts peak.

Equivalent CircuitR-C netw ork

90.9 k250

Ground

Signal

8 pF

Logic AnalyzerCableProbe

8 pF 9.09 k

90.9 k

to logicanalyzer

Figure 1. Probe input circuit


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Probe Ground Leads

R-C Network

Signal Lead

(not show n) HP part number 5090-4356

Through-Hole Grabber TipHP part number 5959-0288

Surface- M ount Grabber Tip

Figure 3. Connectin g grabbers and ground leads to probes

(HP part number5959-9333 contains 5probe leads)

Each probe lead set contains:1 clock probe lead16 data line leads

R-C Netw ork Housing

Connector forGround Lead

(HP part number5959-9334 c ontains5 ground leads)

SignalLeads

(HP part number 5959-0288contains 20 grabbers)Surface-mount Grabber Tip

(not shown)(HP part number 5090-4356contains 20 grabbers)

Probe Lead

Ground Leads

Through-holeGrabber

Ground Lead(long)

(HP part number5959-9335contains 5pod grounds)

Pod Ground

Probe Housing

Figure 2. 16-chan nel probe le ad se t (HP part num ber 01650-61608)


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Direct Connection A fixed configura tion provides fast access to test ports on ta rget syst emThrough Termin ation boar ds without u sing the cumbersome, general-purpose lead sets.Adapters Connectors are installed directly onto th e ta rget system boards, r esult-

ing in qu ick h ook-ups. There a re t wo basic met hods us ed for fixed con-figuration probing, terminat ion ada pters an d 40-pin connectors.

Termination adapters (HP part number 01650-63203) that fasten to

the end of the probe cable are designed to perform two functions.

The first is to reduce the nu mber of pins required for t he h eader on

th e tar get boar d from 40 pins to 20 pins. This process reduces the

board area dedicated to the probing connection. The second function

is to properly term inat e th e probing system in a very convenient

package. Figure 4 illustr ates h ow the t ermina tion a dapter physically

conn ects to the t arget system. Figures 5A and 5B show the pinout dia-

gram s for t he probe cable, the term inat ion a dapt er, an d th e 20-pin

conn ector, resp ectively. Ther e ar e two 20-pin connectors, a long wit h

th eir Hewlett-Packard a nd 3M part nu mbers, listed in ta ble 2 below.

______________________________________________________________________________

HP Part Number 3M Part Number Connector Description______________________________________________________________________________

1251-8106 2520-6002 20-Pin, Low Profi le (Straight)______________________________________________________________________________

1252-2321 2520-5002 20-Pin, Low Prof ile (Right Angle)______________________________________________________________________________

1251-8828 2540-6002 40-Pin, Low Profi le (Straight)______________________________________________________________________________

1251-8158 2540-5002 40-Pin, Low Prof ile (Right Angle)______________________________________________________________________________

1251-8831 3432-6302 40-Pin, Wi th Long Latches (Straight)______________________________________________________________________________

1251-8931 3432-5302 40-Pin, Wi th Long Latches (Right Angle)______________________________________________________________________________

Table 2. Connectors for fixed configuration probing

Figure 4. Connec ting a termination adapte r to a target system board

Probe Cable

Termination Adapter

20-pin Connector

(from logic analyzer)

(HP part number 01650-63203)

(HP part number 1251-81062 10 pin header with0.1" 0.1" spac ing)


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SIGNAL GND 4SIGNAL GND 6SIGNAL GND 8

SIGNAL GND 10

POWER GND 2

SIGNAL GND 12SIGNAL GND 14SIGNAL GND 16SIGNAL GND 18SIGNAL GND 20SIGNAL GND 22SIGNAL GND 24SIGNAL GND 26SIGNAL GND 28SIGNAL GND 30SIGNAL GND 32SIGNAL GND 34SIGNAL GND 36SIGNAL GND 38POWER GND 40

1 +5V3 CLK15 CLK27 D15

9 D1411 D1313 D1215 D1117 D1019 D921 D823 D725 D627 D529 D431 D333 D235 D137 D039 +5V

2 POWER GND4 SIGNA L GND6 SIGNA L GND8 SIGNA L GND

10 SIGNAL GND12 SIGNAL GND14 SIGNAL GND16 SIGNAL GND18 SIGNAL GND

20 SIGNAL GND22 SIGNAL GND24 SIGNAL GND26 SIGNAL GND28 SIGNAL GND30 SIGNAL GND32 SIGNAL GND34 SIGNAL GND36 SIGNAL GND38 SIGNAL GND40 POWER GND

+5V 1CLK1 3CLK2 5D15 7D14 9D13 11D12 13D11 15D10 17

D9 19D8 21D7 23D6 25D5 27D4 29D3 31D2 33D1 35D0 37+5V 39

1 +5V3 CLK 15 D147 D129 D1011 D813 D615 D417 D219 D0

CLK 2 2D15 4D13 6D11 8D9 10D7 12D5 14D3 16D1 18GND 20

Figure 5A. Pinou t for probe cable and 100-k termination adapter (HP partnum ber 01650-63203)

Figure 5B. Pinou t for 20 pin connector (HP part nu mber 1251-8106)

+5V 1

CLK1 3

D14 5

D12 7

D10 9

D8 11

D6 13

D4 15

D2 17

D0 19

2 CLK2

4 D15

6 D13

8 D11

10 D9

12 D7

14 D5

16 D3

18 D1

20 GND


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Direct Conn ect ion The pr obe cable can a lso be plugged directly int o the var ious 40-pinThrough 40-pin conn ectors shown in ta ble 2, but pr oper t erminat ion m ust be installedConnectors directly ont o the ta rget system board . Hewlett-Packard pr ovides two

types of term inat ion ICs for t his pur pose. The first is an 18-pin ter mina -tion DIP (HP pa rt number 1810-1278), which pr ovides nine term inat ions

as shown in figure 6A. Two of these DIPs are required for each probe

cable as shown in figur e 6B. The second is a 10-pin t ermina tion SIP

th at provides five termina tions a s shown in figure 7A. Four of these

SIPs are required for each probe cable as shown in figure 7B. The 4

SIPs occupy less space on the ta rget boards tha n th e 2 DIPs, and

should be used when spa ce is restricted and wh en use of terminat ion

ada pters is not practical. These SIPs ma y be ordered as part n umber

1810-1588 from Sk yline Electronics (see page 12).

0.970 max.

0.085 max.

0.270 max.

0.066 0.004 typ.0.100 typ.

0.010 0.002

0.310 0.010

0.025

0.125

0.185 max.

0.335 max.

0.019 0.033 typ.

18 17 16 15 14 13 12 11 10

987654321

C2 C3 C4 C5 C6 C7 C8 C9R9

R18R17

R8R7R6R5R4

R16R15R14R13R12R11R10

R3R2R1

All dimensions are in inches.Unless otherwise specified, alltolerances are 0.010 inches.

Measured to outside when pinsare parallel.

1

1

Notes:1. Resistances:

R1 through R9: 90 k (1%)R10 through R18: 250 (5%)

2. Capacitance: 8.2 pF (+0.7 pF/0.5 pF)

Schematic Diagram

+0.0250.000

C1

Figu re 6A. 9-cha nne l termina tion IC (HP part numb er 1810-1278)

Probe Cable

40-Pin Connector

9-Channel Termination IC

(from logic analyzer)

(HP part number 1810-1278;2 DIPs required per probe cable)

(HP part number 1251-8828;2 20 pin header wit h0.1" 0.1" spac ing)

Figure 6B. Connectin g probe cable to 40-pin con nectorwith termination DIPs


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25.4 max.

3.5 1.00typ.

2.54 typ.

1.27 max.

0.51 typ.

7.62 max.

1.25 max.

2.5 max.

0.3 typ.

Schematic Diagram

All dimensions are in millimeters (mm).All tolerances ar e 0.05 unless otherwise specified.

1

1

1Noted dimensions are measured from seating plane.

R1

R6

C1 C2 C3 C4 C5R2

R7

R3

R8

R4

R9

R5

R10

Notes:1. Resistance

R1 thr ough R5: 250 5%R6 thr ough R10: 90 k 1%

2. Capacitanc e: 8.2 pF 0.5 pF

(from logicanalyzer)

(HP part number 1251-8828)2 20 pin header wi th0.1" 0.1" spac ing

(HP part number 1810-1588)4 SIPs required per probe c able

5-Channel Termination IC

Probe Cable

40-Pin Connector

Figure 7B. Connectin g probe cable to 40-pin conne ctor with termination SIPs

Figure 7A. 5-chan nel term inatio n IC (HP part nu mber 1810-1588)

An optional, high-density probe cable is available for situations

where ta rget boar d space is restricted. The cable, HP p art nu mber

16550-61605, is su pported by th e HP 16550A an d H P 1660-series

logic an alyzers. Th e pinout of the cable is shown in figur e 8. The

signals must still be termina ted on the ta rget board by one of th e

techniques discussed in th is application n ote. The following a re t wo

styles of ma ting conn ector t ha t this cable will plug int o:

Right an gle Fujitsu pa rt nu mber F CN-215Q050-G/0

Str aight Fu jitsu pa rt n um ber FCN-214Q050-G/0


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Hewlett-Packar d offers a wide arr ay of preprocessors, a dapt ers,

extenders, an d chip rota tors, eith er directly or via t hird pa rties, to

support st an dar d indust ry microprocessors an d buses. An up-to-dat e

list may be obtained from your nearest HP sales office. If the proces-

sor or bu s you a re usin g is not directly supported, th e HP E2445A

User Definable Interface is available. It consists of a wire-wrap

boar d, a sta nda rd pr obe interface board, and instr uctions for design-

ing an d building a custom inter face.

Double Probing There will be occasions wh en a n engineer or technician will need t o

passively probe with t wo different an alyzers. F or example, they m ay

need to capt ure both sta te an d timing dat a simulta neously, in order

to quickly isolate p roblems. They can easily double probe, withoutimposing additional loading on th e tar get system, with th e simple

Y conn ector shown in figure 9 (HP par t n um ber 16542-61607).

PIN #

1357

91113151719212325272931333537394143454749

PIN #

2468

101214161820222426283032343638404244464850

POD 1 LABEL

+5VPWR GNDD0D1

D2D3GNDD4D5D6D7D8GNDD9D10D11D12D13GNDD14D15NO CONNECTCLK 1PWR GND+5V

POD 2 LABEL

+5VPWR GNDD0D1

D2D3GNDD4D5D6D7D8GNDD9D10D11D12D13GNDD14D15NO CONNECTCLK 1PWR GND+5V

TerminationAdapter

Probe Cables

"Y" Connector for Double Probing

(from logicanalyzers)

HP part number 16542-61607

Typical PassivePreprocessors

16-ChannelProbe Lead Set(HP part number01650-61608)

Figure 8. High-density cable pinout

Figure 9. Double probing


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Direct Connection The fourt h m ethod of probing is th e Hewlett-Packard H igh Den sityThrough th e HDCTS Cable Termina tion System (HDCTS), a technique th at can be used to

provide electrical and mechanical connection to Hewlett-Packard (HP)

logic analyzers from printed circuit boards incorporating embeddedmicroprocessors or bu ses. The cable connection density, including

grounds on th e print ed circuit board, is approximat ely 180 per squa re

inch, and the termination technique has been qualified to clock speeds in

excess of 350 MHz.This section provides techn ical informat ion a nd par t

numbers t o allow you t o design an HDCTS into a un ique applicat ion.

Featu res Low Capacitive Loading: 1020 pF.

Low Profi le: About 0.5-inch t hick is possible. This allows probing a

chip between boards in a card cage.

Typical Applications P assive HDCTS: No active circuitry; RC term ination networks ar e

used for a ll target signals. An existing ta rget signal is used for t he

logic analyzer clock.

Pas sive HDCTS With Active Clocking : Signal chann els flow

stra ight th rough RC ter minat ion n etworks, a nd logic ana lyzer clock-

ing is genera ted with active circuitry, such a s a PAL.

Active Latching HDCTS: Active circuitry (such as flip-flops) precap-

tur es the tar get signals to meet th e setup and hold requirement s of

the logic an alyzer. The signals ar e then termina ted by RC networks

before being r outed t o the logic ana lyzer.

Active Buffering HDCTS: Active circuitry buffers the target signalsand may also generate logic analyzer clocking. The signals are then

terminated by RC networks before being routed to the logic analyzer.

1

5

3

4

2

Figure 10. Typical HDCTS application (see page 11 for componen t names)


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System Components The HDCTS componen ts consist of the following as shown in figure 10:

Printed circuit board

Various conn ectors and logic circuits on the P C board

40 conductor ribbon cable asse mblyThis cable pr ovides con-

nections for 16 dat a lines , two clock lines, an d two +5 Volt lines. Th e

rema inder of th e lines ar e groun ds.

Ribbon cable s train reliefThis provides strain r elief at the

prin ted circuit board for t he r ibbon cables. Var ious sizes ar e available.

Ribbon cable termination networkTwo types of RC net works

are availableSingle In Line (SIP), which a re m oun ted on t op of the

board, or Surface Moun t Techn ology (SMT), which ar e moun ted on the

bottom of the board.

ESD shield and label (not shown)Cust om ESD (electrostat ic

discha rge) shields can be designed t ha t will protect th e circuitry on th e

print ed circuit board from dam age caused by electr osta tic discha rge.

Pod identification label (not show n)This part ha s generic pod

numbers; you can documen t a ma trix in your user docum enta tion that

shows how to connect to different logic ana lyzers.

Typical Ven dors forComponents

Printed Circuit Board The following vendor has the capability of manufacturing the required

type of PC boar d. You ma y elect t o choose oth er su ppliers t ha t m eet

the specifications listed below.

Sigma Circuits

2950 Airway Avenu e

Costa Mesa , CA 92626

Specif ications:

SMT pad spacing requires 0.005 inch spaces and tr aces

Cable termination area of board is defined at th e end of this

applicat ion note.

PGA Socke ts McKenzie Techn ology

910 Page Avenue

Fr emont, CA 94538

Ph one: 510 651-2700

FAX: 510 651-1020

Specif ications:

P in

Very Low Force Ultr alow Force Pin :______________________________________________________________

Long Tail 101B 120B

Pin Protector 004B 010B______________________________________________________________

(for pin coun t > 150 u se th e Ultr a Low Force pins)

1

2

3

4

5

6

7


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Insulator

Ryton pr eferred for h igh tempera tu re, dur ability, and aesth etics; FR4

acceptable if Ryton not available. Hollow center option used if parts are

loaded under the PGA; otherwise, solid center preferred for keyed foot-prints.

A thin F R4 insulat or should be used between the PC board an d the

first PGA pin pr otector. This will prevent tr ace dam age if th e pin

protector is pried off.

Cable Assembly, Termination Netw orks, and S train Reliefs

are available from the fol lowing ven dor:

Skyline E lectr onics, Inc.

2845 Delta Dr ive

Colorado Spr ings, CO 80910-1012

Ph one: 719 390-4200

FAX: 719 390-9425

Cable Assembly Skyline E lectr onics; see above

Part Number E2406-61601

Cable Termination Skyline E lectr onics; see above

Components Single Inline Package (SIP) Network: Pa rt N umber 5062-7351

Surface Mount Termina tion (SMT) Network: Pa rt Num ber 5062-7396

Strain Relief Skyline E lectr onics; see above

No. of Cables HP Part Number Assembly Screw Length_______________________________________________________________

5 E2406-41201 0.438 in6 E2426-41201 0.438 in

7 E2420-41201 0.438 in

9 E2412-41201 0.500 in

10 E2443-41202 0.562 in_______________________________________________________________

ESD Shield (Typical vendor; you may substitute if appropriate.)

United Foam Plastics

1 John son Drive

Rarita n, NJ 08869-1651

Phone 908 707-4444

FAX: 908 707-0655

Pod ID Labels HP Par t Nu mber E2406-94301


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Notes on Using the SMT The ground on t he 40th pin of even nu mbered cables is not pickedPart in a Design up with t he via/trace scheme. This needs t o be connected (using via

or tra ce) to the nea rest ground.

HP current ly uses a two-step pr ocess in soldering th e SMT part to

th e board . The first pa ss places solder paste on t hose pads with vias.

Applicat ion of hea t a llows th e via t o fill with solder. (If only one sol-

der step was u sed, the solder would wick away from the pa rt int o th e

via and a solid conn ection would not be ma de with t he pa rt.) The

next pa ss places solder past e on all of the pa ds.

Spe cial Consid erations for a Ea ch SMT RC network is used with t wo cables. If you h ave an odd

Design With an Odd Numbe r nu mber of cables, you don't h ave to place an extra cable on the

of Cables boar d. You do ha ve to have pad s for th e un used h alves of th e SMT

parts. Leaving the extra cable off the board gives you 0.100 inches

more room or redu ces th e size of the board by the sam e amoun t.

The pa tt ern below is for a single 6-chann el part . However, the size of the

par t is such th at t he above patter n can be repeated to accommodat e mul-

tiple parts stacked end t o end. The process for termina tion of the hybrid

is similar to an LCC package. Due to th e sma ll size of the pa rt , however,

there would not be an y TCE problems during solder reflow. The hybr ids

ceramic substrat e has an NPO t emperature char acteristic. The schemat-

ic diagram on the left shows an equivalent circuit for the h ybrid network.

Figure 12. Recommen ded PC board pattern for surface mounttermination RC network

0.160"

0.120"

0.080"

0.050"

Pad Dimension = 0.030" 0.040"

Ch 2Ch 1 Ch 3 Ch 4 Ch 5 Ch 6

6 5 4 3 2 1

7 89

10 1112

10 pF

90 k

Out

250

In

Figure 11. Hybrid netw orkschematic diagram


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14

Figure 13a. Recomm end ed PC board pattern for ribbon cable termination.See Details A, B, and C wh en us ing the SMT network.

Keep tall component s (PLCC, nonterm side of SOIC,etc.) at least 0.125 away from cable pads. Keeplow components (term side of SOIC, chip caps, etc.)at least 0.975 away.

W5Pad dimension= 0.030" x 0.054"

0.100

0.175

0.050

Via W1

0.200Bevel edge@ 45 degrees

2.3500.125min.

0.158

0.098 dia.plated &tied toground

All dimensions are in inches

0.125min.

0.158

strainrelief

Add W6W14 in same pattern as below

odd cables left justifiedeven cables right justified

DETAIL BDETAIL A DETAIL C

Figur e 11b is a top side view of th e pads , ground t ra ces, an d vias of th e

circuitry needed when using th e SMT term ination network. The W

nu mbers a re cable reference designators with corresponding pin n um -

bers. The Z numbers are SMT network reference designators with

corresponding pin nu mbers. The solid line pads a re on th e top side and

ar e for cable wire conn ections. Note t ha t pa ds 1 an d 39 ar e +5 V, and

all even pads a re groun d conn ections (see Figur e 5A). The dotted line

pads a re for t he SMT networks m ounted on th e bottom side. The large

rectangular dotted line area defines a given SMT net work. Th e solid

filled-in circles are vias wit h t ra ces connected to th e even nu mber ed

wires of th e cables an d to ground. The solid open circles ar e vias that

carry a signal from t he output of the SMT network on th e bottom sideto the cable wire conn ected to the pa d on the top side.

For example, a given signal would enter the SMT on t he bottom side at

Z1.1, go through t he n etwork an d exit at Z1.12, go through th e via to

the W1.3 pad on th e top side, and then into the logic ana lyzer thr ough

the cable connection. The n ext signal would ent er t he n etwork at

Z1.11, exit the n etwork a t Z1.2, go th rough t he via to th e W2.3 pad ,

an d th en int o the logic analyzer. Notice th at thr ee of the net works

within a given SMT part term inate signals on an odd-nu mbered cable,

an d the other th ree termina te signals on an even-nu mbered cable.


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1

2

2

1

W2.1 W2.2(Z1.1)

W2.3(Z1.2)

W2.4(Z1.3)

W2.5(Z1.4)

W2.6(Z1.5)

W2.7(Z1.6)

W2.8(Z2.1)

W2.9(Z2.2)

W2.10(Z2.3)

W2.11(Z2.4)

W2.12(Z2.5)

W2.13(Z2.6)

W1.1 W1.2 W1.3(Z1.12)

W1.4(Z1.11)

W1.5(Z1.10)

W1.6(Z1.9)

W1.7(Z1.8)

W1.8(Z1.7)

W1.9(Z2.12)

W1.10(Z2.11)

W1.11(Z2.10)

W1.12(Z1.9)

W1.13(Z2.8)

W1.14(Z2.7)

W2.14(Z3.1)

W2.15(Z3.2)

W2.16(Z3.3)

W2.17(Z3.4)

W2.18(Z3.5)

W2.19(Z3.6)

W2.20(Z4.1)

W2.21(Z4.2)

W2.22(Z4.3)

W2.23(Z4.4)

W2.24(Z4.5)

W2.25(Z4.6)

W1.15(Z3.12)

W1.16(Z3.11)

W1.17(Z3.10)

W1.18(Z3.9)

W1.19(Z3.8)

W1.20(Z3.7)

W1.21(Z4.12)

W1.22(Z4.11)

W1.23(Z4.10)

W1.24(Z4.9)

W1.25(Z4.8)

W1.26(Z4.7)

W2.26(Z5.1)

W2.27(Z5.2)

W2.28(Z5.3)

W2.29(Z5.4)

W2.30(Z5.5)

W2.31(Z5.6)

W2.32(Z6.1)

W2.33(Z6.2)

W2.34(Z6.3)

W2.35(Z6.4)

W2.36(Z6.5)

W2.37(Z6.6)

W2.38 W2.39 W2.40

W1.27(Z5.12)

W1.28(Z5.11)

W1.29(Z5.10)

W1.30(Z5.9)

W1.31(Z5.8)

W1.32(Z5.7)

W1.33(Z6.12)

W1.34(Z6.11)

W1.35(Z6.10)

W1.36(Z6.9)

W1.37(Z6.8)

W1.38(Z6.7)

W1.39 W1.40

DETAIL A

DETAIL B

DETAIL C

Figure 13b. Recommen ded P C board pattern for ribbon cable termination(when u sing the SMT netw ork)


16/16

For more information onHewlett-Packard Test & Measurement

products, applications o r servicesplease call your local Hewlett-Packard

sales offices. A current listing is avail-able via Web through Access HP at

http://www.hp.com. If you do no t haveaccess to the internet, please contactone of the HP centers listed below and

they will direct you to your nearest HPrepresentative.

United States:Hewlett-Packard CompanyTest an d Measureme nt Organization5301 Stevens Creek Blvd.Bldg. 51L-SCSanta Clara, CA 95052-80591 800 452 4844

Canada:Hewlett-Packard Canada Ltd.

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Techn ical information in thisdocument is subject to changewithout notice

Prin ted in U.S.A 7/955962-8620E

Summary This application note has discussed four probingmet hods wh ich minimize probing effects on ta rget

systems. They include probing to individua l signal

lines using 16-channel lead sets, and connectingdirectly to microprocessors a nd buses via term ination

adapters, 40-pin connectors and HP's High Density

Cable Terminat ion System. These m ethods enable

digital designer s to choose the best probing altern at ive

for their specific application.

H

Documents

HP-AN1244-1_Minimizing Intrusion Effects When Probing With a Logic Analyzer