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Hot Carrier EffectsHot Carrier Effects
충북대학교 전자정보대학 김영석
2 11 92011.9
1
Moor’s LawIC complexity roughly doubles every 2 years” Gordon Moore, 1965
Higher Density
But, Hot Carrier Effects
2전자정보대학 김영석
ScalingDennard (IBM) in 1974
Constant Electric Field Scaling
3전자정보대학 김영석
ScalingThreshold Voltage VTH
V
CQ
VVVox
depFFBoxsiFBTH
+
−++=Δ+Δ+=
)2(2
2
εφε
φφφ
VqNCQ
tCWqNQ
qNVW
SBFsubsidep
ox
oxoxdepsubdep
sub
SBFsidep
+=
−
==−+
=
/)2)((2
,,)2(2
φε
εφε
kV
tkkVqkN
VV
tC
TH
oxox
SBFsubsisiFBTH
oxoxox
=+
+Δ+≈/
)/2)((2:scalingafter
/
'
εφε
φ
ε
Drain Current
D l
kIkVkV
kLkWkCI D
THGSoxnD =−≈ 2' )//(//)(
21 μ
WLCCVC GSGS 2Delay
kkIkVkC
WLCCI
D
GSGS
oxGSD
GSGS
ττ
τ
==
≈=
/)/)(/(
3,
'
Power Consumption
' )/)(/( PkVkIP DD ==
4
2)/)(/(k
kVkIP DD
전자정보대학 김영석
MOSFET ReviewCross-section
Depletion
0 < VGS < VTH
S bth h ld tSubthreshold current
Inversion
VGS >= VTHVGS > VTH
5전자정보대학 김영석
MOSFET: ID @ InversionLinear Region
ID ~ VDS
Voltage controlled resistor (VGS)
Pi h ffPinch-off
VDS=VDSAT
Saturation RegionSaturation Region
VDS => Leff slowly
Vchannel=VDSAT=const
Pinch-off section absorbs (VDS-VDSAT), high-field region, electron velocity saturationvelocity saturation
HCI
Large lateral electric field
Population of high-energy electrons
6전자정보대학 김영석
Scaling => 채널길이 감소Lateral E-field (drain) 증가 (>100kV/cm)=> Hot-Carrier 발생 (E>1.5eV)
Impact Ionization(I/I) or Avalanche Breakdown
Isub 증가 => 기판전압증가, Snapback 발생
I 증가 > O id T / VT 증가Ig 증가 => Oxide Trap/ VT 증가
Hot Carrier Effects(HCI)
7전자정보대학 김영석
Substrate Currents Mechanism
Electron Energy > 1.5eV
=> Impact Ionization
> El t H l i ti=> Electron-Hole pair generation
전자는 드레인 or 게이트로 이동
정공은 기판으로 이동 (Isub)정공은 기판으로 이동 (Isub)
Isub can be used to predict the device lifetime
8전자정보대학 김영석
Substrate Currents Difference between Electrons and Holes: pn μμ ⋅≈ 3
Electron-Hole pair generation by Electrons: Energy>1.8eV
Electron-Hole pair generation by Holes: Energy>2.4eV
p
9전자정보대학 김영석
Substrate Currents(Isub) 문제점Breakdown 발생: 정공 기판으로 이동 => 기판 전압 상승 => 소스-기판 순방향바이어스 => 소스에서 전자들이 기판으로 방출 (기생 npn BJT동작) => More I/I => Snapback Breakdown
CMOS Latch-Up 유발CMOS Latch Up 유발
Back Bias Generator 전압을 올림
드레인-기판 공핍영역에서 정공에 의한 Secondary Impact-Ionization 발생
A monitor to correate device degradation with lifetime
Device Degradation/Isub are driven by a common source: Emax
10전자정보대학 김영석
Hot-Carrier Injection into Gate Oxide 게이트 산화막으로 주입된 대부분의 전자들은 게이트 전극으로 이동 ( 약 fA - pA).
이중 1/1E6 정도의 전자들은 게이트 산화막에 trap됨
Negative Charge => VT 증가 => 전류감소
11전자정보대학 김영석
Nature of Gate Oxide DamageHCI increases with shrinking
L , xj , tox , Nsub => E(lateral), E(vertical) (sinificant)
HCI
2 D O id h t i I t f t ti2 Damages: Oxide charge trapping, Interface trap generation
Very localized
gm , VTH , IDgm , VTH , ID
Charge-Pumping technique
Provide amount of Oxide charge trapping/Interface trap generation even for the case of Localized degradation
2 Voltage Regions
VDS ~ 2VGS: Max substrate current Interface trap generationVDS ~ 2VGS: Max substrate current, Interface trap generation (no Oxide charge trapping)
VDS ~ VGS: Hot electron injection into oxide, Oxide charge trapping (Less Interface trap generation)
12전자정보대학 김영석
HCI into Gate Oxide Hot Carrier
Carriers that have a much higher kinetic energy than the average carrier population
E-Ec=kTe >> kTE-Ec=kTe >> kT
2 Modes of Electron Injection
Substrate Hot-Electron (SHE)
Channel Hot-Electron (CHE)
13전자정보대학 김영석
HCI into Gate Oxide : SHESubstrate Hot-Electron due to Substrate leakage Current
Electrons generated in the depletion region
Drift toward Si-SiO2 interface
G i h ki tiGain enough kinetic energy
Overcome the energy barrier (3.1eV)
Injected into the gate oxideInjected into the gate oxide
Some trapped in the Oxide
Uniform Oxide Charge Accumulation => VTH
Primarily in Long-Channel MOSFET
14전자정보대학 김영석
HCI into Gate Oxide : CHEChannel Hot Electrons are caused by Electrons flowing in the channel
Short Channel => SHE (Larger fraction of SHE are swept into S/D instead of the surfaceinstead of the surface
Pronounced at Large VDS
Hot Electrons in the Drain end of channel due to High Electric Field
Also Electron-Hole Pairs by Impact Ionization
Localized near the Drain Junction
15전자정보대학 김영석
HCI into Gate Oxide : Injected Electron Current Density
Injected Electron Current Density
∫=y
inje dyyxPyxnxj ),(),()(
N(x,y) : Local electron contration
Pinj(x,y) : Spatial distribution of the injection probabilityPinj(x,y) : Spatial distribution of the injection probability
16전자정보대학 김영석
Lucky Electron Model: scattering probabilitiesScattering Events
A to B: Channel Electrons gain kinetic energy from the lateral channel electric field
B: The Momentum of the hot electron must be redirected towardB: The Momentum of the hot electron must be redirected toward the interface by a Quasi-Elastic Collision
• No energy-robbing collision
• Retain the kinetic energy
B to C: Travel without suffering further collisions
17전자정보대학 김영석
Lucky Electron Model: scattering probabilitiesScattering Probabilities
P1: the probability of the electron to gain a kinetic energy sufficient to overcome the effective potential barrier at the interface
bΦinterface
path freemean scattering: where//1 −== Φ−− λλλ xb Ed eeP
P2: the probability of an electron with initial kinetic energy of being redirected toward the interface
Φ
]1[21
2 ΦΦP b−=
By integrating the product
P1 and P2 over all energies
Φ
λλxb
b
EΦ
b
xΦ e
ΦEP /
41 −=
18전자정보대학 김영석
Lucky Electron Model: scattering probabilitiesScattering Probabilities – continued
Ped: the probability of travelling to the interface without further collisions
Poc: oxide scattering factor (electrons scattered in the image-
λ/yed eP −=
Poc: oxide scattering factor (electrons scattered in the image-potential-well above the oxide interface must be excluded)
oxyoc eP λ/0−=
Pinj(Eox) : the overall probability that a hot-electron can enter the gate oxide by overcoming the potential barrier (empirical)
ηγα
+++
=− ]1[
1
]1[ 5.1/oxoxtEox
oxinj
eEEP
β++ ]1[]1[
eff
eL
19전자정보대학 김영석
Lucky Electron Model: Injection Current ModelInjection Current
Region A: Electrons are attracted toward the gate
Region B/C:
El t ll d f th idElectrons are repelled from the oxide
But, More electrons are injected due to Larger lateral E-field and so more hot electrons
exp)(21
2
⎥⎦
⎤⎢⎣
⎡ Φ−⎥
⎦
⎤⎢⎣
⎡Φ
= boxinj
moxDSei E
EPEtIiλ
λλ
pathfreemeandirection re theis where2
−−−
⎥⎦
⎢⎣
⎥⎦
⎢⎣ Φ
r
mj
br Eλ
λλ
ηγα
+=1
51/E
oxinj E
EP γβ
++ − ]1[]1[ 5.1/oxoxtE
eff
ox eL
E
20전자정보대학 김영석
Lucky Electron Model: SummaryLucky Electron Model
eVeIIII
i
chsubchGi
6.1~energy thresholdionization:/~/ /
Φ
ΦΦ−
V2.3~energybarrier injection :Φ
21전자정보대학 김영석
Lucky Electron Model: Measurement resultsSimulation results (right figure)
Solid: without oxide scattering factor Poc
Dashed: with oxide scattering factor Poc
M t (l ft fi )Measurements (left figure)
22전자정보대학 김영석
CHE/DAHCChannel hot electron(CHE) injection
Drain avalanche hot carrier(DAHC) injection => Impact Ionization
23전자정보대학 김영석
Impact Ionization by Hot-ElectronsElectrons are accelerated by the E-field
Get sufficient energy to break the covalent bond
Impact-Ionization=Avalanche Breakdown
I b li bl d i t it f th t f h tIsub: a reliable and convenient monitor of the amount of hot-carrier degradation
24전자정보대학 김영석
Impact Ionization by Hot-Electrons
Isub ~ IDS * Pi
Pi = the probability of an electron travelling a sufficient distance to gain the kinetic energy or more without suffering a collision
E/Φ λiΦ
eVeP
i
Eqi
mi
6.1~energy ionizationimpact : where
/
Φ= Φ− λ
Substrate current
mi EqDSsub eICI λ/
1Φ−= DSsub 1
25전자정보대학 김영석
Fowler-Nordheim (FN) TunnelingPrimarily by Eox
Localized at the source (maximum Eox at the Source)
⎟⎟⎞
⎜⎜⎛ −
= CEJ βexp2
Nonsignificant (But Significant for very thin oxide)
⎟⎟⎠
⎜⎜⎝
=ox
oxT ECEJ exp
Nonsignificant (But Significant for very thin oxide)
26전자정보대학 김영석
Oxide Traps and Charge TrappingSi-SiO2 system : 4 Charges
Fixed Oxide Charge
Structural defect
R l t d t th l id ti (T li diti SiRelated to thermal oxidation process (T, cooling conditions, Si Orientation)
Mobile Oxide chargeg
Ionic impurities Na+ K+
Oxide trapped charge / Interface trapped charge : Important role i th d i d d ti d t HCIin the device degradation due to HCI
27전자정보대학 김영석
Fixed oxide chargeSi-SiO2 atomic model
Si dangling bond
Oxygen dangling bond
B th d li b d l t /h l TRAPBoth dangling bond : electron/hole TRAP
SiN : nitrogen dangling bond
28전자정보대학 김영석
Interface Trap GenerationInterface states=surface states=fast states Nit
Structural, oxidation-induced defects
Metal impurities, Radiation
L li d t th i t fLocalized at the interface
Charged and discharged depending on the surface potential
Depend on bias conditionsDepend on bias conditions
In case of acceptor-like interface states
Neutral when empty
Negatively charged when filled
Atomic mechanisms for creation of interface states by hot electron and holes [sah]and holes [sah]
Breaking the strained Si-Si or Si-O bonds creating oxide traps
Breaking the hydrogen bonds, release H atom, leaving behind dangling Si- or O-bond
Hydrogen is trapped by proton trap => reduction of the interface trapsinterface traps
29전자정보대학 김영석
Bias Dependence of Degradation MechanismsOxide Degradation
Oxide Charge Trapping
Interface Charge Trapping
Ch f D i h t i ti d t id dChange of Device characteristics due to oxide damage
gm decrease
VTH increaseVTH increase
VTH decrease versus VGS shows Two local Maxima => One at VGS=VDS, another at VGS=VDS/2
VTH decrease vs time shows Two different slopes for VGS=VDS and VGS=VDS/2
30전자정보대학 김영석
Bias Dependence of Degradation MechanismsVGS=VDS/2
Maximum substrate current
Injection of Impact Ionization Electrons/Holes
I t f T G tiInterface Trap Generation
A depends on Isub and IDS
7.05.0 −=⋅=Δ nwheretAV nTH
A depends on Isub and IDS
VGS=VDS
Maximum Ig
Oxide Charge Trapping
2.0 =⋅=Δ nwheretBV nTH
Hole injection
Ig(electron) >> Ig(hole)eVeV holeelec 5.4~,2.3~ ΦΦQ
Ig(electron) Ig(hole)
But, (Interface trap generation by holes) ~ 1000*(Interface trap generation by electrons)
31전자정보대학 김영석
Degradation under Dynamic Stress ConditionsIn a circuit, MOSFET devices usually operate under dynamic operating conditions
Degradation under dynamic stress > Degradation under static stress for large VDSstress for large VDS
Sublinear dependence
Why? Increased interface trap generation by hot holes
Model: two-step hole/electron injection process
Oxide trap generation by holes (>4.6eV)
Ch d iti l b h lCharged positively by holes
Some positive trapped charge located close to the interface tunnels back to Si
Some positive trapped charge not close to the interface just stay there
C t s i j t d l t sCaptures injected electrons
Create negative charged interface states
Hole trap increasesHole trap increases
32전자정보대학 김영석
Degradation under Dynamic Stress ConditionsUnder static stress conditions
VDS,VGS constant
Trapped holes stay there (not return to the substrate)
E fi ld d ll dE-field gradually decreases
Rate of degradation drops
Under Dynamic stress conditionsUnder Dynamic stress conditions
VGS changes
Trapped holes tunnel back to the si
E-field not change
Enhanced carrier injection => degradation increases
33전자정보대학 김영석
Degradation under Dynamic Stress ConditionsDynamic degradation is larger when hole injection occurs
For larger VDS(>7V), smaller VGS(~2V)
Hole injection is dominant by oxide E-field
D i d d ti i dDynamic degradation is pronounced
For lower VDS(E<6MV/cm)
Electron injection is dominant by oxide E-fieldElectron injection is dominant by oxide E field
Dynamic degradation negligible
34전자정보대학 김영석
Degradation under Dynamic Stress ConditionsVGS, VDS < 5V (Hole injection not dominant)
Static = Dynamic degradation
Dominant degradation mechanism is interface trap generation by hot holes
No significant dynamic degradation for current ICs because VGS, VDS<5V, so hole injection is not dominant
35전자정보대학 김영석
Threshold Voltage Shift
0@FGpp VVQCVV + 0@
FGTHiTH
DSoxpp
FG
oxpp
ppCGFG
QVV
VVCC
QCC
VV
−=
==+
++
=
)22(2 0 FFSBTHdep
FFBTHi
oxppTHiTH
VVCQ
VV
CCVV
φφγφ −++=−+=
+
)(0 FFSBTHox
FFBTHi Cφφγφ
36전자정보대학 김영석
CharacterizationVFG 영향
A region: Electrons(Ich) 증가 => I/I 증가
B region: Emax 감소 => I/I 감소
VD 영향VD 영향
VD 증가 => Emax 증가 => I/I 증가
Leff 영향Leff 영향
Leff 감소 Emax 증가 => I/I 증가
37전자정보대학 김영석
CharacterizationISUB vs VD
VTH vs time
Lifetime vs ISUB
38전자정보대학 김영석
Device DegradationHCI
=> VTH 감소, 전류 IDS 감소, gm 감소
=> Circuit Speed 감소
> Ci it F il=> Circuit Failure
39전자정보대학 김영석
Device LifetimeIn General, Device Lifetime is defined by
%3
10
=Δ
=Δ
D
T
II
mVV
%3=Δ m
D
ggI
mg
40전자정보대학 김영석
Techniques to Reduce HCIReduce Maximum Electric Field (Emax)
Reduce VDD
Gate Oxide Engineering for higher reliability (e.g., oxynitrides)
St t t t th t th f EStructure to separate the current path from Emax
41전자정보대학 김영석
LDD(Lightly Doped Drain)Hot Carrier Effect 방지를 위한 소자 구조
LDD(Lightly Doped Drain)
42전자정보대학 김영석
SummarySubstrate Current by Impact Ionization
G t C t b L k El t
(1) /1
mi EqDSUB eICI λϕ−=
Gate Current by Lucky Electrons
(2) /2
mb EqDG eICI λϕ−=
(1)+(2)
(3))( / ibSUBG II ϕϕ∝ (3) )( ib
D
SUB
D
G
IIϕϕ∝
oxide barrier toenergy :2.3IonizationImpact create energy to :3.1
eVeV
b
i
==
ϕϕ
43전자정보대학 김영석
SummaryDevice Lifetime by Interface Traps (IG, ISUB)
eIWC Eq
D
mit /5
(4)(1)
(4) =τ λϕ
II
IW SUB iit / (5) )(
(4)(1)
∝
+
−τ ϕϕ
WII
II
SUB
D
DD
9.2
9.1
∝∴τSUB
TI t ftt73 V
44
TrapsInterfacecreateenergy to :7.3 eVit =ϕ
전자정보대학 김영석
SummaryLifetime: Ex
AI
mWAIAI
SUB
SUBD
/103
60,10,10
129.2
64 ===
−
−− μ
years
mAWID
SUB
31sec101
/103
9
129.1
=×≈∴
×≈
τ
μ
Note that Li-Ion battery: 2 years, 400회
45전자정보대학 김영석
ReferencesHot Carrier Design Considerations for MOS Devices and Circuits, C. T. Wang, Van Nostrand Reinhold, 1992
Hot-Carrier Reliability of MOS VLSI Circuits, Y. Leblebici and S. M. Kang, Kluwer Academic Publishers, 1993Kang, Kluwer Academic Publishers, 1993
46전자정보대학 김영석
