High Efficiency PA Techniques - University of South Floridawami.eng.usf.edu/Conferences/WAMICON/2005/Electronic-Materials/... · High Efficiency PA Techniques For Modern Wireless

High Efficiency PA Techniques For Modern Wireless and Microwave

Systems

1/2 Day Short CourseWAMICON 2005

Clearwater, FloridaApril 7 2005

Steve C Cripps, Ph.DHywave Associates

Course Summary

Part 1 - Class AB Modes (Review)

Part 2 - The Doherty PA

Part 3 - AM Reconstruction (LINC)Techniques

Part 4 – Envelope Tracking Techniques

Class AB Modes (Review)

• Reduced Conduction Angle Modes• Class AB, Class B, Class C• Quantitative Analysis• Power backoff; Linearity and

Efficiency issues

Part 1 –1Part 1 Summary

Part 1 –2RF Power Transistor (-1, Ideal IV)

• Ideal RF transistor model – IV plot• DC characteristics either dynamically measured or

assumed quasi-static• “Knee” voltage assumed to be negligible compared to

normal DC supply• “Transconductive” characteristic natural choice for FET;

needs further justification for BJT

0

Imax

VmaxV Vknee max (<< )

Ids

Vgs(linear steps)

Ids

Vgs

D

S

G

Part 1 –3RF Power Transistor (-2, Ideal transconductance)

• Ideal RF FET model – “gm” plot

• Linear transconductive characteristic with “sharp” cut-off

• Characteristic assumed to be insensitive to drain-source voltage (“Vds”) except in turn-on (“knee”) region

0

Imax

VT

Ids

Ids

Vgs

Vgs

Part 1 –4RF Power Transistor (-3, Ideal Bipolar)

• Ideal RF bipolar (BJT) model – “gm” plot

• Highly non-linear transconductive characteristic

• “Imax” not so well defined as for FET

0

Imax

VT

Ice

Ids

Vgs

Vbe

BJTFET

Part 1 –5Class A PA

• Basic Class A loadline matched condition • Load (as measured at transconductance generator) is

resistance determined by simple loadline considerations• Ideal case (no “knee” effects) 50% output efficiency

ROPT

Imax

Vdc

0

0

iD

vD S

t

( )R = V / I /2OPT DC max

vDS

Vdc

v IN

vOUT

RL

DC Blocking Cap

RF "Choke"

iD

Z=RL OPT

Part 1 –6Class AB PA (-1)

• Class AB configuration• “Tank” resonator shorts all harmonics at RF load• Device output is sinusoidal, amplitude set by load RL and

fundamental component of device current

vDS

vIN

iD

vDS

Vdc

vIN

vOUT

RL

DC Blocking Cap

Hi-Q "Tank"(@f ) 0

RF "Choke"

iD

Z R j fZ f f

L L 0

L 0 0

= + ( )= ( , ,......etc.)

00 2 3

i1

Gate voltage

Drain current

Drain voltage

Vo

Vo

Vt

Vq

Imax

Idc

0

Part 1 –7Class AB PA (-12, Harmonic analysis)

• Summary of Fourier analysis of reduced conduction angle current waveforms

• Monotonic reduction in DC component, for almost constant fundamental, in AB region

• Second harmonic is a major player!

• Lower fundamental, and escalating harmonics, in Class C region (more on class C later)

0

Fundamental

DC

2nd

3rd4th

5th

0.5

0

Amplitude (I =1)max

2π Conduction angle

A B CAB(CLASS)

π

Part 1 –8Class AB PA (-13, Power/efficiency)

• Power/efficiency trade-off for Class AB,B,C• Plotted points refer to maximum drive condition (Imax

peak current swing)• Idealised model; knee effects and gain reduction near

pinchoff not included• Short circuited harmonics assumed

02π π Conduction angle

A B CAB(CLASS)

0

+5dB 100%

-5dB 0%

RF Power (dB)

Efficiency

RF Power (dB)

Part 1 –9Class AB PA (-14, PBO-Linearity)

• Power transfer characteristics• AB region shows a non-linear power transfer characteristic

resulting from drive-dependence of conduction angle• Backed-off AB reverts to linear characteristic when

“truncation” stops• Class C shows highly non-linear “expanding” characteristic

Input Power (2dB/div)

Output Power(2dB/div)

Plin V=.5(Class A)

q .25

.15

.05

V =0q

V =-.1q

V =-.25q

V=-.5q

Part 1 –10Class AB PA (-15, PBO-Efficiency)

• Efficiency versus Power Backoff (PBO)• Average efficiency over dynamic signal amplitude range

usually the critical efficiency parameter• CW efficiency at average power level gives approximate

guide • Hence unsuitability of Class A for signals having AM

100

50

0-5dB-10dB Pmax

Efficiency (%)

Output power backoff(dB)

Iq=0.5 (Class A)

Iq=0(Class B)

Iq=0.25

Iq=0.1

Part 1 –11Class AB PA (-16, Conclusions -1)

• Reducing the conduction angle improves the efficiency, both at the maximum drive point, and throughout the PBO range

• Use of a reduced conduction angle requires increased drive levels (and hence lower power gain) than for Class A operation

• Reduced conduction angle modes show substantial amounts of non-linearity due to the fact that the conduction angle is itself a function of drive level (Class A and Class B are the only exceptions)

Part 1 –12Conclusions -2

• ”Real world” device characteristics can have a significant effect on high frequency PA performance, in comparison to expectations based on ideal models

• Knee effects have the biggest impact on power and efficiency, and lead us into new territory (see Class E section later)

• Non-linear transconductance characteristics have a big effect on PA linearity, much less effect on power and efficiency

• Devices having non-linear transfer characteristics (e.g., BJT/HBT) can still have linear Class AB PA performance

• Input capacitance can in some cases have an important effect on power and efficiency, as well as AM-PM performance

Part 2 –1

Part 2 Summary

The Doherty PA

• Introduction•Classical configuration and analysis•Doherty PA design and simulation•Asymmetrical Doherty PA•Peaking amp issues•Conclusions

Part 2 –2Introduction to Doherty PA (-1)

• The Doherty PA (DPA) has emerged as one of the “hottest” topics in the PA business

• Originally proposed (by W.H. Doherty) in 1936, it was almost entirely ignored by the modern RF community until just a few years ago

• The DPA offers a solution to the low PBO efficiency problem which all Class AB amplifiers present

• The availability of linearisation techniques such as Digital Predistortion (DPD) has solved the key linearity problem with DPAs

Part 2 –3Introduction to Doherty PA (-2)

• Efficiency of Class AB PA degrades rapidly as RF carrier amplitude is reduced

• Degradation slows as conduction angle is reduced (from Class A to Class B) but still highly problematical in making high average efficiency for signals having AM

• Need to somehow reduce the power “capacity” at low points in the AM cycle

• Old problem;old solutions exist!

100

50

0-5dB-10dB Pmax

Efficiency (%)


Iq=0.5 (Class A)

Iq=0(Class B)

Iq=0.25

Iq=0.1

Part 2 –4Doherty PA Analysis (-1)

• Classical (“ideal”) Class B PA shown with normal output load

• “Loadline” load resistor (R=RL) gives full rail-to-rail voltage swing for maximum (Imax peak) current

• In Class B case, maximum efficiency is also maintained!

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

2.25

2.5

0 60 120 180 240 300 360 420 480

CurrentVoltage

zeroknee


• Drive signal reduced by 6dB to give factor of 2 reduction in current magnitude

• Voltage also drops by factor of 2

• Efficiency drops by factor of 2 as well (39%)

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

2.25

2.5

0 60 120 180 240 300 360 420 480

CurrentVoltage

zeroknee


• Drive signal still reduced by 6dB to give factor of 2 reduction in current magnitude

• Load resistance increased so that R=2*RL

• Full rail-to-rail voltage swing now restored

• Efficiency is also restored to its maximum value (78%)

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

2.25

2.5

0 60 120 180 240 300 360 420 480

CurrentVoltage

zeroknee


• In principle, the load resistor can be continuously increased as the drive signal is reduced, to maintain full rail-to-rail voltage swing

• Efficiency then remains constant throughout• But the power transfer characteristic is no longer linear!

-10 -5 0

Pin (1dB/div)

Pout(1dB/div)

Pout

Effcy

R(0-5 scale)L

η(%)

100

50

0


• Impedance “seen” by generator 1 is Z1=R.(1+I2/I1)

• As drive level is backed off from maximum down to the 6dB PBO point, Z1 decreases from 2R down to R

• This is actually the wrong direction for R, but it’s a start!

I1 I2

R Gen 1("Main")

Gen 2"Peaking"

V

V R I I= .( + )1 2

Z1


• Impedance inverter can be realised using quarterwavetransformer

• Further analysis shows that transformer must have Z0 = 2R • R = Ropt/2 (Ropt is loadline value for a single device)• Phase compensation on peaking amplifier conveniently done

at input (giving a “quasi balanced” configuration and associated VSWR advantages)

• Output Doherty circuitry can be done after matching devices closer to 50 Ohm

I1 I2

R Gen 1("Main")

Gen 2"Peaking"

Z =Z /ZM 0 12

Z ( /4)0 λ

Z1


• Uses 2 devices with common load• “Peaking” device only active for upper few dB of range

(6dB typically)• Overall efficiency can be maintained close to maximum

for initial 6dB PBO

"Peaking"

Main

90o

90o

Vba

Vbm


• Main device maintains maximum efficiency for all the active regime of the peaking device

• Peaking device does not have maximum efficiency in the mid range, but is contributing correspondingly less power

Input drive(voltage amplitude)

Input drive(voltage amplitude)

VmaxVmax/2 Vmax/2 Vmax0 0

0 0

Imax/2 Vdc

Imax/4 Vdc/2

main(#1)

main(#1)

auxil. (#2)

auxil. (#2)

Device current(amplitude)

Device voltage(amplitude)


• Basic Doherty action (many variations are possible)• “Peaking” device only active for upper 6dB of range• Linear operation assumed (Class A or Class B) initially,

for both devices• Key aspect to operation is the active “pulling” on the

main device impedance by the peaking device

Main PA

Aux. Amp

Power Out(Linear scale)

Power In (Linear scale)

Combination

Pmax

Pmax/2

Pmax/4


• Composite efficiency shows close to maximum value maintained over upper 6dB power range

• Depth of dip (at 3dB PBO point) dependent on implementation of peaking amp

Pmax-5dB-10dB

100%

50%

PBO(dB)


• Key aspect of DPA analysis is linearity of final response• Power contributed by auxiliary PA is exactly the power

required to restore the square-law characteristic of the main PA in the “load modulation” regime

• Note linear power scales on diagram

Power Out(Linear scale)

Power In (Linear scale)

Combination

Pmax

Pmax/2

Pmax/4

Aux.

Main


• More detailed analysis (see ref.) gives above expressions for the output voltage (Vo) and the main PA device output voltage (Vm)

• Expression for Vo shows that the output voltage is a simple linear function of Im.

• Function of peaking device is to keep Vm below clipping level• So peaking amp does not have to be linear!

I1

Im

Ipk

R Gen 1("Main")

Gen 2"Peaking"

Z ( /4)0 λ

VoVm

V = j Z Io 0 m

V = Z ((Z /R)I -I )m 0 0 m pk


• Example of non-linear peaking amp• Ip curve shows peaking device with squarelaw characteristics• Im is linear (main device in Class B)• So therefore output (Vo) is also linear……..• Providing Ip, Zo, R chosen such that Vm remains below clipping

level• Efficiency curve shows lower efficiency in the breakpoint

region, but useful overall improvement compared to Class B

Vin

0 -20dB -10dB -6dB -3dB Vmax

η

Vm

IpIm Vo

I ,I 0 - 2IV ,V 0 - 2Vm p P

m p dc

1002

1 50

0


• An obvious (and desirable) way of implementing peaking PA is to use Class C

• Class C is a readily available method of holding off the peaking device up to the required breakpoint drive level

• But there is a problem. With the same drive level applied to each device, the main device and peaking device will not both reach their individual Imax at the maximum drive level

• This requires the peaking device periphery to be scaled up, (e.g. by a factor of 2.5 in the symmetrical case)

Vin

0.5 0 1.0 1.5 2.0 2.5

0.50.5 0

-.5-.25-1 -1.5

Vq

I ,Im p


• Problem can be solved using a bias sensing circuit• Peaking PA bias point shifts in proportion to drive signal

level• Linearity not critical but response time of DPA now

reduced to envelope time domain • If DSP linearisation being implemented, Doherty

peaking PA bias generation a simple by-product

0.5

0

Imax

I1

0

-0.5 0 0.5 1.0

Drive signal amplitude (v)sDrive signal amplitude (v)s

vq

Main PA Peaking PA

Peaking PAbias point

Main PAbias point

(No bias adapt.)


• “Doherty-Lite” PA uses 2 identical devices, and Class C bias for peaking action

• Class C (peaking PA) bias selection determines breakpoint for Doherty action (2 values shown)

• 2 cases show significant (but much lower than “classical”) improvement in PBO efficiency performance

• Probable reason for early “rejection” of DPA technique?

Vin


Ip

100

50

0

Effcy

0

1Class B

Ideal DPA

Part 2 – 20DPA Simulations (-1)

• MWO simulation file• Same device model used in previous examples• Simple Class C peaking amp (periphery factor=2)• Resistor on peaking PA output used to simulate parasitic loss

1

2

3

STATZ

NFING=AFAC=

ID=

1 10 SF1

RES

R=ID=

50 OhmR1

IND

L=ID=

20 nHL1

CAP

C=ID=

100 pFC1

DCVS

V =ID=

2.35 VV2

CAP

C=ID=

1000 pFC2

IND

L=ID=

20 nHL2

DCVS

V =ID=

6 VV3

V_METERID=VM1

I_METERI D =AMP1

V_METERID=VM2

MSUB

Name=ErNom=

Tand=Rho=

T=H=Er=

SUB1 4.5 0 1 0.05 mm0.8 mm4.5

1

2

3

STATZ

NFING=AFAC=

ID=

1 20 SF2

RES

R=ID=

50 OhmR3

IND

L=ID=

20 nHL4

CAP

C=ID=

100 pFC5

DCVS

V =ID=

3.5 VV4

IND

L=ID=

20 nHL5

DCVS

V =ID=

6 VV5

I_METERID=AMP2

V_METERID=VM3

CAP

C=ID=

100 pFC6

TLINP

F0=Loss=Eeff=

L=Z0=ID=

0 GHz0 1 88.2 mm20 OhmTL2

TLINP

F0=Loss=Eeff=

L=Z0=ID=


TLINP

F0=Loss=Eeff=

L=Z0=ID=

0 GHz0 1 88.2 mm100 OhmTL3

TLINP

F0=Loss=Eeff=

L=Z0=ID=


TLINP

F0=Loss=Eeff=

L=Z0=ID=


RES

R=ID=

1e4 OhmR4

PHASE2

Zo=F=S =A =ID=

50 Ohm0 GHz0 Deg90 DegP2

1

2

3

CIRC

ISOL=LOSS=

R=ID=

30 dB0 dB50 OhmU1

RES

R=ID=

1 OhmR2

PORT_PS1

PStep=PStop=PStart=

Z=P =

2 dB20 dBm0 dBm50 Ohm1

PORT

Z=P =

50 Ohm2


• Power and Efficiency responses for 3 peaking device bias levels (-3,-3.5,-4v for –2.5v pinchoff device)

• Note best linearity corresponds to lowest efficiency plot(!)

0 2 4 6 8 10 12 14 16 18 20Power (dBm)

Graph 1

20

22

24

26

28

30

32

34

36

38

40

0

10

20

30

40

50

60

70

80

90

100

AMtoAM[PORT_2,1] (L, dBm)Statzfet

DCRF_SP[PORT_2,1] (R)Statzfet


• Power and Efficiency responses for 3 values of peaking device parasitic resistor (35Ω, 100Ω, 350Ω; RL=3.5Ω)

• Peaking device parasitic loss has biggest effect in pre-peaking regime, where peaking device is “off”

• Peaking device parasitics in off condition are critical

0 2 4 6 8 10 12 14 16 18 20Power (dBm)

Graph 1

20

22

24

26

28

30

32

34

36

38

40

0

10

20

30

40

50

60

70

80

90

100




• Power and efficiency characteristics for 2 values of “Zo” (main device matching transformer, 20Ω, 17Ω)

• 2 cases represent a change in main device load from 3.5Ω to 4.8Ω

• Note much more linear characteristic for lower efficiency case!

0 2 4 6 8 10 12 14 16 18 20Power (dBm)

Graph 1

20

22

24

26

28

30

32

34

36

38

40

0

10

20

30

40

50

60

70

80

90

100




• Power and efficiency characteristics for 3 frequencies (800, 825, 850MHz)

• Optimised performance at 850MHz (Zo=18.5Ω)• Bandwidth issues for >5% bandwidth applications

0 2 4 6 8 10 12 14 16 18 20Power (dBm)

Graph 1

20

22

24

26

28

30

32

34

36

38

40

0

10

20

30

40

50

60

70

80

90

100



Part 2 – 25DPA Variations (-1, asymmetrical DPA)

• Asymmetrical configuration, -12dB “breakpoint”• Asymmetrical DPA requires different Imax for main and

peaking device• Peaking device has much higher Imax (regardless of how

peaking action is implemented)• Obvious applications for high peak/average signals

Vin

0.5 0 0

I , IP M

1.0

I ,Ip m, p mV ,V

dcV

Vm

Vp

Ip

Im

Part 2 – 26DPA Variations (-2, asymmetrical DPA)

• Asymmetrical configuration, -12dB “breakpoint”• Realisation using Class C peaking PA• Clear attractions for high peak to average ratio signals

and MCPAs

Vin


η

Vm

Ip

Im

Vp

I ,I 0 - 2IV ,V 0 - 2Vm p P

m p dc

100

50

00

1

2

Part 2 – 27DPA Variations (-3, multiple DPA)

• Multiple peaking devices can in principle be combined to give flatter efficiency characteristic over broader PBO range

• Peaking PA controls, and layout issues make this less attractive than conventional DPA

• Few GHz implementations ever reported

“Z” Inverter“Z” Inverter

Main Peak1 Peak2

Part 2 – 28DPA Variations (-4, DSP controls)

• DPAs need linearisation for most telecom applications• Digital predistortion (DPD) on both RF inputs adds some

flexibility; DSP can be used to optimise the efficiency characteristic as well as the linearity

• Bias adaption adds another dimension

DPD

DPD

Bias adaption

Bias adaption

System DSP

Part 2 – 29Doherty PA Conclusions

• Immediate impression is a technique tailor-made for modern high “crest factor” modulation systems. So why has it not been used much?

1. The implementation of the peaking device action, especially in asymmetrical DPA configurations, is critical to success. Simple Class C bias gives degraded performance from expectation, at best.

2. The linearity of the Doherty PA in the upper regime, where the main device operates close to its clipping level, will be significantly degraded from a conventional PA using the same device periphery.

3. For handset applications, there is a substantial extra amount of off-chip circuitry. For basestationapplications, extra linearisation will be required.

• DSP to the rescue on (1) and (2), not however on (3)

Part 3 –1

Part 3 Summary

AM Reconstruction Techniques(“LINC”)

• Introduction• The Kahn Transmitter (EER)• Envelope Construction• Outphasing• The Chireix Outphasing Transmitter• Conclusions

Part 3 –2Introduction

• “LINC” (LInear amplification using Non-linear Components) is becoming a “mainstream” concept in modern PA system design

• A LINC configuration uses PA which operates its maximum efficiency over most of the signal dynamic range

• The PA does not need to be linear, since it usually operates at a constant drive level

• LINC techniques such as the Khan (“EER”), and the Chireix (“outphasing”) configurations will be described in the next section

• PA techniques which previously had only restricted applications (Class D, Class E) are now the subject of renewed interest

Part 3 –3Kahn EER (-1)

• Classical Kahn Envelope Elimination and Restoration (EER)• PA designed to allow high level modulation of voltage supply

to provide (or restore) AM• AM from signal removed by limiter • Video power conditioner converts low level detected AM signal

into high level supply for PA• PA can be saturated and highly efficient• But conditioner consumes power!

Sout(t)PA

DC Supply(modulated)

Video power conditioner

A(t)

Limiter

EnvelopeDetector

Sin(t) S1(t)

DC Supply


• System level, rather than PA level technique• Some linearisation required on high level modulating

signal • Video power conditioner design becomes challenging for

“fast” envelopes (primarily a single channel transmitter technique)

• Dynamic range of power control problematic for high dynamic range envelopes (e.g. 20dB or greater)

• Phase of PA transfer characteristic will vary as supply voltage is modulated; this will introduce AM-PM

• Original Kahn papers show useful improvement using same RF PA devices, comparing linear (Class AB) without EER and Class C with EER


• ”Kahn” method refers specifically to the removal of AM using a limiter

• Kahn method does NOT assume “prior knowledge” of signal• Originally intended for use in SSB shortwave and medium

wave transmitters• Kahn gives no description of the “limiter” design or

configuration.• Clearly, if the AM has a zero-crossing characteristic (even SSB

has this!) the term “limiter” is misleading! (complete AM removal by limiting would leave no signal?!)

• Limiter was a key element in a commercial system, and Khan’s papers were essentially commercial promotions.

• Kahn’s “limiter” was probably an AGC device• Kahn did not invent, and should not be credited with AM

reconstruction using modulation of the PA supply!

Part 3 –6Envelope Synthesis (-1)

• ”Modern” derivative of EER• Amplitude and phase control signals generated directly at

baseband using system DSP• Bandwidth of control signals will typically be much greater

than signal bandwidth• This can cause significant implementation problems for signal

bandwidths in the MHz range due to limitations on DSP and conditioner speeds

PA

DC Supply(modulated)

Power conditioner

A(t)

Φ(t)

DC Supply

System DSP


• Switching power converter• Signal envelope compared with triangular sampling

waveform• Switching MOS power FET supplies high current pulses

into load (PA supply)• LPF removes sampled spectral components• High efficiency (90%) up to 100 kHz sampling rate• Efficiency rolls off at MHz sampling rates• PA supply presents non-linear load


• “DSP” implementation of EER• Pulsewidth modulated digital signal applied to PA supply• System DSP can generate necessary phase and digital

AM modulation functions (e.g. “delta-sigma” )• PA always in high efficiency state• Realisation of output RF filter is a major problem!

Power switch

System DSP

BPF

PA


Remaining issues:

• Dynamic range of PA control

• DSP/converter bandwidth (single carrier limitation at present; commercial GSMEDGE chipset available)

• Power backoff no longer beneficial (!)

• PA drive needs LUT; longevity/adaption issues

• “Envelope tracking” using a quasi-linear PA, rather than envelope synthesis, may be a better variation to pursue (see later section)

Part 3 –10Outphasing (-1)

• AM-PM modulator converts incoming AM into 2 differentially phase modulated signals of constant amplitude (no AM)

• PAs are saturated and adjusted to operate at maximum efficiency at input amplitude level

• Output power combiner “adds” the two outputs and original AM is reconstituted

• A classical “LINC” configuration, but note there is no envelope power management

)cos().(.2)()(

)))((coscos()(;)))((coscos()(

)cos().()(

21

12

11

ttAtStS

tAttStAttS

ttAtS in

ω

ωω

ω

=+

−=+=

=

−−

S t1( )

S t2( )S tin( ) AM-PM

Modulator

G S t S t.( ( )+ ( ))1 2

PA

PA In-phasePower Combiner

VA

VB

(V +V )/2A B1/2

(V -V )/2A B1/2

Part 3-11Outphasing (–2)

• AM-PM”Modern” implementation would use system DSP to generate required drive signals for phase-shifters

• Bandwidth of DACs will be much higher than that required to generate signal in I-Q format

• Note (again), power at low AM modulation points is “wasted”in isolation resistor of combiner

PA

PA

In-phasePower Combiner

φ

−φ

A(t)

Ψ(t)

System DSP


• Outphasing is an inefficient process.• PBO characteristic worse than a simple Class AB amplifier• But if phase modulators are driven by DSP LUTs, a

linearisation function can be included• If digital predistortion technology is applied to an outphasing

system, comparable linearity should be obtainable• Efficiency comparison should be made for appropriate levels of

linearity

-40 -30 -20 -10 0O/P power (rel., dB)

0

50

100


n Outphasing controls can be programmed to use quadraturecombinern This results in grounded “waste” port terminationn This power can be transmitted away from PA locationn “Cool” PA, re-use of energy at remote termination?

PA

PA QuadraturePower Combiner

φ

−φ

Part 3-14Chireix Outphasing (–1)

• Chireix proposed using 2 devices with common load (like Doherty)

• This now has to be analysed as an “active load-pull”situation; when the two outputs have different phases, the load presented to each PA will be “pulled”.

• Each device RF load can be made to adjust dynamically to control power consumption over envelope amplitude range

• Efficiency can be maintained up to 10dB of PBO

|A|

PA

PA

In-phasePower Combiner

φ

−φ


• Impedance “seen” at device 1 is a function of the common load resistor (R) and also the outphasing angle (φ)

• At low φ values, the load resistance is high, but has a substantial reactive component

• Efficiency at any angle φ can be increased by placement of compensation reactance

R

V1 = Vejφ V2 = Ve -jφ

Z1

Z1

Z2

IoV1

= - ( /4)/sin2

XR

C

φ

( /2)/sinR 2φ

Xcomp


• Class “FD” revisited• Once load is high enough to cause rail clipping, current

becomes function of load• Transistor is in effect a voltage source

V in

Matching Network

λ/4scss

50Ω

R

Vgs

Vdss

Vdss

Idc

Vds

Ids R=5Ω

R=5Ω

R=10Ω

R=20Ω

R=50Ω

Ids

Vds


• A “saturated” RF PA device can be approximated to a (near) squarewave voltage source

• RF power can be “controlled” by adjusting the magnitude of the RF load resistor

• Efficiency becomes essentially a function of the “power factor”of the load

• Effect of outphasing is to create an increasing load resistance at each PA device as the outphasing angle (and envelope magnitude) drops

• But outphasing also creates a varying associated reactance

V1

VdcR jX


• Efficiency plots based on a typical overdriven Class FD amplifier (Part 8) having 85% efficiency

• Reactive compensation point can be selected, based on knowledge of AM envelope range and statistics

50%

100%

0%Pmax

-10-20

Power backoff (dB)

Efficiency Xcomp=3RXcomp=5R


• Impedance “seen” by each device (reactance will change sign between devices)

• Modelled as shunt resistance/shunt reactance• Dominant reactive component over most of outphasing range• This does not affect outphasing power control, but reduces

efficiency

R

5R

10R

Resistance

Reactance

Outphased power

-20

-10

0

(dB)

0 30 60 90


• In lower frequency (HF, VHF) applications, balanced PAs are normally used, and baluns can be easily implemented to convert if necessary to an unbalanced co-axial system interface

• The Chireix configuration is not truly balanced, however, and some kinds of balun (notably those which connect the centre point to ground) will not work

• At GHz frequencies, balanced design is rare, and the Chireixcircuit can be reconfigured (as shown, left) as an unbalanced system. This is possible only because of the voltage source approximation for the limiting (Class FD) PA devices

φ φ

φ−−φ

In-phase splitter

Vφ

Vφ

Vφ

Vφ

λ/4 transformer

λ/4 transformer

Balanced Load Unbalanced Load


• A schematic for simulation

• Spice, rather than H/B used (H/B can have convergence problems with reactive loads!)

• Transistors are 3W GaAs MESFETs, used in previous Class AB simulations

λ/4scss

λ/4scss

Vdss VdssR

Vejφ Ve-jφ50Ω

Vgs Vgs


• IT WORKS!• DC supply drops sharply as outphasing angle is

reduced.• 30dB dynamic range seems possible

Outphasing angle ( deg)φ,

90603000

2A

1AIdc

40

20

0

O/P Power (dBm)


• Efficiency backoff (uncompensated) as good as anything else (e.g. Doherty)

• Chireix compensation has much less effect on efficiency than simple theory predicts

• Compensation compromises dynamic range at low end

40302010

P (dBm)out

0

50%

100%

η

X =10c Ω

X =40c Ω

Uncomp.


• PAs can operate at constant envelope, maximum efficiency; a true “LINC” technique

• Power/efficiency management appears to be viable, despite doubts about original analysis

• Phase modulators can be realised using DSP drivers • Obvious candidate for system level and DSP implementation

• Several “traps” for the unwary:

Careful PA design to obtain “voltage source”

Stability issues for reactive loads

AM-PM and other non-linear effects as loads are pulled around

Part 3-25LINC Conclusions

• LINC techniques are back into “mainstream”consideration due to the availability of fast DSP technology

• Design of a suitable power converter for envelope synthesis appears to be very challenging for higher bandwidth signals (WCDMA, multicarrier)

• Chireix outphasing emerges as a more promising technique due to the absence of the power converter issue

• But any LINC implementation will be heavily dependent on DSP for linearisation; this means LINC can only be considered for full system applications where the nature of the RF signal and its modulation are “known”

Part 4 –1

Part 4 Summary

Envelope Tracking Techniques

• Envelope Tracking

• Bias Adaption

• RF switching

Part 4 –2Envelope Tracking (-1)

• Classical Envelope tracking is frequently confused with the Kahn technique

• In an envelope tracking PA, the PA itself will be quasi-linear• The supply voltage is reduced as the amplitude of the signal

reduces; the power supply does not intentionally create any AM on the signal

• In practice this will happen to some extent, and is an additional source of non-linearity in an envelope-tracked PA

RF IN

DC

RF OUT

Pwr. cond


• Envelope tracking can be implemented in two time regimes• “Fast” tracking actually follows the modulation of the signal to

improve efficiency over the AM range of the signal• “Slow” tracking follows the power control requirements which

are imposed by such systems as CDMA

R.F. envelope

Supply tracking options

“Fast” “Slow”


• Ideal Class B PA shows benefits of supply rail tracking• At full output, supply rail is at maximum, η=78.5%• At 6dB backed-off input power, voltage and current swing are

reduced to half of their maximum; η is reduced to 40% • If supply voltage is reduced so that RF voltage swing reaches

zero again, efficiency is restored to 78.5% • This can be repeated for any input drive level

vIN

iD

vDS

Gate voltage

Drain current

Drain voltage

Idc

0


• DC converter efficiency has major impact

• 50% converter plot still shows useful possibilities for high peak/average signal applications

• Use of constant efficiency for DC-DC converter may be somewhat idealised

100

50

0-10dB-20dB Pmax

Efficiency (%)


Class B (untracked)

100% DC-DC conv.

50% DC-DC conv.


• Use of two switched voltage supplies greatly simplifies the DC-DC converter problem

• This approach further differentiates the envelope-tracked approach from the Kahn technique

• Placement of switch point can be optimised for signal environment

• Fixed-ratio DC-DC converters can have very high efficiency (>90%)

100

50

0-10dB-20dB Pmax

Efficiency (%)


VssVss/2Vss/3


• Logical extension is to use multiple switched supply voltages• But various factors start to create a “diminishing returns”

situation• Cost of converters, increased effect of switching transients,

increased complexity of driver and sensing circuitry• Patents (e.g., see Motorola patent on Class H)

100

50

0-10dB-20dB Pmax

Efficiency (%)


Part 4 –8Envelope Tracking (-7, Conclusions)

• Envelope tracking, as an efficiency enhancement technique, is a concept which in principle is as good, or better than, any of the RF techniques

• It has one major practical roadblock to widespread implementation, the DC power converter

• Designing a power converter which is fast enough to track “broadband” (WCDMA, multicarrier) signals appears to be a formidable challenge which has not been achieved to date

• There is a further issue, which is the additional sources of non-linearity caused by the tracking supply voltage

• “Slow” tracking, to improve efficiency under CDMA power control, is a much more realistic and achievable technique for mobiles, and has already seen commercial implementation

Part 4 –9Bias Adaption (-1, Introduction)

• Envelope tracking is in itself a form of bias adaption, but is difficult to implement

• Other possibilities exist for bias adaption in PAs, focussed mainly on input, rather than output, supply bias

• The quiescent bias of a FET PA can be made to vary according to input signal amplitude, giving some efficiency benefits over fixed bias operation

• Bias adaption can also be used for improving linearity; these will be covered in another section (15)

Part 4 –10Bias Adaption (-2)

• Class A bias shows poor efficiency over 12dB backoff range (left); 50%, 12.5%, 3%

• Adaption of bias point to keep “zero-grazing” current improves efficiency (50%,25%,12.5%)

• This can have additional benefits for linearity (gain expansion)

vIN

iD

vDS

Gate voltage

Drain current

Drain voltage

Idc

adaption

Part 4 –11RF Switching (-1)

• PA output stage can be switched out, using RFIC or PIN switches

• Quite suitable for RFIC environment, where switches can be integrated (although chip size increases)

• Has been commercially implemented for “slow” tracking requirements in CDMA systems

• Much less attractive for HPA and/or fast tracking applications; high power switches difficult to implement, and switching transient effects cause “difficult” additional non-linear effects

Part 4 –12Conclusions

• Efficiency is not just a talk-time issue!• Escalating power requirements and heat dissipation below

30%• Critical “gate” can be perceived at around 20%• The doctrine that higher efficiency will always be required may

not be unimpeachable….e.g. if batteries improve!

0 20 40 60 80 100

Efficiency

Heat dissipationfor 10W R.F. o/p

100W

50W

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High Efficiency PA Techniques - University of South Floridawami.eng.usf.edu/Conferences/WAMICON/2005/Electronic-Materials/... · High Efficiency PA Techniques For Modern Wireless