Embed Size (px)
Citation preview
G R AV I M E T R I C D E T E R M I N AT I O N O F T H E P O R O S I T Y O FP O R O U S S I L I C O N
matthew schubert
Bachelor of Electrical/Electronic Engineering
October 2010
L E T T E R T O T H E D E A N
Matthew Schubert17 Moran Close
Bull Creek, WA, 6149Australia
October 2010
The DeanFaculty of Engineering Computing and MathematicsThe University of Western Australia35 Stirling HighwayCrawley, WA, 6009Australia
Dear Sir,I submit to you this dissertation entitled Gravimetric Determi-
nation of the Porosity of Porous Silicon in partial fulfillment of therequirement of the award of Bachelor of Engineering.
Yours Faithfully,
Matthew Schubert
iii
A B S T R A C T
The aim of this project was to build a device to determine theporosity of porous silicon.
Porosity is one of the key properties affecting the optical, me-chanical, thermal, chemical and electrical characteristics of poroussilicon. Various fabrication parameters determine the porosity ofa porous silicon layer. In order to develop relationships betweenmaterial characteristics, fabrication parameters and porosity, it isessential to be able to accurately determine porosity.
Optical, acoustic and gravimetric porosity measurement tech-niques were investigated. The author decided that gravimetrictesting was the most appropriate method due to its accuracy,directness, cost effectiveness and simplicity.
Two methods of mass measurement were considered - loadcells and force compensation balances. Due their high accuracy, itwas decided that magnetic force compensation balances offeredthe ideal solution to the project problem.
A prototype magnetic force compensation balance was devel-oped to determine changes in mass due to the porosity of asample.
The development of this balance required the design, fabrica-tion and testing of a number of components, including a lownoise power supply, a solenoid, an ultra accurate position sen-sor, a solenoid driver, a high dynamic range analogue to digitalconverter and digital to analog converter and a system controller.
Whilst initial testing did not indicate full compliance withthe design specifications, the project showns a lot of promiseand introduces a number of novel ideas into the field of massmeasurement.
v
A C K N O W L E D G M E N T S
My thesis project has been quite a challenge. Naturally, it wouldn’thave been completed without help and support from others.
Firstly, I’d like to thank Professor Adrian Keating, my super-visor. His constant enthusiasm, knowledgable suggestions, andwillingness to entertain the various wild ideas that I had all keptthis project progressing smoothly.
The Microelectronics Research Group provided much appre-ciated feedback on my project during their weekly meetings, aswell as appropriate financial assistance. Thank you.
I enjoyed the good times that were had in room G.55, my sharedlaboratory. Thanks goes out to everyone that kept me company,provided a laugh or participated in the various shenanigans goingon.
Finally, to my girlfriend, family and friends - thanks for thesupport, encouragement and understanding offered throughoutmy project.
vii
C O N T E N T S
i introduction 11 background knowledge 3
1.1 Porous Silicon . . . . . . . . . . . . . . . . . . . . . . 31.2 Porosity . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 project overview 52.1 Aim . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . 52.3 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 52.4 Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ii prior research 73 porosity measurement techniques 9
3.1 Measurement Directness . . . . . . . . . . . . . . . . 93.1.1 Effective Medium Approximations . . . . . . 9
3.2 Optical Techniques . . . . . . . . . . . . . . . . . . . 103.3 Acoustic Techniques . . . . . . . . . . . . . . . . . . 143.4 Gravimetric Techniques . . . . . . . . . . . . . . . . 16
4 mass measurement techniques 174.1 Load Cells . . . . . . . . . . . . . . . . . . . . . . . . 174.2 Force Compensation Balances . . . . . . . . . . . . . 18
iii design 235 proposed solution 25
5.1 Porosity Measurement Technique . . . . . . . . . . . 255.2 Mass Measurement Technique . . . . . . . . . . . . 25
5.2.1 Accuracy Calculation . . . . . . . . . . . . . . 265.3 Commercial Offerings . . . . . . . . . . . . . . . . . 275.4 Additional Requirements . . . . . . . . . . . . . . . 27
6 solenoid 296.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 296.2 Solution Overview . . . . . . . . . . . . . . . . . . . 29
6.2.1 Solenoid . . . . . . . . . . . . . . . . . . . . . 296.2.2 Ferromagnetic Object . . . . . . . . . . . . . . 306.2.3 Weight Offset Magnet . . . . . . . . . . . . . 30
6.3 Simulation . . . . . . . . . . . . . . . . . . . . . . . . 306.4 Prototyping . . . . . . . . . . . . . . . . . . . . . . . 336.5 Final Design . . . . . . . . . . . . . . . . . . . . . . . 33
7 power supply 357.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 357.2 Solution Overview . . . . . . . . . . . . . . . . . . . 357.3 Cell Choice . . . . . . . . . . . . . . . . . . . . . . . . 367.4 Charging . . . . . . . . . . . . . . . . . . . . . . . . . 36
ix
7.5 Power Distribution . . . . . . . . . . . . . . . . . . . 367.6 Voltage Regulation . . . . . . . . . . . . . . . . . . . 37
8 data converters 398.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 398.2 Solution Overview . . . . . . . . . . . . . . . . . . . 398.3 Power Supply . . . . . . . . . . . . . . . . . . . . . . 408.4 Antialiasing . . . . . . . . . . . . . . . . . . . . . . . 418.5 Digital Signals . . . . . . . . . . . . . . . . . . . . . . 428.6 Configuration . . . . . . . . . . . . . . . . . . . . . . 43
9 position sensor 459.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 459.2 Solution Overview . . . . . . . . . . . . . . . . . . . 459.3 Differential Photodetector . . . . . . . . . . . . . . . 46
9.3.1 Photodiodes . . . . . . . . . . . . . . . . . . . 469.3.2 Transimpedance Amplifiers . . . . . . . . . . 47
9.4 Light Source . . . . . . . . . . . . . . . . . . . . . . . 489.4.1 Point Light Source . . . . . . . . . . . . . . . 489.4.2 Collimating Lens Assembly . . . . . . . . . . 489.4.3 Adjustable Current LED Driver . . . . . . . . 49
10 solenoid driver 5110.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 5110.2 Solution Overview . . . . . . . . . . . . . . . . . . . 5110.3 Differential Current Amplifier . . . . . . . . . . . . . 52
10.3.1 Circuit Analysis . . . . . . . . . . . . . . . . . 5210.3.2 Implementation . . . . . . . . . . . . . . . . . 53
10.4 Power Opamp . . . . . . . . . . . . . . . . . . . . . . 5410.4.1 Thermal Considerations . . . . . . . . . . . . 55
10.5 Simulation . . . . . . . . . . . . . . . . . . . . . . . . 5511 system controller 57
11.1 Requirements . . . . . . . . . . . . . . . . . . . . . . 5711.2 Solution Overview . . . . . . . . . . . . . . . . . . . 5711.3 Microcontroller . . . . . . . . . . . . . . . . . . . . . 5711.4 Programming . . . . . . . . . . . . . . . . . . . . . . 58
11.4.1 Hardware . . . . . . . . . . . . . . . . . . . . 5811.4.2 Software . . . . . . . . . . . . . . . . . . . . . 58
11.5 Communication . . . . . . . . . . . . . . . . . . . . . 5911.6 Control Loop . . . . . . . . . . . . . . . . . . . . . . 60
iv fabrication 6312 electronic assemblies 65
12.1 Printed Circuit Boards . . . . . . . . . . . . . . . . . 6512.2 Stripboard . . . . . . . . . . . . . . . . . . . . . . . . 6612.3 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . 6612.4 Wiring and Connectors . . . . . . . . . . . . . . . . . 6612.5 Heatsinking . . . . . . . . . . . . . . . . . . . . . . . 6712.6 Mounting . . . . . . . . . . . . . . . . . . . . . . . . . 68
13 mechanical assemblies 69
x
13.1 Prototype Frame . . . . . . . . . . . . . . . . . . . . 6913.2 Pinhole Aperture . . . . . . . . . . . . . . . . . . . . 70
v testing, results and analysis 7114 power supplies 73
14.1 Voltage Regulation . . . . . . . . . . . . . . . . . . . 7314.2 Supply Rails . . . . . . . . . . . . . . . . . . . . . . . 7314.3 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 7414.4 Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
15 data converter 7715.1 Analogue to Digital Converter . . . . . . . . . . . . 77
15.1.1 Functionality and Range . . . . . . . . . . . . 7715.1.2 Drift and Noise . . . . . . . . . . . . . . . . . 77
15.2 Digital to Analogue Converter . . . . . . . . . . . . 7816 position sensor 81
16.1 Light Source . . . . . . . . . . . . . . . . . . . . . . . 8116.1.1 Beam Consistency . . . . . . . . . . . . . . . 8116.1.2 Adjustability . . . . . . . . . . . . . . . . . . . 82
16.2 Differential Photodetector . . . . . . . . . . . . . . . 8216.2.1 Functionality . . . . . . . . . . . . . . . . . . 8216.2.2 Drift and Noise . . . . . . . . . . . . . . . . . 83
17 solenoid driver 8517.1 Functionality . . . . . . . . . . . . . . . . . . . . . . . 8517.2 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
18 system controller 8718.1 Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
19 project logistics 8919.1 Time Constraints . . . . . . . . . . . . . . . . . . . . 8919.2 Cost Analysis . . . . . . . . . . . . . . . . . . . . . . 8919.3 Technology Constraints . . . . . . . . . . . . . . . . 90
vi conclusion 9120 recommendations 93
20.1 Design . . . . . . . . . . . . . . . . . . . . . . . . . . 9320.1.1 Thorough Noise Analysis . . . . . . . . . . . 9320.1.2 Current Sensor Design . . . . . . . . . . . . . 93
20.2 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . 9320.3 Mechanical Work . . . . . . . . . . . . . . . . . . . . 94
20.3.1 Mechanical Isolation . . . . . . . . . . . . . . 9420.3.2 Weight Coupling . . . . . . . . . . . . . . . . 94
20.4 Programming . . . . . . . . . . . . . . . . . . . . . . 9421 conclusion 97
21.1 Summary of Project Results . . . . . . . . . . . . . . 9721.1.1 Solenoid . . . . . . . . . . . . . . . . . . . . . 9721.1.2 Power Supply . . . . . . . . . . . . . . . . . . 9721.1.3 Data Converters . . . . . . . . . . . . . . . . . 9721.1.4 Position Sensor . . . . . . . . . . . . . . . . . 98
xi
21.1.5 Solenoid Driver . . . . . . . . . . . . . . . . . 9821.1.6 System Controller . . . . . . . . . . . . . . . . 98
21.2 Final Thoughts . . . . . . . . . . . . . . . . . . . . . 98
bibliography 99
vii appendices 105a design 107
a.1 Solenoid Calculation Spreadsheet . . . . . . . . . . . 107a.2 Simulation Automation Script . . . . . . . . . . . . . 107a.3 Prototype Solenoid Spindle Technical Drawings . . 109a.4 Antialiasing Filter Design Screenshots . . . . . . . . 110a.5 Data Converter Schematics . . . . . . . . . . . . . . 112
a.5.1 Master Schematic . . . . . . . . . . . . . . . . 112a.5.2 Converters Schematic . . . . . . . . . . . . . 113a.5.3 Antialiasing Schematic . . . . . . . . . . . . . 114a.5.4 Power Schematic . . . . . . . . . . . . . . . . 115
a.6 Data Converter PCB Layout . . . . . . . . . . . . . . 116a.7 Data Converter Configuration . . . . . . . . . . . . . 117a.8 Differential Photodetector Schematics . . . . . . . . 118a.9 Differential Photodetector PCB Layout . . . . . . . . 119a.10 Solenoid Driver Schematics . . . . . . . . . . . . . . 120a.11 Solenoid Driver PCB Layout . . . . . . . . . . . . . . 121a.12 Main Microcontroller Code Routine . . . . . . . . . 121
b fabrication 131b.1 Position Sensor Images . . . . . . . . . . . . . . . . . 131b.2 Data Converter Images . . . . . . . . . . . . . . . . . 133b.3 Solenoid Driver Images . . . . . . . . . . . . . . . . 134b.4 Power Supply Images . . . . . . . . . . . . . . . . . 135
xii
Part I
I N T R O D U C T I O N
1B A C K G R O U N D K N O W L E D G E
1.1 porous silicon
Porous silicon is silicon with pores introduced into its microstruc-ture. It is a versatile material that can be fabricated with specificoptical, mechanical, thermal, chemical and electrical characteris-tics. Because of this, porous silicon shows promise as a materialfor use in biological, optical, chemical and electronic applications.In the past twenty years, porous silicon has been heavily charac-terised in an effort to better understand the fabrication processand the cause of its various material characteristics.
Typically, porous silicon is formed in layers on the surface of asilicon substrate. This is done by dissolution of the material inan electrochemical cell. The silicon itself is used as the anode, anoble metal as the cathode and a solution of hydrogen fluoride(HF) as the electrolyte. By controlling various parameters, suchas cell potential, HF concentration, silicon doping, anode-cathodedistance, cell temperature and dissolution time, porous siliconlayers with a particular thickness, porosity, pore size and poreshape can be made.
1.2 porosity
Porosity is defined as the average ratio between the volume ofpores and the volume of remaining material in a porous substance.It must be measured over an appropriately sized volume, so thatlocalised inhomogeneities in the porous structure do not affectthe results.
3
2P R O J E C T O V E RV I E W
2.1 aim
The overall aim of this project was to design and build a devicethat could measure the porosity of porous silicon layers. Thedevice was required to have the following characteristics:
cheap : The total cost of materials used to build the deviceshould be less than $500 AUD. Running and maintenancecosts should be minimal.
simple: The device should be easy to build and repair. An un-dergraduate with only basic background knowledge shouldbe able to use it.
timely : Measurements should only take a few seconds.
accurate: Porosity measurements should be accurate to within1%. Each measurement should be fully repeatable, andenvironmental factors should not affect the measurement.
2.2 motivation
Porous silicon is currently undergoing heavy characterisation.Much of the interest in porous silicon is due to the fact that it canbe fabricated with specific material characteristics. The electrical,optical, chemical, and mechanical characteristics of the materialcan all be modified by changing parameters of the fabricationprocess.
The porosity of a porous silicon layer is one of the key prop-erties that can be related to both the material characteristicsand fabrication parameters. As one would expect, a low poros-ity results in the material behaving primarily like bulk silicon.Conversely, a high porosity results in the material adopting thecharacteristics of whatever substance fills its pores.
To develop models that relate porosity to fabrication parame-ters and material characteristics, it is important that porosity canbe accurately and easily determined.
2.3 timing
This project was worked on over the course of two semesters,from the beginning of March to the end of October. The initial
5
6 project overview
project timeline, as outlined is the project proposal, can be seenin Figure 1.
Figure 1.: A Gantt chart of the project schedule.
2.4 safety
Throughout the project, safety was a primary concern. The authorwas constantly vigilent, ensuring that any risks were mitigatedor avoided altogether. Hazards that were present throughout theproject work were:
chemical: A variety of hazardous chemicals were used duringthe project. These included sodium hydroxide and ammo-nium persulphate for printed circuit board manufacture,and methanol, ethanol and acetone for their solvent prop-erties. Chemicals were handled with care, always usinggloves and safety glasses. Flammable solvents were keptwell away from sources of ignition. Any spills were imme-diately cleaned up.
equipment: The hazardous tools used during the project in-cluded soldering irons, high speed drills and sharp blades.Personal protective equipment was always worn duringtheir use.
electrical: Despite only dealing with low voltages, many ofthe power supplies used throughout the project had highcurrent capacity. Care was taken to avoid short circuits andother faults that may have resulted in burns or a fire.
Part II
P R I O R R E S E A R C H
3P O R O S I T Y M E A S U R E M E N T T E C H N I Q U E S
3.1 measurement directness
Scientific measurements are often grouped into two categories -direct and indirect. If a parameter is measured directly, and themeasurement process requires no assumptions, it is known asa direct measurement. Conversely, an indirect measurement isone that is taken by measuring a parameter that is influenced bythe parameter to be determined. The measured parameter andthe parameter to be determined are related through a calibratedmodel and/or various assumptions.
Realistically, all measurements require assumptions to be made.Rather than two strictly defined categories, measurements can bethought of as more or less direct. Typically, the more indirect ameasurement is, and the more assumptions that need to be madeto obtain it, the more inaccurate a measurement will be.
Three broad categories of techniques to measure the porosityof porous silicon are documented in the literature:
• Optical
• Acoustic
• Gravimetric
Of the three, gravimetric techniques are the most direct, relyingonly on the assumption that the density of the silicon beingmeasured is constant and homogenous. Optical techniques relyon models to estimate porosity from the refractive index of theporous silicon. Similarly, acoustic techniques rely on models toestimate the porosity from the acoustic impedance of the poroussilicon. The models used in the optical and acoustic techniquesare known as effective medium approximations.
3.1.1 Effective Medium Approximations
Effective medium approximations are models that relate themacroscopic properties of mixtures to their constituents’ prop-erties and relative fractions. They can be developed from firstprinciples, so long as the microscopic mixture morphology isknown [1].
Porous silicon can be considered to be a mixture of silicon, andwhatever material fills its pores. Because of this, effective mediumapproximations can be used to relate macroscopic properties of
9
10 porosity measurement techniques
porous silicon to its porosity. Various effective medium approx-imations exist that are appropriate to apply to porous silicon,including those developed by Bruggeman [2], Maxwell-Garnett[3], Lazarouk [4] and Looyenga [5]. Of all of them, the Brugge-man effective medium approximation is the most commonly used[6, 7, 8, 9, 10]. However, the approximation does not always holdand is dependent on specific pore morphologies [11, 9].
3.2 optical techniques
On a microscopic scale, porous silicon contains many localisedvariations in pore shape and size. However, as the wavelength oflight used to test porous silicon is very much longer than the av-erage pore size, porous silicon can be considered a homogeneousmaterial from an optical perspective [9]. The optical properties ofa sample can reveal information about its microscopic structurethrough the use of effective medium approximations.
Figure 2.: The interaction of incident light with a porous silicon layer[12].
Most optical techniques rely on the measurement of how inci-dent light waves interact with the porous silicon layer. Figure 2shows how light is reflected and transmitted at the interfacesbetween the air, porous silicon and silicon substrate. The trans-mission and reflection of light at each interface is characterisedby the Fresnel equations, which rely on the refractive indices ofeach material and the angle of the incident light.
Using the Fresnel equations and considering how light propa-gates through each layer, it is possible to determine the phase andamplitude of the light wave at any point in its path. By summingthe wavefunctions of the light exiting the sample, a relationshipbetween the incident, reflected and transmitted light intensitiescan be found. This relationship involves the angle and wave-length of the incident light as well as the thickness and refractiveindex of each component of the optical system. The model can
3.2 optical techniques 11
be extended to include other attributes, namely the polarisationof the light. These optical
measurementtechniques havevarious names,includinginterferencespectroscopy,spectroscopicellipsometry and thinfilm interferometry.
This interference model forms the basis of how refractive indexand layer thickness is determined using optical techniques. Alarge dataset of measurements of reflected/transmitted lightintensity vs. incident angle, wavelength and intensity is built. Byfitting the data to the interference model, unknown parameterscan be calculated. Some techniques only allow for the calculationof optical thickness, which is the product of the refractive indexand thickness of a layer. To determine the refractive index, ameans of measuring the layer thickness must be employed.
Once the refractive index of the porous silicon layer has beenfound, all that is needed is to apply a suitable effective mediumapproximation to determine porosity. Which effective mediumapproximation is used is dependent on the assumptions thatare made about the pore morphology and doping of the poroussilicon layer.
An overview of the literature on optical techniques to deter-mine the porosity of porous silicon can be seen below, in Table 1.
author technique
Lee et al.[13]
The porous silicon layer under investigation hada Gaussian profile, as it was created photochemi-cally. Using a stylus profilometer, the parametersof the profile were measured.
Numerous measurements were taken of theradii of concentric rings of light, created by alaser beam reflected off the layer. The layer wassubmerged in fluids with differing refractivitiesfor each measurement.
A model relating porosity, the refractive indexof the fluid that the layer was submersed in, theconcentric ring radii, and the parameters of thelayer’s Gaussian profile was created. The modelused the Brugemann effective medium approxi-mation.
The model was fitted to the data to determineporosity.
12 porosity measurement techniques
author technique
Khardaniet al. [11]
The refractive index of a layer was measured intwo different ways:
• By determining optical thickness and layerthickness, then calculating a refractive index.The optical thickness was calculated from in-terference fringes present in a Fourier Trans-form Infrared Spectroscopy (FTIR) scan. Thelayer thickness was estimated gravimetri-cally.
• Using the Goodman method [12], whichapproximates the refractive index from theratio of the minimum and maximum re-flectance or transmittance taken from a spec-troscopic scan.
Porosity was calculated from the refractive in-dex using the Brugemann effective medium ap-proximation.
Petterssonet al. [14]
A gradiated porous silicon layer was mod-elled as a stack of individual, constant porositylayers. Each discreet layer was modelled usingthe Bruggeman effective medium approximation,with porosity and layer thickness as parameters.The model predicted spectroscopic ellipsometryresults.
Measurements were taken from a porous siliconlayer using a spectroscopic ellipsometer.
Using an optimisation technique, the modelwas fitted to the data. The result was a parameterset estimating porosity at various depths.
vonBehrenet al. [7]
The optical thickness of the layer was determinedfrom the Fabry Pérot interference fringes presentin the layer transmission spectrum.
The physical thickness of the layer was mea-sured by cleaving the sample and putting it undera microscope.
Using the optical thickness and layer thickness,the refractive index was calculated.
Porosity was calculated from the refractive in-dex using the Brugemann effective medium ap-proximation.
3.2 optical techniques 13
author technique
Foss et al.[8]
An infrared laser and detector were set up tomeasure reflectivity off the back side of a siliconwafer during pore growth.
A model relating layer thickness, porosity,porosity gradient, refractive index of the elec-trolyte and changing interference effects was cre-ated. The model used the Brugemann effectivemedium approximation.
Porosity was calculated using the model andthe frequency components of the changing reflec-tivity off the back side of the silicon wafer.
Pickeringet al. [15]
Both the real and complex parts of the refractiveindex of a porous silicon layer were determinedusing spectroscopic ellipsometery.
Porosity was calculated using an effectivemedium approximation. The effective mediumapproximation that was used was not mentioned.
Lazarouket al. [4]
A map of optical thickness vs. colour of theporous silicon layer was created.
Additionally, an effective medium approxima-tion was developed, taking the porosity and re-fractive index of the fluid the layer is submergedin as parameters.
Colour measurements in two fluids (air andwater) allowed the porosity to be calculated.
Table 1.: A summary of optical porosity measurement techniques in theliterature.
The literature provides an insight into the advantages anddisadvantages of optical porosity measurement techniques. Dis-advantages include:
• Most optical techniques require expensive equipment.
• The resulting measurements are not particularly accurate.
• Porosity is determined indirectly, requiring numerous as-sumptions.
Advantages include:
• Porosity can be measured in-situ during fabrication.
• Optical techniques are generally non destructive.
14 porosity measurement techniques
3.3 acoustic techniques
Acoustic techniques work similarly to optical techniques, in thatthey use effective medium approximations to estimate porosity.Typically, the parameter that is measured is either the charac-teristic acoustic impedance of the porous silicon layer or thelongitudinal sound wave velocity through the porous siliconlayer.
(a) Experimental setup (b) Timing of reflections
Figure 3.: The experimental setup and results of an experiment to deter-mine the longitudinal sound wave velocity in porous silicon[16].
The speed of sound in porous silicon is slow enough (2000 -8000 m · s−1) that, rather than using interference measurementtechniques, time of flight measurements are used. A typical ex-perimental setup is shown in Figure 3a. Figure 3b shows a plot ofthe time varying sound intensity at the transducer after injectinga pulse of sound into the silicon. Each peak corresponds to areflection off an interface.
As the speed of sound in bulk silicon is well known (8433 m ·s−1), it is a simple matter to calculate the thickness of the siliconsubstrate from the time between returned pulses. The thicknessof the porous silicon layer can then be calculated by taking thedifference between the (previously measured) thickness of thesample and the acoustically measured substrate thickness. Withthe thickness of the porous silicon layer, and the propagationtime of sound through the porous silicon layer both known, thelongitudinal wave velocity in the porous silicon can be calculated.
In a manner similar to optical porosity measurement tech-niques, porosity is determined by applying a suitable effectivemedium approximation.
An overview of acoustic porosity techniques in the literaturecan be found in Table 2.
3.3 acoustic techniques 15
author technique
Fonsecaet al. [16]
The timing of longitudinal wave reflections wasmeasured using a single transducer on the backside of a silicon wafer holding a porous siliconlayer. Three reflections were measured.
A relationship between the reflection times andlongitudinal wave velocity was determined.
A model relating wave velocity to porosity wasused to calculate porosity.
Aliev et al.[17]
Measurements were taken of the transmissiontime of sound waves through a silicon wafer hold-ing a porous silicon layer. Two transducers wereused, one on each side of the wafer.
The depth of the porous silicon layer was mea-sured physically under an optical microscope.
By analysing the potential transmission pathsfor the sound waves and using measurementsof the time taken for the sound to pass throughthe silicon wafer, the wave velocity in the poroussilicon layer was determined.
Porosity was calculated from the resulting wavevelocity using the same model as Fonseca et al.[16].
Boumaizaet al. [18]
No details were given on the experimental setup.Porosity was calculated from acoustic longitu-
dinal impedance, using a model developed fromexperimental data.
Table 2.: A summary of acoustic porosity measurement techniques inthe literature.
The literature on acoustic porosity measurement techniquesoutlines many of the same advantages and disadvantages as theliterature on optical techniques. Both can be used in-situ duringfabrication and both techniques are non-destructive. Both sharethe shortcomings of requiring expensive equipment, relying onnumerous assumptions and being inaccurate. Acoustic measure-ment techniques have one further disadvantage, however - theinability to analyse thin layers of porous silicon.
Due to the difficulties associated with the creation and trans-mission of high frequency sound, acoustic techniques are limitedto using ultrasonic sound waves at frequencies of around 1 GHz.At this frequency, the wavelength of sound in porous silicon isaround 5 μm. Consequently, porous silicon layers must be rela-
16 porosity measurement techniques
tively thick (thicker than a half wavelength [18]) to be analysedusing acoustic methods.
3.4 gravimetric techniques
Gravimetric measurements are the most direct method of deter-mining the porosity of porous silicon. The literature uses gravi-metric measurements as a baseline to which other techniques arecompared [16, 7, 11, 8, 15, 4, 19, 20].
Up to three mass measurements are taken to determine theporosity of a porous silicon layer (P). Mass measurements of thesilicon wafer are taken:
• Before the porous silicon layer is fabricated (m1)
• After the porous silicon layer has been fabricated (m2)
• After the porous silicon layer has been stripped off (m3)
If a non-destructive technique is required, a measurement of thevolume of the porous silicon layer (V) can be used along with thedensity of silicon (ρ = 2330 kg · m−3) instead of the third massmeasurement.
The porosity of the porous silicon layer is calculated by:
P =m1 − m2
m1 − m3=
m1 − m2
Vρ(3.1)
This technique is so well developed and understood that thereis little available literature dedicated to porosity measurementusing gravimetric techniques.
4M A S S M E A S U R E M E N T T E C H N I Q U E S
Most devices designed to measure the mass of an object actuallymeasure the weight force exerted on the object by gravity. Due tothe constant and well understood nature of gravity, it is a simplematter to extract a mass measurement from the measured force.
Elementary physics tells us that F = mg, where F is the weightforce, m is the mass of the object, and g is the gravitational acceler-ation. The gravitational acceleration is nominally 9.81 m · s-2, andessentially constant for a given position on the earth’s surface.Hence, we see that the weight force is directly proportional to themass being measured.
Of course, force can be measured in a variety of ways. Twoof the most common force measurement devices, load cells andforce compensation balances, are considered here.
4.1 load cells
Load cells determine force by measuring the elastic deformationof a structure upon which the force is imparted. They exploitHooke’s law - that within particular limits of a material, stressand strain are proportional. By using appropriate materials anddesigning a suitable deformation component, it is possible todesign load cells sensitive to particular weight ranges. Resistivestrain gauges are typically the component of choice for measuringthe deformation of the load cell structure.
����������
����������� �����������
Figure 4.: A side view of a parallel beam load cell using strain gaugesto measure deformation.
Figure 4 shows a parallel beam load cell, one of the morecommon load cell designs in use. When a force is exerted in avertical direction on the free (right) end, the beam flexes at fourpivot points. These pivot points are the points where the loadcell material is thinnest due to the strategically made cutouts. Aseach pivot point is nominally identical, they each bend the sameamount, keeping the fixed (left) end and free (right) end parallel.
17
18 mass measurement techniques
Resistive strain gauges are positioned at the pivot points. Achange in strain at the pivot point results in a minute changein the strain gauge’s resistance. By configuring two gauges ina half Wheatstone bridge or four gauges in a full Wheatstonebridge, slight differences in the resistance of each gauge resultin measurable voltage changes across the bridge. A calibrationis performed, linking the voltage across the bridge to the forceapplied to the load cell. Using this calibration, it is possible todetermine an unknown force by measuring the voltage across thebridge.
The general literature on force measurement techniques pro-vides enough information about load cell characteristics that theauthor did not feel it necessary to do an in-depth review. Thegeneral literature outlines the following disadvantages of loadcells:
• Load cells are typically only medium precision devices[21, 22, 23, 24]. High precision load cells can been manufac-tured [25], but the processes involved are complex and thematerials used are exotic and expensive.
• The dynamic range of load cells is limited. Even high endload cells have dynamic ranges of only 300 000 or so [26].This is due to limited elasticity in load cell materials.
• Load cell measurements are typically unstable. Environ-mental conditions, such as temperature and humidity affectmeasurement results.
Advantages of load cells include:
• Load cells are simple, and cheap to manufacture.
4.2 force compensation balances
Force compensation balances work on a principle of equilibrium.The force being measured is coupled to an object. A preciselycontrolled reactive force is exerted on the object in the oppositedirection to the force being measured, bringing the balance backinto equilibrium. Force compensation balances exploit Newton’sthird law - that action and reaction forces are always equal andopposite. By knowing the magnitude of the reactive force, wealso know the magnitude of the force to be measured. Modernbalances usually use solenoids to exert a controllable reactiveforce on a ferromagnetic object.
A system overview of a magnetic force compensation balanceis shown in Figure 5. The force to be measured is coupled to aferromagnetic object. A position sensor detects any displacementof the ferromagnetic object from an equilibrium point. If displace-ment is detected in the direction of the force to be measured, a
4.2 force compensation balances 19
������������ ������
�� ���
��� ��������
����������
������ �� ���
��������
�� ����
���� ��� ���
Figure 5.: A magnetic force compensation balance.
controller increases the current through a solenoid which impartsa reactive force on the ferromagnetic object, pulling it back tothe equilibrium point. Conversely, if a displacement is detectedin the opposite direction to the force being measured, the con-troller decreases the current through the solenoid, allowing theferromagnetic object to be pulled back to equilibrium by the forcebeing measured.
At equilibrium, the reactive force imparted by the solenoid isequal in magnitude and opposite in direction to the force beingmeasured. There exists a proportional relationship between thisreactive force, the strength of the magnetic field produced by thesolenoid and the current through the solenoid. A current sensorin series with the solenoid allows this current to be measured.Through a calibration process, measurements from the currentsensor can be linked back to the magnitude of the reaction force,and ultimately the force being measured.
An overview of the literature on force compensation measure-ment techniques is shown in Table 3.
20 mass measurement techniques
author technique
Anufrievet al. [27]
The position of a freely suspended permanentmagnet was monitored using a differential pho-todetector.
The output of the differential photodetectorwas used in an analogue PID loop to control thecurrent through a solenoid, compensating for aweight force coupled to the free suspended mag-net.
The current through a second solenoid was con-trolled by a digital controller connected to a 12-bitDAC. This second solenoid was used to compen-sate for the weight force of the magnet itself, andthe measuring pan attached to it.
The current through the first solenoid was mea-sured using a current sensor and a 12-bit ADC.This current, along with the set current of theother solenoid was used to calculate the weightforce applied to the balance.
Hussienet al.[28, 29]
A balance beam was levitated using permanentmagnets and an active control system to stabilisethe beam along the direction of its pivot axis.
One end of the beam held a mass measurementpan, the other a permanent magnet.
An unspecified digital control system was usedto set the current through a voice coil below thepermanent magnet on the end of the balancebeam, and compensate for any weight force onthe mass measurement pan.
No current sensor was used. The set point ofthe current through the voice coil was used todetermine the weight force acting on the balance.
Codina[30]
A ferromagnetic, hemispherical sample pan wasfreely levitated by a solenoid located above it.
The current through the solenoid was con-trolled by an analogue controller.
Position input for the controller was obtainedusing a modulated, planar light source and dif-ferential photosensors.
No method of calculating weight force wasspecified, although a measurement of currentthrough the solenoid or the magnetic field in-tensity was suggested.
4.2 force compensation balances 21
author technique
Beams[31]
A force was imparted on a ferromagnetic objectby a solenoid, causing it to levitate in free space.
The position of the suspended ferromagneticobject was determined by measuring the intensityof a light beam reflected off the object.
Current through the solenoid was controlled byan unspecified controller that took the position ofthe ferromagnetic object as input.
The weight force was determined by calculatingthe magnetic field induced by the solenoid, andmeasuring the offset of the ferromagnetic objectfrom the solenoid.
Gast [32] A weight force was coupled to a freely suspendedpermanent magnet.
The suspension of the magnet was achieved bymonitoring the position of the permanent magnetusing a differential photodetector, and modifyingthe current through a solenoid above it to keep itat an equilibrium position.
A secondary method of position sensing wassuggested — inductance sensing, which utilisesthe change in inductance of a sensor coil as anearby ferromagnetic body is moved.
No mention was made of how the weight forceof the object being measured was determined.
Table 3.: A summary of load cell force measurement techniques in theliterature.
The literature provides an insight into the advantages anddisadvantages of force compensation balances, and specificallymagnetic force compensation balances. Disadvantages include:
• Force compensation systems are complex, requiring numer-ous sensors, a controller and an accurate force transducer.
Advantages include:
• Force compensation balances are ultra accurate [21, 33, 22,23, 24].
• The dynamic range of magnetic force compensation mea-surement techniques is exceptionally high.
• The measurements obtained from force compensation bal-ances are stable. Environmental factors such as temperatureand humidity do not affect measurements.
Part III
D E S I G N
5P R O P O S E D S O L U T I O N
5.1 porosity measurement technique
After performing the research outlined in Chapter 3, the authordecided that gravimetric techniques of determining porosity bestfulfilled the original project aim. The reasons behind this decisionwere:
• Gravimetric techniques are potentially the cheapest, onlyrequiring a suitably accurate mass measurement device.Acoustic and optical techniques both use expensive equip-ment such as network analysers, ultra high frequency piezo-electric transducers and precision positioning tables.
• Besides being expensive, much of the equipment needed toperform acoustic and optical measurements is difficult touse and the resulting data difficult to analyse. Gravimetrictechniques only require the operator to be able to makethree mass measurements.
• Taking three mass measurements and performing a simplecalculation on them to get porosity results is relativelyquick. The acoustic and optical techniques of measuringporosity likely take longer due to equipment setup and dataprocessing times.
• The most accurate results come from gravimetric poros-ity measurement techniques. Whilst acoustic and opticaltechniques gave porosity figures with uncertainties of 10%or more, gravimetric techniques were able to hit the 1%uncertainty required.
The fact that gravimetric determination of porosity is used as abaseline for comparison of other techniques further lends weightto the decision.
5.2 mass measurement technique
The decision to use a gravimetric technique to determine theporosity of porous silicon led to the investigation into massmeasurement techniques, detailed in Chapter 4. A magnetic forcecompensation balance was deemed to be the most suitable massmeasurement device, due to the following reasons:
25
26 proposed solution
• Magnetic force compensation balances have a large dynamicrange and are highly accurate.
• Environmental changes affect magnetic force compensationbalances less than load cells. They are immune to tempera-ture and humidity changes.
The fact that the most accurate commercially available balancesare all magnetic force compensation balances lends weight to thisdecision.
5.2.1 Accuracy Calculation
One of the first questions that needed answering in the projectwas the required accuracy and dynamic range of the force com-pensation balance. The mass difference corresponding to a 1%porosity difference in a typical porous silicon layer was calculatedand compared to the total mass of the sample. The calculationsassumed the substrate to be a square silicon wafer with a thick-ness (dw) of 300 μm and a side length (l) of 15 mm. The circularporous silicon layer grown on the substrate was assumed have athickness (dps) of 700 nm and a radius (r) of 4 mm. The densityof silicon (ρ) was taken to be 2329 kg · m−3.
The mass of only the porous silicon layer (mps) was calculatedat 0% porosity (bulk silicon):
mps = ρdpsπr2
= (2329.0)(700.0 × 10−9)π(4.0 × 10−3)2
= 8.19 × 10−8 kg
= 81.9 μg (5.1)
Naturally, a 100% porosity porous silicon layer is massless(0 g), consisting only of empty space. Taking the difference andcalculating the expected mass change for a 1% change in porosity(Δmps):
Δmps =mps − 0.0
100= 819 ng (5.2)
For comparison purposes, the mass of the entire silicon wafer(mw) was calculated:
mw = ρdwl2
= (2329.0)(300.0 × 10−6)(15.0 × 10−3)
= 1.57 × 10−4 kg
= 0.157 g (5.3)
5.3 commercial offerings 27
Hence, the required dynamic range for the force compensationbalance is:
mw
Δmps=
0.157819 × 10−9
= 191839 (5.4)
To allow for heavier wafers to be measured and to increasethe margin of error allowed in the design, the author decidedthat the maximum mass to be measured should be 1 g, and thesmallest mass difference to be detected should be 1 μg, extend-ing the dynamic range to 106. This dynamic range translatesto the mass balance requiring a signal to noise (power) ratio of20 log(106/1) = 120 dB when the balance is operating at maxi-mum capacity.
5.3 commercial offerings
Commercial solutions to the project problem do exist. Two com-mercial magnetic force compensation balances that meet therequired accuracy and dynamic range specifications are:
• Sartorius Mechatronic’s SE2 [34]
• Mettler Toledo’s XP2U [35]
These balances both have maximum capacities of 2.1 g and mea-surement repeatabilities of ±0.25 μg. Unfortunately, the cost ofthese balances far exceeds the project budget. Both retail for over$20 000 USD.
5.4 additional requirements
The operation of a magnetic force compensation balance hasalready been detailed in Section 4.2. Before each individual com-ponent of the force compensation system could be designed, afew system level decisions needed to be made. These decisionsand the reasoning behind them were:
• The force compensation balance output was to be digital,to allow for data processing, display and storage of results.
• The system controller was to be digital. This would allowfor more complex control systems to be implemented forthe force compensation loop.
6S O L E N O I D
6.1 requirements
Before the solenoid was designed, the following design criteriawere specified:
• The current vs. force relationship of the solenoid must bemeasurable and predictable.
• The solenoid must be able to offset the weight force of theferromagnetic object and any extra, non-measured massattached to it.
• The power dissipation of the solenoid must be low enoughto allow extended operation.
• Currents and voltages needed to drive the coil must bewithin reasonable limits.
• The inductance of the coil must be kept as low as possibleto allow for rapid changes in current.
6.2 solution overview
6.2.1 Solenoid
The solenoid used in the magnetic force compensation balanceconsisted of multiple layers of enamelled copper windings aroundan air cored plastic spindle. The reasons for chosing an air coredcoil were:
• There is no hysteresis in the magnetisation of an air coredcoil. Cores made of ferromagnetic materials, such as iron, al-ways have some magnetic hysteresis. This hysteresis compli-cates the relationship between current through the solenoidand solenoid magnetisation, making it dependent on thehistory of the magnetic fields in the core. Any hysteresisresults in a solenoid current vs. force relationship that isneither easily measurable nor predictable.
• Air cored coils have a much lower inductance than thosewith high permeability cores.
29
30 solenoid
6.2.2 Ferromagnetic Object
The solenoid imparted a reaction force on a cylindrical, perma-nent, neodymium-iron-boron (NeFeB) magnet.
Because an air cored coil was used, the magnetic field strengthof the solenoid was much lower than a solenoid with a highpermeability core. To ensure that the reaction force impartedby the solenoid would be in a usable range, the ferromagneticobject to which the weight force would be coupled would have tobe strongly permanently magnetised. NeFeB rare-earth magnetsare cheap, readily available, and offer the strongest remanentmagnetisation of any material known.
6.2.3 Weight Offset Magnet
In addition to the weight being measured, a reaction force needsto be provided to counteract the weight of the ferromagneticobject and any extra, non-measured weight attached to it. Forexample, a traditional balance requires the weight of the weighingpan to be compensated for, as well as the weight of the sampleresting on it.
Rather than simply running the solenoid at a higher currentto produce the offset force, the design incorporated a permanentmagnet inserted axially inside the solenoid. The offset force wasmade adjustable by allowing the axial position of the magnet tobe changed.
6.3 simulation
Finite element analysis software was used to simulate potentialsolenoid designs and optimise parameters such as wire thick-ness, layer count, width, height and core material. The softwareused was an open-source package named Finite Element Mag-netic Methods (FEMM), which supports simulation of 2D andaxisymmetric electromagnetic problems.
The problem of a solenoid exerting a force on an axially alignedcylindrical magnetic object is axisymmetric. The simulation wasset up by defining an axial cross-section of each of the interactingregions in the simulation:
• The solenoid
• A free magnet that the weight force is coupled to
• A fixed magnet used to offset the weight of the free magnet
• The surrounding air
6.3 simulation 31
����������� �������������
�����������
���
���
(a) Simulation mesh (b) Flux lines
Figure 6.: The fully meshed simulation setup and resulting flux linesafter analysis.
The plastic of the spindle was not defined, as plastics have mag-netic characteristics almost identical to air. Different mesh densi-ties were set for each region, based on intuitive guesses of howcomplex the resulting magnetic flux lines would be in each. Themeshes for most simulations contained around 30 000 nodes. Ameshed simulation setup can be seen in Figure 6a.
The material specifications for each region were based on thosein the materials library supplied with FEMM. For the solenoidregion, the wire diameter, number of turns and current needed tobe provided. A simple spreadsheet shown in Appendix A.1 wasused to relate and calculate the number of turns, width, height,current, voltage, resistance and power dissipation of the solenoid.The magnets being used were both N45 sintered NeFeB magnets.FEMM’s material library only contained specifications for N40and N52 grade magnets. Specifications common to both, such aselectrical conductivity and relative magnetic permeability wereused to model the N45 magnets. Other specifications, such ascoercitivity, were found in standards defined by Shin-Etsu forneodymium sintered magnets [36].
Rather than set a spatial boundary on the problem, the Kelvintransformation was used to simulate an effectively unbound re-gion [37, 38]. The surface of a bounded sphere containing theproblem regions was mapped onto a second, empty sphere. Thesecond sphere can be thought of as containing the remainder offree space, with the centre being infinity and the surface corre-sponding to the surface of the first sphere. Both spheres can be
32 solenoid
Figure 7.: Simulation results for the final solenoid design used in thisproject.
seen in Figure 6, and it is easy to see that the simulated flux lineswere unaffected by the boundary of the sphere containing theproblem regions.
To calculate the force exerted by the solenoid on the free mag-net, FEMM is able to perform a weighted stress tensor integralover the magnet volume. For each solenoid design, a range ofsimulations were run for different solenoid currents and magnetpositions. As FEMM is able to interface with MATLAB®, thisprocess was automated via a MATLAB® script that can be seenin Appendix A.2.
The resulting dataset could be plotted to analyse whether thesolenoid would provide a reactive force in the appropriate range,how linear its response was and whether the offset magnet wasappropriately placed. Figure 7 shows the simulation results of thefinal solenoid design used in this project. Each line correspondsto a different axial offset from the solenoid, with a negative offsetbeing further away.
It can be seen that the current vs. force relationship is perfectlylinear. The range of the scale from minimum to maximum currentis approximately 19 mN, or 1.94 g of weight force. The fixedweight offset magnet compensates for approximately 16 mN, or1.63 g of weight force at zero current. These figures correspondto the free magnet being perfectly at equilibrium. If it is movedcloser to the solenoid, the current vs. force curve is offset, with aslightly steeper slope. This is due to the increased magnetic fieldintensity closer to the solenoid and weight offset magnet. As onewould assume, the opposite happens as the free magnet is movedaway from equilibrium in the opposite direction to the solenoid.
6.4 prototyping 33
Figure 8.: The fully wound prototype solenoid.
6.4 prototyping
The spindle for one of the potential solenoid designs was pro-fessionally fabricated. Technical drawings for the spindle can befound in Appendix A.3. Figure 8 shows a photo of the prototypeafter it had been hand wound with 5 layers of 0.4 mm copperwire. The prototype specifications were relatively good, with ameasured inductance of 8 mH and power dissipation of 0.4 W atits maximum design current of 0.4 A. The simulated current vs.force relationship was linear and in a similar range to that shownin Figure 7.
Unfortunately, due to a lack of rigour in analysing the mechan-ical aspects of the solenoid, the spindle was particularly difficultto fabricate, and not mechanically sound. After breaking theprototype attempting to remove the weight offset magnet fromcentre of the spindle, the design was abandoned.
6.5 final design
The final design of the solenoid was based largely on the cost andeffort of fabrication. Mechanically wound spindles of enamelledcopper wire are readily available from corner electronics stores.The dimensions of a 25 g spool of 0.4 mm wire from JaycarElectronics were entered into a simulation. The resulting solenoidcharacteristics were excellent.
A photo of the spool of wire used as the final solenoid canbe seen in Figure 9. The spindle was wound with 3 layers of0.4 mm copper wire for a total of 258 turns. The coil inductancewas measured at 4 mH and its resistance at 2.7 Ω. The resulting
34 solenoid
Figure 9.: The spool of wire used as a solenoid in the final design.
power dissipation was 0.7 W at a maximum coil current of 0.5 A.The current vs. force relationship is shown in Figure 7.
The weight offset magnet was cylindrical, 5 mm in diameterand 10mm long. The free magnet was also cylindrical, 6 mm indiameter and 6 mm long. The magnetic dipole of both magnetsran axially.
The final solenoid design met all of the criteria outlined inSection 6.1.
7P O W E R S U P P LY
7.1 requirements
The following requirements were identified for the power supplydesign:
• The power supply must provide low voltage DC. Compo-nents used in instrumentation electronics primarily requirelow voltage DC at a potentials under 6 V to operate.
• The power supply must be noise free, with no ripple. Anyfluctuations in power supply voltage have the potential toaffect all other signals in the system.
• The power supply must have dual supply rails. A dualpower supply offers the flexibility to use components, suchas opamps, that need both positive and negative supplyrails.
• The power supply for components with tight supply voltagetolerances must be regulated to meet component specifica-tions.
7.2 solution overview
Power supply design is one of the more difficult challenges facedwhen designing high accuracy instrumentation. Flawed designshave the potential to introduce noise into the system, as well asdestroy sensitive components.
Rather than attempting to design a noise free, tightly regulated,dual power supply, the author decided that the magnetic forcecompensation balance should be powered by sealed lead acid bat-teries. Connecting two batteries in series would allow low voltagepositive, negative and ground DC potentials to be produced.
Electrochemical cells have the benefit of being an almost en-tirely noise free power source. There is no rectification or switch-ing circuitry to introduce ripple. The one aspect of good powersupply design that they lack is voltage regulation. Electrochem-ical cell voltages sag as they become "flat" and during times ofhigh current draw. Fortunately, there are a large number of lownoise linear voltage regulators on the market that are able toregulate the power supply voltage for sensitive components.
35
36 power supply
7.3 cell choice
A large variety of battery chemistries and cell types exist on themarket today. The author made the decision to use two 6 V sealedlead acid batteries for the following reasons:The batteries
purchased wereDiaMec DM6-12
12 A·h cells,typically used in
emergency lights andride-on toys.
• Lead acid batteries are cheap, and have a relatively highpower density.
• Sealed lead acid batteries are safe, with no hazards relatedto electrolyte spillage or combustible reactions.
• Two 6 V batteries can be charged in series with a single12 V lead acid battery charger.
• Two batteries in series allow both positive and negativesupply rails to be produced.
7.4 charging
Commercial lead acid battery chargers are cheap and readilyavailable. A 12 V, 1 A lead acid battery charger was purchasedto charge the two 6 V cells in series. The charger intelligentlyThe charger used
was manufacturedby Powertech,
category numberMB-3526.
switches between three states - trickle charging to keep batteriestopped up, basic charging to recharge used batteries and standbyfor when no batteries are connected.
For ease of use, a circuit was designed to allow the batterycharger to be connected to, and isolated from the batteries by thesystem controller. This way, the force compensation balance canbe isolated during measurements and reconnected for chargingduring down time.
The circuit consisted of a dual pole relay with its contactsswitching the charger’s connection to the batteries. The relay coilwas driven by a NPN transistor. A resistor connected to the baseof the transistor controlled the voltage at which the transistorwas driven into saturation. The 2.2 kΩ value was chosen so thatthe circuit would switch at standard 3.3 V digital logic levels [39].To protect the NPN transistor from damage by the back EMFpulse generated by the relay switching, a 1N4007 power diodewas connected across the coil [39]. The overall circuit schematiccan be seen in Figure 10.
7.5 power distribution
Power was distributed amongst each component of the forcecompensation balance by using a central terminal block. Carewas taken to ensure that individual components had a uniqueconnection directly back to the terminal block, and no daisychain-ing of power supply rails was occuring. The reasoning behind
7.6 voltage regulation 37
���
��
������ �
��
������� �
����������
�
�������
���
����
�
���������
������
��!��"
����# $�
����
���%
����
Figure 10.: A schematic of the battery power supply and charging cir-cuit.
this was to ensure that the power supply followed a "star" topol-ogy, eliminating the possibility of ground loops and unintendedvoltage differentials due to wire resistance.
The negative and positive supply connections from the ter-minal block to the batteries were connected through a doublepole switch. This allowed the force compensation balance to becompletely turned off while still retaining the ability to chargethe batteries.
7.6 voltage regulation
Numerous components in the force compensation balance hadtight tolerances on the power supply voltages they could handle.To ensure that component specifications were met, the voltage ofparticular supply rails were regulated by low-noise linear voltageregulators.
The voltage regulators of choice were Analogue Device ADP3331[40] adjustable voltage regulators for positive supply voltages,and Linear Technology LT1964 [41] adjustable voltage regulatorsfor negative supply voltages. These regulators have the followingdesirable characteristics:
• A low dropout voltage, meaning that they were able toregulate supply voltages within a few hundred millivoltsof the battery voltage.
• Low output noise, ensuring that the power supply railsremained noise free.
38 power supply
• Precise regulation, resulting in stable power supply voltagesdespite changes in battery voltage.
• Adjustability, meaning that the same component type couldbe used to produce a variety of output voltages.
Regulating circuits were implemented where they were neededon each PCB.
8D ATA C O N V E RT E R S
8.1 requirements
The analogue to digital converter (ADC) and digital to analogueconverter (DAC) design was required to meet the following iden-tified criteria:
• Both converters should meet the 120 dB signal to noise ratiorequirement set out in Section 5.2.1. This dynamic rangecorresponds to the utilisation of at least 20 bits of data foreach conversion.
• Each converter should support conversion rates fast enoughto sustain a control loop able to keep the free magnet at itsequilibrium position.
• The converters should be easy to interface with, both onthe analogue and digital sides.
8.2 solution overview
Fast, cheap and high dynamic range ADCs and DACs are scarce.The author pored over hundreds of parametric search resultsand datasheets attempting to find appropriate devices. Generalpurpose converters that met the required dynamic range spec-ifications were all too slow to be used in a control loop, or tooexpensive to fit in the project budget. A solution to the problemwas found when the author began investigating audio class ADCsand DACs.
It soon became obvious that the specifications of audio ADCsand DACs were better, and the prices lower, than those of generalpurpose converters. This is likely due to the continual push ofconsumers for higher quality and cheaper audio devices. Twodevices were identified that met the design requirements — aTexas Instruments PCM4222 [42] analogue digital converter anda Texas Instruments PCM1974 [43] digital analogue converter.
The PCM4222 is a 24-bit, delta-sigma, 2 channel ADC support-ing conversion rates up to 216 kHz. At its lowest conversion rateof 48 kHz, it has a dynamic range of 121 dB. The dual analogueinputs are both differential voltage inputs requiring signals in a0 V – 2.8 V range.
The PCM1794 is a 24-bit, delta-sigma, 2 channel DAC support-ing conversion rates up to 192 kHz. Even at its fastest conversion
39
40 data converters
rate, it has a dynamic range of 127 dB. It outputs dual differentialcurrent signals ranging from −2.3 mA – −10.1 mA.
Both devices were integrated onto a single, dual-layer printedcircuit board (PCB) dedicated to data conversion. To ensure theADC and DAC met specifications, the circuit design generallyfollowed the reference designs in the datasheets. Full schematicsand the final PCB layout can be found in Appendices A.5 andA.6, respectively.
8.3 power supply
The data conversion PCB design had five separate power supplyrails; one each at 6.3 V (nominal), 5.0 V, 4.0 V, 3.3 V and −6.3 V(nominal). The 5.0 V, 4.0 V and 3.3 V rails were all regulated usingADP3331 voltage regulators. The other two rails were directlyconnected to the system power terminal block, hence the nominalvoltage ratings. Table 4 shows the intended use of each powersupply rail.
voltage (v) supply rail usage
±6.3 Provides power to the opamps used inthe antialiasing filters.
5.0 Powers the analogue circuitry associatedwith the PCM1794 DAC.
4.0 Provides power to the analogue circuitryassociated with the PCM4222 ADC.
3.3 Used to power to the digital circuitry as-sociated with both the DAC and ADC.
Table 4.: The functionality of each power supply rail on the ADC/DACboard.
As well as the five power supply rails, the PCB had two looselycoupled ground planes, one for the analogue circuitry and onefor the digital circuitry. The ground planes covered most of oneside of the PCB, with only a single point of connection betweenthe two. The reason for doing this was to minimise noise andcrosstalk between the digital and analogue signals.
At each point connecting the power supply rails to the data con-version integrated circuits (ICs), two capacitors in parallel wereused to filter noise. One of the two was a large value electrolyticcapacitor, the other was a smaller valued ceramic capacitor. Thisdesign relies on the large value electrolytic capacitor to filter outlarge transients and low frequency noise on the power supplylines. The smaller valued ceramic capacitor compensates for the
8.4 antialiasing 41
electrolytic capacitor’s poor high frequency performance andfilters any high frequency noise on the supply lines.
8.4 antialiasing
To ensure the accuracy of the waveform measured by the ADCand to reduce the noise bandwidth in the system, four low passantialiasing filters were included in the design; one for each ofthe input signals to the ADC. The intention was to run the ADCat its minimum sampling rate of 48 kHz, requiring signals abovethe Nyquist frequency of 48 kHz/2 = 24 kHz to be filtered out.
The type of filter used was a Butterworth filter, chosen becauseof its maximally flat passband. A flat passband eliminates anydistortion of the signal by the filter. The filters were implementedusing a Sallen-Key opamp topology, which can be seen in Fig-ure 11. To keep the part count and cost down, only a secondorder filter was utilised, requiring only a single opamp per filter.The component values of the filter were determined by usingAnalog Devices’ online Analog Filter Wizard™, which can befound at http://designtools.analog.com/dt/filter/filterW.html. Screenshots of the process and resulting filter response canbe found in Appendix A.4.
�
��
�
��
����������
����
����
����
�����������
����
�����������
��
����������
�����
��
��������
���
��
���
��������
� �!��
�"���
Figure 11.: The configuration of a single antialiasing filter.
The opamps used were Analog Devices® AD8599 dual opamps.They were chosen for their low noise characteristics, low inputoffset voltage and dual packaging.
The input-referred voltage noise of the AD8599 is specified as1.1 nV/
√Hz. As the filters are unity gain, this is also the voltage
noise seen at the output of the amplifier. Disregarding 1/f noise,and calculating the RMS value of the noise across the full signalbandwidth of 24 kHz, we obtain a value of 1.1× 10−9
√24 × 103 =
0.17 μV. This corresponds to a signal to noise (power) ratio of20 log(2.8/0.17 × 10−6) = 144 dB when the signal is at a maxi-mum, well above the 120 dB limit outlined in Section 5.2.1.
42 data converters
One dual opamp package was used for each differential signalpair. This was done so that both opamps in the package would ex-perience similar environmental conditions. Any environmentallydependent opamp parameters would be equal in both opamps,and their effects common to both signals. For example, the inputoffset voltage of opamps is temperature dependent. The AD8599datasheet specifies a drift of 0.8 μV/K. By using two opampsin the same package, the temperature difference between thetwo is eliminated, ensuring that the input offset voltage for bothopamps is the same. The identical voltage offsets appear on bothsignals of the differential pair, leaving the ADC measurementunaffected.
8.5 digital signals
The one unfortunate side effects of using audio data convertersis the fact that they use a relatively uncommon digital serialprotocol to transmit and receive data. This protocol is known asInter-IC Sound (I2S — not to be confused with the more commonI2C). The protocol requires a bus with two clock lines and a singleserial data line. The signals on each of these lines is outlined inFigure 12.
LSB
1 2 24 211 2 2423 23
BCK
L-Channel
DATA
R-Channel
1/fSLRCK
MSB
Figure 12.: The digital data on an I2S serial bus. Note, the master, orsystem clock line is not shown in this figure.
Data is clocked in or out of a device on the falling edge of BCK,the bit clock signal. The DATA signal appears on the data linemost significant bit first, in two’s complement form. LRCLK isthe left-right, or word select clock. When it is low, the serial datarepresents the left channel, when it is high it represents the right.the left-right clock changes on a falling edge of the bit clock, anddata for the chosen channel begins to be clocked out one full bitclock cycle later.
Often, a third clock, the master or system clock is required.This clock signal is used to run the delta-sigma modulator anddigital filters on the data converter IC.
8.6 configuration 43
8.6 configuration
Each of the data conversion ICs supported a variety of differentserial protocols, sampling rates and filter modes. Configurationoptions for the data converters needed to be set by specifying thedigital level of the configuration input pins on the ICs.
Many of the configuration options were permanently set byconnecting the input pins directly to ground or the digital powersupply. The author thought it a good idea to leave some config-uration options configurable. The design allowed configurationoptions to be set by adding or removing jumpers from the PCB.
The configuration input pins on each data converter were con-nected to ground through a pulldown resistor, making themdigitally low by default. Connecting a jumper across two headerpins on the PCB would pull the input high. The tables in Ap-pendix A.7 outline the options that can be configured by addingor removing jumpers from the PCB.
9P O S I T I O N S E N S O R
9.1 requirements
The following design criteria were identified for the positionsensor:
• The ratio of the full range of the position sensor to the min-imum detectable position change should meet the 120 dBdynamic range requirement set out in Section 5.2.1.
• The position sensor should be robust against noise, move-ment of the object in directions other than the measuredone and minor misalignments.
• The full range of the position sensor should be around2 mm to allow for easy alignment and setup.
• The output of the position sensor should be compatiblewith the 0 V to 2.8 V differential inputs of the analogue todigital converter outlined in Chapter 8.
9.2 solution overview
The displacement of the free magnet from the equilibrium pointwas measured by shining a collimated beam of light past the mag-net and onto two photodetectors. Figure 13 shows an overview ofthe setup. The shadow the magnet casts determines the relativeamounts of light shining on each photodetector. As the magnetmoves up in the vertical direction, it allows more light to hit thebottom photodetector and less to light to hit the top. The oppositeoccurs as the magnet moves down.
The equilibrium position of the magnet is defined as the posi-tion that equalises the amount of incident light on each photode-tector.
This style of position sensor has a number of benefits:
• Minor misalignments do not affect the accuracy of the sen-sor.
• The components required to build the position sensor arecheap and readily available.
• The sensor is only sensitive to movements in one axis. Move-ments of the magnet along the other two axes do not impactthe result.
45
46 position sensor
������������� �
���������������
�������� ����
Figure 13.: A side view of a differential photodetector position sensingsystem.
• As the output is fully differential, noise that is common toboth photodetection circuits is eliminated.
9.3 differential photodetector
The differential photodetector was designed to be fabricated on asingle printed circuit board. Two PIN photodiodes were used asthe photo sensitive elements. The current signals from the photo-diodes were run through independent low noise transimpedanceamplifiers, resulting in a measurable voltage signals.
The photodiodes were spaced on the PCB so that their bottom(and top) edges were 6 mm apart. This spacing ensured thephotodiodes would go from being fully shaded to fully lit whenmeasuring the full range of positions of the 6 mm high freemagnet. Additionally, it ensured the resulting signal would befully differential; i.e. a change in position would cause a changein both signals simultaneously, never just one.
Power was supplied to all electronic components on the PCBvia an ADP3331 voltage regulator configured to output 4 V. Nonegative supply rail was needed.
Full schematics and the resulting PCB layout can be found inAppendices A.8 and A.9 respectively.
9.3.1 Photodiodes
The photodiodes used were Osram Semiconductors BPW34S[44] devices. The full range of measurable positions was set bythe edge length of the photodiode’s 2.65 mm × 2.65 mm activesensing area.
Initial testing showed the photodiode produced a photocurrentof 5 μA under standard laboratory lighting (≈ 500 lux). Theassumption was made that the collimated light source would be
9.3 differential photodetector 47
���
���
�
�
�
� ��
�
��������
����
��
����
�������� ���
�����
Figure 14.: A schematic of an opamp transimpedance amplifier.
several times brighter, at ≈ 2000 lux. At this light intensity, thephotocurrent was predicted be around 20 μA.
The photodiodes were left unbiased to reduce noise and darkcurrent [45].
9.3.2 Transimpedance Amplifiers
The transimpedance amplifier circuit consisted of a low noiseopamp in a transimpedance configuration [46, 45], which can beseen in Figure 14.
The opamp used was a Maxim MAX4475 device, specificallychosen for its ultra low noise characteristics. The device specifi-cations indicate a typical input-referred current noise density of0.5 fA/
√Hz and a voltage noise density of 4.5 nV/
√Hz. Disre-
garding 1/f noise and assuming these values are constant acrossthe whole 24 kHz bandwidth of the control loop, the RMS valuesof the input-referred noise are 0.5 × 10−15
√24 × 103 = 77.5 fA
for current noise and 4.5× 10−9√
24 × 103 = 0.697 μV for voltagenoise.
In a transimpedance configuration, current input noise is am-plified along with the input current signal, and voltage inputnoise appears unchanged at the output. With an expected currentsignal amplitude of 20 μA, the current signal to noise (power) ra-tio was calculated to be 20 log(20 × 10−6/77.5 × 10−15) = 168 dBat maximum output, well above what was required. The ampli-fier output voltage signal range is 2.8 V, meaning the expectedvoltage signal to noise ratio is 20 log(2.8/0.697 × 10−6) = 132 dBat maximum output, also above the required 120 dB.
A potentiometer was placed in the negative feedback loop ofthe opamp to allow for gain adjustment. To utilise the full 2.8 Vrange of the ADC, the transimpedance needed to be at least2.8 V/20 μA= 0.14 V/μA = 140 kΩ. A 200 kΩ potentiometerwas used to allow for some leeway.
48 position sensor
9.4 light source
The light source was designed to output a bright, well collimated,homogeneous intensity beam. This ensured that the shadow castby the free magnet onto the photodetectors was sharp and welldefined.
The use of a laser was eliminated early on in the design processdue to the spatial coherence of the beam. Spatially coherentbeams cause speckle patterns and diffraction fringes at the edgesof shadows.
Instead, the author decided that a high powered LED coveredby a pinhole aperture would make an appropriate point lightsource. The light output that was produced was collimated intoa beam through a simple, adjustable lens assembly. The LED waspowered by an adjustable current source to allow the intensity ofthe light beam to be modulated.
9.4.1 Point Light Source
The light source used was an Osram Semiconductors LRW5SN[47] high intensity, red (at 632 nm) LED. Ideally, the wavelength ofthe LED used in the point light source should have been matchedto the wavelength that the photodiode is most sensitive to, 850 nm.However, the difficulties of working with, and focusing infraredlight outweighed the benefits of greater sensitivity.
A pinhole aperature was placed over the LED die to create apoint light source. In a comprimise between light intensity andpoint size, an aperture diameter of 300 μm was chosen. This sizealso corresponded to the smallest drill bit size available to theauthor.
Due to the power dissipation of the LED, a heatsink was re-quired to keep it cool. This heatsink took the form of a large massof aluminium incorporated into the adjustable lens assembly.
9.4.2 Collimating Lens Assembly
The point light source was collimated with a single convex glasslens. The lens was selected from an assortment on hand, andmeasured to have a focal length of approximately 30 mm and adiameter of 20 mm.
An assembly consisting of a tubular, plastic, threaded lensmount and corresponding aluminium, threaded LED mountwas designed. A drawing of the design can be seen in ??? Thethreaded mounts enabled the point light source to be movedalong the optical axis. This allowed the point light source to bepositioned precisely at the lens focal point.
9.4 light source 49
�������
�
�
���
�
�
�
�
�
�
�
��������
��
��
���
�� �
�
���
����
�
���
������ �
�!"�
���
���
����
Figure 15.: A schematic of the adjustable current LED driver.
9.4.3 Adjustable Current LED Driver
To power the LED, an adjustable current source was developed.The source was designed to take an input voltage from 0 V – 3.3 Vfrom the system controller, and output a current from 0 mA –700 mA through the LED. To help balance the amount of currentdrawn from the positive and negative power supply rails, theauthor decided to power the LED off the negative rail.
The circuit consisted of an LM741 opamp configured as aninverting amplifier. The opamp drove the base of a TIP32C powerbipolar junction transistor to increase the current capabilitiesof the amplifier. By choosing appropriate input and feedback Due to the high
currents controlledby the TIP32Ctransistor, the designcalled for a heatsinkto be thermallyattached to thedevice.
resistors, the gain of the amplifier was set to output a voltagerange of 0 V – −0.7 V for an input of 0 V – 3.3 V. The outputpotential of the amplifier was dropped across a 1 Ω shunt resistor,resulting in a current of 0 mA – 700 mA flowing through theresistor, the transistor and then the LED. A schematic of thecircuit can be seen in Figure 15.
The functionality of the driver was verified using a SPICEsimulation, which can be seen in Figure 16. The graph shows alinear relationship between the input voltage and output current,at an appropriate transconductance.
50 position sensor
0.000 1.000 2.000 3.000
Input Voltage (V)
Out
put C
urre
nt (
A)
0.000m
100.0m
200.0m
300.0m
400.0m
500.0m
600.0m
700.0m
800.0m
LED Current Driver Output
Figure 16.: A graph of the SPICE simulation results comparing inputvoltage to LED current.
10S O L E N O I D D R I V E R
10.1 requirements
The solenoid driver design was required to meet the followingcriteria:
• The output current range of the solenoid driver must coverthe entire design range of the solenoid — from −0.5 A to0.5 A.
• The inputs to the solenoid driver should be compatiblewith the outputs of the DAC; i.e. differential current inputsranging from −2.3 mA to −10.1 mA. The option to use dualdifferential inputs in mono mode should be available.
• The signal to noise ratio of the solenoid driver at maxi-mum current output should be greater than the 120 dBrequirement set out in Section 5.2.1.
10.2 solution overview
The PCM1794 digital analogue converter (DAC) datasheet [43]contains a recommended circuit design to handle the DAC’s dif-ferential current outputs and convert them into a usable voltageoutput. The design involves connecting each output to an opampconfigured as a transimpedance amplifier, and then the outputof each transimpedance amplifier to an opamp configured as adifferential amplifier.
In an attempt to reduce the part count, cost and complexity ofthe aforementioned circuit, the author designed a unique opampconfiguration that would take a differential current signal asinput, and output a single-ended current signal. Two of thesedifferential current amplifiers were present in the design, withtheir output currents being summed together at a common node.This enabled the design to hande the dual differential inputsfrom the PCM1974 in mono mode.
To drive the coil, the design incorporated a low-noise poweropamp in a transimpedance configuration. The input to thisopamp was the summed current signal just mentioned.
Full schematics and the final printed circuit board (PCB) layoutcan be seen in Appendices A.10 and A.11, respectively.
51
52 solenoid driver
10.3 differential current amplifier
10.3.1 Circuit Analysis
The unique opamp configuration used to find the differencebetween two current inputs is shown in Figure 17. As far as theauthor is aware, this configuration has not been documented inany literature.
��
��
��
���
�
���
�
���
���
��
�����
��
��
��
��
����
��
��
Figure 17.: A schematic showing the differential current amplifier con-figuration.
To analyse the circuit, we first specify a few variables. LetI+ and I− be the non-inverting and inverting current inputs,respectively. V+ is the voltage at the non-inverting opamp inputand V− is the voltage at the inverting opamp input. Let Vout
be the voltage at the output of the opamp. R1 and R2 are theresistances of R1 and R2, respectively. Ia and Ib are the currentsflowing through R1 and R2, respectively. Finally, RL represents aload resistor, with RL being its resistance and Io being the currentrunning through it (and also the final output of the amplifier).
We know that opamp inputs are high impedance, and essen-tially zero current flows into them. Hence, I− flows entirelythrough R1, so Ia = I−. We can then calculate Vout:
Vout = V− − R1 Ia
= V− − R1 I− (10.1)
10.3 differential current amplifier 53
So long as there is negative feedback, the opamp will attemptto eliminate any voltage difference across its inputs. So, V+ = V−.Knowing this, we can calculate Ib:
Ib =Vout − V+
R2
=Vout − V−
R2(10.2)
Finally, we find Io by summing together I+ and Ib, and substi-tuting in Equation 10.1 and Equation 10.2:
Io = I+ + Ib
= I+ +Vout − V−
R2
= I+ +V− − R1 I− − V−
R2
= I+ − R1
R2I− (10.3)
Assuming we choose the same resistances for R1 and R2, Equa-tion 10.3 becomes Io = I+ − I−, as expected.
10.3.2 Implementation
MAX4475 opamps, the same devices used in the differentialphotodetector design described in Section 9.3, were used in thedifferential current amplifier stage of the solenoid driver design.Once again, they were chosen for their ultra low noise character-istics.
The negative current outputs specified in the PCM1794 datasheetindicate that the direction of current flow is from the PCM1794toward the load; i.e. 2.3 mA to 10.1 mA flows in the directionaway from the PCM1794. Because of this, the output voltage ofthe opamps used in the differential current amplifier stage mustalways be negative. To accomodate the negative output voltage,the opamps must be provided with a dual power supply.
In the differential current configuration, the input-referred volt-age noise of the opamp simply appears at the output unamplified,in the same manner as the transimpedance configuration men-tioned in Section 9.3.2. To minimise the effect of this voltage noise,and any external noise, the voltage swing of the opamp’s outputwas made as large as possible.
To accomodate a large output voltage swing in addition to asolely negative output voltage, the power supply voltages for theMAX4475 were made unbalanced. The minimum positive supplyvoltage that could be used was limited by the maximum com-mon mode voltage supported by the MAX4475. The MAX4475
54 solenoid driver
datasheet specifies a maximum common mode voltage as 1.7 Vbelow the positive rail voltage. Both opamp inputs are kept atground potential, resulting in a common mode voltage of 0 V.Hence, the minimum positive supply voltage that could be usedwas 1.7 V. A margin of error was added to this, and a 2 V positivesupply rail was used. The minimum negative supply voltage wasonly limited by the supply voltage range of the MAX4475, whichthe datasheet specifies as 5.5 V. Once again, a small error factorwas taken into account, and a −3.4 V negative supply rail wasused. Both supply rails were regulated, with the positive railusing an ADP3331 device and the negative rail using an LT1964device.
The resulting opamp output voltage swing was limited bythe current supplying/sinking capabilities of the MAX4475. Athigh output currents, the MAX4475 isn’t able to output rail-to-rail voltages. With the inverting current input at 10.1 mA, theMAX4475 is required to sink 20.2 mA of current. Extrapolatingfrom a graph in the datasheet, this limits the output to a minimumof 0.3 V above the negative supply rail, a voltage of −3.1 V. Thelargest feedback resistor value that would keep the output abovethis value, with some leeway, was 270 Ω. The resulting opampoutput range was −0.62 V to −2.73 V.
10.4 power opamp
The summed current outputs of the two differential current am-plifiers was fed into a Texas Instruments™ OPA564 [48] low noisepower opamp, configured as a transimpedance amplifier. Thevoltage output of this amplifier was connected directly to theforce compensation solenoid described in Chapter 6.
The transimpedance of the amplifier was set to 270 Ω = 0.27 V/mAto create a large output voltage swing. The reasoning behindthis design choice was to increase the resulting signal to noiseratio of the output and enable more rapid changes in currentthrough the inductive solenoid. If needed, an appropriate powerresistor could be used in series to limit the steady state currentthrough the solenoid. The designed output voltage range wasfrom 4.2 V to −4.2 V, corresponding to dual differential currentsof 2(10.1 − 2.3) mA = 15.6 mA.
The noise bandwidth of the system was limited by placing acapacitor in parallel with the feedback resistor, creating a low passcurrent filter. The 3 dB cutoff frequency of this filter was designedto be the full control loop bandwidth of 24 kHz, requiring a 20 nFcapacitor.
10.5 simulation 55
10.4.1 Thermal Considerations
The OPA564 datasheet [48] has stringent requirements outlinedin regards to the thermal design of the PCB holding the com-ponent. Rather than providing a heatsink pad on the top of thecomponent, Texas Instruments opted to place one on the bottom.The heatsink pad is designed to be soldered directly to the PCB,and a large copper area used to dissipate heat.
The intention was to manufacture the PCBs in the laboratoryand hand solder the components onto the boards. Soldering theheatsink pad to the PCB would not be possible by hand. Toprovide the OPA564 with the necessary heatsinking, the authordecided to have a large copper pad directly below the opampin the PCB layout. Hand soldered vias of copper wire wouldthermally connect this pad to the opposite side of the PCB, whichwould consist of a solid copper plane. The OPA564 would bethermally bonded to the copper pad by using adhesive thermaltape. The option of adding a heatsink to the opposite side of thePCB was also available.
Current limiting was implemented in the solenoid driver de-sign to further protect the OPA564. By connecting a 27 kΩ resistorbetween the current limit pin on the OPA564 and the negativesupply rail, the output of the OPA564 was effectively limited to750 mA [48].
10.5 simulation
The entire circuit design was simulated using SPICE, to verify itsfunctionality as well as investigate the output bandwidth withthe inductive solenoid attached. SPICE models of the variousopamps used were found on the manufacturers’ websites. Thecurrent inputs were specified using voltage controlled currentsources, allowing all four current inputs (dual differential inputs)to be simulated at once. Results of the simulation can be seen inFigure 18
Figure 18a verifies the functionality of the differential currentamplifier configuration, as well as the transimpedance poweropamp. The x-axis of the plot represents the full range of dualdifferential inputs, from full negative to full positive. It can beseen that the output current of the solenoid varies linearly withthe changing input.
Figure 18b shows the magnitude of the solenoid current withrespect to the frequency of the input signal. It can be seen that the4 mH inductance of the solenoid enforces a drastic bandwidthlimit on the current output. The 3 dB cutoff frequency is 345 Hz,marked by the cursor in the figure. Further rolloff can be seen at
56 solenoid driver
-1.000 -0.500 0.000 0.500 1.000
Input (Arbitrary)
Out
put C
urre
nt (A
)
-500.0m
-400.0m
-300.0m
-200.0m
-100.00m
0.000m
100.0m
200.0m
300.0m
400.0m
500.0m Solenoid Current
Solenoid Current for Full Input Range
(a) Solenoid current for various inputs
1.000 10.00 100.0 1.000k 10.00k 100.0kFrequency (Hz)
Cur
rent
Out
put (
dB)
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.000
10.00 Solenoid Current
Cursor A = (345.85 , -2.9943 A)
Solenoid Current Bandwidth
(b) Solenoid current bandwidth
Figure 18.: The results of a SPICE simulation of the solenoid driver.
around 24 kHz due to the filter capacitor placed in the feedbackloop of the OPA564.
11S Y S T E M C O N T R O L L E R
11.1 requirements
The system controller was required to meet the following critera:
• The controller must be able to interface with all of thedigital devices used in the force compensation balance.
• Programming the controller should be simple and possibleusing only open-source tools.
• The controller must be fast enough to implement a controlloop able to keep the free magnet at its equilibrium position.
• Extracting data and measurements from the controller shouldbe simple and straightforward.
11.2 solution overview
Commercially available hardware was used in the controllerdesign. An off-the-shelf microcontroller breakout board and asuitable programmer were purchased to allow a digital controlloop to be implemented.
Communication of data and the setting of control loop parame-ters was done over a Universal Serial Bus (USB) connection to themicrocontroller. Interfacing with the analogue digital converter(ADC) and digital analogue converter (DAC) was done using thedirect memory access (DMA) features of the microcontroller.
The control loop design consisted of a simple proportional-derivative (PD) controller, implemented in software on the micro-processor.
11.3 microcontroller
The microcontroller development board used as the system con-troller was an NGX Technologies Blueboard-LPC1768-H (Blue-board). The Blueboard is a budget breakout board for NXP Semi-conductors’ LPC1768 Cortex M3 ARM microprocessor. An imageof the breakout board can be seen in Figure 19. The microproces-sor has a large number of desirable features:
• Native support for the Inter-IC Sound (I2S) audio protocol
• Maximum clock speed of 100 MHz
57
58 system controller
• 32-bit architechture
• Programmable using open-source programming tools
Figure 19.: The Blueboard-LPC1768-H development board connectedto an FT2232H Mini-Module.
11.4 programming
11.4.1 Hardware
To program the Blueboard and debug software written on it, aJoint Test Action Group (JTAG) adaptor was required. The authorchose to use an FTDI FT2232H Mini-Module (Mini-Module), aUSB to Universal Asynchronous Receiver Transmitter (UART)converter that happens to support JTAG. The reason for thiswas due to the lower cost and greater functionality of the Mini-Module in comparison to dedicated JTAG adaptors. The Mini-Module can be seen connected to the Blueboard in Figure 19.
11.4.2 Software
All programming was done using open-source tools and librariesin an effort to reduce costs and leverage the open-source commu-nity’s knowledge and support. The tools used were:
gnu compiler collection: CodeSourcery™ provides bina-ries for a GNU Compiler Collection (GCC) toolchain thatallows cross-compilation of software for ARM target hard-ware. This toolchain includes a full assembler, compiler,linker and debugger.
open on-chip debugger: The Open On-Chip Debugger pro-vides an interface to flash program code to various micro-controllers, as well as a debugging interface that can operate
11.5 communication 59
with the GNU debugger mentioned above. It fully supportsFT2232H based JTAG adaptors.
eclipse : The Eclipse integrated development environment (IDE)provides a graphical user interface to the programmer, al-lowing for programming, compiling, flashing and debug-ging to occur from within a single user interface. Threeplugins for Eclipse were used — Eclipse CDT and ZylinEmbedded CDT for embedded C support, and GNU ARMto enable building through CodeSourcery’s GCC toolchain.
The libraries used were:
cmsis: The Cortex Microcontroller Software Interface Standard(CMSIS) is a collection of code that provides a standardinterface to the Cortex family of microcontrollers. It enableslow level access to all on board peripherals.
lpcusb : Code Red Technologies™ provides source code for theirmodified version of LPCUSB, a USB stack that allows theLPC series of microcontroller to act as a variety of standardUSB peripherals. Code Red’s source code has been specifi-cally modified to operate with the LPC1768 microprocessor.
11.5 communication
As mentioned in Section 8.5, the ADC and DAC use the I2S serialprotocol for communication. Fortunately, the LPC1768 micropro-cessor supports the I2S protocol natively, and allows up to twoI2S streams to be transmitted/received concurrently.
To avoid wasting clock cycles polling the ADC and DAC fordata, communication between the Blueboard and the data con-verters was implemented using DMA. DMA allows the micro-controller to transmit and receive data between peripherals andmemory without having to execute instructions to do so. Once aDMA channel is set up, the data continues to flow even with theprocessor just idling.
The code that was written to initialise the DMA channelsbetween the microcontroller and the ADC/DAC board is shownin Appendix A.12, as it is too long to present here. Comments inthe code detail the exact process required to communicate withthe data converters.
To output data to an attached computer, the LPCUSB librarywas used to implement a USB virtual COM port. When pluggedinto a computer, the Blueboard would emulate a standard se-rial port. Communication was done through a simple terminalprogram.
60 system controller
11.6 control loop
The control loop implemented on the microcontroller was a sim-ple proportional-derivative controller. The prudent part of thecode implementing the control loop is shown in Listing 11.1.
1 uint64_t lastTickCount = systemTickCount;
2 int32_t avgL, avgR, error, lastError;
3 int64_t sumL, sumR;
4 while (serial_getchar() != 13)
5 {
6 // Calculate ADC value
7 sumL = 0;
8 sumR = 0;
9 for (i = 0; i < RX_BUFFER_SIZE; i += 2)
10 {
11 sumL += (I2SRXBuffer[i] >> 8);
12 sumR += (I2SRXBuffer[i + 1] >> 8);
13 }
14 avgL = sumL / (RX_BUFFER_SIZE / 2);
15 avgR = sumR / (RX_BUFFER_SIZE / 2);
16
17 // Find error
18 error = 0 - avgL;
19
20 // Set DAC output
21 int32_t outvalue = MAX(MIN((int32_t)(propCoeff * (
double)error + derCoeff * (double)(error -
lastError) * 1000000.0 / (double)(systemTickCount
- lastTickCount)), 4000000), -4000000) << 8;
22 I2STXBuffer[0] = outvalue;
23 I2STXBuffer[1] = outvalue;
24
25 lastError = error;
26 lastTickCount = systemTickCount;
27 }�
Listing 11.1: The control loop C code.
Lines 7 – 15 find the average value of each channel in thereceive buffer. Using the value for the left channel, line 18 cal-culates the error in the position of the free magnet. Line 21 isan expression that calculates the output value of the controllerby summing two terms — the error value multiplied by the pro-portional coefficient, and the derivative of the error multipliedby a derivative coefficient. The output is limited to the range[−4 000 000, 4 000 000] and pushed into the transmit buffer onlines 22 and 23.
The speed of this control loop is dictated by the processingspeed of the microcontroller. The loop runs as fast as possible
11.6 control loop 61
— the resulting update rate is completely independent of thesampling rate of the data converters.
Part IV
FA B R I C AT I O N
12E L E C T R O N I C A S S E M B L I E S
All electronic assemblies that required fabrication were manu-factured by the author. Simple circuits were implemented onstripboard, but the project required a single sided printed cir-cuit board (PCB) for the photodetector and two double sidedPCBs for the solenoid driver and data converters. Each board wasmounted on a sheet of medium density fibreboard (MDF) andwired up using appropriate connectors. Components that wereexpected to output large amounts of heat were appropriatelyheatsinked. A full gallery of the fabricated electronics can be seenin Appendix B.1 to Appendix B.4.
12.1 printed circuit boards
PCBs were fabricated by using a photoengraving technique. Holesand vias were drilled manually. The fabrication process is out-lined below:
1. The PCB design was printed on a standard overhead trans-parency with a high resolution printer. This printed trans-parencies was used as a photomask. As a positive pho-toresist was used, the sections of the board destined to becopper were printed in black, leaving the remainder clear.Care was taken to ensure the design was correctly mirroredso the overhead transparency could be placed printed sidedown on the PCB.
2. A copper clad board coated in positive photoresist was cutto size and taken into a darkened room.
3. The photomask was placed on the unexposed board, takingcare to align the top and bottom layers for the double sidedboards.
4. The board and photomask were placed in an ultravioletlight box, and exposed for 80 seconds.
5. After the exposure was complete, the photomask was re-moved from the board. The board was developed in a solu-tion of 15 g/L sodium hydroxide. This board was agitatedin the solution for about 30 seconds to complete this pro-cess.
65
66 electronic assemblies
6. The board was etched in a tank of 200 g/L ammoniumpersulphate solution, at a temperature of around 60 ◦C.This process took around half an hour.
7. The fully etched board was removed from the etching tank,rinsed in water and then dried. The remaining photoresistwas removed with acetone.
8. Holes for the through-hole components and vias weredrilled using a high speed pnuematic drill and titaniumnitride coated drill bits.
12.2 stripboard
The battery charging control circuit, power supply terminal blockand LED current supply were all manufactured on stripboardrather than designing and fabricating dedicated PCBs. All compo-nents used in these circuits were through-hole, making it simpleto place components in an appropriate layout, check the circuitmatched the schematics, solder the components down and cutany traces that needed cutting.
12.3 soldering
Population and soldering of all components onto the PCBs wasdone by hand, under a binocular microscope. The large majorityof components were surface mount, requiring a fine tipped solder-ing iron, tweezers, soldering wick, plenty of flux and thin solder.Figure 20 shows an example of the surface mount soldering doneby the author. The component in view is the PCM4222 analogueto digital converter, which has a pin pitch of only 0.5 mm.
Component pins with a large pitch were soldered individually.Those with a small pitch were soldered by flooding each edgeof the component with solder, ensuring good connectivity to theboard and not worrying about bridged pins. Excess solder wasremoved using solder wick, eliminating the bridges between thepins.
12.4 wiring and connectors
Connectors and cables needed to be made to supply power tocomponents, carry analogue signals and provide a digital busfor data transmission. Each cable used was manufactured by theauthor, taking the following into account:
• Differential analogue signals were run through twistedpairs to ensure that external electromagnetic interferencewould affect both signals of the pair identically.
12.5 heatsinking 67
Figure 20.: An example of the hand soldering work done by the author.An Australian $2 coin (20.5 mm in diameter) is shown as asize reference.
• Wire gauge was chosen appropriately with considerationinto the current carrying requirements of each cable.
• Bare connections with the ability to source or sink largecurrents were insulated using heatshrink to avoid accidentalshorts.
• Long or loose cabling was trimmed or tied down with cableties to avoid tangles and confusion.
• Cables or connectors were labelled or colour coded to indi-cate what their purpose was.
Figure 21 shows an example of the cables and connectors usedin the system.
12.5 heatsinking
Heatsinks were attached to components expected to dissipate alot of heat. These included power transistors and power opamps.Heatsinks were salvaged from various scrap electronics, cut tosize and mounted to each component using screws and thermaltape or thermal paste.
68 electronic assemblies
Figure 21.: An example of the cabling and mounting work done by theauthor.
12.6 mounting
All manufactured boards were mounted on a sheet of MDF usingstandoffs and screws. This allowed for easier troubleshooting andmechanical stability. An example of the mounting used can beseen in Figure 21.
13M E C H A N I C A L A S S E M B L I E S
13.1 prototype frame
To test the various components of the scale, a prototype framewas built. The frame was fabricated to hold the position sensorlight source and photodetector fixed, while allowing the solenoidand weight offset magnet to be positioned independently of eachother and the position sensor.
The frame was built from medium density fibreboard (MDF).No design was documented, as it was made quickly to allowtesting to proceed. An image of the frame with the componentsmounted on it can be seen in Figure 22.
Figure 22.: The prototype frame built by the author.
Some features of the frame were:
• The entire frame was constructed of nonmetallic materialsto reduce the impact on the magnetic fields produced bythe solenoid.
69
70 mechanical assemblies
• The weight offset magnet could be accurately positioned byusing a screwdriver to turn a positioning bolt.
• The solenoid coils were potted with epoxy to ensure thatthey didn’t move during operation.
• The entire top section easily slides up and down in channelsrouted in the MDF. The position can be locked by tighteninga few bolts.
13.2 pinhole aperture
The light source for the position sensor required a pinhole aper-ture to be fabricated. Various attempts were made at creatingeven, round, pinholes. The author eventually stumbled on aneffective fabrication technique. A thin sheet of aluminium foilwas sandwiched between two sheets of acrylic plastic. A 0.3 mmhole was drilled through the entire sandwich assembly usinga high speed pneumatic drill rotating at around 60 000 RPMand a titanium nitride coated drill bit. By applying pressure tothe sandwich assembly during the drilling process, the resultingpinhole turned out even and circular. An example pinhole can beseen in Figure 23.
Figure 23.: The mechanically drilled pinhole aperture.
Part V
T E S T I N G , R E S U LT S A N D A N A LY S I S
14P O W E R S U P P L I E S
14.1 voltage regulation
The power supply voltage at the output of each of the voltageregulators was measured using a digital multimeter with anaccuracy of ±0.05 V. The measured values are compared to thedesign values in Table 5.
power supplydesign
voltage(v)
measuredvoltage
(v)
Position sensor 4.0 3.96
Digital analogue converter, ana-logue supply
5.0 5.01
Analogue to digital converter,analogue supply
4.0 3.98
Data converters, digital supply 3.3 3.29
Solenoid driver, positive supply 2.0 2.03
Solenoid driver, negative supply −3.4 −3.37
Table 5.: The voltage of the regulated power supply rails throughoutthe system.
It can be seen that the voltage regulation capabilities of both theADP3331 and LT1964 devices were excellent. All voltage errorswere smaller than the accuracy of the measurement device, andwell within allowable limits. In terms of voltage regulation, thepower supply design performed excellently.
14.2 supply rails
The voltages across the terminals of both sealed lead acid bat-teries were measured at various times throughout the testingprocedures, using the same multimeter just mentioned. Thesemeasurements were made with the charger disconnected. Typi-cally a measurement was made both before and after an extendedtest. The maximum and minimum battery voltages measured areoutlined in Table 6.
The battery voltages did not vary excessively during use, andthey stayed within safe limits for the batteries themselves, as well
73
74 power supplies
supply railmaximumvoltage
(v)
minimumvoltage
(v)
Positive 7.39 6.43
Negative −6.60 −7.57
Table 6.: The battery voltage extents
as all of the components they were powering. The positive andnegative rails were fairly evenly balanced. The lower potential ofthe positive rail is likely due to the fact that more componentsdraw more current from the positive rail than the negative rail.
Care must be taken to ensure that the power supply rails do notbecome unbalanced as the batteries age. As the internal resistanceof the batteries increases with use, the positive rail voltage willlikely begin to sag. This could cause problems with charging andwith the components utilising the dual supply rails.
Despite these potential problems in the future, the batteriesoperated as expected, supplying dual rail, low voltage DC to thevarious system components.
14.3 noise
Only cursory noise testing was performed on the system powerrails. An oscilloscope was used to probe the waveform of thesupply voltages. None of the tested supply rails appeared noisyduring regular operation.
No comment can be made on whether the power supply per-forms as intended in regards to noise. Empirical testing is needed.
14.4 issues
The power supply caused a number of issues throughout testing:
• The battery charger would behave unexpectedly when in-dividual batteries were disconnected, producing wild tran-sients on the supply rails and oscillating between chargingstates. Before a master switch was installed in the system,these transients destroyed the two antialiasing opamps onthe data converter board.
• Accidental shorting of the negative supply rail to grounddestroyed the power opamp on the solenoid driver board.
• A large voltage drop occurs on the supply rails when thecharger is disconnected. If this occured during testing, the
14.4 issues 75
system would temporarily behave unexpectedly, with thedata converters resetting or the LED output dimming.
These issues highlight the need to add another design criterionto the list given in Section 7.1 — a requirement to implementprotection into the power supply design. This protection shouldeliminate the possibilty of damage to components due to acciden-tal shorts and large voltage transients.
15D ATA C O N V E RT E R
15.1 analogue to digital converter
15.1.1 Functionality and Range
Before performing any rigorous testing on the analogue to digitalconverter (ADC), it was important to establish that the data con-verter board did indeed work. At the same time, it was importantto determine the maximum and minimum values of the digitaloutput of the ADC.
The system controller was set up to put ADC results into a16 sample buffer at a rate of 97.65625 kHz. A software routinewas created to output the first value in the buffer to the serialconsole continuously, and as fast as possible. A 2.8 V potentialwas applied to one of the differential input lines, with the otherinput line grounded. The resulting digital output was recorded,then the input voltages switched and the digital output recordedagain.
The digital output changed along with the changing analogueinput, indicating the ADC worked. This digital output valuereached a maximum of approximately 4 200 000, and minimumof approximately −4 200 000.
This particular output range corresponds almost exactly to 23-bits of information (223/2 = 4194304). Assuming that 20-bits ofthis information is usable, the converter meets the requirementsoutlined in Section 8.1. Further investigation into why the full24-bit range of the converter is not being utilised is required.
15.1.2 Drift and Noise
The ADC was tested for drift and noise by connecting both linesof one of the differential inputs to the common mode voltageoutput on the board. The system controller set the ADC samplerate to 97.65625 kHz, and channeled the results into a 512 samplebuffer. Every 5 ms, the system controller would take an averageof the entire buffer and output the results to an attached laptop.
The entire system was completely isolated and left in an undis-turbed room for around two hours. Figure 24 shows plots of thevisible noise detected and the drift of the ADC output over time.
The RMS value of the noise present in the ADC output sig-nal appears to be approximately 5 (a unitless value). This resultwould imply that the dynamic range of the ADC is equal to
77
78 data converter
(a) Representative noise
(b) ADC drift
Figure 24.: Plots of the results of the ADC testing.
20 log(4200000/5) = 118 dB, not quite the 120 dB value required.Furthermore, this value is calculated from the noise in an aver-aged output signal. To correctly test the ADC, the raw sampledata is required. Collecting this raw data is not a trivial task dueto bandwidth limitations of the serial console.
Figure 24b indicates that the ADC output signal drifts by ap-proximately 50 units over the two hour long test. Assuming theADC response is linear, a drift of this magnitue corresponds toa voltage change of 2.8 × (50/4200000) = 33 μV. Determiningwhether this was a legitimately measured voltage change or aninaccuracy in the ADC converter requires further testing.
15.2 digital to analogue converter
The digital to analogue converter was only tested for function-ality. This was done by connecting it to the solenoid driver and
15.2 digital to analogue converter 79
outputting a waveform through the solenoid. The results of thistest can be found in Section 17.1. No further testing was done.
16P O S I T I O N S E N S O R
16.1 light source
16.1.1 Beam Consistency
The current source powering the LED was set to output around350 mA. The beam was focussed to project an image of the LEDdie on a distant wall about 20 m away. This process ensured thatthe LED die and pinhole aperture were effectively at the focalpoint of the collimating lens. A white piece of paper was thenplaced approximately 10 cm away from the collimating lens inthe path of the beam. A pencil tip was placed in front of thecollimating lens to cast a shadow.
The light intensity appeared homogeneous across the beamprofile, and the shadow cast by the pencil appeared sharp andwell defined. And image of the beam can be seen in Figure 25.No empirical data on the beam profile was gathered.
Figure 25.: An image of the collimated beam shining onto a whitesurface. The visible shadow was cast by the tip of a pencilplaced in front of the collimating lens.
81
82 position sensor
16.1.2 Adjustability
The input of the adjustable current source was connected to afunction generator. The function generator was set to output alow frequency sine wave between 0 V and 3.3 V. The beam pe-riodically became more and less intense, corresponding to themaximums and minimums of the frequency generator output.Varying the frequency of the function generator output corre-spondingly changed the period of the beam intensity changes.No quantitative testing was done on the correlation betweenbeam intensity and the input voltage to the current source.
16.2 differential photodetector
16.2.1 Functionality
The functionality of the differential photodetector was testedby using the analog to digital converter (ADC) to monitor thedifferential light intensity signal as a shadow was moved acrossthe photodiodes.
A hole was drilled in a thin piece of wood, and a magnetinserted into the hole. An elastic band was used to suspendthe piece of wood in such a way that the magnet would cast ashadow on the differential photodetector. The setup can be seenin Figure 26.
Figure 26.: The experimental setup for testing the differential photode-tector.
The magnet was manually moved up and down while log-ging the output of the ADC. The plotted results can be seen inFigure 27.
Figure 27 demonstrates the position sensor functioning as ex-pected. The output values appear to cover the entire range of the
16.2 differential photodetector 83
Figure 27.: The differential photodetector output due to manual move-ment of the free magnet.
ADC. Small vibrations are detected, as indicated by the oscilla-tions at 50 000 ms – 51 000 ms and at 55 000 ms – 55 500 ms.These oscillations were caused by the elastic band vibrating whenthe magnet was let go.
16.2.2 Drift and Noise
The photodetector noise and drift was also measured by using theADC. A static object was clamped in front of the photodetectorin the equilibrium position, and the output of the photodetectorwas monitored for an hour. The plotted results can be seen inFigure 28.
The RMS noise of the photodetector was significantly higherthan the raw ADC noise, with a value of approximately 20 units.The resulting dynamic range of the position sensor is 106 dB. As-suming that the photodetector output linearly changes with posi-tion, the precision of the position sensor is 2.65 mm(20/8400000) =6.3 nm. Whether this is precise enough to perform accurate massmeasurements needs to be investigated further.
At first glance, the photodetector drift appears excessive. How-ever, it is the author’s experience that the position sensor is verysensitive to mechanical movement and environmental distur-bances. Simply blowing in the general direction of the mountedsensor is enough to cause fluctuations in the measurements itprovides. Because of this, it is very likely that the drift indicatedby Figure 28b is actually legitimate movement, caused by temper-ature changes or air currents.
84 position sensor
(a) Representative noise
(b) Photodetector drift
Figure 28.: Plots of the results of the differential photodetector drift andnoise testing.
17S O L E N O I D D R I V E R
17.1 functionality
The solenoid driver was tested for functionality by using thedata conversion board, the position sensor, the solenoid and thesystem controller. The setup was as follows:
• The outputs of the digital to analogue converter (DAC)were connected as inputs to the solenoid driver board.
• The output of the solenoid driver board was connecteddirectly to the solenoid.
• A magnet inserted into a thin piece of wood was suspendedbelow the solenoid using an elastic band, in the same wayas shown in Figure 26.
• The system controller was programmed to output digitaldata to reproduce a low frequency sinusoidal wave usingthe DAC.
• The position sensor output was logged using the analogueto digital converter (ADC).
Figure 29 shows the position of the magnet oscillating alongwith the solenoid current.
Figure 29.: The change in position of the magnet due to an oscillatingcurrent in the solenoid.
85
86 solenoid driver
The results of this test verified that the solenoid driver boardis functional.
17.2 noise
A cursory noise check on the output of the solenoid driver wasperformed using as oscilloscope. The inputs to the board weredisconnected, and the oscilloscope probe connected to the output.Figure 30 shows the voltage waveform on the oscilloscope.
Figure 30.: An oscilloscope screenshot showing the output noise of thesolenoid driver. The horizontal divisions are 50 ns apart, thevertical divisions are 100 mV apart.
It can be seen in Figure 30 that the output of the solenoid driveris particularly noisy. The root mean square (RMS) value of thenoise appears to be around 30 mV. Assuming the solenoid driverboard is able to output its full 4.2 V to −4.2 V range, as designed,the signal to noise ratio of the board at maximum output is20 log(4.2/30 × 10−3) = 42 dB, well below the intended signal tonoise ratio of 120 dB. Further investigation into the source of thisnoise is required.
18S Y S T E M C O N T R O L L E R
The acid test for the prototype of the freely suspended, magnetically-offset force compensation balance built for this project was thetesting of the system controller. All other components were re-quired to be functional, and the sucess of this test would indicatethe viability of the system design.
A magnet was again inserted into a hole in a thin piece of wood,in a similar vein to the tests in Section 16.2.1. This allowed themagnet to be approximately placed in the equilibrium positionbelow the solenoid without interfering with the position sensor.
This test required liberal amounts of trial and error to finda set of parameters that would allow the magnet to be freelysuspended. The parameters involved were:
• The distance between the solenoid and the equilibriumposition of the magnet
• The position of the weight offset magnet inside the solenoid
• The proportional and derivative coefficients of the controller
Ultimately, stable levitation was achieved. Figure 31 shows animage of the magnet freely suspended below the solenoid.
Figure 31.: The freely suspended magnet levitating below the solenoid.
87
88 system controller
18.1 issues
Three issues became apparent while testing the system controller:
1. The proportional-derivative (PD) controller was not ableto handle the latency present in the data conversion. Thedata converters both have a delay of around 20 samples inthe data conversion process due to filtering. Slowing thecontrol loop down to 2 kHz fixed the problem, but this isnot an optimal solution.
2. Transmitting large amounts of raw data to the connectedcomputer for debugging purposes wasn’t possible due tobandwidth limitations of the serial implementation.
3. The magnet tended to oscillate or spin back-and-forth fora relatively long time before settling to a steady state. Thetime it took the oscillations to die down was in the order ofminutes.
The first two issues were not caused by any fault of the systemcontroller hardware, but rather by the software implementationon the microcontroller. Regular PD controllers are not designed tohandle dead-time in the control loop. A more complex controlleris required to deal this. Secondly, the universal serial bus (USB)has enough bandwidth to sustain the transmission of both theanalogue to digital (ADC) and digital to analogue converter(DAC) for debugging. It is the virtual serial implementation thatis limiting.
The final issue was not completely unexpected. The hope wasthat eddy currents induced in the magnet due to its movementthrough the magnetic field of the solenoid would dampen anyoscillations. The fact that this did not occur gives weight to theidea of introducing some sort of mechanical damping into thesystem.
Taking into account the cause of each of the three issues, theauthor can only conclude that the system controller hardware per-formed to the standard outlined in Section 11.1, but the softwareimplementation was lacking.
19P R O J E C T L O G I S T I C S
19.1 time constraints
The project was not completed within the required time con-straints. The project schedule outlined in Figure 1 was far toooptimistic, and the project constantly lagged behind.
The main consideration that was not taken into account wasthe time consuming nature of laying out complex printed circuitboards (PCBs). Originally, the author proposed that the layoutof every board would only take a 20 day period. In reality, thelayout took around three months, and was still not completed (acurrent sensor was never laid out and fabricated). Delays in thePCB layout process held up the entire project, as no fabricationor testing could be done without the completed PCB layouts.
19.2 cost analysis
Details of the cost of individual components used throughoutthe project are shown in Figure 32. Sundries that are expectedto be found in well equipped laboratories were not included.This included things like nuts, bolts, resistors, capacitors, blankprinted circuit board, and so on. Additionally, the cost of shippingparts was not included. It was assumed that $1 AUD = $1 USD,which was approximately correct at the time of writing.
�������� �� �� ��� ������ � �� �
���������������� ��� ��� � ����� ���������������������� ��� ��� � ����� �����
� ������ ����������������� ������ � ��� � ����� �����
!"#����$�����% � ������ ������� ������ ������� ������ ������
&'(����� ��� �������� ���������� � ������ ������&'(�������� ����� ��� ���������� � ������ ������)�����*�(+(�� �� � ������ ������&� � ��,� ����-, � ����� �����
� ����� �����.,&��������� ������ � ��� � ����� �����
� ����� ������/�0�� � � ����� �����
������ �������
)�������( ���%
) ���� .,����.01�� ���2 �2
3� �4� ��+�&'����+*�������2����4� ��5 �� ��-�������% , (���,(�+����/��� �� ���4 �����
&�6��������/��$ ����,�7��
(.#������2 �2
8&.����2�6����2 �2
Figure 32.: A table of part costs.
The total cost of $284.25 AUD did not exceed the project budgetof $500 AUD. However, taking into account the various sundriesrequired, shipping costs and the extra costs that will be incurredto finish the project, the budget will likely exceed $500 AUD. As-
89
90 project logistics
suming that fabrication processes need to be paid for to producea magnetic force compensation balance, the budget will certainlybe exceeded.
Despite this, the project is still viable, and presents numeroustechniques for reducing the costs of a force compensation balance.The final product will likely still be cheaper than commercialofferings.
19.3 technology constraints
Due to the nature of modern electronics, through-hole compo-nents are becoming less and less common and surface mountcomponents are becoming the norm. Unfortunately, the use ofsurface mount components eliminates the possibility of prototyp-ing circuits.
Throughout the design process, the author had to take painstak-ing care to ensure everything met specifications and system com-ponents would be functional. There was no way to prototypethe circuit designs using breadboards or stripboards. Instead,individual PCB layouts had to be created before testing couldcommence. Any error in the circuit or PCB design could haverequired a complete redesign of the PCB.
Part VI
C O N C L U S I O N
20R E C O M M E N D AT I O N S
By reflecting on the project design, fabrication and testing, it ispossible to make recommendations for future work on the project.These are outlined in the sections below.
20.1 design
20.1.1 Thorough Noise Analysis
Only a shallow noise analysis was performed when designingeach subsystem of the force compensation balance. Basic precau-tions were taken to reduce noise, but the author did not have theexpertise or time to perform a full blown noise analysis of eachcircuit in the design. It is recommended that the design of eachcircuit be revisited, and a noise profile of each component, andits contribution to the total noise in the system be calculated. Thiswill help identify and eliminate the major sources of noise in thesystem, which ultimately limits the accuracy of the final device.
20.1.2 Current Sensor Design
To complete the force compensation balance system, a high dy-namic range, zero drift current sensor is required. A design wasstarted by the author, and suitable components were chosen andpurchased. Due to a lack of completion and rigorous analysis, thedesign was not presented in this document. It is recommendedthat a high dynamic range, zero drift current sensor is designedand an appropriate PCB is laid out. This will provide more ac-curate feedback for the system controller, as well as producingmeasurable results that can be related back to the mass of theobject being weighed.
20.2 testing
The testing performed thus far in the project only shows thepotential for the force compensation balance concept to work.Far more in-depth testing is required to ensure that individualcomponents meet their design criteria and the overall system isa feasible solution to the project aim. Recommended tests thatneed to be performed are:
93
94 recommendations
• Testing of regulated voltages and how they respond totransients
• Determining the force characteristics and electrical charac-teristics of the solenoid by testing rather than only usingsimulations
• Basic fault testing, including determining what happenswhen the batteries go flat
• Rigorous noise testing on all power supplies and signallines
20.3 mechanical work
The author does not specialise in mechanical engineering, sothe mechanical work in the project is lacking. The mechanicaldesign of the project is important, so it is recommended that amechanical engineer carries out the recommendations below.
20.3.1 Mechanical Isolation
As the project currently stands, no effort has been put into me-chanically isolating the force compensation balance. The resultof this can be seen in the photodetector tests — environmentalfactors affect measurements. To ensure that the balance meetsspecifications, the mechanical stiffness must be improved, andthe balance needs to be isolated from environmental noise andchanges in environmental conditions.
20.3.2 Weight Coupling
One issue that was not tackled in the design of the force com-pensation balance was how to couple the weight force to thefree magnet. The author researched numerous ideas, but did nothave time to design a solution. It is recommended that a stirrupshaped measuring pan be connected to the free magnet to allowfor weighing of samples. It may also be a good idea to implementsome sort of flexure design to restrict the movement of the freemagnet to the vertical direction.
20.4 programming
A number of improvements in the force compensation balancecan be made by improving the software running on the systemmicrocontroller. It is recommended that the following features beimplemented:
20.4 programming 95
• A protocol should be developed to transmit raw data at highbandwidths between the microcontroller and connectedcomputer. This would allow for more in-depth debuggingand testing.
• The control loop should be improved upon. A controllerthat can handle dead-time in the control loop, as well ascompensate for the inductance of the solenoid, would im-prove the stability of the free magnet.
• The analogue to digital converter on the Blueboard shouldbe utilised to monitor the battery voltages, and take actionwhen the batteries are running out of charge.
• The ability for the system controller to modulate the lightsource in the position sensor may have utility. It is recom-mended that this be investigated.
21C O N C L U S I O N
The original project target of creating a device to cheaply, accu-rately, simply and timely measure the porosity of porous siliconwas not reached. However, a proof of concept device was created,with initial testing indicating positive results. Further develop-ment and testing would likely see the project succeed.
21.1 summary of project results
Each section below outlines the results obtained, what their po-tential applications may be, why they are significant and anylimitations of the work done.
21.1.1 Solenoid
A robust solenoid design methodology was implemented to pro-duce a solenoid that could be used in ultra sensitive force compen-sation balances. The design is unique in that it uses a permanentmagnet to provide a force offset to compensate for the weight ofany non-measured mass in the system. Indications point to theforce vs. current characteristics of the solenoid being completelylinear and predictable. The solenoid design is slightly limited byits inductance, but this can be compensated for.
21.1.2 Power Supply
A noiseless power supply was designed using lead acid batteriesas a power source. Charging of the batteries was completelyautomated. This power supply design would be ideal for use inhigh accuracy instrumentation that has a low measurement dutycycle. Initial testing indicates that the power supply has verylittle voltage noise. The design is limited due to a lack of supplyprotection, as well as being limited by the supply capacity of thebatteries.
21.1.3 Data Converters
A high speed, high dynamic range, digital to analogue and ana-logue to digital converter board was designed and built usingaudio data converters. This design has the advantage of beingcheap as well as ultra accurate. The board could be used in any
97
98 conclusion
application requiring precise, high dynamic range measurements.Initial indications point to a measurement precision of almost 1part per million. The limitation of this design is the fact that theboard is difficult to interface with.
21.1.4 Position Sensor
A highly accurate position sensing device was designed and built,using only cheap, off the shelf components. Initial indicationsshow that the device is precise down to approximately 6 nm.This sensor could be used in high sensitivity instrumentation,including seismometers. The design is limited in range, and itssensitivity to environmental conditions.
21.1.5 Solenoid Driver
A small, cheap driver board was designed and built to control asolenoid. The design implements a unique opamp configurationto subtract two current signals. This concept could be imple-mented in any systems using currents for signalling. Initial testsindicate that the board functionality may be limited by its outputnoise.
21.1.6 System Controller
A simple proportional-derivative controller was implementedon a cheap microcontroller using only open-source tools. Thehardware provides a large host of features, allowing it to be usedin a huge number of applications including instrumentation, con-trollers, toys and robots. No limitations to the hardware systemwere found during initial testing.
21.2 final thoughts
In conclusion, a promising prototype magnetic force compensa-tion balance has been developed in an effort to make measuringthe porosity of porous silicon an affordable, easy, timely andaccurate process. A number of novel ideas were implementedand tested, potentially providing methods to reduce the cost andimprove the accuracy of various forms of instrumentation. Withfurther development, the original project aim should be met.
B I B L I O G R A P H Y
[1] W. R. Tinga, W. A. G. Voss, and D. F. Blossey, “Generalizedapproach to multiphase dielectric mixture theory,” Journalof Applied Physics, vol. 44, p. 3897, 1973.
[2] D. A. G. Bruggeman, “Calculation of different physical con-stants of heterogeneous substances,” Ann Phys, vol. 24, pp.636–679, 1935.
[3] J. C. Maxwell-Garnett, “Colours in metal glasses and metalfilms,” Philos. Trans. R. Soc. London, vol. 203, p. 385–420, 1904.
[4] S. Lazarouk, P. Jaguiro, S. Katsouba, G. Maiello, S. L. Monica,G. Masini, E. Proverbio, and A. Ferrari, “Visual determina-tion of thickness and porosity of porous silicon layers,” ThinSolid Films, vol. 297, no. 1-2, pp. 97–101, Apr. 1997. [Online].Available: http://www.sciencedirect.com/science/article/B6TW0-3SP34NJ-29/2/d8cce88ca034bff085fc8f12c409c81d
[5] H. Looyenga, “Dielectric constants of heteroge-neous mixtures,” Physica, vol. 31, no. 3, pp.401–406, Mar. 1965. [Online]. Available: http://www.sciencedirect.com/science/article/B6X42-46BW0MS-B6/2/e9cc075f61e82516861fdd712e646120
[6] E. V. Astrova and V. A. Tolmachev, “Effective refractive indexand composition of oxidized porous silicon films,” MaterialsScience and Engineering B, vol. 69-70, pp. 142–148, Jan. 2000.[Online]. Available: http://www.sciencedirect.com.ezproxy.library.uwa.edu.au/science/article/B6TXF-41H4CJT-W/2/eb692d710c8ef6226970ffb8270b9ccf
[7] J. von Behren, L. Tsybeskov, and P. M. Fauchet,“Preparation and characterization of ultrathin poroussilicon films,” Applied Physics Letters, vol. 66, no. 13,pp. 1662–1664, Mar. 1995. [Online]. Available: http://link.aip.org/link/?APL/66/1662/1
[8] S. E. Foss, P. Y. Y. Kan, and T. G. Finstad, “Singlebeam determination of porosity and etch rate in situduring etching of porous silicon,” Journal of AppliedPhysics, vol. 97, no. 11, p. 114909, 2005. [Online].Available: http://link.aip.org.ezproxy.library.uwa.edu.au/link/JAPIAU/v97/i11/p114909/s1&Agg=doi
[9] A. Janshoff, K. S. Dancil, C. Steinem, D. P. Greiner,V. S. Lin, C. Gurtner, K. Motesharei, M. J. Sailor, and
99
100 bibliography
M. R. Ghadiri, “Macroporous p-Type silicon Fabry-Perotlayers. fabrication, characterization, and applications inbiosensing,” Journal of the American Chemical Society, vol.120, no. 46, pp. 12 108–12 116, Nov. 1998. [Online]. Available:http://dx.doi.org/10.1021/ja9826237
[10] C. Pickering, M. Beale, D. Robbins, P. Pearson,and R. Greef, “Optical properties of porous siliconfilms,” Thin Solid Films, vol. 125, no. 1-2, pp.157–163, Mar. 1985. [Online]. Available: http://www.sciencedirect.com/science/article/B6TW0-46TY9PR-4M/2/70fd2798e637f1aae8ff1a9514c83f69
[11] M. Khardani, M. Bouaïcha, and B. Bessaïs, “Bruggemaneffective medium approach for modelling optical propertiesof porous silicon: comparison with experiment,” physicastatus solidi (c), vol. 4, no. 6, pp. 1986–1990, 2007. [Online].Available: http://dx.doi.org/10.1002/pssc.200674420
[12] A. M. Goodman, “Optical interference method forthe approximate determination of refractive index andthickness of a transparent layer,” Applied Optics, vol. 17,no. 17, pp. 2779–2787, 1978. [Online]. Available: http://ao.osa.org/abstract.cfm?URI=ao-17-17-2779
[13] C. Lee, L. Koker, and K. Kolasinski, “A novel opticaltechnique for the estimation of porosity in porous siliconthin films,” Applied Physics A: Materials Science & Processing,vol. 71, no. 1, pp. 77–82, Jul. 2000. [Online]. Available:http://dx.doi.org/10.1007/s003390050029
[14] L. A. A. Pettersson, L. Hultman, and H. Arwin,“Porosity depth profiling of thin porous silicon layersby use of Variable-Angle spectroscopic ellipsometry: Aporosity Graded-Layer model,” Applied Optics, vol. 37,no. 19, pp. 4130–4136, Jul. 1998. [Online]. Available:http://ao.osa.org/abstract.cfm?URI=ao-37-19-4130
[15] C. Pickering, L. Canham, and D. Brumhead, “Spectroscopicellipsometry characterisation of light-emitting poroussilicon structures,” Applied Surface Science, vol. 63, no. 1-4,pp. 22–26, Jan. 1993. [Online]. Available: http://www.sciencedirect.com/science/article/B6THY-46BY17V-10/2/495391674c1a786109d2c223ec699230
[16] R. J. M. Fonseca, J. M. Saurel, A. Foucaran, J. Camassel,E. Massone, T. Taliercio, and Y. Boumaiza, “Acousticinvestigation of porous silicon layers,” Journal of MaterialsScience, vol. 30, no. 1, pp. 35–39, Jan. 1995. [Online].Available: http://dx.doi.org/10.1007/BF00352128
bibliography 101
[17] G. N. Aliev, B. Goller, D. Kovalev, and P. A. Snow,“Porosity dependence of the acoustic longitudinal velocityin heavily doped p++ porous silicon layers,” physica statussolidi (c), vol. 6, no. 7, pp. 1670–1674, 2009. [Online].Available: http://dx.doi.org.ezproxy.library.uwa.edu.au/10.1002/pssc.200881102
[18] Y. Boumaiza, Z. Hadjoub, A. Doghmane, and L. De-boub, “Porosity effects on different measured acousticparameters of porous silicon,” Journal of Materials ScienceLetters, vol. 18, no. 4, pp. 295–297, Feb. 1999. [Online].Available: http://dx.doi.org.ezproxy.library.uwa.edu.au/10.1023/A:1006618920416
[19] R. Herino, G. Bomchil, K. Barla, C. Bertrand, and J. L.Ginoux, “Porosity and pore size distributions of poroussilicon layers,” Journal of The Electrochemical Society, vol.134, no. 8, pp. 1994–2000, 1987. [Online]. Available:http://link.aip.org/link/?JES/134/1994/1
[20] M. Fried, T. Lohner, O. Polgar, P. Petrik, E. Vaz-sonyi, I. Barsony, J. P. Piel, and J. L. Stehle,“Characterization of different porous silicon struc-tures by spectroscopic ellipsometry,” Thin Solid Films,vol. 276, no. 1-2, pp. 223–227, Apr. 1996. [Online].Available: http://www.sciencedirect.com/science/article/B6TW0-3VRYK6S-2S/2/ecc6c08f38f71a785b608cf90c082ee5
[21] S. A. Dyer, Survey of instrumentation and measurement. Wiley-IEEE, Jun. 2001.
[22] B. E. Noltingk, Ed., Instrumentation Reference Book, 2nd ed.Butterworth-Heinemann, May 1995.
[23] R. B. Northrop, Introduction to instrumentation and measure-ments. CRC Press, 2005.
[24] J. G. Webster, The Measurement, Instrumentation and SensorsHandbook. Springer, 1999.
[25] T. Studt, “Integrating analytical balances into the21st century,” http://www.rdmag.com/Featured-Articles/2004/02/Integrating-Analytical-Balances-Into-the–21st-Century/, Feb. 2004. [Online]. Available:http://www.rdmag.com/Featured-Articles/2004/02/Integrating-Analytical-Balances-Into-the--21st-Century/
[26] B. He, G. Lu, K. Chu, and G. Ma, “Developing of highaccuracy and low capacity strain gage based load cell forelectronic scale,” vol. 2, 2009, pp. 552–556.
102 bibliography
[27] K. M. Anufriev, V. F. Kharlamov, and A. V. Razumov, “A fastmagnetic-levitation balance,” Instruments and ExperimentalTechniques, vol. 43, no. 1, p. 140–142, 2000.
[28] A. A. Hussien, S. Yamada, M. Iwahara, T. Okada, and T. Ohji,“Application of the repulsive-type magnetic bearing for man-ufacturing micromass measurement balance equipment,”IEEE Transactions on Magnetics, vol. 41, no. 10, p. 3802–3804,2005.
[29] A. A. Hussien, S. Yamada, M. Iwahara, and T. Ohji, “Designand control of a micro-mass measurement system employ-ing permanent magnet repulsive-type magnetic bearing,”Journal of Materials Processing Technology, vol. 181, no. 1-3,pp. 142–147, Jan. 2007. [Online]. Available: http://www.sciencedirect.com/science/article/B6TGJ-4JRKVHN-D/2/549da0e6fa3c854da4dc058eb25bb241
[30] J. G. Codina, “Automatic electronic microgram scale,” Nov.1967, US Patent 3,351,146.
[31] J. W. Beams, “Magnetic suspension balance,” Physical Review,vol. 78, no. 4, p. 471–472, 1950.
[32] T. Gast, “Measurement of masses and forces with the aidof free magnetic suspension,” in Australasian Instrumenta-tion and Measurement Conference, 1989: Advances in the Sci-ence, Technology and Engineering of Instrumentation; Preprintsof Papers, 1989, p. 5.
[33] W. E. Kupper, “High-accuracy mass measurement from mi-crograms to tons,” ISA Transactions, vol. 29, no. 4, p. 11–20,1990.
[34] Sartorius Mechatronics, “Sartorius ME and SE series,” Oper-ating Instructions, Oct. 2009.
[35] Mettler Toledo, “XP6U / XP2U ultra micro balance,”Brochure, May 2008.
[36] Shin-Etsu, “N45M Ne-Fe-B magnet,” Datasheet, Apr. 2007.[Online]. Available: https://www.shinetsu.co.jp/serem/e/download/N45Msheet.pdf
[37] D. A. Lowther, E. M. Freeman, and B. Forghani, “A sparsematrix open boundary method for finite element analysis,”Magnetics, IEEE Transactions on, vol. 25, no. 4, p. 2810–2812,2002.
[38] D. Meeker, Finite Elements Method Magnetics - Version4.2 User’s Manual, Oct. 2010. [Online]. Available: http://www.femm.info/Archives/doc/manual42.pdf
bibliography 103
[39] Electus Distribution, “Relay driving basics,” Datasheet,Aug. 2001. [Online]. Available: http://www.jaycar.com.au/images_uploaded/relaydrv.pdf
[40] Analog Devices, “ADP3331 adjustable output ultralowIQ, 200 mA, SOT-23, anyCAP® low dropout regulator,”Datasheet C00146-0-5/03(A), Jan. 2003. [Online]. Avail-able: http://www.analog.com/static/imported-files/data_sheets/ADP3331.pdf
[41] Linear Technology Corporation, “LT1964 - 200mA, lownoise, low dropout negative micropower regulator,”Datasheet 1964fb, Jul. 2008. [Online]. Available: http://cds.linear.com/docs/Datasheet/1964fb.pdf
[42] Texas Instruments, “High-Performance, Two-Channel, 24-Bit,216kHz sampling Multi-Bit Delta-Sigma Analog-to-Digitalconverter,” Datasheet SBAS399A, Mar. 2007. [Online].Available: http://www.ti.com/lit/gpn/pcm4222
[43] ——, “24-Bit, 192-kHz sampling, advanced segment, audiostereo Digital-to-Analog converter,” Datasheet SLES080C,Nov. 2006. [Online]. Available: http://www.ti.com/lit/gpn/pcm1794
[44] OSRAM Opto Semiconductors GmbH, “Silicon PIN photo-diode - BPW 34 s,” Datasheet, Aug. 2007.
[45] M. Johnson, Photodetection and Measurement: Maximizing Per-formance in Optical Systems, 1st ed. McGraw-Hill Profes-sional, Aug. 2003.
[46] B. Carter and T. R. Brown, “Handbook of operational ampli-fier applications,” Texas Instruments, Tech. Rep. SBOA092A,2001.
[47] OSRAM Opto Semiconductors GmbH, “PlatinumDRAGON® enhanced thin film LED - LR W5SN,”Datasheet, Feb. 2008.
[48] Texas Instruments, “1.5A, 24V, 17MHz power operationalamplifier,” Datasheet SBOS372C, Nov. 2009. [Online].Available: http://www.ti.com/lit/gpn/opa564
Part VII
A P P E N D I C E S
AD E S I G N
Information in this section of the appendices relates to the designsection of the document
a.1 solenoid calculation spreadsheet
A spreadsheet to calculate various parameters of a solenoid. Thecurrent values are those of the final solenoid design.
��������� ��������
��� ������������� �������������� �!���" ���� ����������� ������#��� ������ ��$���
�����" ���%�� ����&���'��� ��()*���������� ����+�������+� ��$,-����"� ��)!
" �������������
a.2 simulation automation script
A MATLAB® script to automate parametric analysis of the solenoidsimulations.
1 % Add the FEMM interface M-files to the search path.
2 addpath(’C:\Program Files\femm42\mfiles\’);
3
4 % Open FEMM and the simulation file.
5 openfemm();
6 opendocument(’Solenoid.fem’);
7
8 % Save the simulation file as a temporary file so we still
have the
9 % original.
10 mi_saveas(’Temp.fem’)
11
12 % Set some ranges for the distances and currents to test.
13 initialpos = -1.5;
14 dpos = 0.1;
15 finalpos = 1.5;
107
108 design
16 distance = [initialpos:dpos:finalpos];
17 current = [-0.5:0.1:0.5];
18
19 % Initialise the output variable.
20 force=[];
21
22 % Move the magnet to its initial position.
23 mi_selectgroup(1);
24 mi_movetranslate(0, initialpos);
25
26 % Loop through the distances.
27 row = 1;
28 for i = distance
29
30 % Display the magnet offset for the next simulation.
31 disp(sprintf(’Offset: %0.5g’, i));
32
33 % Loop through the currents
34 col = 1;
35 for j = current
36
37 % Display the current for the next simulation.
38 disp(sprintf(’ Current: %0.5g’, j));
39
40 % Change the current through the coil and simulate.
41 mi_modifycircprop(’Coil’, 1, j);
42 mi_analyze(1);
43
44 % Load the solution, calculate the force on the
magnet and then
45 % close the solution.
46 mi_loadsolution();
47 mo_groupselectblock(1);
48 force(row, col) = mo_blockintegral(19);
49 mo_close();
50
51 col = col + 1;
52 end
53
54 % Move the magnet to the next offset position.
55 mi_selectgroup(1);
56 mi_movetranslate(0, dpos);
57
58 row = row + 1;
59 end
60
61 % Close FEMM.
62 closefemm();�
A.3 prototype solenoid spindle technical drawings 109
a.3 prototype solenoid spindle technical drawings
Technical drawing of the prototype solenoid. All dimensions arein millimeters.
��
��
��
�
���
��
110 design
a.4 antialiasing filter design screenshots
Screenshots from the online active filter designer application usedto design the antialiasing filters on the data converter board.
A.4 antialiasing filter design screenshots 111
112 design
a.5 data converter schematics
a.5.1 Master Schematic
The master schematics for the data converter board. Green boxesrepresent schematic sheets.
������
������
�����
�����
����
����
���
���
��� ��������
�� ��������
��������
�����
�����
�����
�����
�������
������
���
���
����
����
���� �
��� �
�����
��� �
����
����
����
����
�����
�����
�!
!�"
!��
�#��
����
������� $&� �
����� $&� ��������
�'(
&�
#)�*)+,(
�'(-
&(
#)�*)+,-
�'(-
&-
#)�*)+,-
��&�.)+
&�.)+��
�����
�
&/#)�*)+,
�
&0#)�*)+,
�
&�"
#)�*)+,
�
���)�,�
)1�
�
��)�,�
)1�
�
�'�)�,�
)1�
�2��
�2��
�2��
��2
��2
��2
�
&��
#)�*)+,
�
&�
#)�*)+,
�
�(�)�,�
)1�
�
�-�)�,�
)1�
�2��
�2��
��2
��2
���!��&
���!���
��2#��&
��2#���
&3
&�4�
&5
&�4�
�
&
#)�*)+,
�
&'
#)�*)+,
A.5 data converter schematics 113
a.5.2 Converters Schematic
The schematic sheet for the ADC and DAC data converters(TooManyPins.SchDoc).
����
��
���
�
����
��
� ����
� �
��
���
��
��
�
�
�� ��
�
���
��
��
����
�
������
��
��
���
� �
��
����
�
���
��
����
��
���
�
� �
��
��
��
���
�
��
��
� �
�
�����
�
��
!����
��
�����
��
�����
��
���
�
���
���
"���
����
�
���
�
���
�
��
�
��
����� �
�"
���
��
������
��
��
����
����� �
��
#!� ���
� �
�
�����
� �
��
�����
�
����
"
����
�
�����
�
����
��
#!� ���
� �
�"
� ��
�"
� �� �
��
UC
2
!������!���
���
��
���
��
� ��
��
��
� ��
��
� ��
�������
� ��
����
����
����
�����
���
��
���
��
���
��
���
��
���
��
� ��
���$�
����
�%&'!()�
���*�
���
�%&'�+,
-���$�
����
�%&'!()�
���*�
����
�%&'�+,
-���$�
����
�%&'!()�
���*�
����
�%&'�+,
-
���
���
�����
�����
���$�
����
�%&'!()�
���*�
���
�%&'�+,
-
���$�
���"
�%&'!()�
���*�
����
�%&'�+,
-���
����
�
��� �
�"
��
"
�����
��
����
��
�
�
���
�
�����
��
�����
��
�#��
�
��
�����
�
��
������
��
����
��
������
��
������
�
����
��
����
��
������
�"
��
�
.���
�
���/
��
���
�
��� �
��
��� �
��
��� �
��
����
�
UC
1
!���"��� ��
��
� ��
��
���
��
��
���
�+0'�+,
-���
������
������
������
������
�������
�����
����
����
����
�"$�
���
�%&'!()�
�"$�
���
�%&'!()�
�����
��$�
��
�%&'!()�
��$�
���
�%&'!()�
��$�
���
�%&'!()�
���*�
��
�%&'�+,
-
���*�
���
�%&'�+,
-
��$�
���
�%&'!()�
���*�
��"
�%&'�+,
-
���
�����
�����
���
���
�����
�����
���*�
����
�%&'�+,
-
���*�
����
�%&'�+,
-
�
���
���
�#��
����
�**++5+5'&-*0
114 design
a.5.3 Antialiasing Schematic
The schematic sheet for the antialiasing filters (Antialiasing.SchDoc).
���
�
��
����
������
��
�
��
���
������ �
��
�
��
����
������ �
� ��
�
��
����
������ �
����
����
����
����
����
����
����
����
����
�
����
���
����
��
����
���
����
��
����
���
����
��
����
���
���
��
��������
���
���
��������
���
���
��������
���
���
��������
�
��
����
���
�
��
����
���
�
��
����
���
�
��
����
���
�����
���
��������
�����
���
��������
�����
���
��������
�����
���
��������
� !
� !
� !
� !
�
��
����
���
�
��
����
���
�
�
����
���
�
��
����
���
�"�#�
�"�#�
�"�#��
�"�#��
�$!�
�$!�
�$!��
�$!��
A.5 data converter schematics 115
a.5.4 Power Schematic
The schematic sheet for the power supplies (Power.SchDoc).
���
�
��
���
���
��
�
��
�
���
������
����
��
���
���
��
���
��������
����
���
�������
�
����
���
�������
�
����
���
���
���
�
��
���
���
��
�
��
�
���
������
����
��
���
���
��
���
��������
���
���
�������
�
����
���
�������
�
����
��
���
���
�
��
���
���
��
�
��
�
��
������
����
��
��
���
��
���
�������
����
��
�������
�
����
���
�������
�
����
���
���
���
����
����
�
�
��
!��"�#��
���
����
���$
����
�������
�����
�������
�
����
����
����
116 design
a.6 data converter pcb layout
The final PCB layout of the data converter. Note, some additionalconnections must be made via wiring. See the digital layout filesfor details.
A.7 data converter configuration 117
a.7 data converter configuration
A set of tables indicating jumper settings and the data converterconfiguration options they change.
p11 p12 output filter response
LO LO Stereo Sharp, high group delay.
LO HI Stereo Slow, low group delay.
HI LO Mono(left channel)
Sharp, high group delay.
HI HI Mono(right channel)
Sharp, high group delay.
Jumper settings affecting DAC output and filter response.
p10 filter response
LO Sharp, high group delay.
HI Slow, low group delay.
Jumper settings affecting ADC filter response.
p9 p8 sample rate
LO LO Normal speed, 1/256th the rate of the masterclock. Rates between 8 kHz and 54 kHz aresupported.
LO HI Double speed, 1/128th the rate of the masterclock. Rates between 54 kHz and 108 kHz aresupported.
HI LO Quadruple speed, 1/64th the rate of the masterclock. Rates between 108 kHz and 216 kHz aresupported.
HI HI Undefined behaviour.
Jumper settings affecting ADC sample rate.
118 design
a.8 differential photodetector schematics
The full schematics of the differential photodetector circuit.
%&&
'��
%&&
'��
( �
�
� ��
�
��
��)���
( �
�
� ��
�
��
��)���
'��
�
%�
���
���
���
�
���
(
�(
���(((�
%�
'��
��%
&(
&��
��%
&�
&��
%&&
���
�(
�����
�%&
((��
��
�����
�%&
����%
&�
&��
����
��
��'(
����
��
��'(
��
��)(��
��
��)(��
%&&
%&&
�
�
(
�
��
*��+
�,��
'��
%�
%����
%����
%����
%����
A.9 differential photodetector pcb layout 119
a.9 differential photodetector pcb layout
The final PCB layout of the differential photodetector. Note, someadditional connections must be made via wiring. See the digitallayout files for details.
120 design
a.10 solenoid driver schematics
The full schematics of the solenoid driver circuit. Note, numerouscomponents in the schematic are there for simulation purposes,and are not designed to be on the final PCB.
%��
���
���
���
���
���
���
�� ����
���
�
�� ����
���
�
�� ����
���
�
�� ����
���
����
����
����
����
���
��� ����
���
��� ����
���
�����
���
�����
���
����
����
����
���
���
���
���
��
��
�� �
�
�� !"����
��
� �
�� �
�
�� !"����
��
�#�$
�
�
%
��
�
��&!���!&�'&
(�
)���
�(���*
))&��+,-�.
���
��
���
��
���
�
���
��
��� �&���&�
���
�&�
�&�
�&�
�&�
�&�
���
���
���
���
&�&��
&�&��
&&��
&�&��
���
���
���
���
���/
���0�
���
�
/1
���
���2
�&�
�
3
��
!�&�
����
���
�+/
�&�
�0�
�+/
�&
�0�
���
����
&�
�� ����
%��
&�
�� ����
����/
�&�
�0�
���
�!�4
�
��
��2
�&�
�
��
)2�%��$��
����
�+/
�&�
�0�
����
&�
�� ����
%��
&
�� ����
�+/
�&�
�0�
���
�&�
15���$����
���
&�
�� ����
����
����
�(�
����
���
���
���+/
�&�
�0� &�6�
���+/
�&�
�0� &�6�
����/
�&�
�0�
����/
�&%
�0�
A.11 solenoid driver pcb layout 121
a.11 solenoid driver pcb layout
The final PCB layout of the solenoid driver. Note, some additionalconnections must be made via wiring. See the digital layout filesfor details. Additionally, the reverse side of the PCB should be leftentirely as copper to allow for heatsinking of the power opamp.See Section 10.4.1 for more details.
a.12 main microcontroller code routine
The code listing for the software running on the Blueboard mi-crocontroller.
1 #include "lpc17xx_dac.h"
2 #include "lpc17xx_gpio.h"
3 #include "lpc17xx_i2s.h"
4 #include "lpc17xx_nvic.h"
5 #include "lpc17xx_gpdma.h"
6 #include "lpc17xx_pinsel.h"
7
8 #include "usb_serial.h"
9
10 #include <math.h>
11 #include <stdlib.h>
12 #include <stdio.h>
13
14 // Transmit and receive buffer sizes. Must be a multiple of 2
(due to stereo channels).
15 #define RX_BUFFER_SIZE 16
16 #define TX_BUFFER_SIZE 2
17
18 // Pin configuration data.
19 const PINSEL_CFG_Type i2s_srx_clk_pin = {0, 23, 2,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
20 const PINSEL_CFG_Type i2s_srx_ws_pin = {0, 24, 2,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
21 const PINSEL_CFG_Type i2s_srx_sda_pin = {0, 25, 2,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
122 design
22 const PINSEL_CFG_Type i2s_rx_mclk_pin = {4, 28, 1,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
23 const PINSEL_CFG_Type i2s_stx_clk_pin = {0, 7, 1,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
24 const PINSEL_CFG_Type i2s_stx_ws_pin = {0, 8, 1,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
25 const PINSEL_CFG_Type i2s_stx_sda_pin = {0, 9, 1,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
26 const PINSEL_CFG_Type i2s_tx_mclk_pin = {4, 29, 1,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
27 const PINSEL_CFG_Type dac_pin = {0, 26, 2,
PINSEL_PINMODE_PULLUP, PINSEL_PINMODE_NORMAL};
28
29 // Terminal Counter flag for Channel 0.
30 __IO uint32_t Channel0_TC;
31
32 // Error Counter flag for Channel 0.
33 __IO uint32_t Channel0_Err;
34
35 // Terminal Counter flag for Channel 1.
36 __IO uint32_t Channel1_TC;
37
38 // Error Counter flag for Channel 1.
39 __IO uint32_t Channel1_Err;
40
41 // The transmit and receive buffers.
42 volatile int32_t I2SRXBuffer[RX_BUFFER_SIZE];
43 volatile int32_t I2STXBuffer[TX_BUFFER_SIZE];
44
45 // System tick (1us per tick).
46 volatile uint64_t systemTickCount;
47
48 // System tick interrupt handler.
49 __attribute__ ((section(".fastcode")))
50 __attribute__((noinline))
51 void SysTick_Handler (void) {
52 systemTickCount++;
53 }
54
55 // A delay function.
56 void delay (unsigned long ticks) {
57 unsigned long startTickCount = systemTickCount;
58 while ((systemTickCount - startTickCount) < ticks);
59 }
60
61 // DMA interrupt handler routine (do we need this? It never
seems to be called).
62 void DMA_IRQHandler (void)
63 {
64 // Execute GPDMA_IntHandler() in GPDMA driver.
65 GPDMA_IntHandler();
66 }
67
A.12 main microcontroller code routine 123
68 // DMA callback functions (do we need these if we’re using a
looping linked list?).
69 void GPDMA_Callback0(uint32_t DMA_Status)
70 {
71 if(DMA_Status & GPDMA_STAT_INTTC) {
72 Channel0_TC++;
73 }
74
75 if (DMA_Status & GPDMA_STAT_INTERR) {
76 Channel0_Err++;
77 }
78 }
79
80 void GPDMA_Callback1(uint32_t DMA_Status)
81 {
82 if(DMA_Status & GPDMA_STAT_INTTC) {
83 Channel1_TC++;
84 }
85
86 if (DMA_Status & GPDMA_STAT_INTERR) {
87 Channel1_Err++;
88 }
89 }
90
91 // A function to initialise the buffers (rezero them).
92 void Buffer_Init(void) {
93 uint32_t i;
94
95 for (i = 0; i < RX_BUFFER_SIZE; i++) {
96 I2SRXBuffer[i] = 0;
97 }
98
99 for (i = 0; i < TX_BUFFER_SIZE; i++) {
100 I2STXBuffer[i] = 0;
101 }
102 }
103
104 // The main code routine.
105 int c_entry(void)
106 {
107 // Initialise some variables.
108 GPDMA_Channel_CFG_Type GPDMACfg;
109 I2S_MODEConf_Type I2S_ClkConfig;
110 I2S_CFG_Type I2S_ConfigStruct;
111 I2S_DMAConf_Type I2S_DMAStruct;
112 GPDMA_LLI_Type rx_loop_list;
113 GPDMA_LLI_Type tx_loop_list;
114
115 uint32_t i;
116
117 // Deinitialise the NVIC and SCBNVIC.
118 NVIC_DeInit();
119 NVIC_SCBDeInit();
124 design
120
121 // Set the NVIC preemption priority bits.
122 NVIC_SetPriorityGrouping(0x05);
123
124 // Set Vector table offset value.
125 NVIC_SetVTOR(0x00000000);
126
127 // Generate interrupts every 1us.
128 SysTick_Config(SystemCoreClock/1000000 - 1);
129
130 // Initialise USB output.
131 init_usb_serial();
132
133 // Initialise buffers.
134 Buffer_Init();
135
136 // Set direction for GPIO I2S enable pins (1.0 and
1.1), and the charger disable pin (1.4) and clear
them.
137 GPIO_SetDir(1, 1 << 0 | 1 << 1 | 1 << 4, 1);
138 GPIO_ClearValue(1, 1 << 0 | 1 << 1 | 1 << 4);
139
140 // Configure DAC pin.
141 PINSEL_ConfigPin((PINSEL_CFG_Type *) &dac_pin);
142
143 // Initialise DAC.
144 DAC_Init(LPC_DAC);
145
146 // Configure pins for I2S_RX.
147 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_srx_clk_pin
);
148 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_srx_ws_pin)
;
149 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_srx_sda_pin
);
150 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_rx_mclk_pin
);
151
152 // Configure pins for I2S_TX.
153 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_stx_clk_pin
);
154 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_stx_ws_pin)
;
155 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_stx_sda_pin
);
156 PINSEL_ConfigPin((PINSEL_CFG_Type *) &i2s_tx_mclk_pin
);
157
158 // Initialise I2S.
159 I2S_Init(LPC_I2S);
160
161 // Configure I2S audio settings.
162 I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_32;
A.12 main microcontroller code routine 125
163 I2S_ConfigStruct.mono = I2S_STEREO;
164 I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
165 I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
166 I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
167 I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
168 I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
169 I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
170
171 // Configure serial clocks.
172 I2S_ClkConfig.clksel = I2S_CLKSEL_0;
173 I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
174 I2S_ClkConfig.mcena = I2S_MCLK_ENABLE;
175 I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
176 I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
177
178 // Set master and bit clock rates.
179 LPC_I2S->I2SRXRATE = 1 | (1 << 8);
180 LPC_I2S->I2SRXBITRATE = 1;
181 LPC_I2S->I2STXRATE = 1 | (1 << 8);
182 LPC_I2S->I2STXBITRATE = 1;
183
184 // Initialize GPDMA controller.
185 GPDMA_Init();
186 LPC_GPDMA->DMACConfig = 0x01;
187
188 // Disable interrupt for DMA.
189 NVIC_DisableIRQ (DMA_IRQn);
190
191 // Set interrupt priority.
192 NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
193
194 // Configure receive looped linked list.
195 rx_loop_list.SrcAddr = (uint32_t) &LPC_I2S->I2SRXFIFO;
196 rx_loop_list.DstAddr = (uint32_t) I2SRXBuffer;
197 rx_loop_list.NextLLI = (uint32_t) &rx_loop_list;
198 rx_loop_list.Control =
199 GPDMA_DMACCxControl_TransferSize(
RX_BUFFER_SIZE) |
200 GPDMA_DMACCxControl_SBSize(0x00) |
201 GPDMA_DMACCxControl_DBSize(0x00) |
202 GPDMA_DMACCxControl_SWidth(0x02) |
203 GPDMA_DMACCxControl_DWidth(0x02) |
204 GPDMA_DMACCxControl_DI;
205
206 // Configure GPDMA channel 0, used for receiving data
.
207 GPDMACfg.ChannelNum = 0;
208 GPDMACfg.SrcMemAddr = 0;
209 GPDMACfg.DstMemAddr = (uint32_t) I2SRXBuffer;
210 GPDMACfg.TransferSize = RX_BUFFER_SIZE;
211 GPDMACfg.TransferWidth = 0;
212 GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
213 GPDMACfg.SrcConn = GPDMA_CONN_I2S_Channel_0;
126 design
214 GPDMACfg.DstConn = 0;
215 GPDMACfg.DMALLI = (uint32_t) &rx_loop_list;
216 GPDMA_Setup(&GPDMACfg, GPDMA_Callback0);
217
218 // Reset terminal and error counters for channel 0.
219 Channel0_TC = 0;
220 Channel0_Err = 0;
221
222 // Configure transmit looped linked list.
223 tx_loop_list.SrcAddr = (uint32_t) I2STXBuffer;
224 tx_loop_list.DstAddr = (uint32_t) &LPC_I2S->I2STXFIFO
;
225 tx_loop_list.NextLLI = (uint32_t) &tx_loop_list;
226 tx_loop_list.Control =
227 GPDMA_DMACCxControl_TransferSize(
TX_BUFFER_SIZE) |
228 GPDMA_DMACCxControl_SBSize(0x00) |
229 GPDMA_DMACCxControl_DBSize(0x00) |
230 GPDMA_DMACCxControl_SWidth(0x02) |
231 GPDMA_DMACCxControl_DWidth(0x02) |
232 GPDMA_DMACCxControl_SI;
233
234 // Configure GPDMA channel 0, used for transmitting
data.
235 GPDMACfg.ChannelNum = 1;
236 GPDMACfg.SrcMemAddr = (uint32_t) I2STXBuffer;
237 GPDMACfg.DstMemAddr = 0;
238 GPDMACfg.TransferSize = TX_BUFFER_SIZE;
239 GPDMACfg.TransferWidth = 0;
240 GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
241 GPDMACfg.SrcConn = 0;
242 GPDMACfg.DstConn = GPDMA_CONN_I2S_Channel_1;
243 GPDMACfg.DMALLI = (uint32_t) &tx_loop_list;
244 GPDMA_Setup(&GPDMACfg, GPDMA_Callback1);
245
246 // Reset terminal and error counters for channel 1.
247 Channel1_TC = 0;
248 Channel1_Err = 0;
249
250 // Enable GPDMA channel 0 and 1.
251 GPDMA_ChannelCmd(0, ENABLE);
252 GPDMA_ChannelCmd(1, ENABLE);
253
254 // Enable interrupt for DMA.
255 NVIC_EnableIRQ(DMA_IRQn);
256
257 // Configure DMA and enable it.
258 I2S_DMAStruct.DMAIndex = I2S_DMA_1;
259 I2S_DMAStruct.depth = 1;
260 I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_RX_MODE);
261 I2S_DMAStruct.DMAIndex = I2S_DMA_2;
262 I2S_DMAStruct.depth = 1;
263 I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_TX_MODE);
A.12 main microcontroller code routine 127
264
265 I2S_Start(LPC_I2S);
266
267 I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_RX_MODE, ENABLE);
268 I2S_DMACmd(LPC_I2S, I2S_DMA_2, I2S_TX_MODE, ENABLE);
269
270 // Wait for a ENTER before beginning the main program
loop.
271 while(serial_getchar() != 13);
272
273 // This is the main loop of the program.
274 while (1)
275 {
276 // Get a value for the proportional
coefficient.
277 serial_printf("Welcome!\nPlease enter a
proportional coefficient and press ENTER
.\nP = ");
278
279 i = 0;
280 char input[32];
281 char potential_input = serial_getchar();
282
283 while (potential_input != 13 && i < 31)
284 {
285 if (potential_input != (char)EOF)
286 {
287 input[i] = potential_input;
288 serial_printf("%c",
potential_input);
289 i++;
290 }
291 potential_input = serial_getchar();
292 }
293 input[i] = 0;
294
295 double propCoeff = atof(input);
296
297 serial_printf("\nTotally rad. By my humble
interpretation, you set P to %f.\n",
propCoeff);
298
299 // Get a value for the derivative coefficient
.
300 serial_printf("Now, what do you want the
derivative coefficient to be?\nD = ");
301
302 potential_input = serial_getchar();
303 i = 0;
304 while (potential_input != 13 && i < 31)
305 {
306 if (potential_input != (char)EOF)
307 {
128 design
308 input[i] = potential_input;
309 serial_printf("%c",
potential_input);
310 i++;
311 }
312 potential_input = serial_getchar();
313 }
314 input[i] = 0;
315
316 double derCoeff = atof(input);
317
318 serial_printf("\nSweet deal. D has been set
to %f.\n", derCoeff);
319
320 // Begin control loop initialisation.
321 serial_printf("Here we go! Press ENTER at any
time to stop the control loop.\n");
322
323 // Disable charger.
324 GPIO_SetValue(1, 1 << 4);
325
326 // Wait for a second for things to settle.
327 delay(1000000);
328
329 // Set DAC output.
330 DAC_UpdateValue(LPC_DAC, 0x1ff);
331
332 // Wait a bit more.
333 delay(500000);
334
335 // Set I2S enable pins high.
336 GPIO_SetValue(1, 1 << 0 | 1 << 1);
337
338 // Aaaaaannnnd.... GO!
339 uint64_t lastTickCount = systemTickCount;
340 int32_t avgL, avgR, error, lastError;
341 int64_t sumL, sumR;
342 while (serial_getchar() != 13)
343 {
344 // Calculate ADC value.
345 sumL = 0;
346 sumR = 0;
347 for (i = 0; i < RX_BUFFER_SIZE; i +=
2)
348 {
349 sumL += (I2SRXBuffer[i] >> 8)
;
350 sumR += (I2SRXBuffer[i + 1]
>> 8);
351 }
352 avgL = sumL / (RX_BUFFER_SIZE / 2);
353 avgR = sumR / (RX_BUFFER_SIZE / 2);
354
A.12 main microcontroller code routine 129
355 // Find error.
356 error = 0 - avgL;
357
358 // Set DAC output.
359 int32_t outvalue = MAX(MIN((int32_t)(
propCoeff * (double)error +
derCoeff * (double)(error -
lastError) * 1000000.0 / (double)
(systemTickCount - lastTickCount)
), 4000000), -4000000) << 8;
360 I2STXBuffer[0] = outvalue;
361 I2STXBuffer[1] = outvalue;
362
363 lastError = error;
364 lastTickCount = systemTickCount;
365
366 // Wait for a bit to slow down the
control loop.
367 delay(500000);
368 }
369
370 // Begin deinitialising the control loop.
371 serial_printf("OK, I’ll stop now...\n");
372
373 // Set I2S enable pins low.
374 GPIO_ClearValue(1, 1 << 0 | 1 << 1);
375
376 // Wait a bit.
377 delay(500000);
378
379 // Set DAC output.
380 DAC_UpdateValue(LPC_DAC, 0x000);
381
382 // Wait for a second for things to settle.
383 delay(1000000);
384
385 // Disable charger.
386 GPIO_ClearValue(1, 1 << 4);
387 }
388
389 I2S_DeInit(LPC_I2S);
390
391 return 1;
392 }
393
394 // The entry point for the program.
395 int main(void)
396 {
397 return c_entry();
398 }�
BFA B R I C AT I O N
Information in this section of the appendices relates to the fabri-cation section of the document
b.1 position sensor images
Various images of the position sensor components.
The differential photodectector PCB from the front
The rear side of the differential photodetector.
131
132 fabrication
The adjustable current source for the LED.
The mounted LED complete with pinhole aperture.
B.2 data converter images 133
b.2 data converter images
Various images of the data converter board.
The top of the data converter PCB.
The bottom of the data converter PCB.
134 fabrication
b.3 solenoid driver images
Various images of the solenoid driver board.
The top of the solenoid driver PCB.
The bottom of the solenoid driver PCB.
B.4 power supply images 135
b.4 power supply images
Various images of the power supply.
An overall look at the power supply.
The top of the power supply terminal block.
136 fabrication
The bottom of the power supply terminal block.
