IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-25, NO. 8, AUGUST 1978 1005

SOS Special

Foreword

Issue-Nonvolatile Memory Technology

T HIS PART of the Special Issue arises from the Second IEEE Workshop on Nonvolatile Semiconductor Memories

(NVSM) held in August 1977 in Vail, CO. As in the workshop held a year before that (see IEEE TRANSACTIONS ON ELEC- TRON DEVICES, vol. ED-24, May 1977), specialists presented papers of recently completed work or reviews.

The first session dealt with the processes of charge injection between polycrystalline silicon layers and silicon dioxide (which is important in floating-gate devices) and charge transport and injection in silicon nitride (which requires understanding to permit analysis of MNOS memory transistors). The second session contained papers on new MNOS transistor structures and process technologies. Another session was mainly con- cerned with the analysis of the thin oxide and nitride layers comprising the MNOS structure. A fourth session was concen- trated on the measurement of stored or injected charges and their distribution in the dielectrics of MNOS structures. Radi- ation effects in MOS and MNOS structures and circuits, and reliability considerations of MNOS electronic systems were the topics of the fifth session. The final session was devoted to the description of MNOS circuits for RAM and BORAM applications, some under radiation environments, with one last paper describing an EPROM.

The papers contained in this part of the Special Issue were

largely presented within that framework, although through the passage of time, some underwent a change in emphasis, and others were added that had not been presented. The result are thirteen papers in this issue, all dealing with MNOS structures. Two papers are particularly concerned with the materials basic to the MNOS transistors. One deals with the compositional details of the nitride, its analysis, and its potential connections with observed electrical characteristics, and the other is a re- view of experiments on the presence of both hole and electron conduction in silicon nitride. Another two papers demonstrate a significantly better modification of writing and retention models by comparison with experimental data. The modeling and measurement of charge centroid location and distribution is the topic of two papers. These are followed by one dealing with the effect of write-erase cycling on noise characteristics of MNOS transistors, and one where radiation effects in MNOS transistors have been reduced by a deliberate modification of the dielectric. The main body of this work is rounded out by three papers on integrated circuits, two of which are first ver- sions of MNOS R A M ’ S , and the third is the use of MNOS de- vices as emergency storage elements for MOS RAM’S. There are two correspondences concerned with details of practical measurement and device structure.

The concern with refinement of existing theory and mea-

0018-9383/78/0800-1005$00,75 0 1978 IEEE

surements, and the presence of relatively well-developed ci.:. cuits would seem to indicate that the MNOS field has rea ched a first stage of maturity. This judgment is supported 1) i the appearance of an IEEE Standard (IEEE Std 581-1978) !;/hiCh has the title: "IEEE Standard Definitions, Symbols, and 1::har- acterization of Metal-Nitride-Oxide Field-Effect Transist::,rs." The next NVSM workshop is planned to be held in Man;.h of 1979 in Monterey, CA. Aside from reporting work re1att:'i to MNOS structures, this workshop will address itself to adv;.nces in avalanche injection and similar devices, and the use of arnor- phous semiconductors.

?':ne editors wish to a.:kmowl:dge thc: :plann:.nt: ash;tance a n 6 active promotion of the 'WSM worksho:p and Special I:ssue by E.. 13. Micheletti, ADCOM advjscr. They wish also 'to expre!ss, their appreciation to all the reviewers for their thought prsvok.' ing comments and Shirley Weksegger and Caro:i Sybert for their assistance with the administ.ration of correspondencle and mamscripts.

FOREWORD 1007

H. A. Richard Wegener (M’66-SM’75) received the B.S. degree from Columbia University, New York, NY, in 1951, and the Ph.D. degree from the Polytechnic Institute of Brooklyn, Brooklyn, NY, in 1965.

He has been in the semiconductor field since his employment at Tung-Sol Electric Research Laboratories in 1955, where he worked on germanium alloy transistors, junction field-effect transistors, and RTL circuits. He joined the Sperry Research Center, Sudbury, MA, in 1964, where he was Department Manager of Integrated Circuit Development. He has worked on MOS transistors and CCD’s, but since 1966 his main concentration has been on MNOS memory transistors, especially on aspects involving device theory, structure and processing, MNOS-LSI circuit design and processing, and radiation hardness. In 1977, he joined the Xerox Corporation, Webster, NY, as an Area Manager.