B Sravani 09B81A0491 K Tejaswi 09B81A04A6 Sudheer 09B81A0494

Internal Guide assoc prof Mrs. Ester Rani

To design low power radix-2 FFT processor using MTCMOS technique.

The Fast Fourier Transform (FFT) is a critical block and widely used in digital signal Processing.

With the advent of semiconductor processing technology in VLSI system, it has enabled the performance of FFT design to increase steadily and applied in portable application design.

However, as semiconductor technologies move toward finer size and geometries FFT design has also faced challenges in power increment in the design.

Leakage power has become a major concern for the CMOS circuits in deep sub-micron process.

This project deals with technique which reduces the leakage power in fft processor.

MTCMOS is a very effective technique to reduce the leakage current of circuits in the standby mode.

The simple FFT processor is to be designed with MTCMOS to reduce its standby power.

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LOW VT LOGICHIGH VT

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• Low VT gates for speed• High VT gates for low leakage

The leakage power consumptions of the individual blocks in FFT are to be compared with those of using MTCMOS.

Comparisons are to be made between leakage power of FFT in fine grain FFT and CMOS FFT.

The designing and comparisons are to be done using the 90nm CMOS technology

RADIX 2 RADIX 2

RADIX-2 RADIX -2

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Cadence tools Design and comparisons are to be

made using 90nm CMOS technology.

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