FET Summary Lesson (1)

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    FET Lesson:

    BJT is a current-controlled deviceFET is a voltage-controlled device

    BJT: bipolar deviceFET: unipolar device

    FET: high input impedanceBJT: higher sensitivity to changes in the applied signal

    FET: more temperature stable than BJTFET: usually smaller in construction than BJT

    ID = ISIG = 0 (gate current)

    VDS > VP, JFET is a current-source device

    IDSS means Drain-to-Source current with a Short-circuit connection from Gate to Source.- maximum drain current for JFET @ VGS = 0 V & VDS > |VP|

    VGS(off) = -VP

    Ohmic region: voltage-controlled resistance region- resistance is controlled by the applied gate-to-source voltage.

    2

    1

    P

    GS

    OD

    V

    V

    rr

    ro = resistance with VGS = 0Vrd = resistance at a particular level of VGS

    N-channel JFET: gate is p-type material, drain-to-source is n-typeP-channel JFET: gate is n-type material; drain-to-source is p-type

    ID = IDSS( 1 VGS/VP)2

    2 types of FET1. JFET (Junction FET)2. MOSFET (Metal Oxide Semiconductor FET)

    - Depletion type- Enhancement type (source & drain are totally separated by a diff channel)

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    The greater the applied reverse bias, the wider the depletion region.

    IG (gate current) is zero..

    Seen in datasheet: VGS(off) = VP

    As voltage VDS is increased from 0 to few volts, the current will increase.

    The relative straightness of the plot reveals that for the region of low values of VDS, theresistance is essentially constant.

    As VDS increases & approaches a level referred to as VP (pinch-off voltage), a depletion regionwill widen causing a reduction in the channel width.

    As VDS is increased beyond VP, the region of close encounter between the two depletion regionswill increase in length along the channel, but the level of ID remains essentially the same.

    Therefore, once VDS > VP, JFET has the characteristics of a current source.

    p

    n

    p

    +

    +

    VGS

    VDD

    VDS = VP

    D

    G

    S

    Saturation region VGS = 0 V

    ID

    IDSS

    VP

    VDS

    n-channel resistance

    Increasing resistance due to narrowing channel

    Ohmic region

    VGS =2 V

    VGS = VP

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    IDSS- drain-to-source current with a short circuit connection from gate to source- maximum drain current for a JFET & is defined by the condition,

    VGS = 0 V & VDS > VP

    Voltage-controlled Resistor

    Ohmic region:

    - variable resistor as controlled by applied gate-to-source voltage

    2

    P

    GS

    Od

    V

    V1

    rr

    rO resistance with VGS = 0 Vrd resistance of a particular level of VGS

    For an n-channel JFET with rO equal to 10k (VGS=0 V, VP= 6 V), then

    rd = 40k @ VGS = 3 V

    JFET Symbol

    D

    G

    S

    N-channel

    D

    G

    S

    P-channel

    ID = IDSS VDS

    +

    LOAD

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    Transfer Characteristics

    For BJT,

    IC

    = f(IB)

    IC = IB is the constant while IB is the controlled variable

    For FET,

    2

    P

    GSDSSD

    V

    V1II

    - IDSS & VP are the constants- Raise to 2nd power means non-linear relation between ID & VGS.

    Fixed Bias

    Since IG 0 AVRG = IGRG

    = (0 A)(RG)= 0 Volt

    ID

    IDSS

    VGS VDS

    ID

    VGS = 0 V

    VGS =1 V

    VGS =2 V

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    The circuit becomes

    Using KVL,

    VGG VGS = 0

    VS = 0

    VDS = VD VS

    VD = VDS + VS

    VGS = VG VS

    VG = VGS + VS

    Power Dissipation

    DDSD IVP

    Derating factor:

    The dissipation rating decreases by constant value for every increase in temperature of

    certain value above 25C. See datasheet for each FET.

    VGS =VGG

    VDS = VDD IDRD

    VD = VDS

    VG = VGS

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    SMALL SIGNAL ANALYSIS

    For BJT, amplification factor is beta ()

    For FET, transconductance factor is gm

    ID = gmVGS

    GS

    Dm

    V

    Ig

    P

    GS

    P

    DSSm

    V

    V1

    V

    2Ig

    When VGS = 0 (max transconductance curve)

    P

    DSSmo

    V

    2Ig

    P

    GSmom

    V

    V1gg

    Example:

    For JFET having IDSS of 10 mA and VP of 5V,

    a. Find gmob. Find gm @ VGS = 0.5V

    Solution:

    a.

    4mS5

    10mA2

    V

    2Ig

    P

    DSSmo

    b. @VGS = 0.5V

    5V

    0.5V14mS

    V

    V1gg

    P

    GSmom

    = ___________

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    2

    P

    GSDSSD

    V

    V1II

    P

    GS

    DSS

    D

    VV1

    II

    P

    GSmom

    VV1gg

    DSS

    Dmom

    I

    Igg

    FET Input Impedance

    Zi =

    Typical values:

    JFET: 1000 MMOSFET: 1015

    FET Output Impedance

    ZO = rD

    OS

    dy

    r1

    D

    DSd

    I

    Vr

    VGS is constant

    IDSS

    VDS

    ID

    VGS = 0 V

    VGS =1 V

    VGS =2 V

    VDS

    ID

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    FET Equivalent Circuit

    Note: Vgs code used @AC levelVGS code used @DC level

    JFET FIXED BIASED

    Equivalent circuit:

    rd

    gm

    Vgs

    G

    S

    D

    VgsRG RDZ

    i ZO

    Vin Vout

    Input Impedance

    Gi RZ

    dDO rRZ

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    dDgsmO rRVgV

    igs VV

    dDimO rRVgV

    i

    dDim

    i

    OV

    V

    rRVg

    V

    VA

    dDmV rRgA

    Example:

    Find gm, rd, Zi, ZO, AV.

    a.

    mmhos.V

    V

    V

    mA

    V

    V

    V

    Ig

    P

    GS

    P

    DSSm 8751

    8

    21

    8

    1021

    2

    b. kmhosy

    rOS

    d 2540

    11

    c. MRZ Gi 1

    d. 8521851252 .kkrRZ dDO

    e. 472385185218518751 ..m.ZgrRgA OmdDmV

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    JFET SELF-BIAS

    A. Bypassed

    RG

    RS

    RD

    C1

    C3

    C2

    Vout

    +VDD

    Vin

    Equivalent circuit:

    rd

    gm

    Vgs

    G

    S

    D

    VgsRG RD

    Zi ZO

    Vin Vout

    Note: same with Fixed Bias equivalent circuit.

    Input Impedance

    Gi RZ

    dDO rRZ

    dDgsmO rRVgV

    igs VV

    dDimO rRVgV

    i

    dDim

    i

    OV

    V

    rRVg

    V

    VA

    dDmV rRgA

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    2

    P

    GSDSSDq

    V

    V1II

    SDGS RIV

    2

    P

    SDDSSDq

    V

    RI-1II

    2

    222

    1

    P

    SDq

    P

    SDq

    DSS

    Dq

    V

    RI

    V

    RI

    I

    I

    01122

    2

    2

    Dq

    DSSP

    SDq

    P

    S I

    IV

    RI

    V

    R

    In quadratic equation,

    2

    2

    P

    S

    V

    Ra

    DSSP

    S

    IV

    Rb

    12 1c

    roots

    a

    acbbxIDq

    2

    42

    Possible root values:

    Notes: q-pt must be within the transfer curve.

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    Example:

    Answers:Idq = 12.783mA, 2.816mA

    Since IDSS is only 10 mA, IDq = 2.816 mA.

    VGSq = -2.816 V

    gm = 0.00176887 mhos

    rd = 50 k

    Zi = 1 M

    ZO = 1155.91766

    AV = 2.04467342

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    B. Unbypassed

    Input Impedance

    Gi RZ

    d

    SDSm

    DO

    r

    RRRg

    RZ

    1

    d

    SDSm

    DmV

    rRRRg

    RgA

    1

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    Example:

    Answers:Idq = 11.4187mA, 3.1527mA

    IDq = 3.1527mA

    VGSq = -3.1527 V

    gm = 0.00221455 mhos

    rd = 50 k

    Zi = 1 M

    ZO = 999.833284

    AV = 2.2141811

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    JFET Voltage Divider Bias

    R2 RS

    RD

    C1

    C2 Vout

    +VDD

    Vin

    R1

    C3

    Zi ZO

    AC equivalent circuit:

    dDgsmO rRVgV

    igs VV

    dDimO rRVgV

    i

    dDim

    i

    OV

    V

    rRVg

    V

    VA

    dDmV rRgA

    Zi = R1 || R2

    ZO = rd || RD

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    JFET Source Follower (Common-Drain) Configuration

    AC Equivalent Circuit:

    Gi RZ

    mSdO1/gRrZ

    Ogsi VVV

    Oigs VVV

    SdOimO RrVVgV SdOmSdimO RrVgRrVgV

    SdimSdmO RrVgRrg1V

    Sdm

    Sdm

    i

    OV

    Rrg1

    Rrg

    V

    VA

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    MOSFET

    Channel formation in the N-Channel enhancement-type MOSFET

    VDG = VDS - VGS

    As VGS is increased beyond the threshold level, the density of free carriers in the inducedchannel will increase, resulting in an increased level of drain current.

    However, if we hold VGS to a constant value while increasing the VDS, the drain current will reacha saturation level.

    VDS sat = VGS VT

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    For values of VGS less than the threshold level the drain current of an enhancement-typeMOSFET is 0 mA.

    For levels of VGS > VT,

    ID = k(VGS VT)2

    2

    TonGS

    onD

    VV

    Ik

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    P-Channel Enhancement-type MOSFET

    Symbols:

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    Sample Data Sheet

    Using the datasheet, determine k.

    22

    310

    3

    VV

    mA

    VV

    Ik

    TonGS

    onD

    k = 0.061 x 10-3A/V2

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    MOSFET also used in analog circuits.

    MOSFET can be used as precision resistors w/c can have higher controlled resistance than BJT.

    Main advantage of BJT over MOSFET is the ability to handle larger current in a smaller space.

    In logic circuits, BJT has an advantage over MOSFET. BJTs are able to drive more gates (largerfanout) because they can output more current than MOSFET. Many chips use MOSFET asinput while BiCMOS (BJT-FET mixed) as outputs.

    In high speed switching, BJT doesnt have larger capacitance from the gate which whenmultiplied by the resistance of the channel gives the intrinsic time constant of the process. Athigher frequency, MOSFET operates slower.