Enterprise Systems Architecture 390 Reference Summary

Enterprise SystemsArchitecture/390 IBM

Reference Summary

SA22-7209-04

Enterprise SystemsArchitecture/390 IBM

Reference Summary

SA22-7209-04

Fifth Edition (June, 2003)

This revision differs from the previous edition by containing minor| corrections, instructions related to the facilities marked by a bar

under “Facility” in “Preface,” and fields related to new I/O facilities.| Additionally, in the sections “Machine Instruction Formats” and| “Machine Instructions by Operation Code,” multiple instances of| the same instruction format are identified by a subscript. Changes

are indicated by a bar in the margin.

References in this publication to IBM products, programs, or ser-vices do not imply that IBM intends to make these available in allcountries in which IBM operates. Any reference to an IBMprogram product in this publication is not intended to state orimply that only IBM's program product may be used. Any func-tionally equivalent program may be used instead.

Requests for copies of this and other IBM publicationsshould be made to your IBM representative or to the IBMbranch office serving your locality.

Please direct any comments on the contents of this publication to

IBM CorporationDepartment E572455 South RoadPoughkeepsie, NY12601-5400USA

IBM may use or distribute whatever information you supply in anyway it believes appropriate without incurring any obligation to you.

Copyright International Business Machines Corporation1994-2003. All rights reserved.US Government Users Restricted Rights – Use, duplication or dis-closure restricted by GSA ADP Schedule Contract with IBM Corp.

Preface

This publication is intended primarily for use by EnterpriseSystems Architecture/390 (ESA/390) assembler-languageapplication programmers. It contains basic machine informa-tion summarized from the IBM ESA/390 Principles of Opera-tion, SA22-7201, about the S/390 and zSeries processors.It also contains frequently used information from IBMESA/390 Vector Operations, SA22-7207, IBM ESA/390 DataCompression, SA22-7208, IBM ESA/390 Common I/O-DeviceCommands and Self Description, SA22-7204, IBMSystem/370 Extended Architecture Interpretive Execution,SA22-7095, and IBM High Level Assembler for MVS & VM &VSE Language Reference, SC26-4940. This publication willbe updated from time to time. However, the above publica-tions and others cited in this publication are the authoritativereference sources and will be first to reflect changes.

As a possible convenience to the reader, this publicationcarries forward most of the device information in the previousedition. This information has not been updated.

The following instructions may be uninstalled or not availableon a particular model:

Facility InstructionAdditional floating point (All instructions marked with “a”

in “Class & Notes” column)Basic vector (All instructions with mne-

monics that start with “V”except as listed below)

Branch and set authority BSACancel I/O XSCHChecksum CKSMCompare and move extended CLCLE, MVCLECompression CMPSCExpanded storage PGIN, PGOUTExtended TOD clock SCKPF, STCKEExtended translation 1 CUTFU, CUUTF, TREExtended translation 2 CLCLU, MVCLU, PKA, PKU,

TP, TROO, TROT, TRTO,TRTT, UNPKA, UNPKU

| HFP multiply-and-add/subtract| MAD, MADR, MAE, MAER,| MSD, MSDR, MSE, MSER

Immediate and relative AHI, BRAS, BRC, BRCT,BRXH, BRXLE, CHI, LHI, MHI,MS, MSR, TMH, TML

Load VIX VLVXA| Message-security assist| KM, KMC, KIMD, KLMD,| KMAC

Multiply then add/subtract VTAD, VTAE, VTSD, VTSEPerform locked operation PLOProgram call fast PCFResume program RPSet address space control fast

SACF

Store system information STSIString CLST, MVST, SRSTSquare root SQDR, SQERSubspace group BSGTrap TRAP2, TRAP4

IBM, Enterprise Systems Architecture/390, ESA/390, S/390, and zSeriesare trademarks of the International Business Machines Corporation.

Copyright IBM Corp. 1994-2003 iii

Facility InstructionVector square root VSQD, VSQDR, VSQE,

VSQERz/Architecture instructions ALC, ALCR, BRASL, BRCL,

DL, DLR, EPSW, LARL, LRV,LRVH, LRVR, ML, MLR, RLL,SAM24, SAM31, SLB, SLBR,STFL, STRV, STRVH, TAM

For information about System/370 architecture, refer to IBMSystem/370 Principles of Operation, GA22-7000, and IBMSystem/370 Reference Summary, GX20-1850.

For information about System/370 extended architecture, referto IBM System/370 Extended Architecture Principles of Oper-ation, SA22-7085, and IBM System/370 Extended Architec-ture Reference Summary, GX20-0157.

For information about Enterprise Systems Architecture/370

architecture, refer to IBM Enterprise Systems Architecture/370Principles of Operation, SA22-7200, IBM Enterprise SystemsArchitecture/370 and System/370 Vector Operations,SA22-7125, and IBM Enterprise Systems Architecture/370Reference Summary, GX20-0406.

For information about z/Architecture, refer to IBMz/Architecture Principles of Operation, SA22-7832, and IBMz/Architecture Reference Summary, SA22-7871.

z/Architecture, System/370, and Enterprise Systems Architecture/370 aretrademarks of the International Business Machines Corporation.

iv ESA/390 Reference Summary

Contents

Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . iiiMachine Instruction Formats . . . . . . . . . . . . . . . . 2Machine Instructions by Mnemonic . . . . . . . . . . . . . 5Machine Instructions by Operation Code . . . . . . . . . 12Condition Codes . . . . . . . . . . . . . . . . . . . . . . 15

| Operand of Store Clock . . . . . . . . . . . . . . . . . . 20Operand of Store Clock Extended . . . . . . . . . . . . 20Assembler Instructions . . . . . . . . . . . . . . . . . . 20Extended-Mnemonic Instructions for Branch on Condition . 21Extended-Mnemonic Instructions for Relative-Branch

Instructions . . . . . . . . . . . . . . . . . . . . . . . 22CNOP Alignment . . . . . . . . . . . . . . . . . . . . . 22Summary of Constants . . . . . . . . . . . . . . . . . . 23Fixed Storage Locations . . . . . . . . . . . . . . . . . . 23External-Interruption Codes . . . . . . . . . . . . . . . . 24Program-Interruption Codes . . . . . . . . . . . . . . . . 25Exception-Extension Code . . . . . . . . . . . . . . . . 26Translation-Exception Identification . . . . . . . . . . . . 26Data-Exception Code (DXC) . . . . . . . . . . . . . . . 26Control Registers . . . . . . . . . . . . . . . . . . . . . 27Floating-Point-Control (FPC) Register . . . . . . . . . . . 29Program-Status Word (PSW) . . . . . . . . . . . . . . . 29Vector-Status Register . . . . . . . . . . . . . . . . . . 29Dynamic Address Translation . . . . . . . . . . . . . . . 30

Dynamic-Address-Translation Format . . . . . . . . . 30Segment-Table Designation (STD) . . . . . . . . . . . 30Segment-Table Entry (STE) . . . . . . . . . . . . . . 30Page-Table Entry (PTE) . . . . . . . . . . . . . . . . 30

ASN Translation . . . . . . . . . . . . . . . . . . . . . . 30Address-Space Number (ASN) . . . . . . . . . . . . 30ASN-First-Table Entry (when CR0 Bit 15 Is Zero) . . . 30ASN-First-Table Entry (when CR0 Bit 15 Is One) . . . 31ASN-Second-Table Entry (ASTE) . . . . . . . . . . . 31

PC-Number Translation . . . . . . . . . . . . . . . . . . 32Program-Call Number . . . . . . . . . . . . . . . . . 32Linkage-Table Entry (LTE) . . . . . . . . . . . . . . . 32Entry-Table Entry (ETE) . . . . . . . . . . . . . . . . 32

Access-Register Translation . . . . . . . . . . . . . . . . 33Access-List-Entry Token (ALET) . . . . . . . . . . . . 33Dispatchable-Unit-Control Table (DUCT) . . . . . . . 33Access-List Entry (ALE) . . . . . . . . . . . . . . . . 34

Linkage-Stack Entries . . . . . . . . . . . . . . . . . . . 35Entry Descriptor . . . . . . . . . . . . . . . . . . . . 35Header Entry (Entry Type 0000001) . . . . . . . . . . 35Trailer Entry (Entry Type 0000010) . . . . . . . . . . 35Branch State Entry (Entry Type 0000100) and

Program-Call State Entry (Entry Type 0000101) . . 36Trapping . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Trap Control Block . . . . . . . . . . . . . . . . . . . 37Trap Save Area . . . . . . . . . . . . . . . . . . . . 38

Trace-Entry Formats . . . . . . . . . . . . . . . . . . . . 3931-Bit Branch . . . . . . . . . . . . . . . . . . . . . . 3924-Bit Branch . . . . . . . . . . . . . . . . . . . . . . 39Branch in Subspace Group (if ASN Tracing On) . . . 39Set Secondary ASN . . . . . . . . . . . . . . . . . . 39Program Call . . . . . . . . . . . . . . . . . . . . . . 39Program Transfer . . . . . . . . . . . . . . . . . . . . 39Program Return . . . . . . . . . . . . . . . . . . . . 39Trace . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Copyright IBM Corp. 1994-2003 v

Machine-Check Interruption Code . . . . . . . . . . . . . 40External-Damage Code . . . . . . . . . . . . . . . . . . 40Operation-Request Block (ORB) . . . . . . . . . . . . . 41Channel-Command Word (CCW) . . . . . . . . . . . . . 41

Format-0 CCW . . . . . . . . . . . . . . . . . . . . . 41Format-1 CCW . . . . . . . . . . . . . . . . . . . . . 42

Indirect-Data-Address Word (IDAW) . . . . . . . . . . . 42Format-1 IDAW . . . . . . . . . . . . . . . . . . . . . 42Format-2 IDAW . . . . . . . . . . . . . . . . . . . . . 42

Subchannel-Information Block (SCHIB) . . . . . . . . . . 43Path-Management-Control Word (PMCW) . . . . . . . 43

Interruption-Response Block (IRB) . . . . . . . . . . . . 44Subchannel-Status Word (SCSW) . . . . . . . . . . . 44Extended-Status Word (ESW) . . . . . . . . . . . . . 45Information Stored in ESW . . . . . . . . . . . . . . . 46Extended-Control Word (ECW) . . . . . . . . . . . . 47

| Extended-Measurement Word . . . . . . . . . . . . . 47| Format-0 Measurement Block . . . . . . . . . . . . . . . 47| Format-1 Measurement Block . . . . . . . . . . . . . 48

Channel-Report Word (CRW) . . . . . . . . . . . . . . . 48Error-Recovery Codes . . . . . . . . . . . . . . . . . 48Reporting Source . . . . . . . . . . . . . . . . . . . . 49

I/O Command Codes . . . . . . . . . . . . . . . . . . . 49Standard Command-Code Assignments (CCW Bits

0-7) . . . . . . . . . . . . . . . . . . . . . . . . . . 49Standard Meanings of Bits of First Sense Byte . . . . 49Console Printer Channel Commands . . . . . . . . . 49Printer Channel Commands . . . . . . . . . . . . . . 50Magnetic-Tape Channel Commands . . . . . . . . . . 51DASD Channel Commands . . . . . . . . . . . . . . 52

Code Assignments . . . . . . . . . . . . . . . . . . . . 54Code Table . . . . . . . . . . . . . . . . . . . . . . . 54Control Character Representations . . . . . . . . . . 60Additional ISO-8 Control Character Representations . 61Formatting Character Representations . . . . . . . . . 61Two-Character BSC Data Link Controls . . . . . . . . 61Commonly Used Editing Pattern Characters . . . . . . 61ANSI-Defined Printer Control Characters . . . . . . . 61

Hexadecimal and Decimal Conversion . . . . . . . . . . 61Powers of 2 and 16 . . . . . . . . . . . . . . . . . . 63

vi ESA/390 Reference Summary

NOTES

1

Machine Instruction Formats

First Halfword Second Halfword Third Halfword

E Op Code 15

| | I Op Code I | | 8 15

| RI Op Code R OpCd I

8 12 16 31

| | RI Op Code M OpCd I | | 8 12 16 31

| RIL Op Code R OpCd I

8 12 16 47

| RIL Op Code M OpCd I

8 12 16 47

RR Op Code R R 8 12 15

RRE Op Code ///////// R R 16 24 28 31

| RRF Op Code R //// R R

16 2 24 28 31

| RRF Op Code M //// R R

16 2 24 28 31

| RRF Op Code R M R R

16 2 24 28 31

| RS Op Code R R B D

8 12 16 2 31

2 ESA/390 Reference Summary

Machine Instruction Formats (Cont'd)


| RS Op Code R M B D

8 12 16 2 31

RSE (non- Op Code R R B D ///////// Op Code vec.)

8 12 16 2 32 4 47

RSI Op Code R R I

8 12 16 31

RSL Op Code L //// B D ///////// Op Code

8 12 16 2 32 4 47

RX Op Code R X B D

8 12 16 2 31

RXE Op Code R X B D ///////// Op Code

8 12 16 2 32 4 47

RXF Op Code R X B D R //// Op Code

8 12 16 2 32 4 47

S Op Code B D

16 2 31

SI Op Code I B D

8 16 2 31

| SS Op Code L B D B D 8 16 2 32 36 47

| SS Op Code L L B D B D

8 12 16 2 32 36 47

| | SS Op Code L I B D B D | | 8 12 16 2 32 36 47

| SS Op Code R R B D B D

8 12 16 2 32 36 47

3

Machine Instruction Formats (Cont'd)


| SS Op Code R R B D B D

8 12 16 2 32 36 47

SSE Op Code B D B D 16 2 32 36 47

QST Op Code QR RT VR RS

16 2 24 28 31

QV Op Code QR ////VR VR

16 2 24 28 31

RSE (vec. Op Code R ////VR //// B D only)

16 2 24 28 32 36 47

VR Op Code QR ////VR GR

16 2 24 28 31

VS Op Code //////////////RS 16 28 31

VST Op Code VR RT VR RS

16 2 24 28 31

VV Op Code VR ////VR VR

16 2 24 28 31

| , , , : Denotes association with first, second, third, or fourth operand; distin-| guishes among multiple instances of the same instruction format

B, B, B : Base register designation fieldD, D, D : Displacement fieldGR: Register designation field (general register)

| I, I: Immediate operand fieldL, L, L: Length fieldM, M, M : Mask fieldQR: Register designation field (equivalent to GR if general register,

or FR if floating-point register)R, R, R: Register designation fieldRS: Register designation field (starting address of vector)RT: Register designation field (stride of vector)VR, VR, VR: Register designation field (vector register)X: Index register designation field


Machine Instructions by Mnemonic

Mne-monic Operands Name

For-mat

OpCode

Class&

NotesA R,D(X,B) Add RX 5A cAD R,D(X,B) Add Normalized (LH) RX 6A cADB R,D(X,B) Add (LB) RXE ED1A acADBR R,R Add (LB) RRE B31A acADR R,R Add Normalized (LH) RR 2A cAE R,D(X,B) Add Normalized (SH) RX 7A cAEB R,D(X,B) Add (SB) RXE ED0A acAEBR R,R Add (SB) RRE B30A acAER R,R Add Normalized (SH) RR 3A cAH R,D(X,B) Add Halfword RX 4A cAHI R,I Add Halfword Immediate| RI A7A cAL R,D(X,B) Add Logical RX 5E cALC R,D(X,B) Add Logical with Carry RXE E398 cALCR R,R Add Logical with Carry RRE B998 cALR R,R Add Logical RR 1E cAP D(L,B),D(L,B) Add Decimal| SS FA cAR R,R Add RR 1A cAU R,D(X,B) Add Unnormalized (SH) RX 7E cAUR R,R Add Unnormalized (SH) RR 3E cAW R,D(X,B) Add Unnormalized (LH) RX 6E cAWR R,R Add Unnormalized (LH) RR 2E cAXBR R,R Add (EB) RRE B34A acAXR R,R Add Normalized (EH) RR 36 cBAKR R,R Branch and Stack RRE B240 qBAL R,D(X,B) Branch and Link RX 45 BALR R,R Branch and Link RR 05 BAS R,D(X,B) Branch and Save RX 4D BASR R,R Branch and Save RR 0D BASSM R,R Branch and Save and Set

ModeRR 0C

BC M,D(X,B) Branch on Condition RX 47 BCR M,R Branch on Condition RR 07 BCT R,D(X,B) Branch on Count RX 46 BCTR R,R Branch on Count RR 06 BRAS R,I Branch Relative and Save| RI A75 BRASL R,I Branch Relative and Save

Long| RIL C05

BRC M,I Branch Relative on Condition| RI A74 BRCL M,I Branch Relative on Condition

Long| RIL C04

BRCT R,I Branch Relative on Count| RI A76 BRXH R,R,I Branch Relative on Index High RSI 84 BRXLE R,R,I Branch Relative on Index Low

or EqualRSI 85

BSA R,R Branch and Set Authority RRE B25A qBSG R,R Branch in Subspace Group RRE B258 BSM R,R Branch and Set Mode RR 0B BXH R,R,D(B) Branch on Index High| RS 86 BXLE R,R,D(B) Branch on Index Low or Equal| RS 87 C R,D(X,B) Compare RX 59 cCD R,D(X,B) Compare (LH) RX 69 cCDB R,D(X,B) Compare (LB) RXE ED19 acCDBR R,R Compare (LB) RRE B319 acCDFBR R,R Convert from Fixed (32/LB) RRE B395 aCDFR R,R Convert from Fixed (32/LH) RRE B3B5 aCDR R,R Compare (LH) RR 29 cCDS R,R,D(B) Compare Double and Swap| RS BB cCEB R,D(X,B) Compare (SB) RXE ED09 acCE R,D(X,B) Compare (SH) RX 79 cCEBR R,R Compare (SB) RRE B309 acCEFBR R,R Convert from Fixed (32/SB) RRE B394 aCEFR R,R Convert from Fixed (32/SH) RRE B3B4 aCER R,R Compare (SH) RR 39 cCFC D(B) Compare and Form Codeword S B21A icCFDBR R,M,R Convert to Fixed (LB/32)| RRF B399 acCFDR R,M,R Convert to Fixed (LH/32)| RRF B3B9 acCFEBR R,M,R Convert to Fixed (SB/32)| RRF B398 acCFER R,M,R Convert to Fixed (SH/32)| RRF B3B8 acCFXBR R,M,R Convert to Fixed (EB/32)| RRF B39A acCFXR R,M,R Convert to Fixed (EH/32)| RRF B3BA acCH R,D(X,B) Compare Halfword RX 49 cCHI R,I Compare Halfword Immediate| RI A7E cCKSM R,R Checksum RRE B241 cCL R,D(X,B) Compare Logical RX 55 cCLC D(L,B),D(B) Compare Logical| SS D5 cCLCL R,R Compare Logical Long RR 0F icCLCLE R,R,D(B) Compare Logical Long

Extended| RS A9 c

CLCLU R,R,D(B) Compare Logical LongUnicode

RSE EB8F c

CLI| D(B),I Compare Logical SI 95 cCLM R,M,D(B) Compare Logical Characters

under Mask| RS BD c

CLR R,R Compare Logical RR 15 cCLST R,R Compare Logical String RRE B25D cCMPSC R,R Compression Call RRE B263 ic

5

Machine Instructions by Mnemonic (Cont'd)


For-mat

OpCode

Class&

NotesCP D(L,B),D(L,B) Compare Decimal| SS F9 cCPYA R,R Copy Access RRE B24D CR R,R Compare RR 19 cCS R,R,D(B) Compare and Swap| RS BA cCSCH Clear Subchannel S B230 pcCSP R,R Compare and Swap and Purge RRE B250 pcCUSE R,R Compare until Substring Equal RRE B257 icCUTFU R,R Convert UTF-8 to Unicode RRE B2A7 cCUUTF R,R Convert Unicode to UTF-8 RRE B2A6 cCVB R,D(X,B) Convert to Binary RX 4F CVD R,D(X,B) Convert to Decimal RX 4E CXBR R,R Compare (EB) RRE B349 acCXFBR R,R Convert from Fixed (32/EB) RRE B396 aCXFR R,R Convert from Fixed (32/EH) RRE B3B6 aCXR R,R Compare (EH) RRE B369 acD R,D(X,B) Divide RX 5D DD R,D(X,B) Divide (LH) RX 6D DDB R,D(X,B) Divide (LB) RXE ED1D aDDBR R,R Divide (LB) RRE B31D aDDR R,R Divide (LH) RR 2D DE R,D(X,B) Divide (SH) RX 7D DEB R,D(X,B) Divide (SB) RXE ED0D aDEBR R,R Divide (SB) RRE B30D aDER R,R Divide (SH) RR 3D DIDBR R,R,R,M Divide to Integer (LB)| RRF B35B acDIEBR R,R,R,M Divide to Integer (SB)| RRF B353 acDL R,D(X,B) Divide Logical RXE E397 DLR R,R Divide Logical RRE B997 DP D(L,B),D(L,B) Divide Decimal| SS FD DR R,R Divide RR 1D DXBR R,R Divide (EB) RRE B34D aDXR R,R Divide (EH) RRE B22D EAR R,R Extract Access RRE B24F ED D(L,B),D(B) Edit| SS DE cEDMK D(L,B),D(B) Edit and Mark| SS DF cEFPC R Extract FPC RRE B38C aEPAR R Extract Primary ASN RRE B226 qEPSW R,R Extract PSW RRE B98D EREG R,R Extract Stacked Registers RRE B249 ESAR R Extract Secondary ASN RRE B227 qESTA R,R Extract Stacked State RRE B24A cEX R,D(X,B) Execute RX 44 FIDBR R,M,R Load FP Integer (LB)| RRF B35F aFIDR R,R Load FP Integer (LH) RRE B37F aFIEBR R,M,R Load FP Integer (SB)| RRF B357 aFIER R,R Load FP Integer (SH) RRE B377 aFIXBR R,M,R Load FP Integer (EB)| RRF B347 aFIXR R,R Load FP Integer (EH) RRE B367 aHDR R,R Halve (LH) RR 24 HER R,R Halve (SH) RR 34 HSCH Halt Subchannel S B231 pcIAC R Insert Address Space Control RRE B224 qcIC R,D(X,B) Insert Character RX 43 ICM R,M,D(B) Insert Characters under Mask| RS BF cIPK Insert PSW Key S B20B qIPM R Insert Program Mask RRE B222 IPTE R,R Invalidate Page Table Entry RRE B221 pISKE R,R Insert Storage Key Extended RRE B229 pIVSK R,R Insert Virtual Storage Key RRE B223 qKDB R,D(X,B) Compare and Signal (LB) RXE ED18 acKDBR R,R Compare and Signal (LB) RRE B318 acKEB R,D(X,B) Compare and Signal (SB) RXE ED08 acKEBR R,R Compare and Signal (SB) RRE B308 ac

| KIMD| R,R| Compute Intermediate| Message Digest| RRE| B93E| c MS

| KLMD| R,R| Compute Last Message Digest| RRE| B93F| c MS| KM| R,R| Cipher Message| RRE| B92E| c MS| KMAC| R,R| Compute Message| Authentication Code| RRE| B91E| c MS

| KMC| R,R| Cipher Message with Chaining| RRE| B92F| c MSKXBR R,R Compare and Signal (EB) RRE B348 acL R,D(X,B) Load RX 58 LA R,D(X,B) Load Address RX 41 LAE R,D(X,B) Load Address Extended RX 51 LAM R,R,D(B) Load Access Multiple| RS 9A LARL R,I Load Address Relative Long| RIL C00 LASP| D(B),D(B) Load Address Space Parame-

tersSSE E500 pc

LCDBR R,R Load Complement (LB) RRE B313 acLCDR R,R Load Complement (LH) RR 23 cLCEBR R,R Load Complement (SB) RRE B303 acLCER R,R Load Complement (S) RR 33 cLCR R,R Load Complement RR 13 cLCTL R,R,D(B) Load Control| RS B7 pLCXBR R,R Load Complement (EB) RRE B343 acLCXR R,R Load Complement (EH) RRE B363 acLD R,D(X,B) Load (L) RX 68 LDE R,D(X,B) Load Lengthened (SH/LH) RXE ED24 aLDEB R,D(X,B) Load Lengthened (SB/LB) RXE ED04 a




For-mat

OpCode

Class&

NotesLDEBR R,R Load Lengthened (SB/LB) RRE B304 aLDER R,R Load Lengthened (SH/LH) RRE B324 aLDR R,R Load (L) RR 28 LDXBR R,R Load Rounded (EB/LB) RRE B345 aLDXR R,R Load Rounded (EH/LH) RR 25 LE R,D(X,B) Load (S) RX 78 LEDBR R,R Load Rounded (LB/SB) RRE B344 aLEDR R,R Load Rounded (LH/SH) RR 35 LER R,R Load (S) RR 38 LEXBR R,R Load Rounded (EB/SB) RRE B346 aLEXR R,R Load Rounded (EH/SH) RRE B366 aLFPC D(B) Load FPC S B29D aLH R,D(X,B) Load Halfword RX 48 LHI R,I Load Halfword Immediate| RI A78 LM R,R,D(B) Load Multiple| RS 98 LNDBR R,R Load Negative (LB) RRE B311 acLNDR R,R Load Negative (LH) RR 21 cLNEBR R,R Load Negative (SB) RRE B301 acLNER R,R Load Negative (SH) RR 31 cLNR R,R Load Negative RR 11 cLNXBR R,R Load Negative (EB) RRE B341 acLNXR R,R Load Negative (EH) RRE B361 acLPDBR R,R Load Positive (LB) RRE B310 acLPDR R,R Load Positive (LH) RR 20 cLPEBR R,R Load Positive (SB) RRE B300 acLPER R,R Load Positive (SH) RR 30 cLPR R,R Load Positive RR 10 cLPSW D(B) Load PSW S 82 pnLPXBR R,R Load Positive (EB) RRE B340 acLPXR R,R Load Positive (EH) RRE B360 acLR R,R Load RR 18 LRA R,D(X,B) Load Real Address RX B1 pcLRDR R,R Load Rounded (EH/LH) RR 25 LRER R,R Load Rounded (LH/SH) RR 35 LRV R,D(X,B) Load Reversed RXE E31E LRVH R,D(X,B) Load Reversed RXE E31F LRVR R,R Load Reversed RRE B91F LTDBR R,R Load and Test (LB) RRE B312 acLTDR R,R Load and Test (LH) RR 22 cLTEBR R,R Load and Test (SB) RRE B302 acLTER R,R Load and Test (SH) RR 32 cLTR R,R Load and Test RR 12 cLTXBR R,R Load and Test (EB) RRE B342 acLTXR R,R Load and Test (EH) RRE B362 acLURA R,R Load Using Real Address RRE B24B pLXD R,D(X,B) Load Lengthened (LH/EH) RXE ED25 aLXDB R,D(X,B) Load Lengthened (LB/EB) RXE ED05 aLXDBR R,R Load Lengthened (LB/EB) RRE B305 aLXDR R,R Load Lengthened (LH/EH) RRE B325 aLXE R,D(X,B) Load Lengthened (SH/EH) RXE ED26 aLXEB R,D(X,B) Load Lengthened (SB/EB) RXE ED06 aLXEBR R,R Load Lengthened (SB/EB) RRE B306 aLXER R,R Load Lengthened (SH/EH) RRE B326 aLXR R,R Load (E) RRE B365 aLZDR R Load Zero (L) RRE B375 aLZER R Load Zero (S) RRE B374 aLZXR R Load Zero (E) RRE B376 aM R,D(X,B) Multiply RX 5C

| MAD| R,R,D(X,B)| Multiply and Add (LH)| RXF| ED3E| HMMADB R,R,D(X,B) Multiply and Add (LB) RXF ED1E aMADBR R,R,R Multiply and Add (LB)| RRF B31E a

| MADR| R,R,R| Multiply and Add (LH)| RRF| B33E| HM| MAE| R,R,D(X,B)| Multiply and Add (SH)| RXF| ED2E| HM

MAEB R,R,D(X,B) Multiply and Add (SB) RXF ED0E aMAEBR R,R,R Multiply and Add (SB)| RRF B30E a

| MAER| R,R,R| Multiply and Add (SH)| RRF| B32E| HMMC D(B),I Monitor Call SI AF MD R,D(X,B) Multiply (LH) RX 6C MDB R,D(X,B) Multiply (LB) RXE ED1C aMDBR R,R Multiply (LB) RRE B31C aMDE R,D(X,B) Multiply (SH/LH) RX 7C MDEB R,D(X,B) Multiply (SB/LB) RXE ED0C aMDEBR R,R Multiply (SB/LB) RRE B30C aMDER R,R Multiply (SH/LH) RR 3C MDR R,R Multiply (LH) RR 2C ME R,D(X,B) Multiply (SH/LH) RX 7C MEE R,D(X,B) Multiply (SH) RXE ED37 aMEEB R,D(X,B) Multiply (SB) RXE ED17 aMEEBR R,R Multiply (SB) RRE B317 aMEER R,R Multiply (SH) RRE B337 aMER R,R Multiply (SH/LH) RR 3C MH R,D(X,B) Multiply Halfword RX 4C MHI R,I Multiply Halfword Immediate| RI A7C ML R,D(X,B) Multiply Logical RXE E396 MLR R,R Multiply Logical RRE B996 MP D(L,B),D(L,B) Multiply Decimal| SS FC MR R,R Multiply RR 1C MS R,D(X,B) Multiply Single RX 71 MSCH D(B) Modify Subchannel S B232 pc

7



For-mat

OpCode

Class&

Notes| MSD| R,R,D(X,B)| Multiply and Subtract (LH)| RXF| ED3F| HM

MSDB R,R,D(X,B) Multiply and Subtract (LB) RXF ED1F aMSDBR R,R,R Multiply and Subtract (LB)| RRF B31F a

| MSDR| R,R,R| Multiply and Subtract (LH)| RRF| B33F| HM| MSE| R,R,D(X,B)| Multiply and Subtract (SH)| RXF| ED2F| HM

MSEB R,R,D(X,B) Multiply and Subtract (SB) RXF ED0F aMSEBR R,R,R Multiply and Subtract (SB)| RRF B30F a

| MSER| R,R,R| Multiply and Subtract (SH)| RRF| B32F| HMMSR R,R Multiply Single RRE B252 MSTA R Modify Stacked State RRE B247 MVC D(L,B),D(B) Move| SS D2 MVCDK D(B),D(B) Move with Destination key SSE E50F qMVCIN D(L,B),D(B) Move Inverse| SS E8 MVCK D(R,B),D(B),R Move with Key| SS D9 qcMVCL R,R Move Long RR 0E icMVCLE R,R,D(B) Move Long Extended| RS A8 cMVCLU R,R,D(B) Move Long Unicode RSE EB8E cMVCP| D(R,B),D(B),R Move to Primary| SS DA qcMVCS| D(R,B),D(B),R Move to Secondary| SS DB qcMVCSK D(B),D(B) Move with Source Key SSE E50E qMVI D(B),I Move SI 92 MVN D(L,B),D(B) Move Numerics| SS D1 MVO D(L,B),D(L,B) Move with Offset| SS F1 MVPG R,R Move Page RRE B254 qcMVST R,R Move String RRE B255 cMVZ D(L,B),D(B) Move Zones| SS D3 MXBR R,R Multiply (EB) RRE B34C aMXD R,D(X,B) Multiply (LH/EH) RX 67 MXDB R,D(X,B) Multiply (LB/EB) RXE ED07 aMXDBR R,R Multiply (LB/EB) RRE B307 aMXDR R,R Multiply (LH/EH) RR 27 MXR R,R Multiply (EH) RR 26 N R,D(X,B) And RX 54 cNC D(L,B),D(B) And| SS D4 cNI D(B),I And SI 94 cNR R,R And RR 14 cO R,D(X,B) Or RX 56 cOC D(L,B),D(B) Or| SS D6 cOI D(B),I Or SI 96 cOR RR Or RR 16 cPACK D(L,B),D(L,B) Pack| SS F2 PALB Purge ALB RRE B248 pPC D(B) Program Call S B218 qPCF D(B) Program Call Fast S B218 qPGIN| R,R Page In RRE B22E pcPGOUT| R,R| Page Out RRE B22F pcPKA D(B),D(L,B) Pack ASCII| SS E9 PKU D(B),D(L,B) Pack Unicode| SS E1 PLO R,D(B),R,D (B ) Perform Locked Operation| SS EE cPR Program Return E 0101 quPT R,R Program Transfer RRE B228 qPTLB Purge TLB S B20D pRCHP Reset Channel Path S B23B pcRLL R,R,D(B) Rotate Left Single Logical RSE EB1D RP D(B) Resume Program S B277 qnRRBE R,R Reset Reference Bit Extended RRE B22A pcRSCH Resume Subchannel S B238 pcS R,D(X,B) Subtract RX 5B cSAC D(B) Set Address Space Control S B219 qSACF D(B) Set Address Space Control

FastS B279 q

SAL Set Address Limit S B237 pSAM24 Set Addressing Mode E 010C SAM31 Set Addressing Mode E 010D SAR R,R Set Access RRE B24E SCHM Set Channel Monitor S B23C pSCK D(B) Set Clock S B204 pcSCKC D(B) Set Clock Comparator S B206 pSCKPF Set Clock Programmable Field E 0107 pSD R,D(X,B) Subtract Normalized (LH) RX 6B cSDB R,D(X,B) Subtract (LB) RXE ED1B acSDBR R,R Subtract (LB) RRE B31B acSDR R,R Subtract Normalized (LH) RR 2B cSE R,D(X,B) Subtract Normalized (SH) RX 7B cSEB R,D(X,B) Subtract (SB) RXE ED0B acSEBR R,R Subtract (SB) RRE B30B acSER R,R Subtract Normalized (SH) RR 3B cSFPC R Set FPC RRE B384 aSH R,D(X,B) Subtract Halfword RX 4B cSIE D(B) Start Interpretive Execution S B214 ipSIGP R,R,D(B) Signal Processor| RS AE pcSL R,D(X,B) Subtract Logical RX 5F cSLA R,D(B) Shift Left Single| RS 8B cSLB R,D(X,B) Subtract Logical with Borrow RXE E399 cSLBR R,R Subtract Logical with Borrow RRE B999 cSLDA R,D(B) Shift Left Double| RS 8F cSLDL R,D(B) Shift Left Double Logical| RS 8D SLL R,D(B) Shift Left Single Logical| RS 89 SLR R,R Subtract Logical RR 1F c




For-mat

OpCode

Class&

NotesSP D(L,B),D(L,B) Subtract Decimal| SS FB cSPKA D(B) Set PSW Key from Address S B20A qSPM R Set Program Mask RR 04 nSPT D(B) Set CPU Timer S B208 pSPX D(B) Set Prefix S B210 pSQD R,D(X,B) Square Root (LH) RXE ED35 aSQDB R,D(X,B) Square Root (LB) RXE ED15 aSQDBR R,R Square Root (LB) RRE B315 aSQDR R,R Square Root (LH) RRE B244 SQE R,D(X,B) Square Root (SH) RXE ED34 aSQEB R,D(X,B) Square Root (SB) RXE ED14 aSQEBR R,R Square Root (SB) RRE B314 aSQER R,R Square Root (SH) RRE B245 SQXR R,R Square Root (EH) RRE B336 aSQXBR R,R Square Root (EB) RRE B316 aSR R,R Subtract RR 1B cSRA R,D(B) Shift Right Single| RS 8A cSRDA R,D(B) Shift Right Double| RS 8E cSRDL R,D(B) Shift Right Double Logical| RS 8C SRL R,D(B) Shift Right Single Logical| RS 88 SRNM D(B) Set Rounding Mode S B299 aSRP D(L,B),D(B),I Shift and Round Decimal| SS F0 cSRST R,R Search String RRE B25E cSSAR R Set Secondary ASN RRE B225 SSCH D(B) Start Subchannel S B233 pcSSKE R,R Set Storage Key Extended RRE B22B pSSM D(B) Set System Mask S 80 pST R,D(X,B) Store RX 50 STAM R,R,D(B) Store Access Multiple| RS 9B STAP D(B) Store CPU Address S B212 pSTC R,D(X,B) Store Character RX 42 STCK D(B) Store Clock S B205 cSTCKC D(B) Store Clock Comparator S B207 pSTCKE D(B) Store Clock Extended S B278 cSTCM R,M,D(B) Store Characters under Mask| RS BE STCPS D(B) Store Channel Path Status S B23A pSTCRW D(B) Store Channel Report Word S B239 pcSTCTL R,R,D(B) Store Control| RS B6 pSTD R,D(X,B) Store (L) RX 60 STE R,D(X,B) Store (S) RX 70 STFL D(B) Store Facility List S B2B1 pSTFPC D(B) Store FPC S B29C aSTH R,D(X,B) Store Halfword RX 40 STIDP D(B) Store CPU ID S B202 pSTM R,R,D(B) Store Multiple| RS 90 STNSM D(B),I Store Then And System Mask SI AC pSTOSM D(B),I Store Then Or System Mask SI AD pSTPT D(B) Store CPU Timer S B209 pSTPX D(B) Store Prefix S B211 pSTRV R,D(X,B) Store Reversed RXE E33E STRVH R,D(X,B) Store Reversed RXE E33F STSI D(B) Store System Information S B27D pcSTSCH D(B) Store Subchannel S B234 pcSTURA R,R Store Using Real Address RRE B246 pSU R,D(X,B) Subtract Unnormalized (SH) RX 7F cSUR R,R Subtract Unnormalized (SH) RR 3F cSVC I Supervisor Call| I 0A SW R,D(X,B) Subtract Unnormalized (LH) RX 6F cSWR R,R Subtract Unnormalized (LH) RR 2F cSXBR R,D Subtract (EB) RRE B34B acSXR R,D Subtract Normalized (EH) RR 37 cTAM Test Addressing Mode E 010B cTAR R,R Test Access RRE B24C cTB R,R Test Block RRE B22C ipcTBDR R,M,R Convert HFP to BFP (LH/LB)| RRF B351 acTBEDR R,M,R Convert HFP to BFP (LH/SB)| RRF B350 acTCDB R,D(X,B) Test Data Class (LB) RXE ED11 acTCEB R,D(X,B) Test Data Class (SB) RXE ED10 acTCXB R,D(X,B) Test Data Class (EB) RXE ED12 acTHDER R,R Convert BFP to HFP (SB/LH) RRE B358 acTHDR R,R Convert BFP to HFP (LB/LH) RRE B359 acTM D(B),I Test under Mask SI 91 cTMH R,I Test under Mask High| RI A70 cTML R,I Test under Mask Low| RI A71 cTP D(L,B) Test Decimal RSL EBC0 c E2TPI D(B) Test Pending Interruption S B236 pcTPROT D(B),D(B) Test Protection SSE E501 pcTR D(L,B),D(B) Translate| SS DC TRACE R,R,D(B) Trace| RS 99 pTRAP2 Trap E 01FF TRAP4 D(B) Trap S B2FF TRE R,R Translate Extended RRE B2A5 cTROO R,R Translate One to One RRE B993 cTROT R,R Translate One to Two RRE B992 cTRT D(L,B),D(B) Translate and Test| SS DD cTRTO R,R Translate Two to One RRE B991 cTRTT R,R Translate Two to Two RRE B990 cTS D(B) Test and Set S 93 cTSCH D(B) Test Subchannel S B235 pc

9



For-mat

OpCode

Class&

NotesUNPK D(L,B),D(L,B) Unpack| SS F3 UNPKA D(L,B),D(B) Unpack ASCII| SS EA cUNPKU D(L,B),D(B) Unpack Unicode| SS E2 cUPT Update Tree E 0102 icVA VR,VR,RS(RT) Add VST A420 IMVACD VR,RS(RT) Accumulate (LH) VST A417 IMVACDR VR,VR Accumulate (LH) VV A517 IMVACE VR,RS(RT) Accumulate (SH/LH) VST A407 IMVACER VR,VR Accumulate (SH/LH) VV A507 IMVACRS D(B) Restore VAC S A6CB NO pVACSV D(B) Save VAC S A6CA NO pVAD VR,VR,RS(RT) Add (LH) VST A410 IMVADQ VR,FR,VR Add (LH) QV A590 IMVADR VR,VR,VR Add (LH) VV A510 IMVADS VR,FR,RS(RT) Add (LH) QST A490 IMVAE VR,VR,RS(RT) Add (SH) VST A400 IMVAEQ VR,FR,VR Add (SH) QV A580 IMVAER VR,VR,VR Add (SH) VV A500 IMVAES VR,FR,RS(RT) Add (SH) QST A480 IMVAQ VR,GR,VR Add QV A5A0 IMVAR VR,VR,VR Add VV A520 IMVAS VR,GR,RS(RT) Add QST A4A0 IMVC M,VR,RS(RT) Compare VST A428 ICVCD M,VR,RS(RT) Compare (LH) VST A418 ICVCDQ M,FR,VR Compare (LH) QV A598 ICVCDR M,VR,VR Compare (LH) VV A518 ICVCDS M,FR,RS(RT) Compare (LH) QST A498 ICVCE M,VR,RS(RT) Compare (SH) VST A408 ICVCEQ M,FR,VR Compare (SH) QV A588 ICVCER M,VR,VR Compare (SH) VV A508 ICVCES M,FR,RS(RT) Compare (SH) QST A488 ICVCOVM GR Count Ones in VMR RRE A643 NC cVCQ M,GR,VR Compare QV A5A8 ICVCR M,VR,VR Compare VV A528 ICVCS M,GR,RS(RT) Compare QST A4A8 ICVCVM Complement VMR RRE A641 NCVCZVM GR Count Left Zeros in VMR RRE A642 NC cVDD VR,VR,RS(RT) Divide (LH) VST A413 IMVDDQ VR,FR,VR Divide (LH) QV A593 IMVDDR VR,VR,VR Divide (LH) VV A513 IMVDDS VR,FR,RS(RT) Divide (LH) QST A493 IMVDE VR,VR,RS(RT) Divide (SH) VST A403 IMVDEQ VR,FR,VR Divide (SH) QV A583 IMVDER VR,VR,VR Divide (SH) VV A503 IMVDES VR,FR,RS(RT) Divide (SH) QST A483 IMVL VR,RS,(RT) Load VST A409 ICVLBIX VR,GR,D(B) Load Bit Index RSE E428 IG cVLCDR VR,VR Load Complement (LH) VV A552 IMVLCER VR,VR Load Complement (SH) VV A542 IMVLCR VR,VR Load Complement VV A562 IMVLCVM RS Load VMR Complement VS A681 NCVLD VR,RS(RT) Load (LH) VST A419 ICVLDQ VR,FR Load (LH) QV A599 ICVLDR VR,VR Load (LH) VV A519 ICVLE VR,RS(RT) Load (SH) VST A409 ICVLEL VR,GR,GR Load Element VR A628 N1VLELD VR,FR,GR Load Element (LH) VR A618 N1VLELE VR,FR,GR Load Element (SH) VR A608 N1VLEQ VR,FR Load (SH) QV A589 ICVLER VR,FR Load (SH) VV A509 ICVLH VR,RS(RT) Load Halfword VST A429 ICVLI VR,VR,D(B) Load Indirect RSE E400 ICVLID VR,VR,D(B) Load Indirect (LH) RSE E410 ICVLIE VR,VR,D(B) Load Indirect (SH) RSE E400 ICVLINT VR,RS(RT) Load Integer Vector VST A42A ICVLM VR,RS(RT) Load Matched VST A40A ICVLMD VR,RS(RT) Load Matched (LH) VST A41A ICVLMDQ VR,FR Load Matched (LH) QV A59A ICVLMDR VR,VR Load Matched (LH) VV A51A ICVLME VR,RS(RT) Load Matched (SH) VST A40A ICVLMEQ VR,FR Load Matched (SH) QV A58A ICVLMER VR,VR Load Matched (SH) VV A50A ICVLMQ VR,GR Load Matched QV A5AA ICVLMR VR,VR Load Matched VV A50A ICVLNDR VR,VR Load Negative (LH) VV A551 IMVLNER VR,VR Load Negative (SH) VV A541 IMVLNR VR,VR Load Negative VV A561 IMVLPDR VR,VR Load Positive (LH) VV A550 IMVLPER VR,VR Load Positive (SH) VV A540 IMVLPR VR,VR Load Positive VV A560 IMVLQ VR,GR Load QV A5A9 ICVLR VR,VR Load VV A509 ICVLVCA D(B) Load VCT from Address S A6C4 N0 cVLVCU GR Load VCT and Update RRE A645 N0 cVLVM RS Load VMR VS A680 N0VLVXA D(B) Load VIX from Address S A6C7 N0 cVLY VR,RS(RT) Load Expanded VST A40B ICVLYD VR,RS(RT) Load Expanded (LH) VST A41B ICVLYE VR,RS(RT) Load Expanded (SH) VST A40B IC




For-mat

OpCode

Class&

NotesVLZDR VR Load Zero (LH) VV A51B ICVLZER VR Load Zero (SH) VV A50B ICVLZR VR Load Zero VV A50B ICVM VR,VR,RS(RT) Multiply VST A422 IMVMAD VR,VR,RS(RT) Multiply and Add (LH) VST A414 IMVMADQ VR,FR,VR Multiply and Add (LH) QV A594 IMVMADS VR,FR,RS(RT) Multiply and Add (LH) QST A494 IMVMAE VR,VR,RS(RT) Multiply and Add (SH/LH) VST A404 IMVMAEQ VR,FR,VR Multiply and Add (SH/LH) QV A584 IMVMAES VR,FR,RS(RT) Multiply and Add (SH/LH) QST A484 IMVMCD VR,VR,RS(RT) Multiply and Accumulate (LH) VST A416 IMVMCDR VR,VR,VR Multiply and Accumulate (LH) VV A516 IMVMCE VR,VR,RS(RT) Multiply and Accumulate

(SH/LH)VST A406 IM

VMCER VR,VR,VR Multiply and Accumulate(SH/LH)

VV A506 IM

VMD VR,VR,RS(RT) Multiply (LH) VST A412 IMVMDQ VR,FR,VR Multiply (LH) QV A592 IMVMDR VR,VR,VR Multiply (LH) VV A512 IMVMDS VR,FR,RS(RT) Multiply (LH) QST A492 IMVME VR,VR,RS(RT) Multiply (SH/LH) VST A402 IMVMEQ VR,FR,VR Multiply (SH/LH) QV A582 IMVMER VR,VR,VR Multiply (SH/LH) VV A502 IMVMES VR,FR,RS(RT) Multiply (SH/LH) QST A482 IMVMNSD VR,FR,GR Minimum Signed (LH) VR A611 IMVMNSE VR,FR,GR Minimum Signed (SH) VR A601 IMVMQ VR,GR,VR Multiply QV A5A2 IMVMR VR,VR,VR Multiply VV A522 IMVMRRS D(B) Restore VMR S A6C3 NZVMRSV D(B) Save VMR S A6C1 NZVMS VR,GR,RS(RT) Multiply QST A4A2 IMVMSD VR,VR,RS(RT) Multiply and Subtract (LH) VST A415 IMVMSDQ VR,FR,VR Multiply and Subtract (LH) QV A595 IMVMSDS VR,FR,RS(RT) Multiply and Subtract (LH) QST A495 IMVMSE VR,VR,RS(RT) Multiply and Subtract (SH/LH) VST A405 IMVMSEQ VR,FR,VR Multiply and Subtract (SH/LH) QV A585 IMVMSES VR,FR,RS(RT) Multiply and Subtract (SH/LH) QST A485 IMVMXAD VR,FR,GR Maximum Absolute (LH) VR A612 IMVMXAE VR,FR,GR Maximum Absolute (SH) VR A602 IMVMXSD VR,FR,GR Maximum Signed (LH) VR A610 IMVMXSE VR,FR,GR Maximum Signed (SH) VR A600 IMVN VR,VR,RS(RT) And VST A424 IMVNQ VR,GR,VR And QV A5A4 IMVNR VR,VR,VR And VV A524 IMVNS VR,GR,RS(RT) And QST A4A4 IMVNVM RS And to VMR VS A684 NCVO VR,VR,RS(RT) Or VST A425 IMVOQ VR,VR,VR Or QV A5A5 IMVOR VR,VR,VR Or VV A525 IMVOS VR,GR,RS(RT) Or QST A4A5 IMVOVM RS Or to VMR VS A685 NCVRCL D(B) Clear VR S A6C5 IZVRRS GR Restore VR RRE A648 IZ xcVRSV GR Save VR RRE A64A IZ cVRSVC GR Save Changed VR RRE A649 IZ pcVS VR,VR,RS(RT) Subtract VST A421 IMVSD VR,VR,RS(RT) Subtract (LH) VST A411 IMVSDQ VR,FR,VR Subtract (LH) QV A591 IMVSDR VR,VR,VR Subtract (LH) VV A511 IMVSDS VR,FR,RS(RT) Subtract (LH) QST A491 IMVSE VR,VR,RS(RT) Subtract (SH) VST A401 IMVSEQ VR,FR,VR Subtract (SH) QV A581 IMVSER VR,VR,VR Subtract (SH) VV A501 IMVSES VR,FR,RS(RT) Subtract (SH) QST A481 IMVSLL VR,VR,D(B) Shift Left Single Logical RSE E425 IMVSPSD VR,FR Sum Partial Sums (LH) VR A61A IPVSQ VR,GR,VR Subtract QV A5A1 IMVSQD VR,RS(RT) Square Root (LH) VST A453 IMVSQDR VR,VR Square Root (LH) VV A553 IMVSQE VR,RS(RT) Square Root (SH) VST A443 IMVSQER VR,VR Square Root (SH) VV A543 IMVSR VR,VR,VR Subtract VV A521 IMVSRL VR,VR,D(B) Shift Right Single Logical RSE E424 IMVSRRS D(B) Restore VSR S A6C2 IZ xVSRSV D(B) Save VSR S A6C0 N0 xVSS VR,GR,RS(RT) Subtract QST A4A1 IMVST VR,RS(RT) Store VST A40D ICVSTD VR,RS(RT) Store (LH) VST A41D ICVSTE VR,RS(RT) Store (SH) VST A40D ICVSTH VR,RS(RT) Store Halword VST A42D ICVSTI VR,VRD(B) Store Indirect RSE E401 ICVSTID VR,VRD(B) Store Indirect (LH) RSE E411 ICVSTIE VR,VRD(B) Store Indirect (SH) RSE E401 ICVSTK VR,RS(RT) Store Compressed VST A40F ICVSTKD VR,RS(RT) Store Compressed (LH) VST A41F ICVSTKE VR,RS(RT) Store Compressed (SH) VST A40F ICVSTM VR,RS(RT) Store Matched VST A40E ICVSTMD VR,RS(RT) Store Matched (LH) VST A41E ICVSTME VR,RS(RT) Store Matched (SH) VST A40E IC

11



For-mat

OpCode

Class&

NotesVSTVM RS Store VMR VS A682 NCVSTVP D(B) Store Vector Parameters S A6C8 N0VSVMM D(B) Set Vector Mask Mode S A6C6 N0VTAD VR,VR,RS(RT) Multiply then ADD (LH) VST A454 IMVTAE VR,VR,RS(RT) Multiply then ADD (SH/LH) VST A444 IMVTSD VR,VR,RS(RT) Multiply then Subtract (LH) VST A455 IMVTSE VR,VR,RS(RT) Multiply then Subtract (SH/LH) VST A445 IMVTVM Test VMR RRE A640 NC cVX VR,VR,RS(RT) Exclusive Or VST A426 IMVXEL VR,GR,GR Extract Element VR A629 N1VXELD VR,FR,GR Extract Element (LH) VR A619 N1VXELE VR,FR,GR Extract Element (SH) VR A609 N1VXQ VR,GR,VR Exclusive Or QV A5A6 IMVXR VR,VR,VR Exclusive Or VV A526 IMVXS VR,GR,RS(RT) Exclusive Or QST A4A6 IMVXVC GR Extract VCT RRE A644 N0VXVM RS Exclusive Or to VMR VS A686 NCVXVMM GR Extract Vector Mask Mode RRE A646 N0VZPSD VR Zero Partial Sums (LH) VR A61B IPX R,D(X,B) Exclusive Or RX 57 cXC D(L,B),D(B) Exclusive Or| SS D7 cXI D(B),I Exclusive Or SI 97 cXR R,R Exclusive Or RR 17 cXSCH Cancel Subchannel S B276 pcZAP D(L,B),D(L,B) Zero and Add| SS F8 c--- Model-dependent Diagnose -- 83 pu

Floating-Point Operand Lengthsand Types:

Notes:

(x) Source and result(x/y) Source (x) and result (y)E Extended (binary or hex)EB Extended binaryEH Extended hexL Long (binary or hex)LB Long binaryLH Long hexS Short (binary or hex)SB Short binarySH Short hex32 32-bit integer

a Additional-floating-point instructionc Condition code seti Interruptible instructionn New condition code loadedp Privileged instructionq Semiprivileged instructionu Condition code is unpredictable or may

be set| HM Hexadecimal multiply-and-add/subtract| facility| MS Message-security assist facility

Class (for instructions subject to vector-control bit, CR 0 bit 14):IC Interruptible; (VCT – VIX) elements processedIG Interruptible; either (bit count in a general register) elements or

(section-size – VIX) elements processed, whichever is fewerIM Interruptible; (VCT – VIX) elements processed, vector-mask modeIP Interruptible; (partial-sum-number – VIX) elements processedIZ Interruptible; (section-size) elements processedNC Not interruptible; (VCT) elements processedNZ Not interruptible; (section-size) elements processedN0 Not interruptible; no elements processed (VSR/VAC housekeeping)N1 Not interruptible; one element processed

Machine Instructions by Operation CodeOpCode

Mne-monic

OpCode

Mne-monic

OpCode

Mne-monic

0101 PR 18 LR 30 LPER0102 UPT 19 CR 31 LNER0107 SCKPF 1A AR 32 LTER010B TAM 1B SR 33 LCER010C SAM24 1C MR 34 HER010D SAM31 1D DR 35 LEDR01FF TRAP2 1E ALR 35 LRER04 SPM 1F SLR 36 AXR05 BALR 20 LPDR 37 SXR06 BCTR 21 LNDR 38 LER07 BCR 22 LTDR 39 CER0A SVC 23 LCDR 3A AER0B BSM 24 HDR 3B SER0C BASSM 25 LDXR 3C MDER0D BASR 25 LRDR 3C MER0E MVCL 26 MXR 3D DER0F CLCL 27 MXDR 3E AUR10 LPR 28 LDR 3F SUR11 LNR 29 CDR 40 STH12 LTR 2A ADR 41 LA13 LCR 2B SDR 42 STC14 NR 2C MDR 43 IC15 CLR 2D DDR 44 EX16 OR 2E AWR 45 BAL17 XR 2F SWR 46 BCT


Machine Instructions by Operation Code (Cont'd)

OpCode

Mne-monic

OpCode

Mne-monic

OpCode

Mne-monic

47 BC A422 VM A611 VMNSD48 LH A424 VN A612 VMXAD49 CH A425 VO A618 VLELD4A AH A426 VX A619 VXELD4B SH A428 VC A61A VSPSD4C MH A429 VLH A61B VZPSD4D BAS A42A VLINT A628 VLEL4E CVD A42D VSTH A629 VXEL4F CVB A443 VSQE A640 VTVM50 ST A444 VTAE A641 VCVM51 LAE A445 VTSE A642 VCZVM54 N A453 VSQD A643 VCOVM55 CL A454 VTAD A644 VXVC56 O A455 VTSD A645 VLVCU57 X A480 VAES A646 VXVMM58 L A481 VSES A648 VRRS59 C A482 VMES A649 VRSVC5A A A483 VDES A64A VRSV5B S A484 VMAES A680 VLVM5C M A485 VMSES A681 VLCVM5D D A488 VCES A682 VSTVM5E AL A490 VADS A684 VNVM5F SL A491 VSDS A685 VOVM60 STD A492 VMDS A686 VXVM67 MXD A493 VDDS A6C0 VSRSV68 LD A494 VMADS A6C1 VMRSV69 CD A495 VMSDS A6C2 VSRRS6A AD A498 VCDS A6C3 VMRRS6B SD A4A0 VAS A6C4 VLVCA6C MD A4A1 VSS A6C5 VRCL6D DD A4A2 VMS A6C6 VSVMM6E AW A4A4 VNS A6C7 VLVXA6F SW A4A5 VOS A6C8 VSTVP70 STE A4A6 VXS A6CA VACSV71 MS A4A8 VCS A6CB VACRS78 LE A500 VAER A70 TMH79 CE A501 VSER A71 TML7A AE A502 VMER A74 BRC7B SE A503 VDER A75 BRAS7C MDE A506 VMCER A76 BRCT7C ME A507 VACER A78 LHI7D DE A508 VCER A7A AHI7E AU A509 VLER A7C MHI7F SU A509 VLR A7E CHI80 SSM A50A VLMER A8 MVCLE82 LPSW A50A VLMR A9 CLCLE83 Diagnose A50B VLZER AC STNSM84 BRXH A50B VLZR AD STOSM85 BRXLE A510 VADR AE SIGP86 BXH A511 VSDR AF MC87 BXLE A512 VMDR B1 LRA88 SRL A513 VDDR B202 STIDP89 SLL A516 VMCDR B204 SCK8A SRA A517 VACDR B205 STCK8B SLA A518 VCDR B206 SCKC8C SRDL A519 VLDR B207 STCKC8D SLDL A51A VLMDR B208 SPT8E SRDA A51B VLZDR B209 STPT8F SLDA A520 VAR B20A SPKA90 STM A521 VSR B20B IPK91 TM A522 VMR B20D PTLB92 MVI A524 VNR B210 SPX93 TS A525 VOR B211 STPX94 NI A526 VXR B212 STAP95 CLI A528 VCR B214 SIE96 OI A540 VLPER B218 PC97 XI A541 VLNER B218 PCF98 LM A542 VLCER B219 SAC99 TRACE A543 VSQER B21A CFC9A LAM A550 VLPDR B221 IPTE9B STAM A551 VLNDR B222 IPMA400 VAE A552 VLCDR B223 IVSKA401 VSE A553 VSQDR B224 IACA402 VME A560 VLPR B225 SSARA403 VDE A561 VLNR B226 EPARA404 VMAE A562 VLCR B227 ESARA405 VMSE A580 VAFQ B228 PTA406 VMCE A581 VSEQ B229 ISKEA407 VACE A582 VMEQ B22A RRBEA408 VCE A583 VDEQ B22B SSKEA409 VL A584 VMAEQ B22C TBA409 VLE A585 VMSEQ B22D DXRA40A VLM A588 VCEQ B22E PGINA40A VLME A589 VLEQ B22F PGOUTA40B VLY A58A VLMEQ B230 CSCHA40B VLYE A590 VADQ B231 HSCHA40D VST A591 VSDQ B232 MSCHA40D VSTE A592 VMDQ B233 SSCHA40E VSTM A593 VDDQ B234 STSCHA40E VSTME A594 VMADQ B235 TSCHA40F VSTK A595 VMSDQ B236 TPIA40F VSTKE A598 VCDQ B237 SALA410 VAD A599 VLDQ B238 RSCHA411 VSD A59A VLMDQ B239 STCRWA412 VMD A5A0 VAQ B23A STCPSA413 VDD A5A1 VSQ B23B RCHPA414 VMAD A5A2 VMQ B23C SCHMA415 VMSD A5A4 VNQ B240 BAKRA416 VMCD A5A5 VOQ B241 CKSMA417 VACD A5A6 VXQ B244 SQDRA418 VCD A5A8 VCQ B245 SQERA419 VLD A5A9 VLQ B246 STURAA41A VLMD A5AA VLMQ B247 MSTAA41B VLYD A600 VMXSE B248 PALBA41D VSTD A601 VMNSE B249 EREGA41E VSTMD A602 VMXAE B24A ESTAA41F VSTKD A608 VLELE B24B LURAA420 VA A609 VXELE B24C TARA421 VS A610 VMXSD B24D CPYA

13

Machine Instructions by Operation Code (Cont'd)

OpCode

Mne-monic

OpCode

Mne-monic

OpCode

Mne-monic

B24E SAR B3B4 CEFR | ED3E| MADB24F EAR B3B5 CDFR | ED3F| MSDB250 CSP B3B6 CXFR EE PLOB252 MSR B3B8 CFER F0 SRPB254 MVPG B3B9 CFDR F1 MVOB255 MVST B3BA CFXR F2 PACKB257 CUSE B6 STCTL F3 UNPKB258 BSG B7 LCTL F8 ZAPB25A BSA | B91E| KMAC F9 CPB25D CLST B91F LRVR FA APB25E SRST | B92E| KM FB SPB263 CMPSC | B92F| KMC FC MPB276 XSCH | B93E| KIMD FD DPB277 RP | B93F| KLMDB278 STCKE B98D EPSWB279 SACF B990 TRTTB27D STSI B991 TRTOB299 SRNM B992 TROTB29C STFPC B993 TROOB29D LFPC B996 MLRB2A5 TRE B997 DLRB2A6 CUUTF B998 ALCRB2A7 CUTFU B999 SLBRB2B1 STFL BA CSB2FF TRAP4 BB CDSB300 LPEBR BD CLMB301 LNEBR BE STCMB302 LTEBR BF ICMB303 LCEBR C00 LARLB304 LDEBR C04 BRCLB305 LXDBR C05 BRASLB306 LXEBR D1 MVNB307 MXDBR D2 MVCB308 KEBR D3 MVZB309 CEBR D4 NCB30A AEBR D5 CLCB30B SEBR D6 OCB30C MDEBR D7 XCB30D DEBR D9 MVCKB30E MAEBR DA MVCPB30F MSEBR DB MVCSB310 LPDBR DC TRB311 LNDBR DD TRTB312 LTDBR DE EDB313 LCDBR DF EDMKB314 SQEBR E1 PKUB315 SQDBR E2 UNPKUB316 SQXBR E31E LRVB317 MEEBR E31F LRVHB318 KDBR E33E STRVB319 CDBR E33F STRVHB31A ADBR E396 MLB31B SDBR E397 DLB31C MDBR E398 ALCB31D DDBR E399 SLBB31E MADBR E400 VLIB31F MSDBR E400 VLIEB324 LDER E401 VSTIB325 LXDR E401 VSTIEB326 LXER E410 VLID

| B32E| MAER E411 VSTID| B32F| MSER E424 VSRL

B336 SQXR E425 VSLLB337 MEER E428 VLBIX

| B33E| MADR E500 LASP| B33F| MSDR E501 TPROT

B340 LPXBR E50E MVCSKB341 LNXBR E50F MVCDKB342 LTXBR E8 MVCINB343 LCXBR E9 PKAB344 LEDBR EA UNPKAB345 LDXBR EB1D RLLB346 LEXBR EB8E MVCLUB347 FIXBR EB8F CLCLUB348 KXBR EBC0 TPB349 CXBR ED04 LDEBB34A AXBR ED05 LXDBB34B SXBR ED06 LXEBB34C MXBR ED07 MXDBB34D DXBR ED08 KEBB350 TBEDR ED09 CEBB351 TBDR ED0A AEBB353 DIEBR ED0B SEBB357 FIEBR ED0C MDEBB358 THDER ED0D DEBB359 THDR ED0E MAEBB35B DIDBR ED0F MSEBB35F FIDBR ED10 TCEBB360 LPXR ED11 TCDBB361 LNXR ED12 TCXBB362 LTXR ED14 SQEBB363 LCXR ED15 SQDBB365 LXR ED17 MEEBB366 LEXR ED18 KDBB367 FIXR ED19 CDBB369 CXR ED1A ADBB374 LZER ED1B SDBB375 LZDR ED1C MDBB376 LZXR ED1D DDBB377 FIER ED1E MADBB37F FIDR ED1F MSDBB384 SFPC ED24 LDEB38C EFPC ED25 LXDB394 CEFBR ED26 LXEB395 CDFBR | ED2E| MAEB396 CXFBR | ED2F| MSEB398 CFEBR ED34 SQEB399 CFDBR ED35 SQDB39A CFXBR ED37 MEE


Condition CodesCondition Code → 0 1 2 3Mask Bit Value → 8 4 2 1

GeneralInstructions

Add Zero < Zero > Zero Overflow

Add Halfword Zero < Zero > Zero Overflow

Add Halfword Immediate

Zero < Zero > Zero Overflow

Add Logical Zero,no carry

Not zero,no carry

Zero,carry

Not zero,carry

Add Logical with Carry

Zero,no carry

Not zero,no carry

Zero,carry

Not zero,carry

And Zero Not zero ---- ----

Checksum Checksumcomplete

---- ---- CPU-deter-minedcompletion

| Cipher Message| Normal| completion| ----| ----| Partial| completion

| Cipher Message| with Chaining| Normal| completion| ----| ----| Partial| completion

Compare Equal First oplow

First ophigh

----

Compare and Form Codeword

Equal First oplow andctl = 0,or first ophigh andctl = 1

First ophigh andctl = 0,or first oplow andctl = 1

----

Compare and Swap Equal Not equal ---- ----

Compare Double and Swap

Equal Not equal ---- ----

Compare Halfword Equal First oplow

First ophigh

----

Compare Halfword Immediate

Equal First oplow

First ophigh

----

Compare Logical Equal First oplow

First ophigh

----

Compare Logical Characters under Mask

Equal, orMask iszero

First oplow

First ophigh

----

Compare Logical Long

Equal First oplow

First ophigh

----

Compare Logical Long Extended

Equal First oplow

First ophigh

CPU-deter-minedcompletion

Compare Logical Long Unicode

Equal First oplow

First ophigh


Compare Logical String

Equal First oplow

First ophigh


Compare until Sub- string Equal

Equalsub-string

Lastbytesequal

Lastbytesunequal


Compression Call Second opend

First opend, notsecond opend

---- CPU-deter-minedcompletion

| Compute Intermed.| Message Digest| Normal| completion| ----| ----| Partial| completion

| Compute Last| Message Digest| Normal| completion| ----| ----| Partial| completion

| Compute Message| Authen. Code| Normal| completion| ----| ----| Partial| completion

Convert Unicode to UTF-8

Dataprocessed

First opfull


Convert UTF-8 to Unicode

Dataprocessed

First opfull


Exclusive Or Zero Not zero ---- ----

15

Condition Codes (Cont'd)

Condition Code → 0 1 2 3Mask Bit Value → 8 4 2 1

Insert Characters under Mask

All zero,or maskis zero

Leftmostbit = 1

Not zero,but withleftmostbit = 0

----

Load and Test Zero < Zero > Zero ----

Load Complement Zero < Zero > Zero Overflow

Load Negative Zero < Zero ---- ----

Load Positive Zero ---- > Zero Overflow

Move Long Operandlengthsequal

First opshorter

First oplonger

Overlap

Move Long Extended

Operandlengthsequal

First opshorter

First oplonger


Move Long Unicode Operandlengthsequal

First opshorter

First oplonger


Move Page Datamoved

First opinvalid,both validin ES,locked, orES error

Second opinvalid

----

Move String ---- Second opmoved


Or Zero Not zero ---- ----

Perform Locked Operation (test bit zero)

Equal First opnot equal

First opequal,third opnot equal

----

Perform Locked Operation (test bit one)

Codevalid

---- ---- Codeinvalid

Search String ---- Characterfound

Characternot found


Set Program Mask See note See note See note See note

Shift Left Double Zero < Zero > Zero Overflow

Shift Left Single Zero < Zero > Zero Overflow

Shift Right Double Zero < Zero > Zero ----

Shift Right Single Zero < Zero > Zero ----

Store Clock Set state Not-setstate

Errorstate

Stoppedstate ornot opera-tional

Store Clock Set state Not-setstate

Errorstate

Stoppedstate ornot opera-tional

Subtract Zero < Zero > Zero Overflow

Subtract Halfword Zero < Zero > Zero Overflow

Subtract Logical ---- Not zero,borrow

Zero,no borrow

Not zero,no borrow

Subtract Logical with Borrow

Zero,borrow

Not zero,borrow

Zero,no borrow

Not zero,no borrow

Test Addressing Mode

24-bitmode

31-bitmode

---- ----

Test and Set Leftmostbit zero

Leftmostbit one

---- ----

Test under Mask All zeros,or maskis zero

Mixed 0'sand 1's

--- All ones

Test under Mask High

All zerosor maskis zero

Mixed 0'sand 1's andleftmostbit zero

Mixed 0'sand 1's andleftmostbit one

All ones

Test under Mask Low

All zerosor maskis zero

Mixed 0'sand 1's andleftmostbit zero

Mixed 0'sand 1's andleftmostbit one

All ones

Translate and Test All zeros Not zero,scanincomplete

Not zero,scancomplete

----




Translate Extended Dataprocessed

First opbyte equaltest byte


Translate One toOne, One toTwo, Two toOne, Two to Two

Characternot found

Characterfound

---- CPU deter-mindedcompletion

Unpack ASCII Sign plus Sign minus ---- Signinvalid

Unpack Unicode Sign plus Sign minus ---- Signinvalid

Update Tree Compareequal atcurrentnode onpath

Pathcomplete,no nodescomparedequal

---- Path notcompleteand com-paredregisternegative

DecimalInstructions

Add Decimal Zero < Zero > Zero Overflow

Compare Decimal Equal First oplow

First ophigh

----

Edit Zero < Zero > Zero ----

Edit and Mark Zero < Zero > Zero ----

Shift and RoundDecimal

Zero < Zero > Zero Overflow

Subtract Decimal Zero < Zero > Zero Overflow

Test Decimal Digitsand signvalid

Signinvalid

Digitinvalid

Sign anddigitinvalid

Zero and Add Zero < Zero > Zero Overflow

Floating-PointInstructions

Add Zero < Zero > Zero NaN

Add Normalized Zero < Zero > Zero ----

Add Unnormalized Zero < Zero > Zero ----

Compare (BFP) Equal First oplow

First ophigh

Unordered

Compare (HFP) Equal First oplow

First ophigh

----

Compare and Signal

Equal First oplow

First ophigh

Unordered

Convert BFP to HFP

Zero < Zero > Zero Specialcase

Convert HFP to BFP

Zero < Zero > Zero Specialcase

Convert to Fixed Zero < Zero > Zero Specialcase

Divide to Integer Remaindercomplete,quotientnormal

Remaindercomplete,quotientoverflowor NaN

Remainderincomplete,quotientnormal

Remainderincomplete,quotientoverflowor NaN

Load and Test (BFP)

Zero < Zero > Zero NaN

Load and Test (HFP)

Zero < Zero > Zero ----

Load Complement (BFP)

Zero < Zero > Zero NaN

Load Complement (HFP)


Load Negative (BFP)

Zero < Zero ---- NaN

Load Negative (HFP)

Zero < Zero ---- ----

Load Positive (BFP)

Zero ---- > Zero NaN

Load Positive (HFP)

Zero ---- > Zero ----

Subtract Zero < Zero > Zero NaN

17



Subtract Normal- ized


Subtract Unnormal- ized


Test Data Class Zero (nomatch)

One(match)

---- ----

Vector Instructions

Count Left Zeros in VMR

Activebits allzeros

Activebits 0'sand 1's

---- Activebits allones

Count Ones in VMR

Activebits allzeros



Load Bit Index VCT = 0,bitcount = 0

VCT = 0,bitcount < 0

VCT =sectionsize, bitcount > 0

VCT > 0,bitcount≤0

Load VCT and Update

VCT = 0,result = 0

VCT = 0,result < 0

VCT =sectionsize,result > 0

VCT > 0,result = 0

Load VCT from Address

VCT = 0,addr = 0

VCT = 0,addr < 0

VCT =sectionsize, addr> sectionsize

VCT > 0,addr > 0,addr ≤sectionsize

Load VIX from Address

VIX = 0and effaddr = 0

VIX = 0and effaddr < 0

VIX > 0and <VCT

VIX > 0and ≥VCT

Restore VR VR pair 14examinedand notrestores

VR pairOtherthan14 examin-ed and notrestored

VR pair 14restored

VR pairother than14restored

Save Changed VR VR pair 14examinedand notsaved

VR pairother than14examinedand notsaved

VR pair 14saved

VR pairother than14 saved

Save VR VR pair 14examinedand notsaved

VR pairother than14examinedand notsaved

VR pair 14saved

VR pairother than14 saved

Test VMR Activebits allzeros



ControlInstructions

Compare and Swap and Purge

Equal Not equal ---- ----

Diagnose See note See note See note See note

Extract Stacked State

Branchstateentry

Programcallstateentry

---- ----

Insert Address Space Control

Primary-spacemode

Secondary-spacemode

Access-registermode

Home-spacemode

Load Address Space Parame- ters

Para-metersloaded

Primarynotavailable

Secondarynot auth-orizedor notavailable

Space-switchevent

Load PSW See note See note See note See note

Load Real Address Transla-tionavailable

Segment-tableentryinvalid

Page-tableentryinvalid

Tablelengthexceededor ARTexception

Move to Primary Length≤ 256

---- ---- Length> 256




Move to Secondary Length≤ 256

---- ---- Length> 256

Move with Key Length≤ 256

---- ---- Length> 256

Page In Operationcompleted

ES dataerror

---- ES blocknot avail-able

Page Out Operationcompleted

ES dataerror

---- ES blocknot avail-able

Program Return See note See note See note See note

Reset Reference Bit Extended

Ref = 0,Chg = 0

Ref = 0,Chg = 1

Ref = 1,Chg = 0

Ref = 1,Chg = 1

Resume Program See note See note See note See note

Set Clock Set Secure ---- Not opera-tional

Signal Processor Accepted Statusstored

Busy Not opera-tional

Store System Infor- mation

Infoprovided

---- ---- Info notavailable

Test Access ALET = 0 ALETusesDUALD

ALETusesPSALD

ALET = 1or causesARTexception

Test Block Usable Unusable ---- ----

Test Protection Fetch andstoreallowed

Fetchallowed;no storeallowed

No fetchor storeallowed

Trans-lationnot avail-able

Input/OutputInstructions

Cancel Subchannel Functionstarted

---- ---- Not oper-ational

Clear Subchannel Functionstarted

---- ---- Not opera-tional

Halt Subchannel Functionstarted

Noninter-mediatestatuspending


Modify Subchannel Functionexecuted

Statuspending


Reset Channel Path Functionstarted

---- Busy Not opera-tional

Resume Sub- channel

Functionstarted

Statuspending

Notapplicable

Not opera-tional

Start Subchannel Functionstarted

Statuspending


Store Channel Report Word

CRWstored

Zerosstored

---- ----

Store Subchannel SCHIBstored

---- ---- Not opera-tional

Test Pending Inter- ruption

Inter-ruptionnot pend-ing

Inter-ruptioncodestored

---- ----

Test Subchannel Statuswaspending

Statuswas notpending

---- Not opera-tional

Notes: For Diagnose, the resulting condition code is model-dependent.For Load PSW and Resume Program, the condition code is loaded from the condition-code field of the second operand.For Program Return, the resulting condition code is unpredictable.For Set Program Mask, the condition code is loaded from bit positions 2 and 3 of thefirst operand.

19

| Operand of Store Clock| | Bits -63 of | Time-of-Day (TOD) Clock | | 63

| Note: Bit 51 of the TOD clock corresponds to one microsecond.

Operand of Store Clock Extended Programmable Zeros Time-of-Day (TOD) Clock Field 8 112 127

Note: Bit 51 of the TOD clock (bit 59 of the operand) corresponds to onemicrosecond.

Assembler Instructions

Function Mnemonic MeaningOptioncontrol

*PROCESS ACONTROL

Specify assembler optionsDynamically modify options

Datadefinition

CCWCCW0CCW1DCDS

Define channel command wordDefine format-0 channel command wordDefine format-1 channel command wordDefine constantDefine storage

Programsectioningand linking

ALIASAMODECATTRCOMCSECTCXD DSECTDXDENTRYEXTRNLOCTRRMODERSECTSTARTWXTRNXATTR

Rename external symbolSpecify addressing modeDefine class name and attributesIdentify common control sectionIdentify control sectionCumulative length of external dummy sectionIdentify dummy sectionDefine external dummy sectionIdentify entry-point symbolIdentify external symbolSpecify multiple location countersSpecify residence modeIdentify read-only control sectionStart assemblyIdentify weak external symbolDeclare external symbol attributes

Base registerassignment

DROPUSING

Drop base address registerUse base address and register

Control oflistings

AEJECTASPACECEJECTEJECTPRINTSPACETITLE

Start new page in macro definitionSpace lines in macro definitionConditional start new pageStart new pagePrint optional dataSpace listingIdentify assembly output


Assembler Instructions (Cont'd)

Function Mnemonic MeaningProgramcontrol

ADATACNOPCOPYENDEQUEXITCTLICTLISEQLTORGOPSYNORGPOP PUNCHPUSH REPRO

Provide data for SYSADATA fileConditional no operationCopy predefined source codingEnd assemblyEquate symbolProgram control data for I/O exitsInput format controlInput sequence checkingBegin literal poolEquate operation codeSet location counterRestore ACONTROL, PRINT, or USING status

| Punch a recordSave current ACONTROL, PRINT, or USING status

| Reproduce following record

Conditionalassembly

ACTRAGOAIFAINSERTANOPAREADGBLAGBLBGBLCLCLALCLBLCLCMHELPMNOTESETASETAF SETBSETCSETCF

Conditional assembly branch counterUnconditional branchConditional branchCreate input recordAssembly no operationAssign input record to SETC symbolDefine global SETA symbolDefine global SETB symbolDefine global SETC symbolDefine local SETA symbolDefine local SETB symbolDefine local SETC symbolTrace macro flowGenerate error messageSet arithmetic variable symbolSet arithmetic variable symbol from external functionSet binary variable symbolSet character variable symbolSet character variable symbol from external function

Macrodefinition

MACROMENDMEXIT

Macro definition headerMacro definition trailerMacro definition exit

Source: SC26-4940. Applies also to following two tables.

Extended-Mnemonic Instructions for Branchon Condition

UseExtended Mnemonic*(RX or RR) Meaning

Machine Instr.*(RX or RR)

General B or BRNOP or NOPR

Unconditional BranchNo Operation

BC or BCR 15,BC or BCR 0,

AfterCompareInstructions(A:B)

BH or BHRBL or BLRBE or BERBNH or BNHRBNL or BNLRBNE or BNER

Branch on A HighBranch on A LowBranch on A Equal BBranch on A Not HighBranch on A Not LowBranch on A Not Equal B

BC or BCR 2,BC or BCR 4,BC or BCR 8,BC or BCR 13,BC or BCR 11,BC or BCR 7,

AfterArithmeticInstructions

BP or BPRBM or BMRBZ or BZRBO or BORBNP or BNPRBNM or BNMRBNZ or BNZRBNO or BNOR

Branch on PlusBranch on MinusBranch on ZeroBranch on OverflowBranch on Not PlusBranch on Not MinusBranch on Not ZeroBranch on No Overflow

BC or BCR 2,BC or BCR 4,BC or BCR 8,BC or BCR 1,BC or BCR 13,BC or BCR 11,BC or BCR 7,BC or BCR 14,

After Testunder Maskinstruction

BO or BORBM or BMRBZ or BZRBNO or BNORBNM or BNMRBNZ or BNZR

Branch if OnesBranch if MixedBranch if ZerosBranch if Not OnesBranch if Not MixedBranch if Not Zeros

BC or BCR 1,BC or BCR 4,BC or BCR 8,BC or BCR 14,BC or BCR 11,BC or BCR 7,

*Second operand, not shown, is D (X, B) for RX format and R for RR format.

21

Extended-Mnemonic Instructions forRelative-Branch Instructions

UseExtendedMnemonic Meaning

MachineInstr.

GeneralBranch Rel.on Condition

BRU or JBRUL or JLUJNOP*

Unconditional Branch RelativeUnconditional Branch RelativeNo Operation

BRC 15,IBRCL 15,IBRC 0,I

AfterCompareInstructions(A:B)

BRH or JH*BRL or JL*BRE or JE*BRNH or JNH*BRNL or JNL*BRNE or JNE*

Branch Relative on A HighBranch Relative on A LowBranch Relative on A Equal BBranch Relative on A Not HighBranch Relative on A Not LowBranch Relative on A Not Equal B

BRC 2,IBRC 4,IBRC 8,IBRC 13,IBRC 11,IBRC 7,I

AfterArithmeticInstructions

BRP or JP*BRM or JM*BRZ or JZ*BRO or JO*BRNP or JNP*BRNM or JNM*BRNZ or JNZ*BRNO or JNO*

Branch Relative on PlusBranch Relative on MinusBranch Relative on ZeroBranch Relative on OverflowBranch Relative on Not PlusBranch Relative on Not MinusBranch Relative on Not ZeroBranch Relative on No Overflow

BRC 2,IBRC 4,IBRC 8,IBRC 1,IBRC 13,IBRC 11,IBRC 7,IBRC 14,I

After Testunder Maskinstruction

BRO or JO*BRM or JM*BRZ or JZ*BRNO or JNO*BRNM or JNM*BRNZ or JNZ*

Branch Relative if OnesBranch Relative if MixedBranch Relative if ZerosBranch Relative if Not OnesBranch Relative if Not MixedBranch Relative if Not Zeros

BRC 1,IBRC 4,IBRC 8,IBRC 14,IBRC 11,IBRC 7,I

Non-BranchRelative onCondition

JASJASLJCTJXHJXLE

Branch Relative and SaveBranch Relative and Save LongBranch Relative on CountBranch Relative on Index HighBr. Rel. on Index Low or Equal

BRAS R,IBRASL R,IBRCT R,IBRXH R,R,IBRXLE R,R,I

*To obtain BRCL instead of BRC, add L at the end of the B mnemonic or insert L afterthe J of the J mnemonic. For example, change BRNZ or JNZ to BRNZL or JLNZ.

CNOP Alignment Doubleword Word Word Halfword Halfword Halfword Halfword

Byte Byte Byte Byte Byte Byte Byte Byte

,4 2,4 ,4 2,4,8 2,8 4,8 6,8

Source: SC26-4940.


Summary of Constants

Type

ImpliedLength,Bytes

| DefaultAlignment Format

Trunca-tion/Padding

A 4 Word Value of address LeftAD 8 Doubleword Value of address LeftB - Byte Binary digits LeftC - Byte Characters RightCU| Even Byte Characters, translated to Unicode RightD 8 Doubleword Long hex floating point RightDB 8 Doubleword Long binary floating point RightDH 8 Doubleword Long hex floating point RightE 4 Word Short hex floating point RightEB 4 Word Short binary floating point RightEH 4 Word Short hex floating point RightF 4 Word Fixed-point binary LeftFD 8 Doubleword Fixed-point binary LeftG Even Byte Graphic (double-byte) characters RightH 2 Halfword Fixed-point binary LeftJ 4 Word Symbol naming a DXD, DSECT, or class LeftL 16 Doubleword Extended hex floating point RightLB 16 Doubleword Extended binary floating point RightLH 16 Doubleword Extended hex floating point RightP - Byte Packed decimal LeftQ 4 Word Symbol naming a DXD or DSECT LeftR 4 Word PSECT address value LeftS 2 Halfword Address in base-displacement form -V 4 Word Externally defined address value -X - Byte Hexadecimal digits LeftY 2 Halfword Value of address LeftZ - Byte Zoned decimal Left

Source: SC26-4940.

Fixed Storage Locations

Area(Dec)

AddrType

HexAddr Function

0-7 A 0 Initial-program-loading PSW0-7 R 0 Restart new PSW8-15 A 8 Initial-program-loading CCW18-15 R 8 Restart old PSW16-23 A 10 Initial-program-loading CCW224-31 R 18 External old PSW32-39 R 20 Supervisor-call old PSW40-47 R 28 Program old PSW48-55 R 30 Machine-check old PSW56-63 R 38 Input/output old PSW88-95 R 58 External new PSW96-103 R 60 Supervisor-call new PSW104-111 R 68 Program new PSW112-119 R 70 Machine-check new PSW120-127 R 78 Input/output new PSW128-131 R 80 External-interruption parameter132-133 R 84 CPU address associated with external inter-

ruption, or zeros134-135 R 86 External-interruption code (see table on

page 24)136-139 R 88 SVC-interruption identification (0-12 zeros,

13-14 ILC, 15 zero, 16-31 code)140-143 R 8C Program-interruption identification (0-12

zeros, 13-14 ILC, 15 zero, 16-31 code)144-147 R 90 Data-exception code (0-23 zeros, 24-31

code (see table on page 26))144-147 R 90 Translation-exception identification (see

table on page 26)148-149 R 94 Monitor-class number (0-7 zeros, 8-15

number)150-151 R 96 PER-1 code (0 successful branching, 1

instruction fetching, 2 storage alteration orstura, 3 general-register alteration, 4-15zeros)

150-151 R 96 PER-2 code (0 successful branching, 1instruction fetching, 2 storage alteration, 2and 4 stura, 3 and 5-8 zeros, 9-13 ATMID,14-15 SI)

152-155 R 98 PER address (0 zero, 1-31 address)156-159 R 9C Monitor code160 R A0 Exception access identification (0-3 zeros,

4-7 access-register number)161 R A1 PER access identification (0-3 zeros, 4-7

access-register number)

23

Fixed Storage Locations (Cont'd)

Area(Dec)

AddrType

HexAddr Function

162 R A2 Operand access identification (if page-translation exception recognized by MovePage (facility 2): 0-3 R, 4-7 R)

163 A/R A3 Store-status/machine-check architectural-mode identification (if z/Architectureinstalled: zeros)

184-187 R B8 Subsystem-identification word (0-14 zeros,15 one, 16-31 subchannel number)

188-191 R BC I/O-interruption parameter192-195 R C0 I/O-interruption-identification word (0-1 zeros,

2-4 I/O-interruption subclass, 5-31 zeros)196-199 R C4 PCF-entry-table origin (0 and 20-31 zeros,

1-19 origin)200-203 R C8 STFL facility list (0 certain z/Architecture

instructions available, 1 z/Architectureinstalled, 2 z/Architecture active, 16extended-translation facility 2 installed)

212-215 A/R D4 Store-status/machine-check extended-save-area address (0 and 20-31 zeros, 1-19address or zeros)**

216-223 A/R D8 Store-status/machine-check CPU-timer savearea

224-231 A/R E0 Store-status/machine-check clock-comparator save area

232-239 R E8 Machine-check-interruption code (seediagram on page 40)

244-247 R F4 External-damage code (see diagram onpage 40)

248-251 R F8 Failing-storage address (0 zero, 1-31address)

256-263 A 100 Store-status PSW save area256-271 R 100 Fixed-logout area*264-267 A 108 Store-status prefix save area288-351 A/R 120 Store-status/machine-check access-register

save area352-383 A/R 160 Store-status/machine-check floating-point-

register save area (registers 0, 2, 4, 6 only)384-447 A/R 180 Store-status/machine-check general-register

save area448-511 A/R 1C0 Store-status/machine-check control-register

save area

A=Absolute address. R=Real address.A/R=A if store status, R if machine check.* Contents may vary among models; see System Library manuals.** Extended-save-area contents: 0-127 floating-point registers 0-15, 128-131floating-point-control register.

External-Interruption CodesAt real-storage locations 134-135 (86-87 hex)

Code(Hex) Condition0040 Interrupt key1003 TOD-clock-sync check1004 Clock comparator1005 CPU timer1200 Malfunction alert1201 Emergency signal1202 External call1406 ETR2401 Service signal


Program-Interruption CodesAt real-storage locations 142-143 (8E-8F hex)

Code(Hex)

Condition

0001 Operation exception0002 Privileged-operation exception0003 Execute exception0004 Protection exception0005 Addressing exception0006 Specification exception0007 Data exceptionnn08* Fixed-point-overflow exception0009 Fixed-point-divide exception000A Decimal-overflow exception000B Decimal-divide exceptionnn0C* HFP-exponent-overflow exceptionnn0D* HFP-exponent-underflow exceptionnn0E* HFP-significance exceptionnn0F* HFP-floating-point-divide exception0010 Segment-translation exception0011 Page-translation exception0012 Translation-specification exception0013 Special-operation exception0015 Operand exception0016 Trace-table exception0017 ASN-translation-specification exception0019 Vector-operation exception001C Space-switch eventnn1D* HFP-square-root exceptionnn1E* Unnormalized-operand exception001F PC-translation-specification exception0020 AFX-translation exception0021 ASX-translation exception0022 LX-translation exception0023 EX-translation exception0024 Primary-authority exception0025 Secondary-authority exception0028 ALET-specification exception0029 ALEN-translation exception002A ALE-sequence exception002B ASTE-validity exception002C ASTE-sequence exception002D Extended-authority exception0030 Stack-full exception0031 Stack-empty exception0032 Stack-specification exception0033 Stack-type exception0034 Stack-operation exception0040 Monitor event0080 PER event (code may be combined with another code)0119 Crypto-operation exception

* Use the exception-extension-code table on page 26 for bits 0-7 (nn) of theprogram-interruption code.

25

Exception-Extension Codea v w w r r r r 7

Bit Meaning0 (a) Arithmetic-partial-completion bit

0 Completion or suppression of instruction, and bits 1-7 of theexception-extension code are also zero

1 Partial completion of vector instruction1 (v) Arithmetic-result location

0 Scalar register1 Vector register

2-3 (ww) Arithmetic-result width01 4-byte result10 8-byte result

4-7 (rrrr) Register number of result register designated by the inter-rupted instruction

Translation-Exception IdentificationAt real-storage locations 144-147 (90-93 hex)

Inter-ruptionCode(Hex)

Exception orEvent Format of Information Stored

0004 Protection If 29 zero: rest unpredictableIf 29 one: suppression, 1-19 address; ifDAT was on, 30-31 STD identification, restunpredictable, location 160 valid; if DATwas off, rest unpredictable

0010 Segment trans-lation

0 secondary address, 1-19 address, 20-29unpredictable, 30-31 STD identification

0011 Page translation 0 secondary address; 1-19 address; 20-28unpredictable; if 29 zero, not Move Page(facility 2); if 29 one, Move Page (facility 2)(see location 162); 30-31 STD identification

001C Space switch From primary-space mode: 0 old primary-space-switch-event control, 1-15 zeros,16-31 old PASNFrom home-space mode: 0 home-space-switch-event control, 1-31 zeros

0020 AFX translation 0-15 zeros, 16-31 address-space number0021 ASX translation 0-15 zeros, 16-31 address-space number0022 LX translation 0-11 zeros, 12-31 program-call number0023 EX translation 0-11 zeros, 12-31 program-call number0024 Primary authority 0-15 zeros, 16-31 address-space number0025 Secondary

authority0-15 zeros, 16-31 address-space number

Data-Exception Code (DXC)At real-storage location 147 (93 hex) and in byte 2 of floating-point-control register

Code(Hex) Data Exception00 Decimal operand01 AFP register02 BFP instruction08 IEEE inexact and truncated0C IEEE inexact and incremented10 IEEE underflow, exact18 IEEE underflow, inexact and truncated1C IEEE underflow, inexact and incremented20 IEEE overflow, exact28 IEEE overflow, inexact and truncated2C IEEE overflow, inexact and incremented40 IEEE division by zero80 IEEE invalid operation


Control RegistersCR Bits Name of Field Associated with Init*0 1

23 456 7

8-12

131415

16

17

18

19

20

2122

2425

262728

29

SSM-suppression controlTOD-clock-sync controlLow-address-protectioncontrolExtraction-authority controlSecondary-space controlFetch-protection-overridecontrolStorage-protection-override controlTranslation format (10110binary)AFP-register controlVector controlAddress-space-functioncontrolMalfunction-alert subclassmaskEmergency-signal subclassmaskExternal-call subclassmaskTOD-clock sync-checksubclass maskClock-comparator subclassmaskCPU-timer subclass maskService-signal subclassmaskUnused (See note)Interrupt-key subclassmaskUnused (See note)ETR subclass maskProgram-call-fastcontrolCrypto control

SSM instructionTOD clockLow-address protection Instruction authorizationInstruction authorizationKey-controlled protection Key-controlled protection Dynamic addresstranslationFloating pointVector operationsInstruction authorization External interruptions External interruptions External interruptions External interruptions External interruptions External interruptionsExternal interruptions External interruptions External interruptionsProgram Call Fast Cryptography

000 000 0 0 000 0 0 0 0 0 00 11 100 0

1 0-31 0

1-19

22

23

24

25-31

Primary segment-tabledesignationPrimary space-switch-event controlPrimary segment-tableoriginPrimary subspace-groupcontrolPrimary private-spacecontrolPrimary storage-alteration-event controlPrimary segment-tablelength

Dynamic addresstranslationProgram interruptions Dynamic addresstranslationSubspace groups Dynamic addresstranslationProgram-event rec. 2 only Dynamic addresstranslation

0 0 0 0 0 0 0

2 1-25 Dispatchable-unit-control-table origin

Access-registertranslation

0

3 0-1516-31

PSW-key maskSecondary ASN

Instruction authorizationAddress spaces

00

4 0-1516-31

Authorization indexPrimary ASN

Instruction authorizationAddress spaces

00

5 &5

01-2425-31-----1-25

Subsystem-linkage controlLinkage-table originLinkage-table length---------------------------Primary-ASTE origin

Instruction authorizationPC-number translationPC-number translation---------------------------Access-register translation

000---0

6 0-7 I/O-interruption subclassmask

I/O interruptions

0

7 0-31

1-19

22

23

24

25-31

Secondary segment-table designationSecondary segment-tableoriginSecondary subspace-groupcontrolSecondary private-spacecontrolSecondary-storage-alteration-event controlSecondary segment-tablelength

Dynamic addresstranslationDynamic addresstranslationSubspace groups Dynamic addresstranslationProgram-event rec. 2 only Dynamic addresstranslation

0 0 0 0 0 0

8 0-15

16-31

Extended authorizationindexMonitor masks

Access-registertranslationMC instruction

0 0

27

Control Registers (Cont'd)

CR Bits Name of Field Associated with Init*9 0

1 2 34 810

16-31

Successful-branching-event maskInstruction-fetching-event maskStorage-alteration-event maskGR-alteration-event maskStore-using-real-address-event maskBranch-address controlStorage-alteration-spacecontrolPER general-registermasks

Program-event recording Program-event recording Program-event recording Program-event rec. 1 onlyProgram-event recording Program-event rec. 2 onlyProgram-event rec. 2 only Program-event rec. 1 only

0 0 0 00 00 0

10 1-31 PER starting address Program-event recording 011 1-31 PER ending address Program-event recording 012 0

1-293031

Branch-trace controlTrace-entry addressASN-trace controlExplicit-trace control

TracingTracingTracingTracing

0000

13 0-31 0

1-19

23

24

25-31

Home segment-tabledesignationHome space-switch-eventcontrolHome segment-tableoriginHome private-spacecontrolHome storage-alteration-event controlHome segment-tablelength

Dynamic addresstranslationProgram interruptions Dynamic addresstranslationDynamic addresstranslationProgram-event rec. 2 only Dynamic addresstranslation

0 0 0 0 0 0

14 012 3 456 710

1213-31

Unused (See note)Unused (See note)Extended-save-areacontrolChannel-report-pendingsubclass maskRecovery subclass maskDegradation subclass maskExternal-damage subclassmaskWarning subclass maskTOD-clock-control-override controlASN-translation controlASN-first-table origin

Floating point I/O machine-checkhandlingMachine-check handlingMachine-check handlingMachine-check handling Machine-check handlingTOD clock Instruction authorizationASN translation

110 0 001 00 00

15 1-28 Linkage-stack-entryaddress

Linkage-stack operations

0

* Value after initial CPU reset.& The interpretation of control register 5 depends on the state of bit 15 ofcontrol register 0, the address-space-function control.Note: This bit is not used but is initialized to one for consistency with the

System/370 definition.


Floating-Point-Control (FPC) RegisterMasksFlagsi z o u x i z o u x DXC RM 8 16 24 31

Bit Meaning0 (IMi) IEEE-invalid-operation mask1 (IMz) IEEE-division-by-zero mask2 (IMo) IEEE-overflow mask3 (IMu) IEEE-underflow mask4 (IMx) IEEE-inexact mask8 (SFi) IEEE-invalid-operation flag9 (SFz) IEEE-division-by-zero flag10 (SFo) IEEE-overflow flag11 (SFu) IEEE-underflow flag12 (SFx) IEEE-inexact flag16-23 (DXC) Data-exception code (see table on page 26)30-31 (RM) Rounding mode

00 Round to nearest01 Round toward 010 Round toward +∞11 Round toward −∞

Program-Status Word (PSW) PSW Program RTIEKey 1MWPASCC Mask 5 8 12 16 18 2 24 31A Instruction Address 32 63

Bit Meaning 1 (R) Program-event-recording mask 5 (T = 1) DAT mode 6 (I) Input/output mask 7 (E) External mask13 (M) Machine-check mask14 (W = 1) Wait state15 (P = 1) Problem state16-17 (AS) Address-space control

xx Real mode (T = 0)00 Primary-space mode (T = 1)01 Access-register mode (T = 1)10 Secondary-space mode (T = 1)11 Home-space mode (T = 1)

18-19 (CC) Condition code20 Fixed-point-overflow mask21 Decimal-overflow mask22 HFP-exponent-underflow mask23 HFP-significance mask32 (A = 1) 31-bit addressing mode

Vector-Status Register M VCT VIX VIU VCH 16 32 48 56 63

Bit Meaning15 (M) Vector-mask-mode bit16-31 (VCT) Vector count32-47 (VIX) Vector interruption index48-55 (VIU) Vector in-use bits56-63 (VCH) Vector change bits

29

Dynamic Address Translation

Dynamic-Address-Translation Format

AddrMode

SegmentSize

PageSize

Virtual Address Fields

IgnoredSegmentIndex

PageIndex

ByteIndex

2431

1M1M

4K4K

0-7 0

8-111-11

12-1912-19

20-3120-31

Note: Control register 0 bits 8-12 must contain 10110 (binary); any othercombination of bits 8-12 is invalid for translation.

Segment-Table Designation (STD)X Segment-Table Origin GPS STL 1 2 22 25 31

Bit Meaning0 (X) Space-switch-event control22 (G) Subspace-group control23 (P) Private-space control24 (S) Storage-alteration-event control25-31 (STL) Segment-table length (× 64 bytes)

Segment-Table Entry (STE) Page-Table Origin ICPTL 1 26 28 31

Bit Meaning26 (I) Segment-invalid bit27 (C) Common-segment bit28-31 (PTL) Page-table length

Page-Table Entry (PTE) Page-Frame Real Address IP 1 2 24 31

Bit Meaning21 (I) Page-invalid bit22 (P) Page-protection bit

ASN Translation

Address-Space Number (ASN) ASN-First- ASN-Second- Table Index Table Index 1 15

ASN-First-Table Entry (when CR0 Bit 15 Is Zero)I ASN-Second-Table Origin 1 28 31

Bit Meaning0 (I) AFX-invalid bit


ASN Translation (Cont'd)

ASN-First-Table Entry (when CR0 Bit 15 Is One)I ASN-Second-Table Origin 1 26 31

Bit Meaning0 (I) AFX-invalid bit

ASN-Second-Table Entry (ASTE)Byte(Hex) I Authority-Table Origin B 1 3 31 4 Authorization Index Authority-Table Length 16 28 31Segment-Table Designation (STD)

8X Segment-Table Origin GPS STL 1 2 22 25 31Linkage-Table Designation (LTD)

CV Linkage-Table Origin LTL 1 25 31

The following extension exists if CR0 bit 15 is one: 1 Primary-Space Access-List Origin ALL 1 25 31 14 ASN-Second-Table-Entry Sequence Number 31 18 31 1C///////////////////////////////////////////////////////// 31 2 / /3C 31

Byte.Bit Meaning 0.0 (I) ASX-invalid bit 0.31 (B) Base-space bit 4.16-27 (ATL) authority-table length (× 4 bytes) 8.0-31 See STD on page 30 C.0 (V) Subsystem-linkage control C.25-31 (LTL) Linkage-table length (× 128 bytes)10.25-31 (ALL) Access-list length, format 0 (× 128 bytes); in format 1,

bits 24-31 (× 256 bytes)/// Available for programming

31

PC-Number Translation

Program-Call Number Linkage Index Entry Index 12 24 31

Linkage-Table Entry (LTE)I Entry-Table Origin ETL 1 26 31

Bit Meaning0 (I) LX-invalid bit26-31 (ETL) Entry-table length (× 128 bytes)

Entry-Table Entry (ETE)Byte(Hex) Authorization Key Mask Address-Space Number 16 31 4A Bits 1-3 of Entry Instruction Address P 1 31 8 Entry Parameter 31 C Entry Key Mask 16 31

The following extension exists if CR0 bit 15 is one: 1T KMECS EK Entry Ext. Auth. Index 1 3 8 12 16 31 14 ASN-Second-Table-Entry Address 1 26 31 18 31 1C 31

Byte.Bit Meaning 4.0 (A) Entry addressing mode 4.31 (P) Entry problem state10.0 (T) PC-type bit (zero: basic; one: stacking)10.3 (K) PSW-key control (zero: unchanged; one: replace if stacking10.4 (M) PSW-key-mask control (zero: Or; one: replace if stacking)10.5 (E) EAX control (zero: unchanged; one: replace if stacking)10.6 (C) Address-space-control control10.7 (S) Secondary-ASN control10.8-11 (EK) Entry key


Access-Register Translation

Access-List-Entry Token (ALET) P ALESN Access-List-Entry Number 7 8 16 31

Bit Meaning7 (P) Primary-list bit (zero: use DUCT; one: use primary ASTE)8-15 (ALESN) Access-list-entry sequence number

Dispatchable-Unit-Control Table (DUCT)Byte(Hex) Base-ASTE Origin 1 31 4S A Subspace-ASTE Origin 1 31 8 31 C Subspace-ASTE Sequence Number 31 1 Dispatchable-Unit Access-List Origin ALL 1 25 31 14 31 18 31 1C///////////////////////////////////////////////////////// 31 2A Return Address 1 31 24 PSW R PSW-Key Mask Key A P 16 24 28 31 28 31

33

Access-Register Translation (Cont'd)

Dispatchable-Unit-Control Table (DUCT) (Cont'd)

Byte(Hex) 2C Trap-Control-Block Address E 1 28 31 3 / /3C 31

Byte.Bit Meaning 4.0 (SA) Subspace-active bit10.25-31 (ALL) Access-list length, format 0 (× 128 bytes); in format 1,

bits 24-31 (× 256 bytes)24.28 (RA) Reduced-authority bit24.31 (P) Problem-state bit2C.31 (E) TRAP-enabled bit/// Available for programming

Access-List Entry (ALE) F Access-List-Entry I OP ALESN Authorization Index 1 6 8 16 31 32 63 ASN-Second-Table-Entry Origin 64 9 95 ASN-Second-Table-Entry Sequence Number 96 127

Bit Meaning0 (I) ALEN-invalid bit6 (FO) Fetch-only bit7 (P) Private bit8-15 (ALESN) Access-list-entry sequence number


Linkage-Stack Entries

Entry DescriptorUEntry Type Section ID Remaining Free Space 1 8 16 31 Next-Entry Size 32 48 63

Bit Meaning0 (U) Unstack-suppression bit1-7 Entry type:

Header entry = 0000001 binaryTrailer entry = 0000010 binaryBranch state entry = 0000100 binaryProgram-call state entry = 0000101 binaryAvailable for program use = 1xxxxxx binary

Header Entry (Entry Type 0000001)/////////////////////////////////////////////////////////// 31B Backward Stack-Entry Address 32 61 63 Entry Descriptor (First Half) 64 95 Entry Descriptor (Second Half) 96 127

Bit Meaning32 (B) Backward stack-entry validity bit/// Available for programming

Trailer Entry (Entry Type 0000010)/////////////////////////////////////////////////////////// 31F Forward-Section-Header Address 32 61 63 Entry Descriptor (First Half) 64 95 Entry Descriptor (Second Half) 96 127

Bit Meaning32 (F) Forward-section validity bit/// Available for programming

35

Linkage-Stack Entries (Cont'd)

Branch State Entry (Entry Type 0000100) andProgram-Call State Entry (Entry Type 0000101)Byte(Hex) / Contents of General Registers -15 /

38 63 4 / Contents of Access Registers -15 /

78 63 8 PSW-Key Mask Secondary ASNExt Auth Index Primary ASN 16 32 48 63 88 Program-Status Word 63In a Branch State Entry

9 A Branch Address 32 63In a Program-Call State Entry

9 Called-Space ID Program-Call Number 32 63 98 Modifiable Area 63 A Entry Descriptor 63

Byte.Bit Meaning90.32 (A) Addressing mode (in branch state entry)


Trapping

Trap Control BlockByte(Hex) / / 8 31

C Trap-Save-Area Address 1 28 31

1 31

14 Trap-Program Address 1 31

18 31

1C///////////////////////////////////////////////////////// 31

2 / /3C 31

Byte.Bit Meaning/// Available for programming

37

Trapping (Cont'd)

Trap Save AreaByte(Hex) Trap Flags EW Zeros IL Zeros 1 2 13 15 31 4 Zeros 8 Second-Operand Address of TRAP4 C Access Register 15 31 PSW Values 1 Prog U UUUU UUU 1UWPASCCMask 14A Instruction Address 1 2 5 12 14 16 18 2 24 31 18 Zeros 1C Zeros 2 / General Registers -15 /

5C 6 / Unchanged /

9C A///////////////////////////////////////////////////////// A4///////////////////////////////////////////////////////// A8 / Unchanged /

FC 31

Byte.Bit Meaning 0.0 (E) TRAP was target of EXECUTE 0.1 (W) TRAP is TRAP4 (not TRAP2) 0.13-14 (IL) Instruction-length code10-17 PSW values (see PSW on page 29)/// Available for programmingU Unpredictable


Trace-Entry Formats

31-Bit Branch1 Branch Address 1 31

24-Bit Branch Branch Address 8 31

Branch in Subspace Group (if ASN Tracing On)11PBits 9-31 of ALETA Branch Address 8 32 63

Set Secondary ASN1 New SASN 8 16 31

Program Call PSW 11Key PC Number ABits 1-3 of Return Addr. P 8 12 32 63

Program Transfer PSW 111Key New PASN R before 8 12 16 32 63

Program Return PSW 111Key New PASN ABits 1-3 of Return Addr. P 8 12 16 32 63AUpdated Instruction Addr. 64 95

Trace111 N Bits 16-63 of TOD Clock 4 8 16 63/ Trace Operand (R)-(R) /64 96 95+32(N+1)

Bit Meaning4-7 (N) One less than the number of registers in the trace entry.

39

Machine-Check Interruption CodeAt real-storage locations 232-239 (E8-EF hex)S P S C E V D C S C V S S K D W M P IF E F G C SD D RD D F GW P P KS BE C E S P S M AAC P R RT 4 8 13 16 24 26 31I A D XA C C E R A FPT C 32 35 4 43 46 48 63

Bit Meaning 0 (SD) System damage 1 (PD) Instruction-processing damage 2 (SR) System recovery 4 (CD) Timing-facility damage 5 (ED) External damage 6 (VF) Vector-facility failure 7 (DG) Degradation 8 (W) Warning 9 (CP) Channel report pending10 (SP) Service-processor damage11 (CK) Channel-subsystem damage13 (VS) Vector-facility source14 (B) Backed up16 (SE) Storage error uncorrected17 (SC) Storage error corrected18 (KE) Storage-key error uncorrected19 (DS) Storage degradation20 (WP) PSW-MWP validity21 (MS) PSW mask and key validity22 (PM) PSW program-mask and condition-code validity23 (IA) PSW-instruction-address validity24 (FA) Failing-storage-address validity26 (EC) External-damage-code validity27 (FP) Floating-point-register validity28 (GR) General-register validity29 (CR) Control-register validity31 (ST) Storage logical validity32 (IE) Indirect storage error33 (AR) Access-register validity34 (DA) Delayed-access exception43 (XF) Extended-floating-point-register validity44 (AP) Ancillary report46 (CT) CPU-timer validity47 (CC) Clock-comparator validity

External-Damage CodeAt real-storage address 244-247 (F4-F7 hex) X X N F 8 1 16 24 31

Bit Meaning8 (XN) Expanded storage not operational9 (XF) Expanded-storage control failure


Operation-Request Block (ORB)Word Interruption Parameter 1Key SCMYFPIAUHT LPM L X 2 Channel-Program Address 3CSS Priority Reserved CU Priority Reserved 4 Reserved 5 Reserved 6 Reserved 7 Reserved 8 16 24 31

Word.Bit Meaning 1.0-3 (Key) Subchannel key 1.4 (S) Suspend control 1.5 (C) Streaming-mode control 1.6 (M) Modification control 1.7 (Y) Synchronization control 1.8 (F) CCW-format control 1.9 (P) Prefetch control 1.10 (I) Initial-status-interruption control 1.11 (A) Address-limit-checking control 1.12 (U) Suppress-suspended-interruption control 1.14 (H) Format-2-IDAW control 1.15 (T) 2K-IDAW control 1.16-23 (LPM) Logical-path mask 1.24 (L) Incorrect-length-suppression mode 1.31 (X) ORB-extension control

| 3.0-7 Channel-subsystem priority| 3.16-23 Control-unit priority

Channel-Command Word (CCW)

Format-0 CCW Command Code Data Address 8 31 Flags Byte Count 32 4 48 63

Bit Meaning32 (CD) Causes use of data-address portion of next CCW33 (CC) Causes use of command code and data address of next

CCW34 (SLI) Causes suppression of possible incorrect-length indication35 (Skip) Suppresses transfer of information to main storage36 (PCI) Causes an intermediate-interruption condition to occur37 (IDA) Causes bits 8-31 of CCW to specify location of first IDAW38 (Suspend) Causes suspension before execution of this CCW

41

Channel-Command Word (CCW) (Cont'd)

Format-1 CCW Command Code Flags Byte Count 8 16 31 Data Address 32 63

Bit Meaning 8 (CD) Causes use of data-address portion of next CCW 9 (CC) Causes use of command code and data address of next

CCW10 (SLI) Causes suppression of possible incorrect-length indication11 (Skip) Suppresses transfer of information to main storage12 (PCI) Causes an intermediate-interruption condition to occur13 (IDA) Causes bits 8-31 of CCW to specify location of first IDAW14 (Suspend) Causes suspension before execution of this CCW

Indirect-Data-Address Word (IDAW)

Format-1 IDAW Data Address 1 31

Format-2 IDAW Bits -31 of Data Address 31 Bits 32-63 of Data Address 32 63


Subchannel-Information Block (SCHIB)Word 1 2 3 Path-Management-Control Word 4 5 6 7 8 Subchannel-Status Word 9

| 1 Model-Dependent Area / | 11 Measurement-Block Address | | 12 Model-Dependent Area

*See “Subchannel-Status Word (SCSW)” on page 44.

Path-Management-Control Word (PMCW) Interruption Parameter 1 ISC ELMMMDTV Device Number 2 LPM PNOM LPUM PIM 3 MBI POM PAM 4 CHPID- CHPID-1 CHPID-2 CHPID-3 5 CHPID-4 CHPID-5 CHPID-6 CHPID-7

| 6 FXS|

8 16 24 31

Word.Bit Meaning 1.2-4 (ISC) Interruption-subclass code 1.8 (E) Subchannel enabled 1.9-10 (LM) limit mode

00 No Checking01 Data address must be ≥ limit10 Data address must be < limit11 Reserved

1.11-12 (MM) Measurement-mode enable00 Neither mode enabled01 Device-connect-time-measurement enabled10 Measurement-block-update enabled11 Both modes enabled

1.13 (D) Multipath mode 1.14 (T) Timing facility available 1.15 (V) Device number valid 2.0-7 (LPM) Logical-path mask 2.8-15 (PNOM) Path-not-operational mask 2.16-23 (LPUM) Last-path-used mask 2.24-31 (PIM) Path-installed mask 3.0-15 (MBI) Measurement-block index 3.16-23 (POM) Path-operational mask 3.24-31 (PAM) Path-available mask 4.0-7 (CHPID-0) Channel-path ID for logical path 0 (typical)

| 6.29 (F) Measurement-block-format control| 6.30 (X) Extended-measurement-word-mode enable

6.31 (S) Concurrent sense

43

Interruption-Response Block (IRB)Word 1 Subchannel-Status Word 2 3 4 5 Extended-Status Word 6 7 8 / Extended-Control Word 15

| | 16 | / Extended-Measurement Word | 23

Subchannel-Status Word (SCSW) Subchannel Control Key SLCCFPIAUZENOFC AC SC 4 5 6 8 13 17 2 27 31

1 CCW Address 2Device StatusSubchan Status Byte Count 8 16 31

Word.Bit

Meaning

0.0-3 (Key) Subchannel key 0.4 (S) Suspend control 0.5 (L) Extended-status-word format (logout stored) 0.6-7 CC) Deferred condition code

00 Normal I/O interruption01 Status in SCSW10 Reserved11 Path not operational

0.8 (F) CCW-format control 0.9 (P) Prefetch control 0.10 (I) Initial-status-interruption control 0.11 (A) Address-limit-checking control 0.12 (U) Suppress-suspended-interruption control 0.13 (Z) Zero condition code 0.14 (E) Extended control (information stored in ECW of IRB) 0.15 (N) Path not operational (PNOM nonzero) 0.17-19(FC) Function control

17 (40) start, 18 (20) halt, 19 (10) clear 0.20-26(AC) Activity control

20 (08) resume pending 24 (80) subchannel active21 (04) start pending 25 (40) device active22 (02) halt pending 26 (20) suspended23 (01) clear pending

0.27-31(SC) Status control27 (10) alert 30 (02) secondary28 (08) intermediate 31 (01) status pending29 (04) primary

2.0-15 Device status (0-7), subchannel status (8-15) 0 (80) Attention 8 (80) Prog.-cont. int. 1 (40) Status modifier 9 (40) Incorrect length 2 (20) Control-unit end 10 (20) Program check 3 (10) Busy 11 (10) Protection check 4 (08) Channel end 12 (08) Channel-data check 5 (04) Device end 13 (04) Channel-control check 6 (02) Unit check 14 (02) Interface-control check 7 (01) Unit exception 15 (01) Chaining check


Interruption-Response Block (IRB) (Cont'd)

Extended-Status Word (ESW)See chart on page 46 to determine the appropriate ESWformat.

Format-0 ESW Word Subchannel Logout 1 Extended-Report Word 2 Failing-Storage Address 3 4 Secondary-CCW Address

Format-0 ESW Word 0 (Subchannel Logout) ESF LPUM FVF SATCDEASC 1 8 16 22 24 26 28 31

Bit Meaning 1-7 (ESF) Extended-status flags (1 key check, 2 measurement-block

program check, 3 measurement-block data check, 4 measurement-block protection check, 5 CCW check, 6 IDAW check, 7:0)

8-15 (LPUM) Last-path-used mask17-21 (FVF) Field-validity flags (17 LPUM, 18 TC, 19 SC, 20 device

status, 21 CCW address)22-23 (SA) Storage-access code (00 access type unknown, 01 read, 10

write, 11 read backward)24-25 (TC) Termination code (00 halt signal issued, 01 stop, stack, or

normal termination, 10 clear signal issued)26 (D) Device status check27 (E) Secondary error28 (A) I/O-error alert29-31 (SC) Sequence code

Format-0 ESW Word 1 (Extended-Report Word)APTFSCR SCNT 3 8 1 16 31

Bit Meaning 3 (A) Authorization check 4 (P) Path-verification-required 5 (T) Channel-path timeout 6 (F) Failing-storage-address validity 7 (S) Concurrent sense 8 (C) Secondary-CCW-address validity 9 (R) Failing-storage-address format (zero: 1-31 of word 2; one:

words 2 and 3)10-15 (SCNT) Concurrent-sense count

Format-1 ESW Word 0* LPUM 8 16 31

Bit Meaning 8-15 (LPUM) Last-path-used mask

*Word 1 is the same as word 1 of a format-0 ESW. Words 2, 3, and 4are zeros.

45

Interruption-Response Block (IRB) (Cont'd)

Format-2 ESW Word 0* LPUM DCTI 8 16 31

Bit Meaning 8-15 (LPUM) Last-path-used mask16-31 (DCTI) Device-connect-time interval

Format-3 ESW Word 0* LPUM Unpredictable 8 16 31

Bit Meaning 8-15 (LPUM) Last-path-used mask

Information Stored in ESWSubchannel Conditions under which ESWIs Stored by Test Subchannel Instruction Extended-

StatusWord (ESW)

Subchannel-Status Word

Path-Management-Control Word

Device-Connect-

TimeMeasur-ment-ModeActive

Status-ControlField

AIPSXLBit

Sus-pen-dedBit

Timing-Facility

Bit

Device-Connect-

TimeMeasur-ment-Mode-Enable

Bit Format

ContentsWord 0

Byte0123

----0

**001**1*110011

0000100011100*1

**1*1**1*1**1*1**1*1

0100101001010010100101001

0001111001*1011

-

111

000

0000

00000

10*

*

***

***

****

01111

*

***

***

0111

*0111

*

***

***

*011

**011

No/Yes

No/YesNo/YesNo/Yes

No/YesNo/YesNo/Yes

No/YesNo/Yes

NoYes

No/YesNo/YesNo/Yes

NoYes

U

000

U33

1112

U1112

****

RRRRRRRRRRRR

****ZM**ZM**

ZMZZZMZZZMZZZMDD

****ZMZZZMZZZMZZZMDD

These combinations do not occur.

Bit Meaning- Not meaningful.* Bits may be zeros or ones.A Alert status.D Accumulated device-connect-time-interval (DCTI) value stored in

bytes 2 and 3.I Intermediate status.L Extended-status-word format.M Last-path-used mask (LPUM) stored in byte 1.P Primary status.R Subchannel-logout information stored in bytes 0-3.S Secondary status.U No format defined.X Status pending.Z Bits are stored as zeros.

*Word 1 is the same as word 1 of a format-0 ESW. Words 2, 3, and 4are zeros.


Extended-Control Word (ECW)SCSWBits

ERWBit

ERWBits ECW

5 14 7 10-15 Words 0-70 0 0 Zeros Unpredictable0 1 1 No. of con-sen*

bytesConcurrent-sense information*

1 0 0 Zeros Unpredictable1 1 0 Zeros Model-dependent information1 1 1 No. of con-sen

bytesConcurrent-sense information

*The contents of the ECW are specified by bits 5 and 14 of word0 of the SCSW. The combination of SCSW bit 5 zero, SCSW bit14 one, and ERW bit 7 zero does not occur.

| Extended-Measurement Word| Word| | Device-Connect Time | | 1 Function-Pending Time | | 2 Device-Disconnect Time | | 3 Control-Unit-Queuing Time | | 4 Device-Active-Only Time | | 5 Device-Busy Time | | 6 Initial-Command-Response Time | | 7 Reserved | | 31

| Format-0 Measurement BlockWord SSCH + RSCH Count Sample Count 1 Device-Connect Time 2 Function-Pending Time 3 Device-Disconnect Time 4 Control-Unit-Queuing Time 5 Device-Active-Only Time

| 6 Device-Busy Time | | 7 Initial-Command-Response Time 16 31

47

| Format-1 Measurement Block| Word| | SSCH+RSCH Count | | 1 Sample Count | | 2 Device-Connect Time | | 3 Function-Pending Time | | 4 Device-Disconnect Time | | 5 Control-Unit-Queuing Time | | 6 Device-Active-Only Time | | 7 Device-Busy Time | | 8 Initial-Command-Response Time | | 9 | / Reserved /| 15 | | 31

Channel-Report Word (CRW)SRCRSC A ERC Reporting-Source ID 4 8 1 16 31

Bit Meaning 1 (S) Solicited CRW 2 (R) Overflow (one or more CRWs lost) 3 (C) Chaining (meaningless if bit 2 is one) 4-7 (RSC) Reporting-source code (see Reporting-Source table) 8 (A) Ancillary report10-15 (ERC) Error-recovery code (see Error-Recovery-Code table)16-31 Reporting-source ID (see Reporting-Source table)

Error-Recovery CodesERC Condition000001 Available000010 Initialized000011 Temporary error000100 Installed parameters initialized000101 Terminal000110 Permanent error with facility not initialized000111 Permanent error with facility initialized001000 Installed parameters modified


Reporting SourceThe reporting-source-ID format depends on the RSC field ofthe channel-report word, as follows:

RSC Reporting Source Reporting-Source ID0010 Monitoring facility 00000000 000000000011 Subchannel XXXXXXXX XXXXXXXX0100 Channel path 00000000 YYYYYYYY1001 Configuration-alert facility 00000000 YYYYYYYY1011 Channel subsystem 00000000 00000000

X = Subchannel numberY = Channel-path ID (CHPID)

I/O Command Codes

Standard Command-Code Assignments (CCWBits 0-7)xxxx Invalid Command mmmm 1 Sensemmmm mm1 Write 1 --Basic Sensemmmm mm1 Read 111 1 --Sense ID 1 --Read Ipl xxxx 1 Transfer in Channel (a)mmmm mm11 Control 1 Transfer in Channel (b) 11 --Control No mmmm 1 Invalid Command (c)

operation mmmm 11 Read Backward

x -- Bit Ignored a Format- CCW m -- Modifier bit for specific b Format-1 CCW

type of I/O device c Format-1 CCWand nonzero m bit

Standard Meanings of Bits of First Sense Byte Bit Designation Bit Designation Command reject 4 Data check 1 Intervention required 5 Overrun 2 Bus-out check 6 (Device dependent) 3 Equipment check 7 (Device dependent)

Console Printer Channel Commands Write, No Carrier Return 1 Sense 4 Write, Auto Carrier Return 9 Audible Alarm B Read Inquiry A No Operation 3

49

Printer Channel Commands (Cont'd)

Printer Channel CommandsCOMMANDS VALID FOR ALL PRINTERS IMPACT PRINTERS ADDITIONAL COMMANDS(Except 383, 6 when in Page Mode) Printer Column ReferenceNo Operation 3 143N1 A GA243312Space 1 Line Immediate B 3235 B GA331529Space 2 Lines Immediate 13 3211 B GA243543Space 3 Lines Immediate 1B 424813211 mode B GA243927Block Data Check 73 424823211 mode B GA243991Allow Data Check 7B 3262532621 mode C GA243936Skip to Channel 1 Immediate 8B 42451 C GA331541Skip to Channel 2 Immediate 93 424512, 2 C GA331579Skip to Channel 3 Immediate 9B 326254248 mode D GA243936Skip to Channel 4 Immediate A3 42481native mode D GA243927Skip to Channel 5 Immediate AB 42482native mode D GA243991Skip to Channel 6 Immediate B3 626214 D GA244234Skip to Channel 7 Immediate BB Skip to Channel 8 Immediate E3 Use Column A, B, C, or D. ABCDSkip to Channel 9 Immediate CB Unfold 23 .XXXSkip to Channel 1 Immediate D3 Execute Order 33 ...XSkip to Channel 11 Immediate DB Fold 43 .XXXSkip to Channel 12 Immediate F3 Load Forms Control Buffer 63 .XXX Raise Cover 6B .12Write Without Spacing 1 Signal Attention 6B . 3Write and Space 1 Line 9 Skip to Channel Immediate 83 .4.2Write and Space 2 Lines 11 Clear Printer 87 ..XXWrite and Space 3 Lines 19 UCS Gate Load EB X...Write and Skip to Channel 1 89 Load UCS Buffer and Fold F3 X..Write and Skip to Channel 2 91 Verify Band ID F3 ..XWrite and Skip to Channel 3 99 Load UCS Buffer (No Fold) FB XXXWrite and Skip to Channel 4 A1 Verify Band ID FB XWrite and Skip to Channel 5 A9 Write and Skip to Channel 6 B1 Release CU and Device 14 5..Write and Skip to Channel 7 B9 Sense Intermediate Buffer 14 ..XWrite and Skip to Channel 8 C1 Release CU, Reserve Device 34 5...Write and Skip to Channel 9 C9 Reserve CU, Release Device 54 5...Write and Skip to Channel 1 D1 Reserve CU and Device 74 5...Write and Skip to Channel 11 D9 Release Device 94 5...Write and Skip to Channel 12 E1 Reserve Device B4 5... Release CU D4 5...Basic Sense 4 Sense ID E4 ..XXReserve CU F4 5... 383, 6 PAGE MODE COMMANDS (See Note Y) Read Band ID A . X No Operation 3 Diagnostic Read PLB 2 XX62Load Font Index F Diagnostic Write 5 7862Load Font Control 1F Diagnostic Check Read 6 XXX2Load Font 2F Diagnostic Gate 7 .XX2Execute Order Any State 33 Diagnostic Read UCS Buffer A .XXLoad Font Equivalence 3F Diagnostic Read FCB 12 .XXXDelete Font 4F Begin Page Segment 5F X = Valid . = InvalidDelete Page Segment 6F Blank = Not applicable.Include Page Segment 7F Execute Order Home State 8F 1 = No action occurs (except 3211).Set Home State 97 2 = No action occurs.Load Copy Control 9F 3 = No action occurs on 32655.Begin Page AF 4 = 3211 only (no action occurs on 4248End Page BF 3211 mode.Load Page Description CF 5 = Twochannel switch feature only.Begin Overlay DF 6 = No action occurs (except 4245).Delete Overlay EF 7 = 143N1 also uses command codes D, 15,

1D, 8D, 95, 9D, A5, AD, B5, BD, C5, CD,Write Factored Text Control D D5, DD, and E5.Write Text 2D 8 = 3211 and 4248 3211 mode only.Write Image Control 3D Write Image 4D 38 Additional CommandsEnd 5D (Except 383,6 when in Page Mode;Load Page Position 6D see Note X).

End of Transmission 7Basic Sense 4 Mark Form 17Sense Intermediate Buffer 14 Load Copy Number 23Sense Error Log 24 Execute Order Any State 33Sense ID E4 Initialize Printer 37Load Forms Overlay Seq Control 43381 Reference: GA261635 Select Translate Table 47383, 6 Reference: GA325 Load Writable Char Gen Module 53

Select Translate Table 1 57Note X: For 383, 6 only, Set Home Load Forms Control Buffer 63State (97) command will be accepted, Select Translate Table 2 67but with command retry; the retry willSelect Translate Table 3 77succeed because Page Mode will have Load Translate Table 83been sent. Clear Printer 87 Note Y: Other 383, 6 commands Load Graphic Char Modification 25accepted, but with command retry; the Load Copy Modification 35retry will succeed because Page Mode Sense Intermediate Buffer 14will have been reset. Sense Error Log 24 Sense ID E4


Magnetic-Tape Channel Commands

Channel CommandHexCode

3420-33420-53420-7

3420-43420-63420-8

34223430 3480

No Operation 03 X X X XRewind 07 X X X XRewind Unload 0F X X X XModeset-1 (200/Odd/DC) 13 (a) (b) (b)Erase Gap 17 X X X XRequest Track-In-Error 1B X X (c) Write Tape Mark 1F X X X XModeset-1 (200/Even/Normal) 23 (a) (b) (b)Backspace Block 27 X X X XModeset-1 (200/Even/TR) 2B (a) (b) (b)Backspace File 2F X X X XModeset-1 (200/Odd/Normal) 33 (a) (b) (b)Forward Space Block 37 X X X XModeset-1 (200/Odd/TR) 3B (a) (b) (b)Forward Space File 3F X X X XSynchronize 43 XLocate Block 4F XModeset-1 (556/Odd/DC) 53 (d) (b) (b)Suspend Multipath Reconnection 5B (b)Modeset-1 (556/Even/Normal) 63 (d) (b) (b)Modeset-1 (556/Even/TR) 6B (d) (b) (b)Modeset-1 (556/Odd/Normal) 73 (d) (b) (b)Modeset-1 (556/Odd/TR) 7B (d) (b) (b)Modeset-1 (800/Odd/DC) 93 (d) (b) (b)Data Security Erase 97 X X X XLoad Display 9F XModeset-1 (800/Even/Normal) A3 (d) (b) (b)Modeset-1 (800/Even/TR) AB (d) (b) (b)Set Path Group ID AF XModeset-1 (800/Odd/Normal) B3 (d) (b) (b)Assign B7 XModeset-1 (800/Odd/TR) BB (d) (b) (b)Modeset-2 (1 600 bpi PE) C3 (e) (f) X -Set Tape- Write-Immediate C3 - - - XUnassign C7 XModeset-2 (800 bpi NRZI) CB (e) (b) (b)Modeset-2 (6250 bpi GCR) D3 (f) X (b)Mode Set DB XControl Access E3 X Write 01 X X X X Read 02 X X X XRead Buffer 12 XRead Block ID 22 X Read Backward OC X X X X Basic Sense 04 X X X XRead Buffered Log 24 XSense Path Group ID 34 XRelease D4 (g) (g) (g) Sense ID E4 X XReserve F4 (g) (g) (g) Diagnostic Mode Set OB X X Set Diagnose 4B X X (c) Loop Write-To-Read 8B X X X

Notes:a No action occurs unless 7-track feature is installed; if present,

density set is 200 bpi by 3803-2 Tape control, 556 bpi by 3803-1.b Valid command, but no action occurs.c Invalid command for 3422.d No action occurs unless 7-track feature is installed.e No action occurs unless 800 bpi density feature is installed.f No action occurs unless 1600 bpi density feature is installed.g Requires two-channel switch feature, invalid for 3430.

For hex C3, the meaning depends on the machine type; hyphenssignify that the alternative meaning is used.

Modeset-1 command (for 7-track drives): density (200, 556, 800bpi)/parity (even, odd)/mode (Normal, DC=data converter, TR=translator).Modeset-2 command (for 9-track drives): density (800, 1600, 6250 bpi).

Sources:3420-3, -5, -7(GA32-0020) 3422(GA32-0089) 3480(GA32-0042)3420-4, -6, -8(GA32-0021) 3430(GA32-0076)

51

DASD Channel Commands

Channel CommandHexCode 2305

333033403350 3350

33753380 3380 3370

TypicalTransferCount

1 2 3 4 5 6ControlNo Operation 03 X X X X X X NoneSeek 07 X X X X X 6Seek Cylinder 0B X X X X X 6Space Count 0F X X X X 3Recalibrate (No Op on2305-2)

13 X X X X None

Restore (executed as No-Op) 17 X X X X NoneSeek Head 1B X X X X X 6Set File Mask 1F X X X X 1Set Sector (3340 RPS isoptional)

23 X X X X X 1

Vary Sensing 27 X 1Perform Subsystem Function 27 (u) VariableOrient (No-Op on 2305-2) 2B X NoneSet High PerformanceStorage Limits

3B (a) 10

Locate 43 X 8Locate Record 47 (b) (c) 16Suspend Multipath Recon-nection

5B (d) X None

Define Extent 63 (b) X X 16Set Subsystem Mode 87 (e) (r) 2Set Paging Parameters 8B X 10Discard Block 8F X 2+(5xn)Set Path Group ID AF (d) X 12

SearchSearch Key Equal (*A9) 29 X X X X KLSearch ID Equal (*B1) 31 X X X X X 5Search Home Address Equal(*B9)

39 X X X X 4

Search Key High (*C9) 49 X X X X KLSearch ID High (*D1) 51 X X X X 5Search Key Equal or High(*E9)

69 X X X X KL

Search ID Equal or High(*F1)

71 X X X X 5

ReadRead Initial Program Load 02 X X X X X DL or 512Read Data (*86) 06 X X X X X DLRead Key & Data (*BE) 0E X X X X KL+DLRead Count (*92) 12 X X X X 8Read Record Zero (*96) 16 X X X X 8+KL+DLRead Home Address (*9A) 1A X X X X 5Read Count Key & Data(*9E)

1E X X X X 8+KL+DL

Read Sector (3340 RPS isoptional)

22 X X X X 1

Read Subsystem Data 3E (u) VariableRead 42 X 512xnRead Message ID 4E (v) 11Read Multiple Count Key &Data

5E (f) X X nx(8+KL+DL)

Read Track DE (t) VariableRead Configuration Data FA (u) 256

WriteWrite Special Count Key &Data

01 X X 8+KL+DL

Write Data 05 X X X X X DLWrite Key & Data 0D X X X X KL+DLErase 11 X X X X 8+KL+DLWrite Record Zero 15 X X X X 8+KL+DLWrite Home Address 19 X X X X 5, 7, or 11Write Count Key & Data 1D X X X X 8+KL+DLWrite 41 X 512xnWrite Update Data 85 (b) (c) DLWrite Update Key & Data 8D (b) (c) KL+DLWrite Count Key & Data NextTrack

9D (b) (c) 8+KL+DL

1 2 3 4 5 6


DASD Channel Commands (Cont'd)

Channel CommandHexCode 2305

333033403350 3350

33753380 3380 3370

TypicalTransferCount

1 2 3 4 5 6SenseBasic Sense 04 X X X X X X 24 or 32Unconditional Reserve (g) 14 (h,j) (d,h,j) X (h,j) 24 or 32Read Buffered Log 24 X 128Sense Path Group ID 34 (d) X 12Reset Allegiance 44 (t) 32Sense Subsystem Status 54 (k) X 40Read Device Characteristics 64 (c) X 32Sense Subsystem Counts 74 (k) (s) 80Device Release 94 (j) (h,j) (d,h,j) X (h,j) 24Read and Reset BufferedLog

A4 X X X X 24 or 32

Device Reserve B4 (j) (h,j) (d,h,j) X (h,j) 24 or 32Sense ID (f) E4 X X X X X 7

DiagnosticDiagnostic Write HomeAddress

09 X X 27 or 28

Diagnostic Read HomeAddress

0A X X 27 or 28

Diagnostic Sense # 44 X (m) 16 or 512Diagnostic Load 53 X (m) 1Diagnostic Write 73 X (m) 8 or 512Diagnostic Sense/Read C4 (p) X X X VariableDiagnostic Control F3 (q) (q) X X 4+n

1 2 3 4 5 6

a Valid only for 3880-13b Speed matching buffer featurec Not valid for 3880-13d Dynamic path selection (only valid on

3380-AA4, -AD4, -AE4, -AJ4, AK4strings)

e Valid only for 3880-21f Not valid for 3330/3333 on ISC-SA;

3830-2, -3, and ISC require 3344/3350microcode

g Not valid on ISC-SA; not valid on3330/3333, 3340/3344

h String-switching featurej Channel-switching featurek Valid only for 3880-11 paging director

and 3880-21m Not valid on 3880-21

p Valid only for 3880-1, -2, -11, -21q Valid only for 3330/3350 on 3880-1,

-2, and for 3380 on 3880-2, -3without 3380-speed-matching-bufferfeature

r Valid only for 3880-13, -23, and3990-3

s Valid only for 3880-13, -23t Not valid for 3880-13, -23u Valid only for 3990v Valid only for 3990-3* Multi-track command codes (standard)# Also called “Read Diagnostic Status 1”

53

Code Assignments

Code Table AS- ISO (1) BookMasterDecHex EBCDIC CII -8 IBM-PCSymbol Names(2) NUL NUL NUL NUL 11 SOH SOH SOH SOH face22 STX STX STX STX FACE33 ETX ETX ETX ETX ♥ HEART

44 SEL EOT EOT EOT ♦ DIAMOND55 HT ENQ ENQ ENQ ♣ CLUB66 RNL ACK ACK ACK ♠ SPADE77 DEL BEL BEL BEL bullet

88 GE BS BS BS revbul 99 SPS HT HT HT circle 1A RPT LF LF LF revcir 11B VT VT VT VT male 12C FF FF FF FF female 13D CR CR CR CR note18 14E SO SO SO SO note1616 15F SI SI SI SI % sun 161 DLE DLE DLE DLE rahead 1711 DC1 DC1 DC1 DC1 lahead 1812 DC2 DC2 DC2 DC2 & udarrow 1913 DC3 DC3 DC3 DC3 ‼ dblxclam 214 RES/ENP DC4 DC4 DC4 ¶ par 2115 NL NAK NAK NAK § section 2216 BS SYN SYN SYN ¯ overline 2317 POC ETB ETB ETB < udarrowus 2418 CAN CAN CAN CAN ↑ uarrow 2519 EM EM EM EM ↓ darrow 261A UBS SUB SUB IFS → rarrow 271B CU1 ESC ESC ESC ← larrow 281C IFS FS IFS DEL [ lnotusd 291D IGS GS IGS GS ↔ lrarrow 31E IRS RS IRS RS ] uahead 311F ITB/IUS US IUS US ^ dahead 322 DS SP SP SP 3321 SOS ! ! ! xclam 3422 FS " " " sdq 3523 WUS # # # numsign 3624 BYP/INP $ $ $ dollar 3725 LF % % % percent 3826 ETB & & & amp 3927 ESC ' ' ' ssq(3)

BookMaster is a trademark of the International Business

Machines Corporation.


Code Assignments (Cont'd)

AS- ISO (1) BookMasterDecHex EBCDIC CII -8 IBM-PCSymbol Names(2) 428 SA ( ( ( lpar 4129 SFE ) ) ) rpar 422A SM/SW asterisk 432B CSP + + + plus 442C MFA , , , comma 452D ENQ – – – hyphen or minus 462E ACK . . . period 472F BEL / / / divslash or slash 483 4931 1 1 1 532 SYN 2 2 2 5133 IR 3 3 3 5234 PP 4 4 4 5335 TRN 5 5 5 5436 NBS 6 6 6 5537 EOT 7 7 7 5638 SBS 8 8 8 5739 IT 9 9 9 583A RFF : : : colon 593B CU3 ; ; ; semi 63C DC4 < < < lt 613D NAK eq 623E > > > gt 633F SUB ? ? ? questDecHex See Next Page See Above See Above 644 SP SP SP SP SP @ @ @ atsign 6541 RSP RSP RSP RSP RSP A A A 6642 â â â B B B ac 6743 ä ä ä C C C ae 6844 à à à D D D ag 6945 á á á E E E aa 746 ã ã ã F F F at 7147 å å å G G G ao 7248 ç ç ç H H H cc 7349 ñ ñ ñ I I I nt 744A ¢ ¢ [ ¢ J J J cent, lbrk 754B . . . . . K K K period 764C < < < < < L L L lt 774D ( ( ( ( ( M M M lpar 784E + + + + + N N N plus 794F | | ! | O O O vbar, xclam 85 & & & & & P P P amp 8151 é é é Q Q Q ea 8252 ê ê ê R R R ec 8353 ë ë ë S S S ee

55


EBCDIC(4) AS- ISO IBMBookMasterDecHex81C 94C 37 5 147CII -8 -PCSymbol Names(2) 8454 è è è T T T eg 8555 í í í U U U ia 8656 î î î V V V ic 8757 ï ï ï W W W ie 8858 ì ì ì X X X ig 8959 ß ß ß Y Y Y ss 95A ! ! ] ! Z Z Z xclam, rbrk 915B $ $ $ $ [ [ [ dollar, lbrk 925C \ \ \ asterisk, bslash 935D ) ) ) ) ) ] ] ] rpar, rbrk 945E ; ; ; ; ; ^ ^ ^ semi, hat 955F ¬ ¬ ^ ^ _ _ _ lnot, hat, us 966 - - - - - ` ` ` hyphen or minus, grave 9761 / / / / / a a a divslash or slash 9862 Â Â Â b b b Ac 9963 Ä Ä Ä c c c Ae164 À À À d d d Ag1165 Á Á Á e e e Aa1266 Ã Ã Ã f f f At1367 Å Å Å g g g Ao1468 Ç Ç Ç h h h Cc1569 Ñ Ñ Ñ i i i Nt166A ¦ ¦ ¦ ¦ j j j splitvbar176B , , , , , k k k comma186C % % % % % l l l percent196D _ _ _ _ _ m m m us116E > > > > > n n n gt1116F ? ? ? ? ? o o o quest1127 ø ø ø p p p os11371 É É É q q q Ea11472 Ê Ê Ê r r r Ec11573 Ë Ë Ë s s s Ee11674 È È È t t t Eg11775 Í Í Í u u u Ia11876 Î Î Î v v v Ic11977 Ï Ï Ï w w w Ie1278 Ì Ì Ì x x x Ig12179 ` ` ` y y y grave1227A : : : : : z z z colon1237B # # # # numsign, lbrc1247C @ @ @ @ | | | atsign, vbar1257D ' ' ' ' ' ssq(3), rbrc1267E ∼ ∼ ∼ eq, eqv1277F " " " " " DEL sdq, house



EBCDIC(4) ISO IBM-PC BookMasterDecHex81C 94C 37 5 147-8 437 85Symbol Names(2)1288 Ø Ø Ø Ç Ç Os, Cc12981 a a a a a ü ü ue1382 b b b b b BPH é é ea13183 c c c c c NBH â â ac13284 d d d d d IND ä ä ae13385 e e e e e NEL à à ag13486 f f f f f SSA å å ao13587 g g g g g ESA ç ç cc13688 h h h h h HTS ê ê ec13789 i i i i i HTJ ë ë ee1388A « « « VTS è è odqf, eg

| 1398B » » » PLD ï ï cdqf, ie148C ð ð ð PLU î î eth, ic1418D ý ý ý RI ì ì ya, ig1428E þ þ þ SS2 Ä Ä thorn, Ae1438F ± ± ± SS3 Å Å pm, Ao1449 ° ° ° DCS É É degree, Ea14591 j j j j j PU1 æ æ aelig14692 k k k k k PU2 Æ Æ AElig14793 l l l l l STS ô ô oc14894 m m m m m CCH ö ö oe14995 n n n n n MW ò ò og1596 o o o o o SPA û û uc15197 p p p p p EPA ù ù ug15298 q q q q q SOS ÿ ÿ ye15399 r r r r r Ö Ö Oe1549A ª ª ª SCI Ü Ü aus, Ue1559B º º º CSI ¢ ø ous, cent, os1569C æ æ æ ST £ £ aelig, Lsterling1579D ¸ ¸ ¸ OSC ¥ Ø cedilla, yen, Os1589E Æ Æ Æ PM × AElig, peseta, mult1599F ¤ ¤ ¤ ACP ƒ ƒ currency, fnof(5)16A µ µ µ RSP á á mu(6), aa161A1 ˜ ˜ ˜ ¡ í í tilde, inve, ia162A2 s s s s s ¢ ó ó cent, oa163A3 t t t t t £ ú ú Lsterling, ua164A4 u u u u u ¤ ñ ñ currency, nt165A5 v v v v v ¥ Ñ Ñ yen, Nt166A6 w w w w w ¦ ª ª splitvbar, aus167A7 x x x x x § º º section, ous168A8 y y y y y ¨ ¿ ¿ umlaut, invq169A9 z z z z z © ® copyr, lnotrev, regtm17AA ¡ ¡ ¡ ª ¬ ¬ inve, aus, lnot171AB ¿ ¿ ¿ « ½ ½ invq, odqf, frac12

57


EBCDIC(4) ISO IBM-PC BookMasterDecHex81C 94C 37 5 147-8 437 85Symbol Names(2)172AC Ð Ð Ð ¬ ¼ ¼ Dstroke or Eth, lnot, frac14173AD Ý Ý [ SHY ¡ ¡ Ya, lbrk, inve174AE Þ Þ Þ ® « « Thorn, regtm, odqf175AF ® ® ® ¯ » » regtm, overline, cdqf176B ^ ¢ ¬ ° hat, cent, lnot, degree, box14177B1 £ £ £ ± Lsterling, pm, box12178B2 ¥ ¥ ¥ yen, sup2, box34179B3 smultdot, sup3, bxv18B4 © © © ´ copyr, acute, bxrj181B5 § § § µ Á section, mu(6), bx112, Aa182B6 ¶ ¶ ¶ ¶ Â par, bx221, Ac183B7 ¼ ¼ ¼ À frac14, smultdot, bx21, Ag184B8 ½ ½ ½ ¸ © frac12, cedilla, bx12, copyr185B9 ¾ ¾ ¾ frac34, sup1, bx222186BA [ ¬ Ý º lbrk, lnot, Ya, ous, bx22187BB ] | ¨ » rbrk, vbar, umlaut, cdqf, bx22188BC ¯ ¯ ¯ ¼ overline, frac14, bx22189BD ¨ ¨ ] ½ ¢ umlaut, rbrk, frac12, bx21, cent19BE ´ ´ ´ ¾ ¥ acute, frac34, bx12, yen191BF × × × ¿ mult, invq, bxur192C À lbrc, Ag, bxll193C1 A A A A A Á Aa, bxbj194C2 B B B B B Â Ac, bxtj195C3 C C C C C Ã At, bxlj196C4 D D D D D Ä Ae, bxh197C5 E E E E E Å Ao, bxcj198C6 F F F F F Æ ã AElig, bx121, at199C7 G G G G G Ç Ã Cc, bx212, At

| 2C8 H H H H H È Eg, bx2221C9 I I I I I É Ea, bx2222CA SHY SHY SHY SHY SHY Ê Ec, bx22223CB ô ô ô Ë oc, Ee, bx22224CC ö ö ö Ì oe, Ig, bx22225CD ò ò ò Í og, Ia, bx2226CE ó ó ó Î oa, Ic, bx222227CF õ õ õ Ï ¤ ot, Ie, bx122, currency



EBCDIC(4) ISO IBM-PC BookMasterDecHex81C 94C 37 5 147-8 437 85Symbol Names(2)28D Ð ð rbrc, Dstroke or Eth, bx211, eth29D1 J J J J J Ñ Ð Nt, bx212, Dstroke or Eth21D2 K K K K K Ò Ê Og, bx121, Ec211D3 L L L L L Ó Ë Oa, bx21, Ee212D4 M M M M M Ô È Oc, bx12, Eg213D5 N N N N N Õ ı Ot, bx21, idotless214D6 O O O O O Ö Í Oe, bx12, Ia215D7 P P P P P × Î mult, bx2121, Ic216D8 Q Q Q Q Q Ø Ï Os, bx1212, Ie217D9 R R R R R Ù Ug, bxlr218DA Ú sup1, Ua, bxul219DB û û û Û uc, Uc, BOX22DC ü ü ü Ü ue, Ue, BOXBOT221DD ù ù ù Ý ¦ ug, Ya, BOXLEFT, splitvbar222DE ú ú ú þ Ì ua, thorn, BOXRIGHT, Ig223DF ÿ ÿ ÿ ß ye, ss, BOXTOP224E \ \ \ à α Ó bslash, ag, alpha, Oa225E1 NSP ÷ ÷ ÷ á ß ß div, aa, ss226E2 S S S S S â Ô ac, Gamma, Oc227E3 T T T T T ã π Ò at, pi, Og228E4 U U U U U ä Σ õ ae, Sigma, ot229E5 V V V V V å σ Õ ao, sigma, Ot23E6 W W W W W æ µ µ aelig, mu(6)231E7 X X X X X ç τ þ cc, tau, thorn232E8 Y Y Y Y Y è Φ Þ eg, Phi, Thorn233E9 Z Z Z Z Z é Θ Ú ea, Theta(5), Ua234EA ê Ω Û sup2, ec, Omega, Uc235EB Ô Ô Ô ë δ Ù Oc, ee, delta, Ug236EC Ö Ö Ö ì ∞ ý Oe, ig, infinity, ya237ED Ò Ò Ò í φ Ý Og, ia, phi, Ya238EE Ó Ó Ó î ε ¯ Oa, ic, epsilon, overline239EF Õ Õ Õ ï ∩ ´ Ot, ie, intersect, acute24F ð ≡ SHYeth, identical241F1 1 1 1 1 1 ñ ± ± nt, pm242F2 2 2 2 2 2 ò ≥ og, ge, eq243F3 3 3 3 3 3 ó ≤ ¾ oa, le, frac34244F4 4 4 4 4 4 ô ¶ oc, inttop, par245F5 5 5 5 5 5 õ § ot, intbot, section246F6 6 6 6 6 6 ö ÷ ÷ oe, div247F7 7 7 7 7 7 ÷ ≈ ¸ div, nearly(5), cedilla

59


EBCDIC(4) ISO IBM-PC BookMasterDecHex81C 94C 37 5 147-8 437 85Symbol Names(2)248F8 8 8 8 8 8 ø ° ° os, degree249F9 9 9 9 9 9 ù ¨ ug, lmultdot, umlaut25FA ú sup3, ua, smultdot251FB Û Û Û û √ Uc, uc, sqrt, sup1252FC Ü Ü Ü ü Ue, ue, supn, sup3253FD Ù Ù Ù ý Ug, ya, sup2254FE Ú Ú Ú þ Ua, thorn, sqbul255FF EO EO EO EO EO ÿ RSP RSPye(1) The ASCII controls and graphics are from ANSI X3.4. The ISO-8 con-

trols are from ISO 6429, and the graphics are from ISO 8859-1. TheISO-8 graphics are code page 00819, named ISO/ANSI Multilingual.IBM-PC controls and graphics are shown. The graphics are commonto code page 00437, named Personal Computer, and code page00850, named Personal Computer - Multilingual Page. Code pages00437 and 00850 are shown separately beginning at X'80', afterwhich they diverge in content.

(2) The symbol names shown are to be preceded by an ampersand (&)and followed by a period (.) to form a symbol. Source: SC34-5009.

(3) ASCII, ISO-8, and IBM-PC X'27' and EBCDIC X'7D' are an apos-trophe having the appearance of a straight single quote. TheBookMaster “apos” produces a character having the appearance of anaccent acute.

(4) Five columns of EBCDIC graphics are shown. The first is the81-character character set 0640, called the syntactic character set, thatis mapped the same on all EBCDIC code pages. The second is thestandard IBM 94-character character set mapped on code page 00037.The third is code page 00037, named USA/Canada - CECP (CountryExtended Code Page). The fourth is code page 00500, named Inter-national #5. The fifth is code page 01047, named Latin 1/OpenSystems. Code pages 00037, 00500, 01047, and 00819 (ISO-8) allmap the 189-character character set 0697. Source: SE09-8002.

(5) ƒ, ≈, and Θ are of nonstandard width.(6) EBCDIC X'A0' and ISO-8 X'B5' are micro but resemble mu. The

BookMaster “usec” produces a character of nonstandard width.

Control Character RepresentationsACK Acknowledge IT Indent TabBEL Bell ITB Intermediate Transmission BlockBS Backspace IUS International Unit SeparatorBYP Bypass LF Line FeedCAN Cancel MFA Modify Field AttributeCR Carriage Return NAK Negative AcknowledgeCSP Control Sequence Prefix NBS Numeric BackspaceCU1 Customer Use 1 NL New LineCU3 Customer Use 3 NUL NullDC1 Device Control 1 POC Program-Operator CommunicationDC2 Device Control 2 PP Presentation PositionDC3 Device Control 3 RES RestoreDC4 Device Control 4 RFF Required Form FeedDEL Delete RNL Required New LineDLE Data Link Escape RPT RepeatDS Digit Select SA Set AttributeEM End of Medium SBS SubscriptENP Enable Presentation SEL SelectENQ Enquiry SFE Start Field ExtendedEO Eight Ones SI Shift InEOT End of Transmission SM Set ModeESC Escape SO Shift OutETB End of Transmission Block SOH Start of HeadingETX End of Text SOS Start of SignificanceFF Form Feed SPS SuperscriptFS Field Separator STX Start of TextGE Graphic Escape SUB SubstituteHT Horizontal Tab SW SwitchIFS Interchange File Separator SYN Synchronous IdleIGS Interchange Group Separator TRN TransparentINP Inhibit Presentation UBS Unit BackspaceIR Index Return VT Vertical TabIRS Interchange Record Separator WUS Word Underscore



Additional ISO-8 Control CharacterRepresentationsAPC Application Program Command OSC Operating System CommandBPH Break Permitted Here PLD Partial Line DownCCH Cancel Character PLU Partial Line UpCSI Control Sequence Introducer PM Privacy MessageDCS Device Control String PU1 Private Use OneEPA End of Guarded Area PU2 Private Use TwoESA End of Selected Area RI Reverse Line Feed (or Index)HTJ Character Tabulation with SCI Single Character Introducer

Justification SOS Start of StringHTS Character Tabulation Set SPA Start of Guarded AreaIFS Information Separator Four SSA Start of Selected AreaIGS Information Separator Three SS2 Single Shift TwoIND Index SS3 Single Shift ThreeIRS Information Separator Two ST String TerminatorMW Message Waiting STS Set Transmit StateNBH No Break Here US Information Separator OneNEL Next Line VTS Line Tabulation Set

Formatting Character RepresentationsNSP Numeric Space SP SpaceRSP Required Space SHY Syllable Hyphen

Two-Character BSC Data Link Controls

Function EBCDIC ASCIIACK-0 DLE,X'70' DLE,0ACK-1 DLE,X'61' DLE,1WACK DLE,X'68' DLE,;RVI DLE,X'7C' DLE,<

Commonly Used Editing Pattern CharactersCode(Hex)

Meaning

Code(Hex)

Meaning

20 Digit selector 5B Dollar sign21 Start of significance 5C Asterisk22 Field separator 6B Comma40 Blank C3D9 CR (credit)4B Period C4C2 DB (debit)

ANSI-Defined Printer Control Characters(A in RECFM field of DCB)

Code Action before Printing Recordblank Space 1 line

0 Space 2 lines- Space 3 lines+ Suppress space1 Skip to line 1 on new page

Hexadecimal and Decimal ConversionFrom hex: locate each hex digit in its corresponding columnposition and note the decimal equivalents. Add these toobtain the decimal value.

From decimal: (1) locate the largest decimal value in thetable that will fit into the decimal number to be converted, and(2) note its hex equivalent and hex column position. (3) Findthe decimal remainder. Repeat the process on this and sub-sequent remainders.Note: Hexadecimal equivalents of all numbers from 0 to 255

are listed in the code tables.

61

Hexadecimal and Decimal Conversion (Cont'd)

Dec

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

4567

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

1

Dec

0 16 32 48 64 80 96 112

128

144

160

176

192

208

224

240B

yte

0123

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

2

Dec

025

651

276

81,

024

1,28

01,

536

1,79

22,

048

2,30

42,

560

2,81

63,

072

3,32

83,

584

3,84

0

4567

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

3

Dec

04,

096

8,19

212

,288

16,3

8420

,480

24,5

7628

,672

32,7

6836

,864

40,9

6045

,056

49,1

5253

,248

57,3

4461

,440

Hal

fwo

rdB

yte

0123

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

4

Dec

065

,536

131,

072

196,

608

262,

144

327,

680

393,

216

458,

752

524,

288

589,

824

655,

360

720,

896

786,

432

851,

968

917,

504

983,

040

4567

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

5

Dec

01,

048,

576

2,09

7,15

23,

145,

728

4,19

4,30

45,

242,

880

6,29

1,45

67,

340,

032

8,38

8,60

89,

437,

184

10,4

85,7

6011

,534

,336

12,5

82,9

1213

,631

,488

14,6

80,0

6415

,728

,640B

yte

0123

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

6

Dec

016

,777

,216

33,5

54,4

3250

,331

,648

67,1

08,8

6483

,886

,080

100,

663,

296

117,

440,

512

134,

217,

728

150,

994,

944

167,

772,

160

184,

549,

376

201,

326,

592

218,

103,

808

234,

881,

024

251,

658,

240

4567

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

7

Dec

026

8,43

5,45

653

6,87

0,91

280

5,30

6,36

81,

073,

741,

824

1,34

2,17

7,28

01,

610,

612,

736

1,87

9,04

8,19

22,

147,

483,

648

2,41

5,91

9,10

42,

684,

354,

560

2,95

2,79

0,01

63,

221,

225,

472

3,48

9,66

0,92

83,

758,

096,

384

4,02

6,53

1,84

0

Wo

rdH

alfw

ord

Byt

eB

its:

01

23H

ex 0 1 2 3 4 5 6 7 8 9 A B C D E F8


Powers of 2 and 16

m n 2m and 16n Symbol0123

0

1248

4567

1

163264

128

891011

2

256512

1 0242 048

K (kilo)

12131415

3

4 0968 192

16 38432 768

16171819

4

65 536131 072262 144524 288

20212223

5

1 048 5762 097 1524 194 3048 388 608

M (mega)

24252627

6

16 777 21633 554 43267 108 864

134 217 728

28293031

7

268 435 456536 870 912

1 073 741 8242 147 483 648

G (giga)

32333435

8

4 294 967 2968 589 934 592

17 179 869 18434 359 738 368

36373839

9

68 719 476 736137 438 953 472274 877 906 944549 755 813 888

40414243

10

1 099 511 627 7762 199 023 255 5524 398 046 511 1048 796 093 022 208

T (tera)

44454647

11

17 592 186 044 41635 184 372 088 83270 368 744 177 664

140 737 488 355 328

48495051

12

281 474 976 710 656562 949 953 421 312

1 125 899 906 842 6242 251 799 813 685 248

P (peta)

52535455

13

4 503 599 627 370 4969 007 199 254 740 992

18 014 398 509 481 98436 028 797 018 963 968

56575859

14

72 057 594 037 927 936144 115 188 075 855 872288 230 376 151 711 744576 460 752 303 423 488

60616263

15

1 152 921 504 606 846 9762 305 843 009 213 693 9524 611 686 018 427 387 9049 223 372 036 854 775 808

E (exa)

64 16 18 446 744 073 709 551 616

63


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Enterprise Systems Architecture 390 Reference Summary