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ENG241/ Lab #4 1 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

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Page 1: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #4 1

ENG2410 Digital Design

LAB #4 Design of Combinational Logic

“The Trip Genie”

Page 2: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #4 2

Lab Objectives

Understand the design flow of digital circuits. Design a router for travelling salespeople. Enter the design using both Schematic Capture

and VHDL. Implement the router using NEXYS 3 board. Test and Debug your design and verify software

simulation and hardware implementation.

Page 3: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #4 3

The Trip Genie A sales man travels between 4 cities. 6 highways connect the 4 cities. Given two cities what is the shortest path for

the sales man.

Mayberry

Mt. PilotHootcrvill

Siler City

HWY5HWY1

HWY2

HWY3

HWY4

153

33

510

Page 4: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #4 4

Implementation

Use the NEXYS 3 Switch for city selection. Use the NEXYS 3 LEDs for highway indication. The sales man should select two cities by flipping the

corresponding switch. The proposed path should be displayed on the LED. Write the truth table of the trip genie. Derive the combinational function for each highway. Draw a schematic capture for each function. Write VHDL code to describe each function. Implement both in the NEXYS 3 board.

Page 5: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

ENG241/ Lab #4 5

UCF File

You will use the following assignments:NET C1 LOC = T5; // left most slide switch on the NEXYS 3

boardNET C2 LOC = V8; // Next slide switch on the boardNET C2 LOC = U8; // third slide switch on the boardNET C3 LOC = N8; // fourth slide switch on the board

NET H1 LOC = T11; // left most LED on the NEXYS 3 boardNET H2 LOC = R11; // Next LED on the boardNET H3 LOC = N11; // third LED on the boardNET H4 LOC = M11; // fourth LED on the boardNET H5 LOC = V15; // fifth LED on the boardNET H6 LOC = U15; // sixth LED on the board

Page 6: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

Lab Report Title Page – Group # and Names Problem Statement System Overview and Justification of Design Circuit Diagram, Schematic VHDL Code (Include COMMENTS) Simulation Waveform Problems Encountered and Recommendation

ENG241/Lab #6 6

Page 7: ENG241/ Lab #41 ENG2410 Digital Design LAB #4 Design of Combinational Logic “The Trip Genie”

Academic Misconduct

Reports and demos are submitted as a group, but it is a SINGLE group effort

You may talk with other groups but sharing codes or reports is NOT ALLOWED

Copying reports from previous years is also NOT ALLOWED

If we find copying we are REQUIRED to report it