EE152 Green Electronics - Stanford Universityweb.stanford.edu/class/ee152/lecture_slides/Power...• Fast switching time 10-50ns – Low switching losses • Low conduction losses

EE152 Green Electronics

Power Devices 9/28/15

Prof. William Dally Computer Systems Laboratory

Stanford University

Course Logistics •  HW1 due Today •  HW2 out Today due Monday 10/3 •  Lab1 signed off this week •  Lab2 out

EE155/255 Lecture 3 - Power Devices

Course to Date •  We need sustainable energy systems •  At the core they are voltage converters •  Periodic steady-state analysis, buck and boost •  Embedded software is event driven


Real Switches


L

V2

iLV1

+-

a

b

R

C

+

_

M1

M2

V1

High-SideGate Drive

Low-SideGate Drive

VGL

VGH

inH

inL

GND

X

G1

G2

Real Switches •  Finite switching time •  Finite voltage blocking •  Non-zero on resistance •  Parasitic L and C


L

V2

iLV1

+-

a

b

R

C

+

_

M1

M2

V1

High-SideGate Drive

Low-SideGate Drive

VGL

VGH

inH

inL

GND

X

G1

G2

Quick Summary in a Few Pictures


DC I-V Characteristics of On Switches

V(d)0.0V 0.1V 0.2V 0.3V 0.4V 0.5V 0.6V 0.7V 0.8V 0.9V 1.0V 1.1V 1.2V 1.3V 1.4V 1.5V 1.6V 1.7V 1.8V 1.9V 2.0V

0A

5A

10A

15A

20A

25A

30A

35A

40A

45A

50AIx(m:1) Ix(h:2) Ix(i:C) I(Dd)

600V FET FCB36N60

600V IGBT FGH40N60

400V Diode STTH20R04

60V FET IRLB3036

FETs Characterized By RON

IGBT Like a Diode Little Current Until ~0.7V

HV FET has high RON R ~ kV2

Diode and IGBT Resistive at high Current


Transient Response of FET and IGBT

0ns 40ns 80ns 120ns 160ns 200ns 240ns 280ns 320ns0V

50V

100V

150V

200V

250V

300V

350V

400V

450V

500V

550V

0A

5A

10A

15A

20A

0V

50V

100V

150V

200V

250V

300V

350V

400V

450V

500V

550V

0A

5A

10A

15A

20A

0KW

1KW

2KW

3KW

4KW

5KW

6KW

7KW

8KW

9KW

10KW

V(di) Ix(i:C)

V(dm) Ix(h:2)

ix(i:c)*v(di) ix(h:2)*V(dm)

600V FET FCB36N60

Instantaneous Power

Turn On Turn Off

600V IGBT FGH40N60

36µJ 36µJ 92µJ 428µJ


Boost Configuration for Transient Test


Diode Reverse Recovery


I1

IRM

ta tb

trr

Qrr

iD

(Amps)

t(sec)t1

t2

t3


0ns 3ns 6ns 9ns 12ns 15ns 18ns 21ns 24ns 27ns 30ns-220A

-200A

-180A

-160A

-140A

-120A

-100A

-80A

-60A

-40A

-20A

0A

20A

40AI(D1) I(D2) I(D3) I(D4)

0ns 10ns 20ns 30ns 40ns 50ns 60ns 70ns 80ns 90ns 100ns 110ns 120ns-810A

-720A

-630A

-540A

-450A

-360A

-270A

-180A

-90A

0A

90A

180AI(D1) I(D2) I(D3) I(D4) I(D5) I(D6) I(D7)

400V Diode STTH20R04

Medium Speed Diode

Area under curve (Charge) is approximately constant QRR


Power MOSFETs


Power MOSFETs are your friends


MOSFET Properties •  Fast switching time 10-50ns

–  Low switching losses

•  Low conduction losses at low voltages –  V2/R of 1-2MW

•  e.g., at 20V R = 0.4mOhm (4mV drop at 10A) –  Typically better than IGBT up to ~400V

•  Easily paralleled for lower Ron, More I, or easier cooling

•  Integral body diode in DMOS FET •  Avalanche breakdown can be used to “snub”

overshoot


MOSFETs are Switches

Gate

Drain

Source

Drain

Source

GateRon

Dbody

(a) (b)


(a)

gaten n

p

VDS

(b)

gaten n

p

VDS

- - - - -

IDS

g=0 g=1

IDSg

s d

g

s dIDS=0

+

−

+

−

How do they Work

VGS


Power MOSFET (DMOS) Structure

n+

p+n+

n-

p+n+

gatesource source

drain

channel


Gate Charge vs VGS


0 10 20 30 40 50 60 70 80 900

1

2

3

4

5

6

7

8

9

10

QG (nC)

V GS (V

)

CDG

LS

LGRG

LD

CDS

CGS

source

gate

drain

Parasitics


130 Green Electronics

CDG

LS

LGRG

LD

CDG

CGS

source

gate

drain

Figure 17.4: MOSFET parasitic circuit elements. At high operating frequen-cies these parasitic circuit elements have a large e↵ect on the performance andswitching losses of a MOSFET.

Symbol Value Units DescriptionCDS 200 pF Drain-source capacitanceCDG 70 pF Drain-gate (Miller) capacitanceCGS 3600 pF Gate-source capacitanceQG 86 nC Total gate turn-on chargeQGD 35 nC Gate-drain turn-on chargeLS 7 nH Source inductanceLD 3 nH Drain inductanceLG 7 nH Gate inductanceRG 1.5 ⌦ Gate resistance

Table 17.1: Values of parasitic circuit elements for a typical 600V 100m⌦ powerMOSFET in a TO-220 package.

600V 0.1Ω FET TO220 Package

CDG

LS

LGRG

LD

CDS

CGS

source

gate

drain

Parasitics


CDS – CV2 energy LD, LS – I2L energy

slows switching, overshoot, corrupts gate drive

CDG – slows turn on RG, LG – slow device turn-on


Typical MOSFETs


Copyright

(c)

2011-15

by

W.J

Dally,allrights

reserved

133

Device 20V IRLB3036 IRFB4227 FCB36N60N EPC2010 C2M0025120 Units DescriptionVDSmax

20 60 200 600 200 1200 V Maximum VDS

Ron

1.9 20 81 18 25 m⌦ On resistanceQG 91 70 86 5 161 nC Gate chargeCoss 1020 460 80 270 220 pF Output capacitance CSD + CGD

IDmax

195 65 36 12 90 A Maximum continuous drain currentIDM 1100 260 108 60 250 A Maximum pulsed drain currentEAS 290 140 1800 mJ Single-event avalanche energyP

max

380 330 312 463 W Maximum power dissipationV 2/R 1.9 2.0 4.4 2.2 58 MW Figure of meritV 2/RQG 21 29 52 440 360 mV/s Figure of merit

Table 17.2: Key parameters of six field-e↵ect transistors.

GaN SiC

Power MOSFETs should be ON or OFF They are not happy in between

•  IRLB3036 •  Can handle 60V (when its off) •  Can handle 195A (when its on – if you can cool it)

–  I2R = (195)2(0.002) = 76W

•  But it can’t handle 60V and 195A at the same time –  P = VI = (60)(195) = 11.7kW –  At least not for very long

•  Turn them on and off quickly •  Best circuits are “soft switching”

–  Zero-current switching (ZCS) or zero-voltage switching( ZVS) or both.


Power Diodes


Diode Properties •  Self-controlling switch

–  Allows current in one direction –  Turns off when current reaches zero (in theory)

•  Relatively fixed voltage drop independent of current –  0.5 to 2.0V –  High losses at low voltages

•  Care required to operate in parallel –  Current hogging

•  Turn-off delay –  Must clear space charge out of junction

•  Turn-on delay –  Negligible for most fast diodes, but some are problematic


Key Parameters •  Reverse breakdown voltage

•  Maximum current

•  Reverse recovery time

•  Junction capacitance




I1

IRM

ta tb

trr

Qrr

iD

(Amps)

t(sec)t1

t2

t3

Diode Forward Recovery


VFP

VF

tfr

vD

(Volts)

t(sec)

1.1VF

Diode Forward Recovery

Good Diode Bad Diode


Two 2A Diodes < One 4A Diode


0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.10

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

25°C

75°C

125°C

VD (Volts)

i D (A

mps

)

CDG

LS

LGRG

LD

CDS

CGS

source

gate

drain

Summary – Power Devices •  Finite, non-zero

–  Switching time –  Blocking voltage –  On-voltage (resistance)

•  Parasitics – L and C •  MOSFETs – switches

–  Turn on/off as fast as gate can be charged

–  R = kV2

•  Diodes –  Self-controlled switches –  Reverse recovery loss QRR


Gate

Drain

Source

Drain

Source

Gate RonDbody

(a) (b)

I1

IRM

ta tb

trr

Qrr

iD

(Amps)

t(sec)t1

t2

t3

Power Circuits


Practical Buck Converter


M1

M2

V1

High-SideGate Drive

Low-SideGate Drive

VGL

VGH

inH

inL

GND

X

G1

G2

Simple Model


M1G1

ii

M2

V1

+-

G2

(a)

M1G1

M2G2

V1

+-

(b)

One Switch May be a Diode


M1G1

ii

M2

V1+-

G2

(a)

M1G1

M2G2

V1+-

(b)

Lower switch for buck Upper switch for boost Other switch does most of the work Synchronous rectification may be used to reduce loss

Turn-On Loss


IP

ILQRR QD

ID

VDS

s

t1 t2 t3

Turn-On Buck w/ Diode

IP

ILQRR QD

ID

VDS

s

t1 t2 t3

t1 – ramp current to IL t2 – diode reverse recovery t3 – discharge drain

capacitance Current waveform in t2 and t3 may vary


Turn-On Buck w/ Diode

t1 =ILs

E1 = 0.5VDDILt1 =0.5VDDIL

2

s

t2 =2QRR

sE2 =VDDt2 IL + 0.5t2s( )

t3 ≈2IPQD

E3 = 0.5VDDQD + 0.33VDDILt3

IP

ILQRR QD

ID

VDS

s

t1 t2 t3


Turn-Off Buck with Diode

Excess current charges drain node. Integrate to get switching energy

E =VDDtr16IL +

13I1

!

"#

$

%&

ID

VDS

IL

trtc

I1


Turn-Off Buck with Diode

If current ramps faster than voltage nearly ZVS ID

VDS

IL

tr

tc

V1

E = 16V1ILtc


Parasitic Losses

LP

C2

CL

L1D1

M1

C1


Switching Loss with SPICE


Simulation Setup •  Boost configuration 40A, 50V •  IRLB3036 – 60V, 2mΩ FET


Ideal Diode, No Parasitics

22uJ turn-on 22uJ turn-off


Body Diode of IRLB3036

225uJ turn-on

700A peak current EE155/255 Lecture 3 - Power Devices

Inductance on Drain

8uJ turn-on

42uJ turn-off


With Snubber (1nF, 5Ω)

8uJ turn-on

2uJ in snubber

42uJ turn-off


Real Diode and Inductance

14uJ turn-on 26uJ turn-off

720uJ in diode


Gate Drive


Gate Driver

RGH

RGL

M1

source

drain

Control &Protection+

-VGH

in

Gate-driver IC

SH

SL


Effect of Miller Cap on Rise Time

M1

iG

CDG


Effect of Miller Cap on Rise Time

M1

iG

CDG

dVDdt

=iGCDG

Δt = ΔVDCDG

iG

Example: i = 0.5A, C = 100pF, ΔV = 400V


Bootstrap Supply

M1

i

M2

V1

+-

High-SideGate Drive

Low-SideGate Drive

VGL

+-

inH

inL

GND

X

G1

G2

CB

RB DB V


Dead Time


Too Little Dead Time (11.6kW loss)

1.6µs 1.7µs 1.8µs 1.9µs 2.0µs 2.1µs 2.2µs 2.3µs 2.4µs 2.5µs 2.6µs 2.7µs 2.8µs 2.9µs 3.0µs 3.1µs 3.2µs-5V

0V

5V

10V

15V

20V

25V

30V

35V

40V

45V

50V0V

2V

4V

6V

8V

10V

12V

14V

16V-3.0KA

-2.5KA

-2.0KA

-1.5KA

-1.0KA

-0.5KA

0.0KA

0.5KA

1.0KA

1.5KA

2.0KA

2.5KA

3.0KA-10KW

0KW

10KW

20KW

30KW

40KW

50KW

60KW

70KW

80KW

90KW

100KW

110KW

V(m1)

V(p1l) v(p1h)-v(m1) V(1:gl) V(1:gh)-v(m1)

Ix(1:h:1) Ix(1:l:3)

ix(1:h:1)*(v(d)-v(m1)) ix(1:l:1)*v(m1)

4mJ 3.4mJ

2500A

3.4mJ

3.7mJ


0.6 0.8 1 1.2 1.4 1.6 1.8

v G (V

)

0

10

0.6 0.8 1 1.2 1.4 1.6 1.8

v X (V

)

0

20

40

0.6 0.8 1 1.2 1.4 1.6 1.8

i M1 (k

A)

0

1

2

3

t (µ s)0.6 0.8 1 1.2 1.4 1.6 1.8

P M1 (k

W)

0

50

100

0

5

10

15

0

5

10

15

The “Real” Gate Signal


Too Much Dead-Time (340W loss) (Still pretty good)


0V

5V

10V

15V

20V

25V

30V

35V

40V

45V

50V-2V

0V

2V

4V

6V

8V

10V

12V

14V

16V-700A

-600A

-500A-400A

-300A

-200A

-100A

0A100A

200A

300A

400A

500A600A

700A

800A-4KW

0KW

4KW

8KW

12KW

16KW

20KW

24KW

28KW

32KW

36KW

40KW

V(m2)

V(p2l) V(p2h)-v(m2) V(2:gl) V(2:gh)-v(m2)

Ix(2:h:1) Ix(2:l:3)

ix(2:h:1)*(v(d)-v(m2)) ix(2:l:1)*v(m2)

700mV diode drop

740A

0.27mJ


Just Right (310W loss)


0V

5V

10V

15V

20V

25V

30V

35V

40V

45V

50V-2V

0V

2V

4V

6V

8V

10V

12V

14V

16V-350A

-280A

-210A

-140A

-70A

0A

70A

140A

210A

280A

350A

420A-0.3KW

0.0KW

0.3KW

0.6KW

0.9KW

1.2KW

1.5KW

1.8KW

2.1KW

2.4KW

2.7KW

V(m4)

V(p4l) v(p4h)-v(m4) v(4:gh)-v(m4) V(4:gl)

Ix(4:h:1) Ix(4:l:3)

IX(4:l:1)*v(m4) ix(4:h:1)*(v(d)-v(m1))

0.19mJ 3uJ

Conduction loss is I2R = 502 x 1m ~ 25W

Slower gate rise

Short duration diode drop


Too much dead time is better than too little


Snubbers


LD

G 50V

+-

40A

RS

CS

D

Cj

M

Dampen Ringing Nodes

LD and Cj resonate when M is on Parallel RS dampens tank Series CS limits dissipation


Inductance on Drain

8uJ turn-on

42uJ turn-off


With Snubber (1nF, 5Ω)

8uJ turn-on

2uJ in snubber

42uJ turn-off


LD

G 50V

+-

40A

RS

CS

D

Cj

M

Design Procedure

Pick RS ~ 1/ωCj Pick CS so

τ >= π/ωOr

Es = CSV2/2


G 50V+-

40A

RS

CS

D

M

DS

Move Turn-Off Dissipation to Passive Device

CS slows rise time of drain

CSV2/2RS dissipated in RS when CS discharges

Rarely used today

Other forms slow fall time and rising/falling current EE155/255 Lecture 3 - Power Devices

Lab Half-Bridge Module


The Half-Bridge Module

1

2

Hin

IRS21834

ComVss

LO

S

HO

COM

Out

VDVB

M1

M2

R14.7

R24.7

U1

��

VCC

3

DT

GND

4

Hin

��

V12

C14.7 F

2.2 F200V

D356V5W

D1

R3 1

C21 F

VBCSupply

VDCFilter

D215V

C3

7

6

5

13

12

11


Bootstrap Supply


Drain Voltage Filter

1

2

Hin

IRS21834

ComVss

LO

S

HO

COM

Out

VDVB

M1

M2

R14.7

R24.7

U1

��

VCC

3

DT

GND

4

Hin

��

V12

C14.7 F

2.2 F200V

D356V5W

D1

R3 1

C21 F

VBCSupply

VDCFilter

D215V

C3

7

6

5

13

12

11


Drain Voltage Filter 300nH Input Inductance


SPICE


SPICE Example – A Voltage Divider


A Voltage Doubler * Simple voltage "doubler".include "gel.lib".param td=100n tr=100n tf=100n tw=2.5u tcy=5u ncy=2.param l1=22uH c1=10uF r1=10

* call half-bridge subcircuitxhb vd mid g g 0 v12 gel_hb

* circuitl1 vin mid {l1}c1 vd 0 {c1}r1 vd 0 {r1}

* suppliesv12 v12 0 12vin vin 0 24

* stimulusVG g 0 PULSE(0 5 {td} {tr} {tf} {tw} {tcy} {ncy})

.ic i(l1)=9.2

.ic v(vd)=42.8

.tran {ncy*tcy}


Turn-On Transient


Steady State


Close up of Drain Current


With PID Control


A Warning •  SPICE (or any simulator) is a Verification tool, not a Design tool

•  Design your circuit first –  Use Excel, Matlab, a calculator etc… to calculate component

values •  Then simulate your circuit to check operation and fine-

tune parameters •  Don’t try to design your circuit using SPICE

•  Simulation is not a substitute for thinking


Summary •  Real switches have limitations

–  Conduction losses (RON for FETs, VCE for IGBTs, Diode drop) –  Switching losses (finite ton, toff, trr)

•  With current source load, current ramps, then voltage falls •  And voltage rises before current falls •  May be dominated by reverse recovery time •  Complicated by inductance

•  Power MOSFETs –  Switch quickly, have linear I-V, integral diode

•  IGBTs –  Diode-like I-V, slower switching

•  Diodes –  Have reverse recovery time

•  Switches operate in pairs –  For one-way converters, one switch may be a diode –  Synchronous rectification – make both switches FETs to reduce loss –  Need “dead time” to avoid “shoot through” current

•  Gate-drive circuits control rise and fall times •  Bootstrap supply needed for high-side driver •  Snubbers dampen voltage and current transients •  Use SPICE as a verification tool, not a design tool EE155/255 Lecture 3 - Power Devices

In Upcoming Lectures


No Date Topic HW out HW in Lab out Lab ck Lab HW 1 9/21/15 Intro (basic converters) 1 1 Intro to ST32F3 Periodic Steady State 2 9/23/15 Embedded Programming 3 9/28/15 Power Electronics -‐ 1 (switches) 2 1 2 1 AC Energy Meter Power Devices 4 9/30/15 Power Electronics -‐ 2 (circuits) 5 10/7/15 Photovoltaics 3 2 3 2 PV MPPT PV 6 10/9/15 Feedback Control 7 10/12/15 Electric Motors 4 3 4 3 Motor control Matlab Feedback 8 10/14/15 Solar Day 9 10/19/15 Isolated Converters 5 4 5 4 Motor control -‐ Lab Motors 10 10/21/15 MagneTcs 11 10/28/15 SoU Switching 6/PP 5 6 5 PS Part 1/Proposal MagneTcs and bridge converter 12 10/30/15 Inverters and Power Factor 13 11/2/15 BaWeries 6/PP 7 6 PS Part 2 14 11/4/15 Thermal Design 15 11/9/15 EMI, Grounding, and Debugging P 7 Project 16 11/11/15 Quiz Review 17 11/16/15

11/16/15 Quiz -‐ in the evening 18 11/18/15 C1

11/23/15 Thanksgiving Break 11/25/15 Thanksgiving Break

19 11/30/15 C2 20 12/2/15 Wrapup 21 12/4/15 Project presentaTons P

12/9/15 Project webpage due

Documents

EE152 Green Electronics - Stanford Universityweb.stanford.edu/class/ee152/lecture_slides/Power...• Fast switching time 10-50ns – Low switching losses • Low conduction losses