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Dr.NNCE ECE / IV SEM EC II & S LAB - LM 1 EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB LABORATORY MANUAL FOR FOURTH SEMESTER B.E (ECE) (PRIVATE CIRCULATION ONLY) ACADEMIC YEAR 2013-2014 ANNA UNIVERSITY,CHENNAI-600025 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DR.NAVALAR NEDUNCHEZHIYAN COLLEGE OF ENGINEERING, THOLUDUR 606 303, CUDDALORE DIST. www.rejinpaul.com Get useful study materials from www.rejinpaul.com

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    1

    EC 2257- ELECTRONIC CIRCUITS II AND SIMULATION LAB

    LABORATORY MANUAL

    FOR FOURTH SEMESTER B.E (ECE)

    (PRIVATE CIRCULATION ONLY)

    ACADEMIC YEAR 2013-2014

    ANNA UNIVERSITY,CHENNAI-600025

    DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

    DR.NAVALAR NEDUNCHEZHIYAN COLLEGE OF ENGINEERING,

    THOLUDUR 606 303, CUDDALORE DIST.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    2

    UNIVERSITY PRACTICAL EXAMINATION

    Allotment of Marks

    Internal assessment = 20 marks

    Practical examination = 80 marks

    ----------------------

    Total = 100 marks

    ----------------------

    INTERNAL ASSESSMENT (20 MARKS)

    Staff should maintain the assessment register and the Head of the Department should

    monitor it.

    Split up of internal marks

    Record = 10 marks

    Model exam = 5 marks

    Attendance = 5 marks

    ----------------------

    Total = 20 marks

    ----------------------

    UNIVERSITY EXAMINATION

    The exam will be conducted for 100 marks. Then the marks will be calculated to 80

    marks

    Split up of practical examination marks

    Aim and Procedure = 25 marks

    Program = 30 marks

    Execution = 30 marks

    Result = 05 marks

    Viva voce = 10 marks

    ----------------------

    Total = 100 marks

    ---------------------

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    3

    GENERAL INSTRUCTIONS FOR LABORATORY CLASSES

    o Enter the Lab with CLOSED FOOTWEAR.

    o Boys should TUCK IN the shirts.

    o Students should wear uniform only.

    o LONG HAIR should be protected, let it not be loose especially near ROTATING

    MACHINERY.

    o Any other machines / equipments should not be operated other than the

    prescribed one for that day.

    o POWER SUPPLY to your test table should be obtained only through the LAB

    TECHNICIAN.

    o Do not LEAN and do not be CLOSE to the rotating components.

    o TOOLS, APPARATUS and GUAGE sets are to be returned before leaving the

    lab.

    o HEADINGS and DETAILS should be neatly written

    i. Aim of the experiment

    ii. Apparatus / Tools / Instruments required

    iii. Procedure / Theory / Algorithm / Program

    iv. Model Calculations

    v. Neat Diagram / Flow charts

    vi. Specifications / Designs Details

    vii. Tabulations

    viii. Graph

    ix. Result / discussions .

    o Before doing the experiment, the student should get the Circuit / Program

    approval by the FACULTY - IN - CHARGE.

    o Experiment date should be written in the appropriate place.

    o After completing the experiment, the answer to the viva-voce questions should be

    neatly written in the workbook.

    o Be PATIENT, STEADY, SYSTEMATIC AND REGULAR.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    4

    LIST OF EXPERIMENTS

    DESIGN OF THE FOLLOWING CIRCUITS

    1. Series and shunt feedback amplifiers:

    Frequency response, input and output impedance calculation

    2. RC phase shift oscillator, Wien bridge oscillator

    3. Hartley oscillator, Colpitts oscillator

    4. Tuned class C amplifier

    5. Integrators, Differentiators, Clippers and Clampers

    6. Astable, Monostable and Bistable multivibrators

    SIMULATION USING PSPICE

    1. Differential amplifier

    2. Active filters : Butterworth 2 nd order LPF, HPF (Magnitude and Phase response)

    3. Astable, Monostable and Bistable multivibrator - Transistor bias

    4. D/A and A/D converters (Successive approximation)

    5. Analog multiplier

    6. CMOS inverter, NAND and NOR

    Total: 45

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    5

    CONTENTS

    S.NO LIST OF EXPERIMENTS

    Pa

    ge

    No

    01 RC PHASE SHIFT OSCILLATOR 6

    02 WEIN BRIDGE OSCILLATOR 9

    03 COLPITTS OSCILLATOR 12

    04 HARTLEY OSCILLATOR 15

    05 ASTABLE MULTIVIBRATOR 18

    06 MONOSTABLE MULTIVIBRATOR 21

    07 BISTABLEMULTIVIBRATOR 24

    08 CLASS C SINGLE TUNED AMPLIFIER 27

    09 CURRENT SERIES FEEDBACK AMPLIFIER 30

    10 VOLTAGE SERIES FEEDBACK AMPLIFIER 33

    11 SECOND ORDER LOW PASS BUTTERWORTH FILTER

    36

    12 DIFFERENTIATOR SINE WAVE INPUT 39

    13 DIFFERENTIATOR SQUARE WAVE INPUT 42

    14 ASTABLE MULTIVIBRATOR SYMMETRICAL

    45

    15 ASTABLE MULTIVIBRATOR ASYMMETRICAL

    48

    16 MONOSTABLE MULTIVIBRATOR 51

    17 BISTABLE MULTIVIBRATOR 54

    18 CMOS INVERTER 57

    19 CMOS NOR 60

    20 CMOS NAND 63

    21 DIGITAL TO ANALOG CONVERTER 66

    BEYOND THE SYLLABUS

    22 Inverting, Non-Inverting , Differential Amplifiers 67

    23 Differential Amplifier Using BJT

    24 Class B Complementary Symmetry Power Amplifier

    25 Cascade Amplifier

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    6

    Exercise Number : 1

    Title of the Exercise : RC PHASE SHIFT OSCILLATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design a RC phase shift oscillator and to observe its output waveform.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S.NO APPARATUS SPECIFICATION QUANTITY

    1. OPAMP IC74 1

    2. Resistors 1.2K, 13K,377,12.5K

    3,Each1

    3. Capacitors 0.1F 3

    4. RPS 12V 1

    5 CRO 1MHz 1

    6. Connecting wires - Req.

    b) DESIGN PROCEDURE:

    Frequency of oscillator F=1//2RC.

    Assume C and find R to prevent loading of the amplifier by RC networkR110R.

    c) THEORY: The amplifier stage is self biased with a capacitor by passed source resistor (Rs) and

    drain bias resistor (Rd). the expression for voltage gain of the amplifier is given by Av =gm. rl.

    The feedback network consists of three identical RC sections. Each section produces a phase

    shift of 60. Therefore the net phase shift of the feedback network is 180 degree. Since the amplifier stage also introduces a phase shift of 180, therefore total phase shift is 360 or 0.

    For the variable frequency oscillators, the three capacitors are ganged and varied

    simultaneously. When the circuit is energized by switching on the supply, the circuit starts

    oscillating. The oscillations may start due to the minor variation in dc supply or inherent

    noise.

    d) PROCEDURE:

    Hook up the circuit as shown in the circuit diagram.

    Switch on the power supply.

    Observe the output waveform in CRO.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    7

    e) CIRCUIT DIAGRAM:

    f) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    8

    g) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    RESULT:

    Thus the RC phase shift oscillator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. What is amplifier? Amplifier is a device which is used to amplification purpose.

    2. What is amplification? A low strength signal is converted into strengthen signal ie) boost up process

    3. List the disadvantages of Rc phase shift Oscillator. (or) What are the merits of Rc phase shift Oscillator.

    i. It is ideal for frequency adjustment over a wide range.

    ii. It requires a high transistor to overcome losses in the network. 4. What is the difference between amplifier and oscillator/ Amplifier is working in the negative feedback while oscillator working in the positive

    feedback.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    9

    Exercise Number : 2

    Title of the Exercise : WEIN BRIDGE OSCILLATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design a wein bridge oscillator and to observe its output waveform.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S.NO APPARATUS SPECIFICATION QUANTITY

    1. OPAMP IC741 1

    2. Resistors 1.5K, 1K,500,1.5K

    Each1

    3. Capacitors 0.1F 1

    4. RPS 12V 1

    5 CRO 1MHz 1

    6. Connecting wires - Req.

    b) THEORY:

    Wein Bridge Oscillator uses a non inverting amplifier and hence does not produce any phase

    shift during amplifier stage as total phase shift req. is 0. In wein bridge oscillator type no

    phase shift is necessary through Feedback. Thus the total phase shift around a loop is 0.

    c) DESIGN PROCEDURE:

    Select approximate transistor and note down its specification such as

    Vce,Vcc(max),hoe(min) and hfe(max) and Vbe(sat). Vcc=VCEQ+ICQ(RC+RE)

    Assuming appropriate stability factor and hence I2 flowing through the biasing resistor and

    differentiator. Determine R1 and R2.

    Using the condition for sustained oscillation R3>2R4, compute C for designed frequency for

    the frequency of oscillator.

    F=1/2RC

    d) PROCEDURE:

    Hook up the circuit as shown in the circuit diagram.

    Switch on the power supply.

    Observe the output waveform in CRO.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    10

    e) CIRCUIT DIAGRAM:

    f) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    11

    g) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    h) RESULT: Thus the Wein bridge oscillator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. What is an Oscillator? An Oscillator is a Circuit, which generates an alternating voltage of any desired

    frequency. It can generate an a.c output signal without requiring any externally applied input

    signal.

    2. What is a beat frequency oscillator? Beat frequency Oscillator (BFO) is an Oscillator in which a deserved signal frequency

    such as the beat frequency produced by combining the different signal frequencies such as on

    different radio frequencies.

    3. What is sustained Oscillation? The electrical oscillations in which amplitude does not change with time are called as

    sustained oscillations. It is also called as Undamped Oscillation.

    4. What is meant by resonant Circuit Oscillators? LC Oscillators are known as resonant circuit oscillator because the frequency

    of operation of LC Oscillator is nothing but a resonant frequency of tank circuit or LC tank

    circuit produces sustained Oscillation at the resonant circuit oscillator.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    12

    Exercise Number : 3

    Title of the Exercise : COLPITTS OSCILLATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design a Colpitts oscillator and to observe its output waveform.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S.NO APPARATUS SPECIFICATION QUANTITY

    1. Transistor BC 107 1

    2. Resistors 11.64 K, 552.2,10.02K1.67k

    Each 1

    3. Capacitors 53.5nF,80F, 100mF 2,1,1

    4. Inductor 0.78mH 1

    5. RPS 12V 1

    6. CRO 1MHz 1

    7. Connecting wires - Req.

    b) DESIGN PROCEDURE:

    Select a appropriate transistor and note down its specification such as VCE,IC(MAX), hfe(min) and

    Vbe(sat).

    VCC= VCEQ

    R2=S* RE

    VCC[R2/( R1+ R2)= VBE+VBE(SAT)

    VR1+VR2=VCC

    hfe C1* C2/( C1+ C1)

    XCE RE/10

    PROCEDURE:

    Hook up the circuit as shown in the circuit diagram.

    Switch on the power supply.

    Slight modification in value of C1 and C2 can be made to get perfect sine wave output.

    Observe the output waveform in CRO.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    13

    c) CIRCUIT DIAGRAM: COLPITTS OSCILLATOR

    d) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    14

    e) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    f) RESULT: Thus the Colpitts oscillator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. What is piezo electric effect? The piezo electric Crystals exhibit a property that if a mechanical stress is

    applied across one face the electric potential is developed across opposite face. The inverse

    is also live. This phenomenon is called piezo electric effect.

    2. List the disadvantages of crystal Oscillator. It is suitable for only low power circuits

    Large amplitude of vibrations may crack the crystal.

    It large in frequency is only possible replacing the crystal with another one by

    different frequency.

    3. What are parasitic Oscillators? In a practical amplifier circuit due to stray capacitances and lead inductances,

    oscillations result, since the circuit conditions satisfy the Barkhavsens criterion. These Oscillators are called as unwanted or parasitic Oscillations

    4. What is damped Oscillation? The electrical Oscillations in which the amplitude decreases with time are called as

    damped Oscillation.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    15

    Exercise Number : 4

    Title of the Exercise : HARTLEY OSCILLATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design a Hartley oscillator and to observe its output waveform.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S.NO APPARATUS SPECIFICATION QUANTITY

    1. Transistor BC 107 1

    2. Resistors 2.74 K, 1.76K,10.58K

    1,2,1

    3. Capacitors 0.1F, 0.1F Each 2

    4. Inductor 0.1mH,0.33mH Each 1

    5. RPS 12V 1

    6. CRO 1MHz 1

    7. Connecting wires - Req.

    b) DESIGN PROCEDURE:

    Select a appropriate transistor and note down its specification such as VCE,IC(MAX), hfe(max) and

    Vbe(sat).

    VCC= VCEQ+ ICQ(RC+RE)

    R2=S* RE

    VCC[R2/( R1+ R2)= VBE+VBE(SAT)

    VR1+VR2=VCC

    c) PROCEDURE:

    Hook up the circuit as shown in the circuit diagram.

    Switch on the power supply.

    Slight modification in value of L1 and L2 can be made to get perfect sinewave output.

    Observe the output waveform in CRO.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    16

    d) CIRCUIT DIAGRAM: HARTLEY OSCILLATOR

    e) MODEL GRAPH:

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    17

    f) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    g) RESULT: Thus the Hartley oscillator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. What are the types of sinusoidal oscillator? Mention the different types of sinusoidal oscillator?

    RC phase shift Oscillator.

    Wein bridge Oscillator.

    Hartley Oscillator

    Colpitts Oscillator

    Crystal Oscillator

    2. What is Barkhausan criterion? The conditions for oscillator to produce oscillation is given by Barkhausan

    criterion. They are :

    (i). The total phase shift produced by the circuit should be 360o or 0o

    (ii).The Magnitude of loop gain must be greater than or equal to 1

    i.e. . A 1.

    3. Name two high frequency Oscillators. i. Hartley Oscillator

    ii. Colpitts Oscillator

    iii.Crystal Oscillator

    4. What are the essential parts of an Oscillator? i. Tank circuit (or) Oscillatory circuit.

    ii. Amplifier (Transistor amplifier)

    iii. Feedback Circuit.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    18

    Exercise Number : 5

    Title of the Exercise : ASTABLE MULTIVIBRATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To test astable multivibrator and to observe the two quasi-stable states.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 100k, 2k 2each

    3 Capacitors 0.01F 2

    4 Transistor BC107 1

    5 CRO 0-30MHz 1

    6 RPS 0-30V 1

    b) THEORY: Astable multivibrator consists of two common emitter amplifying stages.When the d.

    c. power supply is switched ON (t=0) one of the transistor will start conducting more than the

    other due to some imbalance in circuit. Then because of the other due to some positive

    feedback, the transistor Q1 will be driven into saturation and Q2 to cut off. Thus at t>0 Q1 is

    ON and Q2 is OFF. During t>0, capacitor C1 is charging and VB2 increases. As it increases

    above cut-in-voltage, Q2 starts conducting at t>t1. As the transistor Q2 goes into saturation,

    VC falls to VCE(sat). Thus at t>t1, Q1 is OFF and Q2 is ON. During t>t1, VB1 rises

    exponentially with time constant. At T=t2, VB1 reaches cutin level and a reverse transition

    take place. It is used to generate square waveform.

    c) PROCEDURE: 1. The components are connected as per the circuit diagram. 2. The DC supply is switched ON. 3. The output voltage and the time period is measured across transistors T1 and T2 at both the base and the collector.

    4. The output wave is plotted in the graph.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    19

    d) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR

    e) MODEL GRAPH:

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    20

    f) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    g) RESULT:

    Thus the Astable multivibrator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. What is a linear waveform-shaping circuit? The process by which the shape of a nonsinusoidal signal is changed by passing the

    signal through the network consisting of linear elements is called Linear Wave Shaping.

    2. What is meant by multivibrator? Multivibrators are two stage switching circuits in which the output of the first stage is

    fed to the input of the second state and vice-versa. The outputs of two stages are

    complementary.

    3. Define Astable multivibrator. Astable multivibrator is a multivibrator in which neither state is stable. There are two

    temporary states. The circuit changes state continuously from one quasi stables state to

    another at regular intervals without any triggering. This generates continuous square

    waveform without any external signal.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    21

    Exercise Number : 6

    Title of the Exercise : MONOSTABLE MULTIVIBRATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To test a monostable multivibrator and to observe the two quasi-stable states. FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 3k, 1k, 280k, 22k,

    1.75k

    1 each

    3 Capacitors 1nF 2

    4 Transistor BC107 1

    5 Diode 1N4007 1

    6 CRO 0-30MHz 1

    7 RPS 0-30V 1

    b) THEORY: Monostble multivibrator is also called as one shot or univibrator and can be used to

    generate a gating pulse, whose width can be controlled. The monostable multivibrator

    provides a single pulse of desired duration in response to an external trigger. The external

    trigger causes the circuit to go to the quasi stable state. After a certain interval of time, the

    circuit returns to its original state. It consists of two NPN transistors. In this case, when a

    pulse is applied to the input circuit, the circuit state is changed abruptly to unstable state for a

    determined time after which the circuit returned to its original state automatically. The two

    outputs are the complement of each other i.e when one of the output is at VCC level, the

    other is at VCE(sat) level. The monostable multivibrators are used for the generation of well

    defined pulses, the logic design of pulse delay, variable pulse width, etc. The width or

    duration of the pulse obtained at the collector or output of either transistor of the monostable

    multivibrator is given by the expression t=0.69 RC.

    c) PROCEDURE:

    1. The components are connected as per the circuit diagram. 2. The output is measured at the collector terminals of the two transistors. 3. The required output voltages and the total time period is noted. 4. The output wave is plotted in the graph.

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    22

    d) CIRCUIT DIAGRAM: MONOSTABLE MULTIVIBRATOR

    e) TRIGGER GENERATION:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    23

    f) TABULATION:

    Amplitude(Volts) Time(ms) Frequency (KHz)

    g) RESULT:

    Thus the Monostable multivibrator was designed and its output waveform was

    verified.

    VIVA QUESTIONS:

    1. Define monostable multivibrator. When a trigger pulse is applied to the input circuit, the circuit state is changed

    abruptly to unstable state for a predetermined time after which the circuit returned to its

    original stable state automatically.

    2. Define integrator. Integrator is a circuit that passes low frequencies of the input and attenuates high

    frequencies. Integrator implies that the output voltage is an integral of the input voltage.

    3. What is the use of commutating capacitors? The Commutating capacitors can be used to reduce the transition time in a low to

    high level and vice versa.

    4. Define transition time. The time interval during which the conduction transfer from one transistor to another

    transistor is defined as transition time.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    24

    Exercise Number : 7

    Title of the Exercise : BISTABLE MULTIVIBRATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To test a Bistable multivibrator and to observe the two quasi-stable states.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 3k, 1k, 280k, 22k,

    1.75k

    1 each

    3 Capacitors 1nF 2

    4 Transistor BC107 1

    5 Diode 1N4007 1

    6 CRO 0-30MHz 1

    7 RPS 0-30V 1

    b) THEORY: Bistble multivibrator is also called as one shot or univibrator and can be used to

    generate a gating pulse, whose width can be controlled. The bistable multivibrator provides a

    single pulse of desired duration in response to an external trigger. The external trigger causes

    the circuit to go to the quasi stable state. After a certain interval of time, the circuit returns to

    its original state. It consists of two NPN transistors. In this case, when a pulse is applied to

    the input circuit, the circuit state is changed abruptly to unstable state for a determined time

    after which the circuit returned to its original state automatically. The two outputs are the

    complement of each other i.e when one of the output is at VCC level, the other is at VCE(sat)

    level. The bistable multivibrators are used for the generation of well defined pulses, the logic

    design of pulse delay, variable pulse width, etc. The width or duration of the pulse obtained at

    the collector or output of either transistor of the bistable multivibrator is given by the

    expression t=0.69 RC.

    c) PROCEDURE: 1. The components are connected as per the circuit diagram. 2. The output is measured at the collector terminals of the two transistors. 3. The required output voltages and the total time period is noted. 4. The output wave is plotted in the graph.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    d) CIRCUIT DIAGRAM: BISTABLEMULTIVIBRATOR

    e) MODEL GRAPH:

    Output Vb1

    V

    Time (s)

    Output Vb2 Vbe(sat)

    Output Vc2

    Vce(sat)

    Vbe(sat)

    Vce(sat)

    Output Vc1

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    26

    f) RESULT: Thus the Bistable multivibrator was designed and its output waveform was verified.

    VIVA QUESTIONS:

    1. Define the Bistable multivibrator. Bistable multivibrator signifies a circuit which can exist indefinitely in either of two

    stable states and which can be induced to make an abrupt transition from one state to other by

    applying an external triggering signal.

    2. Define resolving time. It is the minimum time interval between two consecutive trigger pulses and equals to

    transition time plus the settling time.

    3. What is meant by linear wave shaping circuit? The action of a linear network in producing a waveform at its outputs different from

    its output is known as linear wave shaping circuit.

    4. What are different types of triggering of bistable multivibrator? Asymmetrical triggering.

    Symmetrical triggering.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    27

    Exercise Number : 8

    Title of the Exercise : CLASS C SINGLE TUNED AMPLIFIER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design and find the frequency response of class c single tuned amplifier.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 1k,4.7k,10k 1 each

    3 Capacitors 1nF,0.01mF,0.1 mF 2

    4 Transistor BC107 1

    5 CRO 0-30MHz 1

    6 RPS 0-30V 1

    b) THEORY: In class C amplifier, the output current flows only for one half of the cycle of the input signal. The transistor dissipates no power with zero input signal. The average current

    drawn by the circuit in class C is smaller than that in class A. Complementary symmetry

    amplifier requireds neither an input nor an output transformer. This arrangement uses

    transistors having complementary symmetry in the emitter follower configuration. The term

    complementary means that it uses two identical transistors one NPN and the other PNP. The term symmetry means that biasing resistors are equal. This amplifier circuit has a unity gain because of the emitter follower configuration. Moreover there is no phase inversion of the

    output signal. The split supply used in the circuit gives us an advantage that the dc

    component of the output voltage can be made zero. Thus the only ac component of the power

    is available across the load resistor.

    c) PROCEDURE:

    1. The components are connected as shown in the circuit diagram.

    2. The input voltage is given using function generator.

    3. The load resistance is varied using the decade resistance box and output voltage is measured and readings are tabulated

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    28

    d) CIRCUIT DIAGRAM: CLASS C SINGLE TUNED AMPLIFIER

    e) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    29

    f) TABULATION:

    Sl.

    No.

    Input

    frequency

    (Hz)

    Input

    Voltage

    (mV)

    Output

    Voltage

    (V)

    Voltage gain

    20log ogaini

    VV db

    V

    g) RESULT:

    Thus the Class C single tuned amplifier was designed and its frequency response was

    observed

    VIVA QUESTIONS:

    1. What is meant by tuned amplifiers? Tuned amplifiers are amplifiers that are designed to reject a certain range of

    frequencies below a lower cut off frequency L and above a upper cut off frequency H and allows only a narrow band of frequencies.

    2. Classify tuned amplifiers. 1.Single tuned amplifier.

    2.Double tuned amplifier.

    3.Synchronously tuned amplifier.

    4.Stagger tuned amplifier.

    3. What are the advantages of double tuned amplifier? In double tuned amplifiers, the tuning is done both at the primary and

    secondary.

    The double tuned amplifiers provide a wider bandwidth, flatter pass band and

    a greater selectivity.

    4. What is the other name for tuned amplifier? Tuned amplifiers used for amplifying narrow band of frequencies hence it is also

    known as narrow band amplifier or Band pass amplifier.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    30

    Exercise Number : 9

    Title of the Exercise : CURRENT SERIES FEEDBACK AMPLIFIER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design and find the frequency response of current series feedback amplifier.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 10k, 11k, 200, 283

    1each

    3 Capacitors 1F 10F

    2

    1

    4 Transistor BC107

    5 CRO 0-30MHz 1

    6 RPS 0-10V 1

    7 Digital multimeter 1

    b) THEORY: In the current series amplifier, the output current flows only for one half of the cycle of the input signal. The transistor dissipates no power with zero input signal.. Complementary

    symmetry amplifier requires neither an input nor an output transformer. This arrangement

    uses transistors having complementary symmetry in the emitter follower configuration. This

    amplifier circuit has a unity gain because of the emitter follower configuration. Moreover

    there is no phase inversion of the output signal. The split supply used in the circuit gives us

    an advantage that the dc component of the output voltage can be made zero. Thus the only ac

    component of the power is available across the load resistor.

    c) PROCEDURE:

    1. The components are connected as shown in the circuit diagram.

    2. The input voltage is given using function generator.

    3. The load resistance is varied using the decade resistance box and output voltage is measured and readings are tabulated.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    31

    d) CIRCUIT DIAGRAM: CURRENT SERIES FEEDBACK AMPLIFIER

    e) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    32

    f) TABULATION:

    Sl. No. Input

    frequency

    (Hz)

    Input

    Voltage (mV)

    Output

    Voltage (V)

    Voltage gain

    20log ogaini

    VV db

    V

    g) RESULT: Thus the Current series feedback amplifier was designed and its frequency response was

    observed.

    VIVA QUESTIONS:

    1. What is feedback amplifier? The part of the output is given to the input of the circuit called as feedback amplifier.

    2. Classify the feedback amplifiers. 1) Voltage series feedback amplifier

    2) Current series feedback amplifier

    3) Voltage shunt feedback amplifier

    4) Current shunt feedback amplifier

    3. What is meant by neutralization? It is the process by which feedback can be cancelled by introducing a current that is

    equal in magnitude but 180o out of phase with the feedback signal at the input of the active

    device. The two signals will cancel and the effect of feedback will be eliminated. This

    technique is termed as neutralization.

    4. What is the application of tuned amplifiers? The application of tuned amplifiers to obtain a desired frequwnct and rejecting all other

    frequency in

    (i). Radio and T .V broadcasting as tunning circuit.

    (ii). Wireless communication system.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    33

    Exercise Number : 10

    Title of the Exercise : VOLTAGE SERIES FEEDBACK AMPLIFIER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To design and find the frequency response of voltage series feedback amplifier.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    S. NO. COMPONENTS RANGE QUANTITY

    1 Breadboard - 1

    2 Resistors 10k, 11k, 200, 283

    1each

    3 Capacitors 1F 10F

    2

    1

    4 Transistor BC107

    5 CRO 0-30MHz 1

    6 RPS 0-10V 1

    7 Digital multimeter 1

    b) THEORY:

    The feedback voltage is connected in series with the input circuit means called as

    voltage series amplifier. If the feedback voltage is equal to the output voltage then it is called

    as voltage series feedback amplifier.

    c) PROCEDURE:

    1. The components are connected as shown in the circuit diagram.

    2. The input voltage is given using function generator.

    3. The load resistance is varied using the decade resistance box and output voltage is measured and readings are tabulated.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    34

    d) CIRCUIT DIAGRAM: VOLTAGE SERIES FEEDBACK AMPLIFIER

    e) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    35

    f) TABULATION:

    Sl. No. Input

    frequency

    (Hz)

    Input

    Voltage

    (mV)

    Output

    Voltage (V)

    Voltage gain

    20log ogaini

    VV db

    V

    g) RESULT: Thus the Current series feedback amplifier was designed and its frequency response was

    observed.

    VIVA QUESTIONS:

    1.List out the types of feedback circuits.

    Positive feedback

    Negative feedback

    2.Write the advantages of negative feedback.

    Higher input and lower output impedance.

    Improved higher sensitivity

    Reduced noise

    Increased bandwidth

    Reduced distortion

    3.Write the disadvantages of negative feedback

    reduced overall circuit gain

    reduced distortion

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    36

    Exercise Number : 11

    Title of the Exercise : SECOND ORDER LOW PASS BUTTERWORTH FILTER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the frequency response of second order low pass filter by using

    ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    37

    c) CIRCUIT DIAGRAM: SECOND ORDER LOW PASS BUTTERWORTH FILTER

    d) MODEL GRAPH:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    38

    e) RESULT: Thus the second order low pass filter circuit was simulated using ORCAD capture and

    its frequency response was obtained.

    VIVA QUESTIONS:

    1. Write the equation for finding the bandwidth. Bandwidth= f2-f1

    Where f1= lower cut off frequency and f2= higher cut off frequency

    2. What is blocking oscillator? The circuit which uses a regerative feedback, producing a single pulse or pulse

    train is called a blocking oscillator.

    3. Which are the two important elements of a blocking oscillator? 1. Active element like transistor.

    2. A pulse transformer.

    4. What is pulse transformer? A pulse transformer is basically a transformer which couples a source of pulses of

    electrical energy to the load, keeping the shape and other properties of pulses unchanged. The

    voltage level of the pulse can be raised or lowered by designing the proper turns ratio for the

    pulse transformer.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    39

    Exercise Number : 12

    Title of the Exercise : DIFFERENTIATOR SINE WAVE INPUT

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of differentiator circuit by using ORCAD

    capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    40

    c) CIRCUIT DIAGRAM: DIFFERENTIATOR SINE WAVE INPUT

    d) MODEL GRAPH:

    :

    Amplitude

    in volts

    0

    Time in ms

    0

    Time in ms

    0

    0

    0 0

    AD741 3

    2

    7

    4

    6

    1

    5 +

    -

    V+

    V-

    OUT

    OS1

    OS2

    1.59k

    15.9k

    1.44k

    0.01u

    0.1u

    12v

    12v

    C2

    R2

    R1 C1

    R3

    OUTPUT

    INPUT

    Frequency=100

    AC=1

    DC=0

    Voff=0

    Vamp=1V

    Maximum Step Size= 0.2us

    Analysis Type : Time Domain ( Transient) Run to Time =40ms

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    41

    e) RESULT: Thus the Differentiated Sine wave input circuit was simulated using ORCAD capture

    and its frequency response was obtained.

    VIVA QUESTIONS:

    1. Define differentiator. Differentiator is a circuit that passes high frequencies of the input and attenuates low

    frequencies. It implies that the output voltage is the differential of the input.

    2. What is meant by clippers? The circuit with which the waveform is shaped by removing a portion of the input

    signal without distorting the removing part of the alternating waveform is called a clipper.

    3. What is meant by clampers? Clamping network shifts (clamp) a signal to a different d.c level, i.e., it introduces a

    d.c level to an a.c signal.Hence,the clamping network is known as d.c restorer.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    42

    Exercise Number : 13

    Title of the Exercise : DIFFERENTIATOR SQUARE WAVE INPUT

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of differentiator circuit by using ORCAD

    capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    43

    CIRCUIT DIAGRAM: DIFFERENTIATOR - SQUARE WAVE INPUT

    c) MODEL GRAPH:

    0

    0

    0 0

    1.59k AD741 3

    2

    7

    4

    6

    1

    5 +

    -

    V+

    V-

    OUT

    OS1

    OS2

    12v

    12v

    0.1u

    0.01u

    1.44k

    15.9k

    C2

    R2

    R1 C1

    R3

    OUTPUT

    INPUT

    V1= -1V V2= 1V AC=10 DC=0 TR=0ms TF=0ms TD=0ms PW=5ms PER=0.01s

    Analysis Type : Time Domain ( Transiant) Run to Time =20ms

    Maximum Step Size= 0.2us

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    44

    d) RESULT: Thus the Differentiated Square wave input circuit was simulated using ORCAD

    capture and its frequency response was obtained.

    VIVA QUESTIONS:

    1. What is delay time? The time required for the current to rise to 10% of its maximum (saturation) value Ics

    is called the delay time td.

    2. What is the total turn on time? The total turn on time is ton is the sum of the delay time and rise time,

    ton = td + tr

    Where,

    td = Delay time.

    tr = Rise time.

    3. What is storage time? The interval that elapses between the transition of the input waveform and the time

    when the collector current has dropped to 90 % of total output is called the storage time ts.

    4. Define transition time. The time interval during which the conduction transfer from one transistor to another

    transistor is defined as transition time.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    45

    Exercise Number : 14

    Title of the Exercise : ASTABLE MULTIVIBRATOR SYMMETRICAL

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of astable multivibrator(symmetrical) by using

    ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    46

    c) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR SYMMETRICAL

    d) MODEL GRAPH:

    Vce(sat) V

    Vce(sat)

    Vbe(sat)

    Vbe(sat)

    Time(s)

    Output Vc2

    Output Vc1

    Output Vb2

    Output Vb1

    0 0

    0

    C1

    0.01U

    1k 36K 1k

    SMBT2222A/SIE SMBT2222A/SIE

    C2

    0.01U

    36K

    8V

    Analysis type: Time domain transient Run to time: 5ms Maximum step size: 0.2us

    V1

    Rc1 R2 R1 Rc2

    Vc1 Vc2

    Vb2 Vb1 Q23 Q22

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    47

    e) RESULT: Thus the astable multivibrator(symmetrical) circuit was simulated using ORCAD

    capture and its output waveform was obtained.

    VIVA QUESTIONS:

    1. What is Leading edge response? At start there is an overshoot and then the pulse settles down. The response till it settles

    down after the overshoot is called leading edge response.

    2. What is trailing edge response? The response generally extends below the zero amplitude after the end of pulse width

    is called back swing. The portion of response from backswing till it settes down is trailing

    edge response.

    3. What is flat top response? The portion of the response between the trailing edge and the leading edge is called

    flat top response.

    4. Define rise time of a pulse. The rise time is an important parameter related to this part of the response.It is defined

    by the time required by the pulse to rise from 10 % of its amplitude to 90 % of its amplitude.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    48

    Exercise Number : 15

    Title of the Exercise : ASTABLE MULTIVIBRATOR ASYMMETRICAL

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of astable multivibrator(Asymmetrical) by using

    ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    49

    c) CIRCUIT DIAGRAM: ASTABLE MULTIVIBRATOR- ASYMMETRICAL

    d) MODEL GRAPH:

    Vce(sat)

    V

    Vce(sat)

    Vbe(sat)

    Vbe(sat)

    Time(s)

    Output Vc2

    Output Vc1

    Output Vb2

    Output Vb1

    0 0

    0

    43K 1k

    C1

    0.01U

    C2

    0.01U

    28K

    8V

    SMBT2222A/SIE SMBT2222A/SIE

    1k

    Analysis type: Time domain transient

    V1

    Rc1 R2 R1 Rc2

    Vc1 Vc2

    Vb2 Vb1 Q23 Q22

    Run to time: 5ms Maximum step size: 0.2us

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    50

    e) RESULT: Thus the astable multivibrator(asymmetrical) circuit was simulated using ORCAD

    capture and its output waveform was obtained.

    VIVA QUESTIONS:

    1. What is current time base generator? The circuit which produces current which linearly increases with time is called current

    time base generator.

    2. What are the application of the blocking oscillator? The blocking oscillator can be used as low impedance switch used to discharge a capacitor

    very quickly. To produce large peak power pulses, both the types of oscillators cab be used.

    The output of the blocking oscillator can be used to produce gating waveform with very low

    mark space ratio. It may be used as frequency divider or counter in digital circuits.

    3. List varies sweep circuits Exponential charging circuit

    Constant-current charging circuit.

    Miller circuit

    poot strap circuit

    Inductor circuit.

    4. What do you mean by voltage time base generators? Circuits used to generate a linear variation of voltage with time are called voltage time

    base generators.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    51

    Exercise Number : 16

    Title of the Exercise : MONOSTABLE MULTIVIBRATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of Monostable multivibrator by using ORCAD

    capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    52

    c) CIRCUIT DIAGRAM: MONOSTABLE MULTIVIBRATOR

    d) MODEL GRAPH:

    Output Vc2

    Output Vc1

    Output Vb1

    Output Vb2

    Time (s)

    V

    Vce(sat)

    Vce(sat)

    Vbe(sat)

    Vbe(sat)

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    53

    e) RESULT: Thus the monostable multivibrator circuit was simulated using ORCAD capture and

    its output waveform was obtained.

    VIVA QUESTIONS:

    1. Define resonance. The reactance of the capacitor equals that of the inductor reactance.

    i.e C. = 1 / L.

    2. What is Quality factor? The ratio of inductive reactance of the coil at resonance to its resistance is known

    as quality factor.

    Q = XL / R

    3. Define gain bandwidth product of a tuned amplifier. The gain bandwidth(GBW) product is a figure of merit defined in terms of mid band

    gain and upper 3-db frequency fh as GBW = | Aim fh | = gm / 2c

    4. What is the other name for tuned amplifier? Tuned amplifiers used for amplifying narrow band of frequencies hence it is also

    known as narrow band amplifier or Band pass amplifier.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    54

    Exercise Number : 17

    Title of the Exercise : BISTABLE MULTIVIBRATOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of bistable multivibrator by using ORCAD

    capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    55

    c) CIRCUIT DIAGRAM: BISTABLE MULTIVIBRATOR

    d) MODEL GRAPH:

    Output Vb1

    V

    Time (s)

    Output Vb2 Vbe(sat)

    Output Vc2

    Vce(sat)

    Vbe(sat)

    Vce(sat)

    Output Vc1

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    56

    e) RESULT: Thus the Bistable multivibrator circuit was simulated using ORCAD capture and its

    output waveform was obtained.

    VIVA QUESTIONS:

    1. What is unilateralisation? It is the phenomenon by which a signal can be transmitted from the input to the output

    alone and not viceversa. In an unilateralised amplifier both resistive and reactive effects are

    cancelled.

    2. What is stagger tuned amplifier? In this configuration one or more tuned amplifiers are cascaded each amplifier stage is

    tuned to different frequencies. This results in decreased gain and increased bandwidth.

    3. What is the effect of Q on stability? Higher the value of Q,provides better selectivity, but smaller bandwidth and larger

    gain. Hence it provides less stability.

    4. What is meant by unloaded and loaded Q of tank circuit.[ APR 2003 ] Unloaded Q is the ratio of stored energy to dissipated energy in a reactor or resonator.

    The loaded Q (or) QL of a resonator is determined by how tightly the resonator is coupled to

    its terminations.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise Number : 18

    Title of the Exercise : CMOS INVERTER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of cmos inverter by using ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    c) CIRCUIT DIAGRAM: CMOS INVERTER

    e) RESULT:

    Thus the CMOS Inverter circuit was simulated using ORCAD capture and its output

    waveform was obtained.

    0

    0

    V1 5v

    M1

    MbreakP

    CLK DSTM1

    M2

    MbreakN

    INPUT

    OUTPUT

    Analysis type:Time domain (transient)

    Run to time=0.01ms

    Maximum step size=0.2ms

    Off time=0.5us On time=0.5us

    1 1 1 1

    1 1 1 1

    0 0 0 0

    0 0 0 0

    Time(s)

    V

    Input

    Output

    d) MODEL

    GRAPH

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    VIVA QUESTIONS:

    1. Mention the applications of class c tuned amplifier. One of the most common applications for mixer is in radio receivers. The mixer is

    used to convert incoming signal to a lower frequency where it is easier to obtain the high gain

    and selectivity required.

    Mixer circuits are used to translate signal frequency to some lower frequency or to

    some higher frequency. When it is used to translate signal to lower frequency it is called

    down converter. When it is used to translate signal to higher frequency, it is called up

    converter.

    2. Mention the need for stagger-tuned amplifier. The double tuned amplifier gives greater 3 db bandwidth having steeper sides and flat

    top. But alignment of double tuned amplifier is difficult. To overcome this problem two

    single tuned amplifiers are cascaded.

    3. What is principle of Hazel tine neutralization? Hazel tine introduced a circuit in which the troublesome effect of the collector to base

    capacitance of the transistor was neutralized by introducing a signal which cancels the signal

    coupled through the collector to base capacitance.

    4. List the performance measure of a tuned amplifier. Selection of a desired radio frequency signal.

    Effective quality factor.

    Gain

    Bandwidth.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise Number : 19

    Title of the Exercise : CMOS NOR

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of CMOS NOR by using ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    c) CIRCUIT DIAGRAM: CMOS NOR

    d) MODEL GRAPH:

    1 1 1 1

    1 1 1 1 1

    1 1 1

    0 0 0 0 0 0

    0 0 0 0 0

    0 0 0 0 0 0 0

    Input A

    Input B

    Output

    Time(s)

    V

    0

    0

    0

    V1 5V

    M4

    MbreakN

    M2

    MbreakP

    M1

    MbreakP

    CLK DSTM1

    CLK DSTM2

    M3

    MbreakN

    Input A

    Input B Output

    Off time=1us On time=1us

    Off time=0.5us On time=0.5us

    Analysis type:Time domain (transient)

    Run to time=0.01ms

    Maximum step size=0.2us

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    62

    e) RESULT: Thus the CMOS NOR circuit was simulated using ORCAD capture and its output

    waveform was obtained.

    VIVA QUESTIONS:

    1. What are the characteristics of an ideal tuned amplifier? Selects a single radio frequency and amplifiers the same by rejecting all other

    frequencies.

    Bandwidth is zero.

    Harmonic distortion is zero.

    2. Write down the relationship between bandwidth and effective Q of a tuned amplifier? Bandwidth = o / Q effective.

    3. What are the different methods of coupling? (or) Point out different methods of coupling the load to a tuned amplifier.

    The different methods of coupling the load to a tuned amplifier are:

    Capacitive coupling.

    Inductive coupling.

    4. Why tuned amplifier cannot be used at low frequency? For low frequencies the size L and C are large. So the circuit will be bulky and

    expensive, hence the tuned amplifiers cannot be used at low frequency.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise Number : 20

    Title of the Exercise : CMOS NAND

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of CMOS NAND by using ORCAD capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    64

    c) CIRCUIT DIAGRAM: CMOS NAND

    d) MODEL GRAPH:

    Input B

    V

    Output 0 0

    Input A

    1

    1

    1 0

    1

    0

    0

    0

    0

    0 0

    0

    0 0

    0 0

    0

    0

    1

    1 1

    1

    0

    1

    Time(s)

    1

    1

    0 0

    0

    0

    M4

    MbreakP

    M5

    MbreakP

    M6

    MbreakN

    M7

    MbreakN

    V2

    5V

    CLK DSTM3

    CLK DSTM4

    Input A

    Input B

    Output

    Off time=1us On time=1us

    Analysis type:Time domain (transient)

    Run to time=0.01ms

    Maximum step size=0.2us

    Off time=0.5us On time=0.5us

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    65

    e) RESULT: Thus the CMOS NAND circuit was simulated using ORCAD capture and its output

    waveform was obtained.

    VIVA QUESTIONS:

    1. What is the need for differential amplifiers? Differential amplidiers are small signal direct coupled amplifiers used to amplify the

    difference between two signals. The need for differential amplifier arises in physical

    measurements, instrumentation amplifiers and medical instrumentation.

    2. What are the advantages of Differential Amplifiers? * High voltage gain.

    * High input impedence

    * High Bandwidth

    * Good bias stability.

    3. Define CMRR. Common Mode Rejection Ratio(CMRR) is the ability of the differential amplifiers to

    reject the common mode signals. It is defined as the ratio of difference mode gain Ad to

    common mode gain Ac.

    4. Why Differential amplifiers are widely used in Integrated Circuits? It has good bias stability and good voltage gain without the use of large bypass

    capacitors. Hence it is used in ICs.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise Number : 21

    Title of the Exercise : DIGITAL TO ANALOG CONVERTER

    Date of the Exercise :

    OBJECTIVE (AIM) OF THE EXPERIMENT

    To simulate and obtain the output waveform of digital to analog converter by using ORCAD

    capture.

    FACILITIES REQUIRED AND PROCEDURE a) FACILITIES REQUIRED TO DO THE EXPERIMENT:

    ORCAD capture

    b) PROCEDURE:

    1. Start the program 2. Select the ORCAD release 9 capture CIS 3. Go to new and select project 4. Create the title of the project 5. Drag the elements as per the circuit diagram requirement. 6. Make connections as per the circuit diagram using wire icon. 7. Create the new simulation 8. Set the output level setting. 9. Placed the voltage markers in input and output mode. 10. Run the circuit diagram and print the output.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    c) CIRCUIT DIAGRAM:

    d) MODEL GRAPH:

    Time(s)

    Input B0

    Input B1

    Input B2

    Input B3

    Output

    V

    0 0 0 0 0 0 0 0 0 0

    0 0 0 0 0 0 0 0 0 0

    0 0 0 0 0 0 0 0

    0 0 0 0 0 0 0 0 0

    0 0

    1 1 1 1 1 1 1 1

    1 1 1 1 1 1 1

    1 1 1 1 1 1 1 1

    1 1 1 1 1 1 1 1 1

    1

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    RESULT:

    Thus the digital to analog converter circuit was simulated using ORCAD capture and

    its output waveform was obtained.

    VIVA QUESTIONS:

    1. What are the basic elements of power supply ? (i) Transformer

    (ii) Rectifier.

    (iii) Filter.

    2. What is ripple factor()? Ripple factor () may be defined as the ratio of the root mean square (rms) value of the ripple voltage to the absolute value of the dc component of the output voltage, usually expressed as

    a percentage. However, ripple voltage is also commonly expressed as the peak-to-peak value.

    This is largely because peak-to-peak is both easier to measure on an oscilloscope and is

    simpler to calculate theoretically. Filter circuits intended for the reduction of ripple are

    usually called smoothing circuits.

    3. What is a rectifier? A rectifier is an electrical device that converts alternating current (AC), which periodically

    reverses direction, to direct current (DC), which flows in only one direction. The process is

    known as rectification.

    4. Define SMPS . A switched-mode power supply (switching-mode power supply, SMPS, or simply switcher)

    is an electronic power supply that incorporates a switching regulator in order to be highly

    efficient in the conversion of electrical power.

    An SMPS is usually employed to efficiently provide a regulated output voltage, typically at a

    level different from the input voltage.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise/Experiment Number: 22

    Title of the exercise/experiment : Inverting, Non-inverting and Differential amplifiers

    Date of the experiment :

    AIM: To construct and test the performance of an Inverting, Non-inverting amplifier

    and Differential amplifier using IC A 741

    APPARATUS REQUIRED:

    DESIGN

    :

    INVERTING AMPLIFIER:

    Let A = -5; R1 = 1K A = Rf / R1 Rf = 5 K Rcomp = R1 Rf / R1 + Rf

    = 833

    NON-INVERTING AMPLIFIER:

    Let A = 6; R1 = 1K A = 1 + (Rf / R1)

    Rf = 5 K Rcomp = R1 Rf / R1 + Rf

    = 833 NON-INVERTING AMPLIFIER:

    Let A = 100; R1 = 1K A = R2 / R1

    R2 = 100 K

    S. No. Name Range Quantity

    1 Dual Power Supply (0-30)V 1

    2 Resistors 1K;5 K;100 K Each 2

    3 Regulated Power Supply (0-30)V 1

    4 IC A 741 - 1

    5 Voltmeter (0-50)V 1

    6 Connecting Wires - -

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    CIRCUIT DIAGRAM:

    NON-INVERTING AMPLIFIER: MODEL GRAPH:

    DIFFERENTIAL AMPLIFIER:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    THEORY:

    INVERTING AMPLIFIER:

    The fundamental component of any analog computer is the

    operational amplifier or op-amp and the frequency configuration in which it is used as an

    inverting amplifier. An input voltage Vin is applied to the input voltage. It receives and

    inverts its polarity producing an output voltage. this same output voltage is also applied to a

    feedback resistor Rf, which is connected to the amplifier input analog with R1. The amplifier

    itself has a very high voltage gain.

    If Rf = R1 then Vo=Vi

    NON- INVERTING AMPLIFIER:

    Although the standard op-amp configuration is as an inverting

    amplifier, there are some applications where such inversion is not wanted. However, we

    cannot just switch the inverting and non inverting inputs to the amplifier itself. We will still

    need negative feedback to control the working gain of the circuit .Therefore, we will need to

    leave the resistor structure around the op-amp intact and swap the input and ground

    connections to the overall circuit.

    VO/VI = (Rf / Ri) +1

    From the calculations, we can see that the effective voltage

    gain of the non-inverting amplifier is set by the resistance ratio. Thus, if the two resistors are

    equal value, then the gain will be 2 rather than 1.

    DIFFERENTIAL AMPLIFIER:

    A circuit that amplifies the difference between two signals is

    called as a differential amplifier. This type of amplifiers is very useful in instrumentation

    circuits. From the experimental setup of a differential amplifier, the voltage at the output of

    the operational amplifier is zero. The inverting and non-inverting terminals are at the same

    potential. Such a circuit is very useful in detecting very small differences in signals. Since the

    gain can be chosen to be very large. For example, if R2=100R1, then a small difference V1-

    V2 is amplified 100 times.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    TABULATION:

    INVERTING AMPLIFIER:

    S.No Input Voltage (in volts) Output Voltage (in volts)

    1

    1

    9.93

    NON- INVERTING AMPLIFIER:

    S.No Input Voltage (in volts) Output Voltage (in volts)

    1

    1

    11.2

    DIFFERENTIAL AMPLIFIER:

    S.No Input Voltage (in volts) Output Voltage (in volts)

    1

    2

    V1 V2

    9.74

    9.80

    3 2

    2 3

    PROCEDURE:

    Connections are made as per the EXPERIMENTAL SETUP. The supply is switched ON. Output is connected to anyone channel of CRO. The V1 and V2 voltages are fixed and measured from the other channel of CRO and the corresponding output voltages are also noted from the CRO.

    The above step is repeated for various values of V1 and V2.V1 and V2 may be AC or DC voltages from function generator or DC power supply.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Readings are tabulated and gain was calculated and composed with designed values. RESULT Thus the Inverting, Non-inverting and Differential amplifier using op-amp was designed and tested.

    VIVA QUESTIONS:

    1. Define an operational amplifier.

    An operational amplifier is a direct-coupled, high gain amplifier consisting of one or more

    differential amplifier. By properly selecting the external components, it can be used to

    perform a variety of mathematical operations.

    2. Mention the characteristics of an ideal op-amp.

    * Open loop voltage gain is infinity. *Input impedance is infinity. *Output

    impedance is zero. *Bandwidth is infinity. *Zero offset.

    3. Define input offset voltage.

    A small voltage applied to the input terminals to make the output voltage as zero when the

    two input terminals are grounded is called input offset voltage.

    4. Define input offset current.

    The difference between the bias currents at the input terminals of the op-amp is called as

    input offset current.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise/Experiment Number: 23

    Title of the exercise/experiment : DIFFERENTIAL AMPLIFIER USINGBJT

    Date of the experiment :

    AIM:

    To construct a differential amplifier using BJT and to determine the dc collector current of

    individual transistors and also to calculate the CMRR.

    APPARATUS REQUIRED:

    S.No. Name Range Quantity

    1. Transistor BC107 2

    2. Resistor 4.7k, 10k 2,1

    3. Regulated power supply (0-30)V 1

    4. Function Generator (0-3) MHz 2

    5. CRO 30 MHz 1

    6. Bread Board 1

    OBSERVATION

    VIN = V1 V2 V0 =

    Ad = V0/ VIN

    For the differential mode operation the input is taken from two different sources and the

    common mode operation the applied signals are taken from the same source

    Common Mode Rejection Ratio (CMRR) is an important parameter of the differential

    amplifier. CMRR is defined as the ratio of the differential mode gain, Ad to the common

    mode gain, Ac.

    CMRR = Ad / Ac

    In ideal cases, the value of CMRR is very high.

    OBSERVATION

    VIN =VO =AC = VO / VIN FORMULA:

    Common mode Gain (Ac) = VO / VIN

    Differential mode Gain (Ad) = V0 / VIN

    Where VIN = V1 V2

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    CIRCUIT DIAGRAM

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    76

    Common Mode Rejection Ratio (CMRR) = Ad/Ac

    Where, Ad is the differential mode gain

    Ac is the common mode gain.

    THEORY:

    The differential amplifier is a basic stage of an integrated operational amplifier.

    It is used to amplify the difference between 2 signals.

    It has excellent stability, high versatility and immunity to noise

    . In a practical differential amplifier, the the common mode signal.

    Transistor Q1 and Q2 have matched characteristics. The values of RC1 and RC2 are

    equal. Re1 and Re2 are also equal and this differential amplifier is called emitter coupled

    differential amplifier. The output is taken between the two output terminals

    PROCEDURE:

    1. Connections are given as per the circuit diagram.

    2. To determine the common mode gain, we set input signal with voltage Vin=2V

    and determine Vo at the collector terminals. Calculate common mode gain, Ac=Vo/Vin. 3. To determine the differential mode gain, we set input signals with voltages V1 and

    V2. Compute Vin=V1-V2 and find Vo at the collector terminals. Calculate differential mode

    gain, Ad=Vo/Vin.

    4. Calculate the CMRR=Ad/Ac. 5. Measure the dc collector current for the individual transistors.

    RESULT:

    Thus, the Differential amplifier was constructed and dc collector current for the

    individual transistors is determined. The CMRR is calculated as

    Viva questions 1.What is an amplifier?

    An amplifier is a device which produces a large electrical output of similarcharacteristics to

    that of the input parameters.

    2.. How are amplifiers classified according to the input?

    1. Small signal amplifier 2. Large signal amplifier

    3.How are amplifiers classified according to the transistor configuration?

    Common emitter amplifier 2. Common base amplifier 3. Common collector

    amplifier

    4. What is the different analysis available to analyze a transistor?

    1. AC analysis 2. DC analysis

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise/Experiment Number: 24

    Title of the exercise/experiment :CLASS B COMPLEMENTARY SYMMETRY

    POWER AMPLIFIER

    Date of the experiment :

    AIM:

    To construct a Class B complementary symmetry power amplifier and observe the

    waveforms with and without cross-over distortion and to compute maximum output power

    and efficiency.

    APPARATUS REQUIRED:

    S.No. Name Range Quantity

    1. Transistor CL100, BC558 1,1

    2. Resistor 4.7k,15k 2,1

    3. Capacitor 100F 2

    4. Diode IN4007 2

    5. Signal Generator (0-3)MHz 1

    6. CRO 30MHz 1

    7. Regulated power supply (0-30)V 1

    8. Bread Board 1

    FORMULA:

    Input power, Pin=2VccIm/ Output power, Pout=VmIm/2

    Power Gain or efficiency, =/4(Vm/Vcc) 100 . THEORY: A power amplifier is said to be Class B amplifier if the Q-point and the input signal

    are selected such that the output signal is obtained only for one half cycle for a full input

    cycle. The Q-point is selected on the X-axis. Hence, the transistor remains in the active

    region only for the positive half of the input signal.

    There are two types of Class B power amplifiers: Push Pull amplifier and complementary

    symmetry amplifier. In the complementary symmetry amplifier, one n-p-n and another p-n-p

    transistor is used. The matched pair of transistor are used in the common collector

    configuration. In the positive half cycle of the input signal, the n-p-n transistor is driven into

    active region and starts conducting and in negative half cycle, the p-n-p transistor is driven

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    78

    into conduction. However there is a period between the crossing of the half cycles of the

    input signals, for which none of the transistor is active and output, is zero.

    MODEL GRAPH

    f 1 f2 f (Hz)

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    TABULATION:

    FREQUENCY RESPONSE OF CASCODE AMPLIFIER

    Keep the input voltage constant (Vin) =

    Frequency (in Hz) Output Voltage (in volts) Gain = 20 log (Vo / Vin) (in dB)

    RESULT:

    Thus, the Class B amplifier was constructed and the gain was determined.

    VIVA QUESTION:

    1. What is feed back?

    It is the process of injecting some energy from the output and then returns it back

    tothe input.

    2. What is the disadvantage of negative feed back? Reduces amplifier gain.

    3. Define sensitivity. It is the ratio of percentage change in voltage gain with feedback to the percentage

    change in voltage gain without feed back.

    4. Define Desensitivity.

    It is the ratio of percentage change in voltage gain without feedback to thepercentage

    change in voltage

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    Exercise/Experiment Number: 25

    Title of the exercise/experiment :CASCADE AMPLIFIER

    Date of the experiment :

    AIM:

    To construct a cascode amplifier circuit and to plot the frequency response

    characteristics.

    APPARATUS REQUIRED:

    S.No. Name Range Quantity

    1. Transistor BC107 2

    2. Resistor

    22k,6 k,700 ,470 16 k,6.2 k,3.3 k 1.1 k

    1,1,1,1,

    1,1,1,

    1

    3. Regulated power supply (0-30)V 1

    4. Signal Generator (0-3)MHz 1

    5. CRO 30 MHz 1

    6. Bread Board 1

    7. Capacitor 0.01F 3

    THEORY:

    A cascode amplifier consists of a common emitter amplifier stage in series with a common

    base amplifier stage. It it one approach to solve the low impedance problem of a common

    base circuit. Transistor Q1 and its associated components operate as a common emitter

    amplifier, while the circuit of Q2 functions as a common base output stage. The cascade

    amplifier gives the high input impedance of a common emitter amplifier, as well as the good

    voltage gain and frequency performance of a common base circuit.

    PROCEDURE:

    1. Connections are made as per the circuit diagram.

    2. The waveforms at the input and output are observed for cascade operations varying the

    input frequency.

    3. The biasing resistances needed to locate the Q-point are determined.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    81

    4. Set the input voltage as 1V and by varying the frequency, note the output voltage.

    5. Calculate gain=20 log (Vo / Vin.)

    6. A graph is plotted between frequency and gain.

    CIRCUIT DIAGRAM:

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    TABULATION:

    Keep the input voltage constant, Vin =

    Frequency (in Hz) Output Voltage (in volts) Gain= 20 log(Vo/Vin) (in dB)

    RESULT:

    Thus, the Cascade amplifier was constructed and the gain was determined.

    VIVA QUESTIONS:

    1.What is biasing?

    To use the transistor in any application it is necessary to provide sufficient voltage

    and current to operate the transistor. This is called biasing. 2. What is the necessary of the coupling capacitor?

    It is used to block the c signal to the transistor amplifier. It allows a c &blocks the d c.

    3. What is reverse saturation current?

    The current due to the minority carriers is called the reverse saturation current.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

    83

    LIST OF QUESTION SET

    1. a) Design a differential amplifier circuit and calculate its CMRR.

    b) Design and simulate a Monostable Multivibrator with frequency 2 KHz

    using ORCAD.

    2. a) Design a Wein bridge oscillator with frequency of oscillation 1 KHz.

    b) Simulate a CMOS NAND using ORCAD.

    3. a) Design a Colpitts oscillator with frequency of oscillation 12 KHz.

    Specifications:

    VCC=12V, S=6, ICQ=1.7mA, VRE=3V.

    b) Simulate a CMOS Inverter using ORCAD.

    4. a) Design a RC Phase shift oscillator with frequency of oscillation 1 KHz.

    b) Design and simulate a Symmetrical Astable Multivibrator with frequency

    2 KHz using ORCAD.

    5. a) Design a differential amplifier circuit and calculate its CMRR.

    b) Design and simulate a Asymmetrical Astable Multivibrator with frequency

    2 KHz using ORCAD.

    6. a) Design a single tuned Class C amplifier with resonant frequency 9KHz.

    Specifications:

    QL=1, RL= 1K, L= 1mH. b) Design and simulate a second order Butterworth low pass filter with

    frequency 1 KHz using ORCAD.

    7. a) Design a Class B amplifier with resonant frequency 9KHz.

    b) Simulate a differentiator with sine wave input using ORCAD.

    8. a) Design a Hartley oscillator with frequency of oscillation 12 KHz.

    Specifications:

    VCC=12V, S=6, ICQ=1.7mA, VRE=3V.

    b) Simulate a CMOS NOR using ORCAD.

    9. a) Design a Colpitts oscillator with frequency of oscillation 12 KHz.

    Specifications:

    VCC=12V, S=6, ICQ=1.7mA, VRE=3V.

    b) Design and simulate a Bistable Multivibrator with frequency 2 KHz using

    ORCAD.

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  • Dr.NNCE ECE / IV SEM EC II & S LAB - LM

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    10. a) Design a Wein bridge oscillator with frequency of oscillation 1 KHz.

    b) Simulate a differenti