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2526 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Dynamic Analysis of Modular Multilevel ConvertersLennart Harnefors, Senior Member, IEEE, Antonios Antonopoulos, Student Member, IEEE,
Staffan Norrga, Member, IEEE, Lennart Ängquist, Member, IEEE, and Hans-Peter Nee, Senior Member, IEEE
Abstract—Theory for the dynamics of modular multilevel con-verters is developed in this paper. It is shown that the sum capac-itor voltage in each arm often can be considered instead of theindividual capacitor voltages, thereby significantly reducing thecomplexity of the system model. Two selections of the so-calledinsertion indices, which both compensate for the sum-capacitor-voltage ripples, are considered. The dynamic systems which re-spectively result from these selections are analyzed. An effectivedc-bus model, which takes into account the contribution from thesubmodule capacitors, is obtained. Finally, explicit formulas forthe stationary sum-capacitor-voltage ripples are derived.
Index Terms—Control, dynamic systems, modular multilevelconverters (M2Cs), voltage-source converters (VSCs).
NOMENCLATURE
The upper and lower arms of the converter [cf. Fig. 1(b)]are denoted with the subscripts “u” and “l,” respectively. Anexpression which is valid for either of the arms is denoted withthe subscript “u, l.”
M Number of phases.N Number of submodules per arm.ω1 Fundamental angular frequency.C Submodule capacitance.Cd Pole-to-pole dc-bus capacitance.L Arm inductance.X = ω1L; Arm reactance.R Parasitic arm resistance.vdu,l Per-pole dc-bus voltages.vd = vdu + vdl; Pole-to-pole dc-bus voltage.vΔ
d = vdu − vdl; Imbalance dc-bus voltage.id DC-bus current.vi
cu,l, i = 1, . . . , N ; Individual capacitor voltages.
vΣcu,l =
∑Ni=1 vi
cu,l; Sum capacitor voltages.vΣ
c = vΣcu + vΣ
cl; Total capacitor voltage.vΔ
c = vΣcu − vΣ
cl; Imbalance capacitor voltage.nu,l Insertion indices.
Manuscript received October 4, 2011; revised January 9, 2012; acceptedMarch 12, 2012. Date of publication April 17, 2012; date of current versionFebruary 28, 2013. This work was supported by Elforsk, Energimyndigheten,and ABB.
L. Harnefors is with ABB Power Systems-HVDC, 771 80 Ludvika, Sweden,and also with the Royal Institute of Technology (KTH), 100 44 Stockholm,Sweden (e-mail: [email protected]).
A. Antonopoulos, S. Norrga, L. Ängquist, and H.-P. Nee are with theRoyal Institute of Technology (KTH), 100 44 Stockholm, Sweden (e-mail:[email protected]; [email protected]; [email protected]; [email protected]).
Digital Object Identifier 10.1109/TIE.2012.2194974
Fig. 1. (a) Submodule and (b) circuit diagram of an M2C.
vcu,l = nu,lvΣcu,l; Inserted voltages.
iu,l Arm currents.is = iu − il; Output current.irefs = Is cos(ω1t − ϕ); Reference for is.ic = (iu + il)/2; Circulating current.irefc Reference for ic.vs =(vΔ
d −nuvΣcu+nlv
Σcl)/2; Output voltage (driving is).
vrefs = Vs cos ω1t; Reference for vs.
vc =(vd−nuvΣcu−nlv
Σcl)/2; Internal voltage (driving ic).
vrefc Reference for vc.
vg Grid voltage.P = (VsIs/2) cos ϕ; Per-phase mean active output
power.Q = (VsIs/2) sin ϕ; Per-phase mean reactive output
power.In the expressions for P and Q, it is assumed that vs = vref
s
and is = irefs .
I. INTRODUCTION
MULTILEVEL voltage-source converters (VSCs) allowa significant reduction of the harmonic content of the
output voltage as compared to the traditional two-level VSC[1]. Among various multilevel topologies [2], the fairly recentlyproposed modular multilevel converter (M2C) [3]–[10] hasmany attractive properties. As the name suggests, the topologyis modular and easily scalable in terms of voltage levels.
0278-0046/$31.00 © 2012 IEEE
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2527
It consists of N identical series-connected submodules (alsocalled cells) per arm (cf. Fig. 1). As illustrated there, thecontrollable semiconductor device may be an insulated-gatebipolar transistor (IGBT). In high-voltage applications, N maybe as high as several hundreds.
An M2C with a large number of submodules per arm com-bines an excellent output voltage waveform with a very highefficiency [11], [12]. It is therefore ideal for high-voltage high-power applications, such as high-voltage dc transmission [11]–[13], high-power motor drives [14]–[17], and electric railwaysupplies [18]. The basic operation has been described thor-oughly in [3]–[10] and [19]. Initial attempts to describe theinternal dynamics have been presented in [20]–[22], and controlschemes have been proposed in [20] and [22]–[25]. However,to the best knowledge of the authors, a solid theoretical base,including stability and convergence analyses, for the internaldynamics of the M2C has so far been missing. The aim of thispaper is to fill this void. The contributions and outline of thispaper are as follows.
1) Using averaging over the submodules (unlike [21] and[22]), a dynamic model involving continuous variables isdeveloped in Section II. Two selections of the insertionindices are considered, namely, using measured (closed-loop scheme) [20] (a related scheme was presented in[22]) and estimated (open-loop scheme) [23] sum ca-pacitor voltages, respectively. Both selections compen-sate perfectly (at least under ideal conditions) for theripple which inevitably appears superimposed on thedesired capacitor voltages. The scheme is augmentedwith circulating-current control. Whereas the closed-loopscheme requires two voltage control loops for asymptoticstability [20], it was empirically shown in [23] that theopen-loop scheme inherently stabilizes the internal dy-namics.
2) Stability and convergence rates for the open-loop schemeare analyzed in Section III. Asymptotic stability is ob-tained even without circulating-current control, but itis shown that adding this can provide much improveddamping. A stability analysis for a closed-loop schemewas presented in [22]. Whereas Hagiwara et al. [22] con-sidered the special case of N = 8 submodules per arm,the averaging used here gives results valid for any N .
3) In Section IV, an effective dc-bus model, which takes intoaccount the contribution from the submodule capacitors,is derived.
4) Explicit formulas for the sum-capacitor-voltage ripplesare derived in Section V. Being expressed in the activeand reactive output powers P and Q, these formulas areuseful in the circuit design procedure. It is also shownhow the formulas can be used to obtain estimated sumcapacitor voltages for the open-loop scheme [23].
5) Experimental and simulation results which verify thetheory are presented in Section VI.
Most results of this paper are derived per phase leg andare therefore valid regardless of the number of phases M .Explicit phase notation is not used, except where noted. A grid-connected converter is assumed. However, provided that low-
frequency operation is not of interest, the results are applicablealso to machine-connected converters. The grounding of the dc-bus midpoint shown in Fig. 1(b) is mandatory for single-phaseconverters but optional for three-phase converters.
II. MODEL OF THE INTERNAL DYNAMICS
The switched submodule capacitors make the M2C a dy-namic converter type. The internal dynamics, per definition,comprise all capacitor voltages and the circulating current. Thelatter transfers charge between the submodule capacitors andthus plays a very important role.
The arm inductors in Fig. 1(b), with inductance L, are addedto limit arm-current harmonics and fault currents. The twoparasitic resistances R represent the inner inductor resistancesas well as the converter losses. R is therefore normally varyingwith the operating conditions.
A. Submodule Operation
Each one of the two switches, S1 and S2 in Fig. 1(a), consistsof a controllable device (e.g., an IGBT) with an antiparallel-connected diode. The submodules can be switched in threedifferent ways.
1) Inserted: S2 on and S1 off, allowing the capacitor tocharge and discharge.
2) Bypassed: S1 on and S2 off; the capacitor voltage remainsconstant.
3) Blocked: S1 and S2 off; the capacitor may charge throughthe diode of S2, but it cannot discharge.
We shall henceforth consider only inserted and bypassedmodes.
B. Voltage and Insertion Relations
By inserting the appropriate number of submodules, theinserted voltages vcu,l can be varied as desired between 0 andvΣ
cu,l. Although there is a finite number of submodules N perarm and, thus, N + 1 voltage levels that can be attained, weshall assume that N is large enough to allow the considerationof vcu,l as continuous variables. The insertion indices nu,l,which are defined as the number of inserted submodules perarm in relation to the total number of submodules N , areconsequently assumed continuous on the interval [0, 1]. Thisassumption is not controversial but is, in fact, akin to disregard-ing the harmonic content of the output voltage of a two-levelVSC, considering just the fundamental waveform.
In Section II-E, formulas for computing the insertion indices,such that the desired voltages (and, in turn, currents) are ob-tained, will be derived. By rounding (Nnu,l) to the nearestinteger, the number of submodules that should be inserted inthe upper and the lower arm, respectively, at any time instant isobtained. With this information, switching can be made usinga suitable pulsewidth modulation method, e.g., as presented in[7]–[9], [19], [24], and [25].
2528 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
C. Circuit Relations
1) Inductor Currents: From Fig. 1(b), we immediately ob-tain the following relations:
vdu − vcu − Riu − Ldiudt
= vg (1)
−vdl + vcl + Ril + Ldildt
= vg. (2)
Respectively adding and subtracting (1) and (2) and using thedefinitions given in the Nomenclature, the dynamic relations forthe output and circulating currents are obtained as
L
2disdt
= vs − vg − R
2is (3)
Ldicdt
= vc − Ric. (4)
Since there are two degrees of freedom in the selection of theinsertion indices, both voltages can be set to their respectivereferences vref
s and vrefc .
2) Sum Capacitor Voltages: The dynamic relations for thesum capacitor voltages can be obtained by considering theenergy stored in the capacitors of each arm, i.e.,
Wu,l =C
2
N∑i=1
(vi
cu,l
)2. (5)
The time derivative of the stored energy per arm must equal theinstantaneous input power to that arm
dWu,l
dt= C
N∑i=1
vicu,l
dvicu,l
dt= vcu,liu,l. (6)
At any time instant, the time derivative of one capacitor voltagemay differ greatly from another, as the submodules are eitherinserted or bypassed. On the other hand, the submodule ca-pacitance C is generally large enough to render the deviationof each capacitor voltage vi
cu,l from the mean value vΣcu,l/N
small. This allows each factor vicu,l in the sum of (6) to be
approximated as vΣcu,l/N with good accuracy
dWu,l
dt=C
N∑i=1
vicu,l
dvicu,l
dt≈ C
NvΣ
cu,l
N∑i=1
dvicu,l
dt︸ ︷︷ ︸dvΣ
cu,l/dt
=C
2N
d(vΣcu,l)
2
dt. (7)
Hence, the stored energy per arm can be equivalently expressedin the corresponding sum capacitor voltage as
Wu,l =C
2N
(vΣ
cu,l
)2. (8)
By substituting (7) and vcu,l = nu,lvΣcu,l in (6), the following
dynamics of the sum capacitor voltages are obtained:
C
N
dvΣcu,l
dt= nu,liu,l. (9)
3) DC-Bus Voltages: With k added to the subscript to de-note phase (in addition to arm), the per-pole dc-bus-voltagedynamics are given as
2Cddvdu,l
dt= id −
M∑k=1
iu,lk. (10)
Respectively adding and subtracting the expressions for theupper and lower arms and poles yield
Cddvd
dt= id −
M∑k=1
ick (11)
CddvΔ
d
dt= − 1
2
M∑k=1
ivk. (12)
As will shortly be seen, the circulating current can, irrespectiveof the number of phases M , be controlled to a constant value.Hence, it is always possible to maintain a constant pole-to-poledc-bus voltage vd [cf. (11)]. For the single-phase case, M2Csare different from two-level VSCs in this respect. For the latter,pulsations of twice the fundamental frequency appear on the dcbus. For an M2C, these pulsations instead appear as capacitor-voltage ripple.
On the other hand, if the output currents do not sum up tozero, there will be a fundamental-frequency imbalance amongthe dc-bus voltages, as seen in (12). For three-phase converters,this is in general not a problem, as normally there is no zero-sequence current component. (Removal of the dc-bus midpointgrounding [cf. Fig. 1(b)] of course ensures vΔ
d = 0 and createsa high zero-sequence impedance seen from the grid interface.)For single-phase converters on the other hand, imbalance isunavoidable.
For brevity, we shall henceforth assume that vΔd = 0; further
studies of dc-bus imbalance are postposed to future papers.
D. Current Control
Current control of VSCs can be made with high bandwidth[27], which is important for good dynamic performance, re-duction of transient overcurrents during faults, and reductionof current harmonics. Both the output current and the circulat-ing current are available through the measurement of the armcurrents and are thus available for feedback.
We shall assume that is is controlled through feedbackvia vref
s , with zero steady-state error and bandwidth muchhigher than the convergence rates of the internal dynamics; cf.Section III-C. This allows is = irefs as seen from the internaldynamics. In turn, irefs is often, via feedback through a direct-voltage controller, a function of vd. The closing of this loopwill not be addressed in this paper. Consequently, vref
s and irefs
are considered to be quasi-stationary sinusoids, as shown in theNomenclature.1
1Triplen harmonics, particularly a third harmonic with amplitude 1/6th ofthe fundamental, are often added to vref
s for three-phase converters in order toextend the voltage range [26] but are not considered further in this paper.
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2529
Unlike is, it is important to include ic in the internal dynam-ics, as argued previously. Circulating-current control is madevia vref
c . As will be seen, proportional control is sufficient. It isuseful also to add a term Rirefc , where R is an estimate of R,which compensates in the steady state for the resistive voltagedrop of (4), as
vrefc = Ra(irefc − ic) + Rirefc . (13)
Gain Ra may be referred to as an “active resistance” [28]. Theselection of irefc will be addressed in Section III.
E. Selection of the Insertion Indices
In the expression for vs given in the Nomenclature, it isseen that the maximum output voltage is obtained by insertingall submodules in the lower arm and none in the upper arm,i.e., nl = 1 and nu = 0. From the expression for vc and (4), itfollows that, in order to preserve a constant circulating currentwhen the maximum voltage is applied, it is required that vΣ
cl =vd. Similarly, the minimum output voltage is obtained by lettingnu = 1 and nl = 0, which requires vΣ
cu = vd. Consequently, thesum capacitor voltage in each arm should in mean normally (butperhaps not always) be controlled to the pole-to-pole dc-busvoltage
vΣcu,l = vd. (14)
In addition, there will be a ripple ΔvΣcu,l added to the mean
voltage. Capacitance C is, as mentioned, normally selectedlarge enough so that |ΔvΣ
cu,l| � vd can be assumed, yet ΔvΣcu,l
are not negligible (unless C is unrealistically large).1) Closed-Loop Scheme (Measured Sum Capacitor Volt-
ages): An insertion-index selection which compensates forthe ripples, such that the desired voltages vs = vref
s and vc =vref
c are obtained, is immediately found by solving for nu
and nl among the expressions for vs and vc given in theNomenclature
nu =vdu − vref
s − vrefc
vΣcu
nl =vdl + vref
s − vrefc
vΣcl
. (15)
This selection is associated with two drawbacks: the need fortwo additional control loops in order to gain asymptotic stability[20] (see the Appendix) and the need for short-time-delaymeasurement and feedback of the individual capacitor voltagesto form the sum capacitor voltages. As argued in [23], the latterrequirement may be difficult and/or costly to fulfill for a largenumber of submodules. The closed-loop scheme is thereforenot studied further.
2) Open-Loop Scheme (Estimated Sum Capacitor Voltages):To circumvent the mentioned drawbacks of (15), a usefulalternative is to substitute the estimated sum capacitor voltages(in the following, denoted by “hats”) for the measured ones in(15). That is, [23]
nu =vdu − vref
s − vrefc
vΣcu
nl =vdl + vref
s − vrefc
vΣcl
. (16)
The estimates can be obtained by adding estimated ripplecomponents Δvcu,l to the (normally) desired mean value vd
vΣcu,l = vd + Δvcu,l. (17)
The scheme is open loop in the sense that the feedback of thecapacitor voltages is not utilized. Computation of Δvcu,l willbe addressed in Section V.
III. ANALYSIS OF THE INTERNAL DYNAMICS
In this section, the internal dynamics resulting from the open-loop scheme (16) are analyzed. As a simplifying measure, vd
is regarded as a parameter, whereas vs = vrefs and is = irefs
are assumed to be quasi-stationary sinusoids. Justification forthis treatment will be given in Section IV. Since it is normallysafe to assume that |Δvcu,l| � vd, the denominators of (16) areapproximated as vd, i.e.,
nu ≈ vdu − vrefs − vref
c
vdnl ≈
vdl + vrefs − vref
c
vd. (18)
By substituting (18) in (9) and (4) (using the expression forvc given in the Nomenclature) and introducing the total andimbalance capacitor voltages, the following third-order systemin the state variables vΣ
c , vΔc , and ic is obtained:
C
N
dvΣc
dt= − vref
s is2vd
+(
1 − 2vrefc
vd
)ic (19)
C
N
dvΔc
dt=
(1 − vref
c
vd
)is2− 2vref
s icvd
(20)
Ldicdt
=vd
2− vΣ
c
4+
vrefc vΣ
c
2vd+
vrefs vΔ
c
4vd− Ric (21)
where vrefc is given by (13).
A. Observations
An inspection of (19)–(21) reveals a number of interestingproperties.
1) The system is nonlinear (except when Ra = 0), ascirculating-current control law (13) introduces quadraticand cross terms of the state variables on the right-handsides of (19)–(21).
2) The system is time varying, as certain coefficients andinputs on the right-hand sides of (19)–(21) involve theoscillating quantities vref
s and is. This induces ripple.3) The first term on the right-hand side of (19) can be
expressed as
−vrefs is2vd
= − VsIs cos ϕ
2vd︸ ︷︷ ︸P/vd
+VsIs cos(2ω1 − ϕ)
2vd. (22)
Consequently, the ripple induced in vΣc is of twice the
fundamental frequency, whereas the ripple induced in vΔc
is of the fundamental frequency. (Quantification is madein Section V.)
2530 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
4) Fundamental-frequency ripple in ic normally cannot besustained2 because it would multiply in (20) with vref
s
and [via circulating-current control law (13)] is. A dccomponent on the right-hand side of (20) would result,giving a drifting vΔ
c .5) Induction of (nonfundamental-frequency) ripple in ic can
ideally be avoided (in practice, reduced to a minimum)since (16) ideally gives vc = vref
c . (Due to the approx-imations made in (18), (21) erroneously shows the in-duction of 2ω1-frequency ripple via the terms vΣ
c /4 andvref
s vΔc /(4vd).)
6) Through averaging, i.e., disregarding oscillating compo-nents, the system’s equilibrium points (denoted with thesubscript “0”) can be calculated by putting to zero thetime derivatives in (19)–(21) and solving for the statevariables. There are two equilibrium points, of which thefollowing is physically relevant:
vΣc0 = 2vd vΔ
c0 = arbitrary ic0 =P
vd(23)
this provided that irefc − ic = 0 (cf. Section III-D), whileR and R are neglected (as the parasitic resistance nor-mally is small).
7) Although averaging permits an arbitrary vΔc0, a nonzero
vΔc0 would induce stationary fundamental-frequency rip-
ple in ic, through multiplication with vrefs on the right-
hand side of (21). This is forbidden, as found earlier.Therefore, (23) can be sharpened to
vΣc0 = 2vd vΔ
c0 = 0 ic0 =P
vd. (24)
If this equilibrium point is asymptotically stable, whichwill be addressed momentarily, then vcu,l will both con-verge to vd in mean, as desired. (The third equality in(24) can be obtained also by equating the input (dc-side)power vdic0 with the output (ac-side) power P .)
B. Stability
Stability is analyzed via linearization. The state variables areexpressed as
vΣc = 2vd + vΣ
c + ΔvΣc vΔ
c = vΔc + ΔvΔ
c ic =P
vd+ ic
(25)
where the quantities denoted with a “tilde” are small deviationsabout the desired equilibrium point (24) and the quantitiesdenoted with the prefix “Δ” are stationary ripples. Substituting(13) and (25) in (19) and (21) yields the following linearizeddynamics of the deviation variables (i.e., all ripple-inducingterms on the right-hand sides are disregarded), with irefc = ic0and R = R:
C
N
dvΣc
dt=
[1 +
2(Ra − R)ic0vd
]ic (26)
2An exception is when the fundamental-frequency ripple in ic is orthogonalto vref
s , assuming that there is no fundamental-frequency component in vrefc .
C
N
dvΔc
dt=
Rais − 4vrefs
2vdic (27)
Ldicdt
= −(
14− Ric0
2vd
)vΣ
c +vref
s
4vdvΔ
c − (R + Ra)ic.
(28)
The system is still time varying, which makes strict stabilityanalysis difficult. However, by making a few simplifying butreasonable assumptions, (26)–(28) can be analyzed by consid-ering two decoupled second-order subsystems.
1) Subsystem of vΣc and ic: Let us begin by assuming that
the deviation variables are devoid of fundamental-frequencycomponents. This permits averaging such that the oscillatingcoefficients on the right-hand sides of (27) and (28) vanish.The right-hand side of (27) then vanishes altogether, so nothingconclusive can so far be said concerning the convergence ofvΔ
c . On the other hand, since averaging removes vΔc from the
right-hand side of (28), (26)–(28) are effectively reduced to asubsystem consisting of (26) and (28). With x = [vΣ
c , ic]T , thissubsystem can be expressed as
˙x = Ax, A =
⎡⎣ 0 N
C
(1 + 2(Ra−R)ic0
vd
)− 1
L
(14 − Ric0
2vd
)−R+Ra
L
⎤⎦ .
(29)
As vd and ic0 are considered as parameters, this is a time-invariant system whose dynamic properties are determined bythe characteristic polynomial
det(sI − A) = s2 + 2ζω0s + ω20 (30)
where the undamped eigenfrequency and the relative dampingare given by
ω0 =
√N
4LC
[1 +
2(Ra − R)ic0vd
] (1 − 2Ric0
vd
)(31)
ζ =R + Ra
2ω0L. (32)
It is seen that, by selecting Ra � R, significantly better damp-ing can be obtained as compared to that inherently provided bythe parasitic resistance. Usage of circulating-current control asgiven by (13) is therefore highly recommended.
For rectifier operation, i.e., when P < 0 ⇒ ic0 < 0, thereis an upper limit for the “active resistance” which must beobserved to prevent the argument of the square root in (31) frombecoming negative, giving ω2
0 < 0 and an unstable subsystem.Neglecting R, we obtain
1 +2Raic0
vd= 1 +
2RaP
v2d
> 0 ⇒ Ra <v2
d
2|P |max. (33)
This limit is usually quite generous; typically, (33) is in therange of 1 per unit (p.u.) or higher, whereas R typically is inthe range of 0.01 p.u. or lower.
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2531
2) Subsystem of vΔc and ic: Since this subsystem is time
varying, a strict analysis is complicated. Therefore, we resortto a simplified analysis comprising four steps.
1) First, it is noted that a nonzero vΔc gives a fundamental-
frequency term on the right-hand side of (28).2) An approximate response in ic to this term can be calcu-
lated with ease by assuming that vΔc varies on a time scale
slower than both the period 2π/ω1 of the fundamentaloscillation and the time constant L/(R + Ra) of (28).A quasi-stationary solution may then be obtained usingcomplex phasors. Even when this assumption does nothold, simulations show that the approximation yet tendsto be reasonably accurate. We get
ic =Vsv
Δc
4vd
√(R + Ra)2 + X2
cos(ω1t − ϑ) (34)
where tan ϑ = X/(R + Ra).3) Equation (34) is then substituted in (27), which can be
simplified to
dvΔc
dt= −avΔ
c + oscillating terms (35)
where the oscillating terms are of angular frequency 2ω1
and
a =NVs
[Vs cos ϑ − RaIs
4 cos(ϕ − ϑ)]
4Cv2d
√(R + Ra)2 + X2
. (36)
Owing to the quasi-stationary solution to (28), the sub-system order is effectively reduced to one.
4) In the same fashion as previously, the oscillating terms in(35) are averaged away. Thus, the subsystem is asymptot-ically stable, i.e., vΔ
c decays to zero, if a > 0. This is thecase if
RaIs
4< Vs cos ϑ ⇒ Ra
√(R + Ra)2 + X2
R + Ra<
4Vs
Is
. (37)
Assuming Ra � {X,R}, (37) simplifies to Ra <4Vs/Is, i.e., the upper limit for Ra is in the range of4 p.u., which is less restrictive than (33).
To put in words the result found, the open-loop scheme hasthe very desirable property that, once an imbalance voltage vΔ
c
appears, transient fundamental-frequency circulating-currentripple is induced. This counteracts the imbalance, forcing vΔ
c
back to zero. This happens inherently; a balancing control loopneed not be introduced (in contrast to the closed-loop scheme(15); cf. the Appendix).
C. Convergence Rates
It is useful also to quantify roughly the convergence rates ofthe internal dynamics.
1) Subsystem of vΣc and ic: The roots to (30), i.e., the poles
of the system, are located in the left half of the s plane, on acircle with radius ω0. Thus, ω0 approximately determines theconvergence rate. If |2Ric0/vd| � 1 (which is always the case)
and |2Raic0/vd| � 1 (which holds for a moderately selectedRa), then ω0 ≈
√N/(4LC). For parameter selections in the
millihenry and millifarad ranges, ω0 is typically in the rangeof hundreds of radians per second, giving settling times in therange of tens of milliseconds if ζ is not too small (ζ > 0.3 canbe recommended, which will give settling after at most twoperiods of damped oscillation).
2) Subsystem of vΣc and ic: Expression (36), for a negligible
Ra (i.e., very weak or no circulating-current control), assumingvd ≈ 2Vs and R � X , simplifies to
a ≈ NR
16X2C. (38)
The subsystem becomes marginally stable for R = 0, so whenR is small, it is beneficial also for this subsystem to use Ra �R. On the other hand, if Ra � {R,X} so that cos ϑ ≈ 1 yetsmall enough so that RaIs/4 � Vs, we obtain
a ≈ N
16RaC. (39)
Interestingly, the convergence rate decreases with Ra, but (39)is nevertheless larger than (38) as long as R � Ra < X2/R.
D. Circulating-Current Reference Selection
The obvious choice is to let irefc = ic0 = P/vd. Since con-vergence of ic to P/vd is guaranteed even without circulating-current control, an alternative which ensures irefc − ic = 0 in thesteady state is to let irefc be a low-pass filtering of ic
direfc
dt= αf
(ic − irefc
)(40)
with αf � (R + Ra)/L. Control law (13) is then used solelyfor damping purposes, not for reference tracking.
IV. EFFECTIVE DC-BUS DYNAMICS
The interaction of the dynamics (11) of vd with the internaldynamics will now be considered.
Closed-loop dc-bus voltage control is typically made withbandwidth of tens of radians per second [30]. Hence, thedynamics of the subsystem of vΣ
c and ic—given by ω0—aretypically at least one decade faster than the dc-bus dynamics.This motivates the treatment of vd as a parameter and, in thepresent context, implies that vΣ
c = 2vd can be assumed as seenfrom the dc bus. Averaging the right-hand side of (19) andsolving for ic yield
ic =P
vd+
2C
N
dvd
dt. (41)
Equation (41) is now substituted in (11). Assuming identicalconditions in all M phase legs, i.e.,
∑Mk=1 ick = Mic, we get(
Cd +2MC
N
)︸ ︷︷ ︸
C′d
dvd
dt= id − MP
vd. (42)
2532 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
It is found that the effective dc-bus dynamics are, as (11), (ap-proximately) first order, but the effective dc-bus capacitance C ′
d
is larger than Cd owing to the contribution from the submodulecapacitors.
Remark: The expression for C ′d can be obtained also by
considering the total energy W stored in the capacitors of thedc bus and the 2M arms. Using (8) with vΣ
cu,l = vd yields
W =Cd
2v2
d + 2MC
2Nv2
d =12
(Cd +
2MC
N
)︸ ︷︷ ︸
C′d
v2d. (43)
However, this is not a stringent way of deriving the expressionfor C ′
d. It is not obvious that the total arm energy shouldhave unity weight in (43) since each submodule on average isinserted only 50% of the time (to give an output voltage of zeromean). Equation (42), on the other hand, is stringently derived,and the result will be verified in Section VI.
V. SUM-CAPACITOR-VOLTAGE RIPPLES
Analytic ripple quantification will now be made. Since ic is(virtually) free of ripple, ic = ic0 and vref
c = 0 may be set inthis analysis. From (19) and (20), we obtain, with the notationof (25)
C
N
dΔvΣc
dt= − VsIs cos(2ω1t − ϕ)
2vd(44)
C
N
dΔvΔc
dt=
Is cos(ω1t − ϕ)2
− 2PVs cos ω1t
v2d
. (45)
Direct integration and expression in P and Q yields the follow-ing formulas for the ripples:
ΔvΣc = − N
√P 2 + Q2
2ω1Cvdsin(2ω1t − ϕ) (46)
ΔvΔc = sgn(P )
2N
√(1 − m2
2
)2
P 2 + Q2
mω1Cvdsin(ω1t−ψ) (47)
where sgn(·) is the signum function, −π/2 ≤ ψ ≤ π/2, and
ψ = arctanQ
(1 − m2/2)Pm =
2Vs
vd. (48)
The positive- and negative-arm sum-capacitor-voltage ripplesare given by
ΔvΣcu =
ΔvΣc + ΔvΔ
c
2ΔvΣ
cl =ΔvΣ
c − ΔvΔc
2. (49)
From (49), the ideal individual capacitor-voltage ripples areobtained by scaling with 1/N . The actual individual ripplesconverge to these as the switching frequency is made high. Fora realistic (i.e., per submodule low) switching frequency, theactual individual ripples will be aperiodic with peaks exceedingthose given by (49), as will be seen in Section VI.
Fig. 2. Photograph of the laboratory setup.
Equations (46), (47), and (49) can be used to computethe estimated ripple components required in (17). In [23], analternative scheme is proposed, where, first, the arm energiesare estimated. The sum-capacitor-voltage estimates vΣ
cu,l arethen obtained via (8). The computational complexity of thisvariant is somewhat higher, but its accuracy should be slightlybetter, as the approximations made in (18) are avoided.
VI. EXPERIMENTAL AND SIMULATION RESULTS
Verification of the theory has been made using a three-phaseM2C rated 10 kVA, with N = 5 submodules per arm, nominalpeak output voltage Vs = 225 V, nominal dc-bus voltage vd =500 V, fundamental frequency of 50 Hz, switching frequencyper submodule of 250 Hz or 1050 Hz (as indicated), and withthe parameters L = 3.1 mH (giving X = 0.97 Ω), C = 3.3 mF,and R ≈ 0.8 Ω. See Fig. 2. A stiff dc-bus voltage and inverteroperation with P = 6.8/3 kW and Q = 0 are used in the exper-iments. Circulating-current control is not used, i.e., Ra = 0 in(13). Although this contradicts the recommendations given, thefairly large R—in the range of X—yet gives adequate damping,as the experimental results will show. Modulation and capac-itor balancing is made according to the principle describedin [7]–[9].
A. Experiment 1
The purpose of the first experiment is to verify expressions(46), (47), and (49) for the sum-capacitor-voltage ripples andthe impact of the switching frequency on the individual ripples.Figs. 3 and 4 show, for phase 1, ripples for the upper arm(u.a.r.) and the lower arm (l.a.r.): specifically ΔvΣ
cu,l/N (solid),ΔvΣ
cu,l/N (dashed), and Δv1cu,l (dash-dotted). In addition, the
output voltage, the output current, and the circulating currentare shown. As can be seen, the agreement between the esti-mated and measured mean ripples is good; the small discrep-ancies seen may be the results of harmonics. The individualcapacitor-voltage ripples show deviations from the respective
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2533
Fig. 3. Experiment 1a: Steady-state performance for a switching frequency per submodule of 250 Hz.
Fig. 4. Experiment 1b: Steady-state performance for a switching frequency per submodule of 1050 Hz.
mean ripple. As expected, these deviations are smaller for thehigher switching frequency of 1050 Hz than for the lower of250 Hz. Naturally, so is the harmonic content of the variablesshown. A small ripple of angular frequency 2ω1 in the circu-lating current can be noted, which likely is the result of smallcapacitor-voltage-ripple estimation errors.
B. Experiment 2
From (31) and (32), we obtain ω0 ≈√
N/(4LC) =349 rad/s and ζ ≈ 0.37. The inherent damping provided bythe parasitic resistance is thus adequate, and a transient in thesubsystem of vΣ
c and ic should decay within tens of millisec-onds. To verify this, the dc-bus voltage in Fig. 5 is stepped
from 485 to 500 V at t = 60 ms. For clarity, twice the nominaldc-bus voltage 2vnom
d = 1000 V is subtracted from vΣc . The
convergence rate agrees with theory. The imbalance voltagevΔ
c is hardly affected at all by the step, verifying the claim ofSection III-B that the two second-order subsystems are (nearly)decoupled. A transient in the circulating current during the stepresponse—which charges up the capacitors—can be observed.There is a small bias in the mean value of vΣ
c from the ideal2vd, which is due to the relatively large R.
C. Experiment 3 and Simulation 1
In the third experiment, we verify the convergence rateof the subsystem of vΔ
c and ic, which is given by (38) as
2534 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 5. Experiment 2: Step in the total capacitor voltage for a switching frequency per submodule of 1050 Hz. The dashed curve shows vΔc .
Fig. 6. Experiment 3: Step in the imbalance capacitor voltage for a switching frequency per submodule of 1050 Hz.
a ≈ 80 rad/s, i.e., a time constant of 1/a = 13 ms. In Fig. 6,an imbalance is created by modifying with opposite biasesof vd the selections of vΣ
cu,l given in (17). The correct se-lections are restored at t = 60 ms, and the imbalance volt-age returns to zero mean with roughly the theoretical timeconstant.
It is useful to verify the results against a simulation with acontinuous model (using forward-difference simulation of (4)and (9) in MATLAB). Fig. 7 shows a simulation with conditionsidentical to the experiment. As seen, the correspondence isgood; the main difference is the smoother ic. The latter allowsus to clearly observe the transient oscillation in ic, whichhas the effect of restoring vΔ
c to zero mean within approx-
imately two periods of damped oscillation. Interestingly, theoscillation frequency is slightly higher than the fundamental—aproperty which was not revealed by the simplified analysisin Section III-C. This discrepancy is not surprising, as theassumption of time-scale separation made in the analysis doesnot hold.
The impact of Ra will now be verified, starting with Ra =1 Ω. Since this is slightly larger than R ≈ 0.8 Ω and slightlysmaller than X2/R ≈ 1.2 Ω, there is, according to the theoryof Section III-C, a chance for slightly faster convergence thanfor Ra = 0. This is verified by the solid curves in Fig. 8,which show better damping—particularly of ic—than Fig. 7.According to (39), an increase to Ra = 5 Ω should give slower
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2535
Fig. 7. Simulation 1a: Step in the imbalance capacitor voltage for a continuous model with Ra = 0.
Fig. 8. Simulation 1b: Step in the imbalance capacitor voltage for a continuous model with (solid) Ra = 1 Ω and (dashed) Ra = 5 Ω.
convergence than for both Ra = 0 and Ra = 1 Ω, which isverified by the dashed curves in Fig. 8.
D. Simulation 2
Finally, the effective dc-bus capacitance given by (42) isverified. As the experimental setup lacks the facility to performthis verification, we again rely on simulation with parametersidentical to the experimental setup. In addition, Cd = 1 mF isused, giving C ′
d = 4.96 mF. The dc-bus voltage is controlledin a closed loop to follow a reference vref
d . The output ofthis controller forms, with negative gain, the reference for Is
in the output current is = Is cos ω1t. Since id = 0, Is = 0 inthe steady state. At t = 60 ms, the dc-bus-voltage referenceis stepped from the nominal vref0
d = 500 V down to vref1d =
490 V. From (42), we find that this, according to theory, resultsin the following change in the total stored energy:
ΔW =12C ′
d
[(vref1
d
)2 −(vref0
d
)2]
= −24.6 J. (50)
The output power P is measured and integrated, starting at thestep application, to form the output energy E. Fig. 9 shows that(42) holds, as E converges to the theoretical value given by (50)(with a sign change and minus some small losses).
2536 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 7, JULY 2013
Fig. 9. Simulation 2: Step response in the direct voltage for a continuous model. In the upper plot, vΣcu,l are both solid, whereas vd is dashed.
VII. CONCLUSION
We have in this paper derived a continuous-variable dynamicmodel for the M2C. The open-loop scheme originally proposedin [23] was augmented with circulating-current control. As-ymptotic stability was proven. Convergence rates were quanti-fied, as were capacitor-voltage ripples. A model for the effectivedc-bus dynamics was derived. Experimental and simulationresults verified the theory.
APPENDIX
To show that the closed-loop scheme (15) gives a marginallystable system, the expressions in (15) are substituted in (9)and (4). Since nu,l are inversely proportional to vΣ
cu,l, the sum-capacitor-voltage equations can be rearranged into the per-armenergy form (8)
dWu
dt=
C
2N
d(vΣcu)2
dt=
(vdu − vref
s − vrefc
)iu (51)
dWl
dt=
C
2N
d(vΣ
cl
)2
dt=
(vdl + vref
s − vrefc
)il (52)
Ldicdt
= vrefc − Ric. (53)
As neither vΣcu nor vΣ
cl appears on the right-hand sides of(51)–(53), the resulting system is marginally stable. Two con-trol loops must be added, via vref
c , in order to gain asymptoticstability [20]. That is, two more terms must be added to (13).
ACKNOWLEDGMENT
The authors would like to thank the reviewers for theirprofessional work and helpful suggestions.
REFERENCES
[1] J.-S. Lai and F. Z. Peng, “Multilevel converters—A new breed ofpower converters,” IEEE Trans. Ind. Appl., vol. 32, no. 3, pp. 509–517,May 1996.
[2] J. Rodriguez, J.-S. Lai, and F. Z. Peng, “Multilevel inverters: A surveyof topologies, controls, and applications,” IEEE Trans. Ind. Electron.,vol. 49, no. 4, pp. 724–738, Aug. 2002.
[3] A. Lesnicar and R. Marquardt, “An innovative modular multilevel con-verter topology suitable for a wide power range,” in Proc. IEEE BolognaPower Tech Conf., Bologna, Italy, 2003, vol. 3, [CD-ROM].
[4] A. Lesnicar and R. Marquardt, “A new modular voltage source invertertopology,” in Proc. EPE, Toulouse, France, 2003, [CD-ROM].
[5] M. Glinka and R. Marquardt, “A new single-phase ac/ac-multilevel con-verter for traction vehicles operating on ac line voltage,” in Proc. EPE,Toulouse, France, 2003, [CD-ROM].
[6] M. Glinka and R. Marquardt, “A new ac/ac-multilevel converter fam-ily applied to a single-phase converter,” in Proc. PEDS, Singapore,Nov. 2003, [CD-ROM].
[7] A. Lesnicar, J. Hildinger, and R. Marquardt, “Modulares strom-richterkonzept für Netzkupplungsanwendungen bei hohen Spannun-gen,” (in German), in Proc. ETG-Fachbericht, Bad Nauheim, Germany,Apr. 2002, vol. 88, pp. 155–161.
[8] M. Glinka, “Prototype of multiphase modular-multilevel-converter with2 MW power rating and 17-level-output-voltage,” in Proc. IEEE PESC,Aachen, Germany, Jun. 2004, vol. 4, pp. 2572–2576.
[9] M. Glinka and R. Marquardt, “A new ac/ac multilevel converterfamily,” IEEE Trans. Ind. Electron., vol. 52, no. 3, pp. 662–669,Jun. 2005.
[10] M. Hagiwara and H. Akagi, “Control and experiment of pulse width-modulated modular multilevel converters,” IEEE Trans. Power Electron.,vol. 24, no. 7, pp. 1737–1746, Jul. 2009.
[11] S. Allebrod, R. Hamerski, and R. Marquardt, “New transformerless, scal-able modular multilevel converters for HVDC-transmission,” in Proc.IEEE Power Electron. Spec. Conf., 2008, pp. 174–179.
[12] D. Peftitsis, G. Tolstoy, A. Antonopoulos, J. Rabkowski, J.-K. Lim,M. Bakowski, L. Ängquist, and H.-P. Nee, “High-power modularmultilevel converters with SiC JFETs,” in Proc. IEEE ECCE, 2010,pp. 2148–2155.
[13] M. Saeedifard and R. Iravani, “Dynamic performance of a modular mul-tilevel back-to-back HVDC system,” IEEE Trans. Power Del., vol. 25,no. 4, pp. 2903–2912, Oct. 2010.
[14] M. Hiller, D. Krug, R. Sommer, and S. Rohner, “A new highly modularmedium voltage converter topology for industrial drive applications,” inProc. EPE, Barcelona, Spain, 2009, pp. 1–10, [CD-ROM].
[15] A. Antonopoulos, K. Ilves, L. Ängquist, and H.-P. Nee, “On inter-action between internal converter dynamics and current control of
HARNEFORS et al.: DYNAMIC ANALYSIS OF MODULAR MULTILEVEL CONVERTERS 2537
high-performance high-power ac motor drives with modular multilevelconverters,” in Proc. IEEE ECCE, 2010, pp. 4293–4298.
[16] M. Hagiwara, K. Nishimura, and H. Akagi, “A medium-voltage motordrive with a modular multilevel PWM inverter,” IEEE Trans. Power Elec-tron., vol. 25, no. 7, pp. 1786–1799, Jul. 2010.
[17] A. J. Korn, M. Winkelnkemper, and P. Steimer, “Low output frequencyoperation of the modular multi-level converter,” in Proc. IEEE ECCE,2010, pp. 3993–3997.
[18] M. Winkelnkemper, A. Korn, and P. Steimer, “A modular direct converterfor transformerless rail interties,” in Proc. ISIE, 2010, pp. 562–567.
[19] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, “Modulation, losses,and semiconductor requirements of modular multilevel converters,” IEEETrans. Ind. Electron., vol. 57, no. 8, pp. 2633–2642, Aug. 2010.
[20] L. Ängquist, A. Antonopoulos, and H.-P. Nee, “On dynamics and voltagecontrol of the modular multilevel converter,” in Proc. EPE, Barcelona,Spain, 2009, pp. 1–10, [CD-ROM].
[21] M. A. Pérez and J. Rodríguez, “Generalized modeling and simulation ofa modular multilevel converter,” in Proc. ISIE, 2011, pp. 1863–1868.
[22] M. Hagiwara, R. Maeda, and H. Akagi, “Control and analysis of themodular multilevel cascade converter based on double-star chopper-cells(MMCC-DSCC),” IEEE Trans. Power Electron., vol. 26, no. 6, pp. 1649–1658, Jun. 2011.
[23] L. Ängquist, A. Antonopoulos, D. Siemaszko, K. Ilves, M. Vasiladiotis,and H.-P. Nee, “Open-loop control of modular multilevel converters usingestimation of stored energy,” IEEE Trans. Ind. Appl., vol. 47, no. 6,pp. 2516–2524, Nov./Dec. 2011.
[24] Q. Tu, Z. Xu, and L. Xu, “Reduced switching-frequency modulation andcirculating current suppression for modular multilevel converters,” IEEETrans. Power Del., vol. 26, no. 3, pp. 2009–2017, Jul. 2011.
[25] M. A. Pérez, J. Rodríguez, E. J. Fuentes, and F. Kammerer, “Predictivecontrol of ac–ac modular multilevel converters,” IEEE Trans. Ind. Elec-tron., vol. 59, no. 7, pp. 2832–2839, Jul. 2012.
[26] N. Mohan, T. Undeland, and W. P. Robbins, Power Electronics: Convert-ers, Applications, and Design, 3rd ed. Hoboken, NJ: Wiley, 2002.
[27] L. Harnefors and H.-P. Nee, “Model-based current control of ac machinesusing the internal model control method,” IEEE Trans. Ind. Appl., vol. 34,no. 1, pp. 133–141, Jan./Feb. 1998.
[28] F. Briz, M. W. Degner, and R. D. Lorenz, “Dynamic analysis of currentregulators for ac motors using complex vectors,” IEEE Trans. Ind. Appl.,vol. 35, no. 6, pp. 1424–1432, Nov./Dec. 1999.
[29] H. K. Khalil, Nonlinear Systems, 3rd ed. Upper Saddle River, NJ:Pearson Educ., 2003.
[30] L. Harnefors, M. Bongiorno, and S. Lundberg, “Input-admittance calcu-lation and shaping for controlled voltage-source converters,” IEEE Trans.Ind. Electron., vol. 54, no. 6, pp. 3323–3334, Dec. 2007.
Lennart Harnefors (S’93–M’97–SM’07) was bornin Eskilstuna, Sweden, in 1968. He received theM.Sc., Licentiate, and Ph.D. degrees in electricalengineering from the Royal Institute of Technology(KTH), Stockholm, Sweden, in 1993, 1995, and1997, respectively, and the Docent (D.Sc.) degree inindustrial automation from Lund University, Lund,Sweden, in 2000.
From 1994 to 2005, he was with MälardalenUniversity, Västerås, Sweden, where he, in 2001,was appointed Professor of electrical engineering.
Between 2001 and 2005, he was, in addition, a part-time Visiting Professor ofelectrical drives with Chalmers University of Technology, Göteborg, Sweden.He is currently with ABB Power Systems—HVDC, Ludvika, Sweden, as anR&D Project Manager and Principal Engineer, and also with KTH as anAdjunct Professor of power electronics. His research interests include theanalysis and control of power electronic systems, particularly grid-connectedconverters and ac drives.
Dr. Harnefors was the recipient of the 2000 ABB Gunnar Engström EnergyAward and the 2002 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Best Paper Award. He is an Associate Editor of the IEEE TRANSACTIONS
ON INDUSTRIAL ELECTRONICS, a member of the Editorial Board of the IETELECTRIC POWER APPLICATIONS, and a member of the Executive Counciland the International Scientific Committee of the European Power Electronicsand Drives Association (EPE).
Antonios Antonopoulos (S’06) was born in Athens,Greece, in 1984. He received the Diploma of elec-trical and computer engineering from the NationalTechnical University of Athens, Athens, in 2007and the Licentiate of engineering in electrical sys-tems from the Royal Institute of Technology (KTH),Stockholm, Sweden, in 2011.
Since 2008, he is working with the ElectricalEnergy Conversion Laboratory at KTH as a Ph.D.student. His main scientific interests include high-power electronic converters for large- and medium-
scale motor drives and grid applications.
Staffan Norrga (M’00) was born in Lidingö,Sweden, in 1968. He received the M.Sc. degree inapplied physics from Linköping Institute of Tech-nology, Linköping, Sweden, in 1993 and the Ph.D.degree in electrical engineering from the Royal In-stitute of Technology (KTH), Stockholm, Sweden,in 2005.
Between 1994 and 2011, he worked as aDevelopment Engineer at ABB, Västerås, Sweden,in various power-electronics-related areas such asrailway traction systems and converters for HVdc
power transmission systems. In 2000, he returned to academia to engage inresearch on new power electronic converters employing soft switching andmedium frequency transformers at the Electrical Energy Conversion Labora-tory, KTH, where he currently holds a position as Associate Professor. He is theinventor or coinventor of more than 15 patent filings and has authored or coau-thored more than 30 scientific papers published at international conferences orin journals. His research interests include new converter topologies for powertransmission applications and grid integration of renewable energy sources.
Lennart Ängquist (M’05) was born in Växjö,Sweden, in 1946. He received the M.Sc. degree inelectrical engineering from Lund Institute of Tech-nology, Lund, Sweden, in 1968 and the Ph.D. de-gree from the Royal Institute of Technology (KTH),Stockholm, Sweden, in 2002.
He worked at various departments within ABB(formerly ASEA) from 1968 to 2008 with the de-velopment of power electronics for drives and powertransmission systems. He was, in addition, an Ad-junct Professor of power electronics at KTH from
2004 to 2010.
Hans-Peter Nee (S’91–M’96–SM’04) was born inVästerås, Sweden, in 1963. He received the M.Sc.,Licentiate, and Ph.D. degrees in electrical engineer-ing from the Royal Institute of Technology (KTH),Stockholm, Sweden, in 1987, 1992, and 1996, re-spectively.
In 1999, he was appointed Professor of powerelectronics at KTH, where he currently serves asthe Head of the Electrical Energy Conversion Lab-oratory. His current research interests include powerelectronic converters, semiconductor components,
and control aspects of utility applications, such as flexible ac transmissionsystems and high-voltage dc transmission, and variable-speed drives.
Dr. Nee is a member of the European Power Electronics and Drives Associa-tion (EPE), involved with the Executive Council and the International ScientificCommittee. He has been the recipient of several awards for his research. He isan Associate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS
and was on the board of the IEEE Sweden Section for several years, serving asits Chairman during 2002–2003.
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