DOUBLE-GATE DEVICES AND ANALYSIS

2004. 6. 22

발표자 : 이주용2004-21599

OUTLINE

DG-HEMT / VMT Introduction

Material growth and device fabrication

DC and microwave characteristics

Conclusion

DOUBLE GATE HEMT

IMPROVEMENT OF HEMT’s PERFORMANCE: REDUCTION OF GATE LENGTH:

(state of the art: Ft=562GHz , Fmax=330GHz for Lg=25nm)

BUT : SHORT CHANNEL EFFECT LIMITATIONVERTICAL SCALING LIMITATION

PARTICULARLY FOR Fmax

INTRODUCTION

IMPROVEMENT OF HEMT’s PERFORMANCE: REDUCTION OF GATE LENGTH:

(state of the art: Ft=562GHz , Fmax=330GHz for Lg=25nm)

ALTERNATIVE:

BUT : SHORT CHANNEL EFFECT LIMITATIONVERTICAL SCALING LIMITATION

PARTICULARLY FOR Fmax

DOUBLE-GATE HEMT’s (DG-HEMT)ON TRANSFERRED SUBSTRATE

gate 2

BCB

host substrate

source drain

gate 1

ACTIVE LAYER

No buffer layer(reduction of output conductance: Gd)

DOUBLE-GATE HEMT’s (DG-HEMT)ON TRANSFERRED SUBSTRATE

gate 2

BCB

host substrate (GaAs)

source drain

gate 1

ACTIVE LAYER

No buffer layer(reduction of output conductance: Gd)

Two gate(improvement of transconductance: Gm)

(reduction of gate resistance: Rg)(higher intrinsic capacitances: Cgs, Cgd)

DOUBLE-GATE HEMT’s (DG-HEMT)ON TRANSFERRED SUBSTRATE

gate 2

BCB

host substrate (GaAs)

source drain

gate 1

ACTIVE LAYER

No buffer layer(reduction of output conductance: Gd)

Two gate(improvement of transconductance: Gm)

(reduction of gate resistance: Rg)(higher intrinsic capacitances: Cgs, Cgd)

DOUBLE-GATE HEMT’s (DG-HEMT)ON TRANSFERRED SUBSTRATE

Higher 2DEG density in the channel(Reduction of the source and drain resistances: Rs, Rd)

gate 2

BCB

host substrate (GaAs)

source drain

gate 1

ACTIVE LAYER

No buffer layer(reduction of output conductance: Gd)

Two gate(improvement of transconductance: Gm)

(reduction of gate resistance: Rg)(higher intrinsic capacitances: Cgs, Cgd)

IMPROVEMENT OF THE MAXIMUM OSCILLATION FREQUENCY (Fmax)

higher unloaded voltage gain (Gm/Gd)Lower parasitic resistances

DOUBLE-GATE HEMT’s (DG-HEMT)ON TRANSFERRED SUBSTRATE

Higher 2DEG density in the channel(Reduction of the source and drain resistances: Rs, Rd)

gate 2

BCB

host substrate (GaAs)

source drain

gate 1

ACTIVE LAYER

MATERIAL GROWTH

MATERIAL GROWTH

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

InGaAs 2000 Å

InAlAs 100 Å

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

etch-stoplayers

InP substrate

InGaAs

InAlAs

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

channel

cap layer

Cap layer

spacer

etch-

=5.10

=5.10

100 Å

100 Å InGaAs

MATERIAL GROWTH

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

InGaAs 2000 Å

InAlAs 100 Å

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

etch-stoplayers

InP substrate

InGaAs

InAlAs

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

channel

cap layer

Cap layer

spacer

etch-

=5.10

=5.10

100 Å

100 Å InGaAs

MATERIAL GROWTH

ACTIVE LAYER

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

etch-stoplayers

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

InGaAs 2000 Å

InAlAs 100 Å

InP substrate

InGaAs

InAlAs

channel

cap layer

Cap layer

spacer

etch-

=5.10

=5.10

100 Å

100 Å InGaAs

MATERIAL GROWTH

InGaAs 2000 Å

InAlAs 100 Å

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

InP substrate

InGaAs

InAlAs

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

spacer

ACTIVE LAYER

=5.10

=5.10

100 Å

100 Å InGaAs

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

etch-stoplayers

channel

cap layer

Cap layer

etch-

InGaAs 2000 Å

InAlAs 100 Å

InP substrate

InGaAs

InAlAs

MATERIAL GROWTH

2 nd HEMT

1st HEMT

InGaAs 2000 Å

InAlAs 100 Å

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

InP substrate

InGaAs

InAlAs

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

spacer

ACTIVE LAYER

=5.10

=5.10

100 Å

100 Å InGaAs

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

etch-stoplayers

channel

cap layer

Cap layer

etch-

InGaAs 2000 Å

InAlAs 100 Å

InP substrate

InGaAs

InAlAs

MATERIAL GROWTH

2 nd HEMT

1st HEMT

InGaAs 2000 Å

InAlAs 100 Å

InGaAs 100 Å Nd 18 cm-3

InAlAs 120 Å

InAlAs 50 Å

InGaAs

InAlAs 50 Å

InAlAs 120 Å

InGaAs Nd 18 cm-3

schottky

schottky

spacer

InP substrate

InGaAs

InAlAs

InGaAs Nd 18 cm-3

InAlAs

InAlAs

InAlAs

InAlAs 12

InGaAs 100 Å Nd 18 cm-3

spacer

ACTIVE LAYER

=5.10

=5.10

100 Å

100 Å

R (active layer) = 130 Ω

InGaAs

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

Si--doped (5.1012 cm-2)Si--doped (5.1012 cm-2)

etch-stoplayers

channel

cap layer

Cap layer

etch-

InGaAs 2000 Å

InAlAs 100 Å

InP substrate

InGaAs

InAlAs

DEVICE FABRICATION PROCESS

CLASSIC HEMT PROCESS (1/4)

InP Substrate

Active Layer

Bonding Pad

gate 1

Ohmic Contact

InAlAs etch-stop layer

InGaAs etch-stop layer

Mesa isolation.

Ni/Ge/Au/Ni/Au Ohmic contact.

Bonding pads. (Ti/Au/Ti)

First T-gate process:selective recess

(Succinic Acid)

BONDING PROCESS (2/4)

BCB depositing on both active substrate and on GaAs host substrate.

Bonding.

InP Substrate

InGaAs etch-stop layer

gate 1

Active Layer

InAlAs etch-stop layer

BCB

GaAs host Substrate

ETCHING PROCESS (3/4)

gate 1

Active Layer

BCB

GaAs host Substrate

Etching InP Substrate by hydrochloric solution.

Etching InGaAs etch-stop layer by Succinic Acid solution.

Etching InAlAs etch-stop layer by H3PO4/H2O2/H2O solution.

SECOND GATE PROCESS (4/4)

gate 1

Active Layer

BCB

GaAs host Substrate

gate 2Bonding Pad Ohmic Contact

Second T-gate process:selective recess

(Succinic Acid)

gate 1

Active Layer

BCB

GaAs host Substrate

gate 2Bonding Pad

Ohmic Contact

SEM photograph of a double-gate HEMT

gate 2

gate 1

Ohmiccontact

Active layer

DC AND MICROWAVECHARACTERISTICS

W =2x50µm

Lg1 = 0.1µm

Lg2 = 0.28µm

Vgmax = 0.2V

Vgstep = -0.05V

VGATE 1 =VGATE 20

50

100

150

200

250

300

350

400

450

500

0 0.2 0.4 0.6 0.8Drain to Source Voltage (V)

Dra

in C

urr

ent

(mA

/mm

)

Gmext = 2650 mS/mm

Idmax = 500 mA/mmVP = -0.2 V

No Kink Effect

Good Pinch-Off

I(V) CHARACTERISTICS

W =2x50µm

Lg1 = 0.1µm

Lg2 = 0.28µm

Vds = 0.7 V

Vgs = 0.1 V

MICROWAVE CHARACTERISTICS

INTRINSIC PARAMETERS

Gm = 3140 mS/mmGd = 36 mS/mm

Gm= 87

GdDG-HEMT

HEMT Gm = 1650 mS/mmGd = 194 mS/mm

Gm= 8

Gd

0

500

1000

1500

2000

2500

3000

3500

0 100 200 300 400 500

Drain Current (mA/mm)

Intr

insi

c tr

ansc

on

du

ctan

ce (

mS

/mm

)

conventional HEMT

DG-HEMT

0

50

100

150

200

250

300

0 100 200 300 400 500Drain Current (mA/mm)

intr

insi

c o

utp

ut

con

du

ctan

ce

(mS

/mm

)

conventional HEMTDG-HEMT

GmINT GdINT

VELOCITY MODULATION TRANSISTOR

INTRODUCTION

VMT??

Two channels with differing velocities Drain current =>controlled by modulating carrier

velocity in source-drain channel

Fast top channel Slow bottom channel

Two channel gate

Two gates work in tandem=> can maintain total channel population

s D

Vgt

Vgb

CHARACTERISTICS

Two channel of differing velocity

Opportunity for higher speed than C-HEMT

HEMT-like Noise

Useful in ADCs and AMP

Rapid switching time

BUT : limited by source-drain transit time top and back gate capacitance should be equal

s D

Vgt ”HIGH”

Vgb ”LOW”

t=0Id=HIGH

s D

Vgt ”LOW”

Vgb ”HIGH”

0<t<tswitchId=HIGH

s D

Vgt ”LOW”

Vgb ”HIGH”

t=0Id=LOW

VMT CONDUCTION BAND

----------

+ + +

AlGaAs GaAs AlGaAs

----------

+ + +

AlGaAs GaAs AlGaAs

( Biased to on ) ( Biased to off )

Material growth and device fabrication

Top side processing only

600℃

600℃

550℃

2um

800 Å

140 Å

300 Å

i-AlGaAs (graded) 40 Å

i-GaAs

200 Å

600 Å

Semi insulating GaAs substrate

p-GaAs

i-AlGaAs

n-GaAs

i-GaAs

i-AlGaAs

n-AlGaAs

n-GaAs 50 Å

450 Å

P+ back gate

2 DEG

Low mobility channel(Donor ion and As defect)

Separate high and low channel

Channel isolation and preventing defect

EXPERIMENT (1)

Sheet carrier concentration

Top Lg=40nm

Top and bottom channel concentration

HEMT channel concentration

VMT top channel

concentration

EXPERIMENT (2)

I-V characteristic

on state

Vgt=-0.85VVgb=-1.06V

off state

Vgt=-2.20VVgb=0V

EXPERIMENT (3)

Ft=15GHz Fmax=100~600GHz

Cbottom=KcCtop

CONCLUSION

0.1µm/0.28µm InAlAs/InGaAs DG-HEMTs:

high extrinsic transconductance = 2650mS/mm

fT = 110GHz fMAX = 200GHz

high unloaded voltage gain (gm/gd = 87)

Velocity Modulation Transistor:

easy fabrication process

low fT but fMAX = 100~600GHz

faster switching time

REFERENCE[1] Y. YAMASHITA et al. "Pseudomorphic In0.52Al0.48As/In0.7Ga0.3As HEMTs with

an ultrahigh ft of 562GHz" IEEE Electron Device Letters, vol.23, n°10, October 2002, pp.573-575.

[2] A. ENDOH et al. "Fabrication technology and device performance of sub-50nm gate InP based HEMTs", Proceeding of IPRM2001, pp.448-451.

[3] G.K. CELLER et al. "Frontiers of silicon-on-insulator", Journal of Applied Physics, vol.93, n°9, pp.4955-4978, 2003.

[4] M.J.W. RODWELL et al, "Submicron Scaling of HBTs", IEEE trans. on elect.devices,vol.48,n°11,pp.2606-2624,2001.

[5] S. B0LLAERT et al, "0.12 μm gate length In0.52Al0.48As/In0.53Ga0.47As HEMTs on transferred substrate",

Electron Device Letters, vol.23, n°2, pp.73-75, 2002.[6]Fabrication and operation of a velocity modulation transistor Webb, K.J.; Cohen,

E.B.; Melloch, M.R.; Electron Devices, IEEE Transactions on , Volume: 48 , Issue: 12 , Dec. 2001 [7]Analysis of microwave characteristics of a double-channel FET employing the

velocity-modulation transistor concept Maezawa, K.; Mizutani, T.;Electron Devices, IEEE Transactions on , Volume: 39 , Issue: 11 , Nov 1992

[8]H.Sakaki," velocity-modulation transistor(VMT)-A new field effect transistor concept." Japan.J Appl.Phys vol.21

[9]K.Maezawa, T.Mizutani, and S.Yamada " GaAs/AlAs double-channel structure for velocity modulation transistor."to el published in Japan 1992