Dissemination Plan (Final Version)

FP7- 216693 – MULTICUBE Project D5.1 .3 – Dissemina t ion P lan (F ina l Vers ion)

Page 1of 52

FP7 – 216693 - MULTICUBE Project

MULTI-OBJECTIVE DESIGN SPACE EXPLORATION OF MULTI-PROCESSOR SOC ARCHITECTURES FOR EMBEDDED MULTIMEDIA APPLICATIONS

Deliverable D5.1.3: Dissemination Plan (Final Version)

Revision [13] Delivery due date: M30 (June 2010) Actual submission date: October 18th, 2010 Lead beneficiary: ALARI-USI

Dissemination Level of Deliverable PU Public X PP Restricted to other program participants (including the Commission Services) RE Restricted to a group specified by the Consortium (including the Commission Services) CO Confidential, only for members of the Consortium (including the Commission Services)

Nature of Deliverable R Report X P Prototype D Demonstrator O Other


Page 2of 52

Author(s): Daniela Dimitrova, Umberto Bondi (ALARI-USI) Reviewer(s): Gianluca Palermo (POLIMI), Cristina Silvano (POLIMI) WP/Task No: 5.1 Number of pages: 52 Identifier: D5.1.3_USI_10.2010

Dissemination level: Public Issue Date: October 18th, 2010

Keywords: Dissemination, training, private website, public website, publications,

workshops, conferences. Abstract: This deliverable reports dissemination activities carried out in Task 5.1 under

the leadership of ALARI-USI during the entire duration of the project and some plans for the forthcoming period. While enforcing dissemination activities started during the first reporting period and already reported in D5.1.2 “Dissemination Plan (Initial Version)”, the dissemination activities carried out during the second and third reporting periods were more focused on gathering more results from the project activities and generating more externally oriented materials to increase the visibility of the MULTICUBE project. The MULTICUBE private website has been used by the partners to exchange documents, drafts, ideas and beta versions of tools with the aim of sharing the developed know-how. Internal technical meetings (both plenary and work-packages specifics) and brainstorming sessions have periodically been organized and all related electronics media have been timely uploaded on the private website. The MULTICUBE public website (www.multicube.eu) enables the general public to gather information about the project and related results. Open source tools (M3Explorer and M3 SCoPE) have been released on the project website and they are currently used in several academic courses to develop course projects and Master thesis as well as in several research projects. The Consortium has also organized and attended a number of international workshops and conferences and has presented the objectives and results of the project in several international events. Several papers (48) have been published from 2008 to 2010 in international conferences, workshops and peer reviewed journals to spread out the knowledge developed in the project in the international scientific community. Organizing MULTICUBE booths and Friday Workshops at DATE 2009 and 2010 conferences contributed to increase the international visibility of the MULTICUBE project. This enabled a direct contact with the embedded system community covering research, industry and CAD vendors. Dissemination plans for the next period aim at further increasing the visibility of the project exploitable results mainly by enforcing dissemination channels already used during the project timeframe. One of the most important dissemination vehicles after the end of the project is expected to be the book titled: “Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach” to be published by Springer in 2011.

Approved by the Project Coordinator: Date: October 18th, 2010


Page 3of 52

Table of contents

I. Executive summary ................................................................................................................... 4

II. Dissemination Activities: an Overview ................................................................................... 5

III. Dissemination strategy ........................................................................................................... 7

III.1. Target Audience ............................................................................................................... 7

IV. Project websites ...................................................................................................................... 8

IV.1. Public website .................................................................................................................. 8

IV.2. Collaborative Website .................................................................................................... 10

IV.3. MULTICUBE Websites Access Statistics ..................................................................... 15

IV.4. Mailing lists and Wikipedia ........................................................................................... 18

V. All Deliverables ..................................................................................................................... 19

VI. Seminars, Workshops, Conferences and Presentations ........................................................ 21

VI.1. Internal Seminars and tutorials ...................................................................................... 21

VI.2. Academic courses and projects ...................................................................................... 21

VI.3. Participation to international conferences and workshops ............................................ 22

VI.4. Seminar/Talks in external organizations ........................................................................ 33

VI.5. Organization of International Workshop ....................................................................... 34

VI.6. Participation to EU organized events and workshops ................................................... 34

VI.7. Dissemination in other EU-Projects .............................................................................. 35

VI.8. International Publications .............................................................................................. 36

VII. MULTICUBE Book ........................................................................................................... 41

VIII. Various dissemination activities ........................................................................................ 43

IX. Dissemination plans after the end of the project .................................................................. 44

X. References ............................................................................................................................. 45

XI. Appendix I: Project Poster ................................................................................................... 46

XII. Appendix 2: Project Leaflet ................................................................................................ 47

XIII. Appendix III: MULTICUBE Glossary .............................................................................. 48


Page 4of 52

I. Executive summary The dissemination strategy has target of helping to achieve a common understanding of any new concepts and terms across all of the fields and cultures within the Consortium and the dissemination activities should broadcast the objectives and the results of the MULTICUBE research to the wider external audience. For this reason, few of the dissemination activities have been oriented towards the setting up of tools and structures that helped the circulation of information. The Consortium collaborative website has been used for the dissemination and exchange of documents, drafts, ideas within the project. Several mailing lists, organized by technical areas of the project, have been set up. Internal meetings and brainstorming sessions have been organized during the labor period of the project. This high level of internal communication has been felt necessary by the Consortium to ramp-up the project’s research activities. A significant vehicle for bottom-up dissemination of MULTICUBE project results has been the exploitation of the open source tools for academic and research purposes. In particular the MULTICUBE design methodologies have been presented within the context of Master courses by the academic partners. Furthermore, the related tools have been used to develop project assignments and Master’s thesis during the last years. On the external front, the public website (www.multicube.eu) and the Open Source tool area have been setup and periodically updated as a mechanism for the general public to gather information about the project and access the open source tools. In addition, a specific page on Wikipedia has been published to present the goals and the main references to the MULTICUBE activities. The Consortium has been present at many international workshops and conferences to disseminate the concepts and the latest results of the research. A poster and a leaflet have been designed to standardize the interface to the Consortium and to facilitate the dissemination during public events. Both are publicly accessible through the project website. Moreover, two exhibition booths dedicated to MULTICUBE project were organized during the DATE’09 and DATE’10 conferences. This activity dramatically increased the international visibility of the MULTICUBE project and enabled the possibility to collect some feedbacks during the demos. That demonstration enabled an in-depth contact with all the kinds of stakeholders: industry, academy and CAD vendors. A relevant external dissemination action was publishing the SPRINGER book “Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach”, which describes the methodological aspects of the MULTICUBE framework and how the proposed methodologies can be applied to design space exploration of future MPSoC architectures.


Page 5of 52

II. Dissemination Activities: an Overview Dissemination activities for MULTICUBE have been carried out in Task 5.1 for the whole duration of the project under the leadership of ALARI-USI. The present deliverable is the final product of the project’s dissemination action. This document covers all dissemination activities that were completed during the entire project duration and it also reports some afterward dissemination actions. MULTICUBE project distinguishes between internal and external dissemination actions, based on different channels adopted to spread out the knowledge created in the project. 1. Internal Dissemination: actions aiming at ensuring a good diffusion of information and documentation among the project partners with the aim of sharing the developed know-how. The internal dissemination has mainly been achieved through the following channels/measures:

• Internal project website: the internal web site has been set up and periodically updated to ensure for all partners the proper information availability and visibility of the activities’ progression. It is used as database and knowledge management tool, a gathering knowledge base on MULTICUBE-related scientific topics, reports, state-of-the-art and outputs of the project, and any information on specific resources that are available to all the different partners. Access is restricted to partners of the Consortium and the EC and it is protected by user authentication.

• Internal workshops and meetings: several internal project workshops and meetings have been organized to share information and to strength the cooperation among the partners in the Consortium. The complete list of project meetings is reported in the Final Project Report.

2. External Dissemination: actions aiming at ensuring the visibility and awareness of the results outside the Consortium border, i.e., in the scientific community, in academic institutions, in organizations, or in companies. More precisely, external visibility and public awareness and knowledge of the MULTICUBE project have been ensured through the following channels/measures:

• Public project website: the MULTICUBE public web site presents general project information, scientific publications done during the project, news about the project, events organized and public deliverables. Public documents, made available through the project public website, can be utilized by third parties to enhance their knowledge but also to give these third parties the possibility to provide feedback and thus to further improve the results of the project. Open source tools (M3Explorer and M3 SCoPE) have also been released on the project public website as well as a public demonstrator of project results.

• International workshops and conferences: project participants are active in the embedded system community. The project partners actively participated to workshops and conferences to increase the possibility to widely disseminate project results in the research community. Moreover, the project participants organized some workshops, conference booths and training courses to support the transfer of knowledge outside the Consortium.

• Publication of research results: project results and innovations have been published or recently submitted for publication in scientific peer review journals, conferences, and workshops relevant to the topic of the research activity carried out during the project. The submission of papers jointly written by project partners has been


Page 6of 52

encouraged. The complete list of publications (counting 48 papers) is included in the present deliverable.

• Dissemination through Universities curricula: a significant vehicle for bottom-up dissemination of MULTICUBE project results has been the exploitation of the open source tools for academic and research purposes. In particular the MULTICUBE design methodologies have been presented within the context of Master courses by the academic partners. Furthermore, the related tools have been used to develop project assignments and Master’s thesis during the last years by several Universities.

• Published Book: furthermore, the methodologies developed during the MULTICUBE project have been collected together into a scientific book co-authored by the project partners. The book also reports some results of the project and explains to a wide public the advantages of the overall design space exploration framework.

In particular, the present deliverable covers both internal and external dissemination actions.


Page 7of 52

III. Dissemination strategy

III.1. Target Audience The MULTICUBE Consortium dissemination policy is targeting both the internal project’s audience and the external public. The external public includes the scientific community (either academic or industrial) and the general public at large. MULTICUBE project targets the Embedded System Design Community as well as the Computer Architecture Design Community and, more in general, the Design Automation Community, where the European partners enforced their scientific and technological strength, thanks to the synergy that has been established by participating into the project Consortium. Various disseminations media and/or events were organized and considered according to the various targeted audiences. Versions of the dissemination media are specifically targeted to a certain type of audience as described in Table 1.

Dissemination Media Audience Status Public Website Public On-line Private Website Internal : Consortium, PTC, EC On-line Mailing lists Internal : Consortium On-going Wikipedia Public On-line Ms/Thesis projects Public : Academic community On-going Papers at Conferences / Workshops

Public : Scientific community On-line

Internal tutorial Internal: Consortium Completed Internal meetings Internal: Consortium Completed Open Source repositories Public: Scientific community (academic

and industrial ones) On-line

Table 1: Audience and current status of MULTICUBE dissemination media.


Page 8of 52

IV. Project websites Nowadays, Internet websites represent one of the primary media for the dissemination of project’s activities. As a consequence, the design and setup of the MULTICUBE websites has been one of the first crucial tasks after the project’s kick-off. Websites are used for both internal Consortium and public dissemination. For external dissemination a publicly accessible website has been set up. On the internal side a Consortium collaborative website has been setup. The main contributors for the websites design have been ALARI for both main websites. ALARI is also in charge of the hosting, domain registration and technical maintenance for the public website. Partners have contributed providing and periodically updating specific contents for both websites. The setup of the web site has been first described in D5.1.1 “Set up the Website with public and private areas” released at M3 and then periodically updated (on-going deliverable).

IV.1. Public website

IV.1.1. Goal The public website provides a vision of the project to the general public. It is a part of the WP5 work-package on project dissemination and it is one of the main media for the dissemination of MULTICUBE public results. The MULTICUBE website includes a plethora of public information relevant for the project and useful for dissemination activities. More specifically, information regarding the project’s objectives and the public deliverables as well as the papers from conference proceedings, presented by project’s partners have been included. In addition, the website makes use of the project’s characteristic logo, which helps rising-up the recognition of the project by the public throughout the various dissemination channels.

IV.1.2. URL and hosting The URL of the website is http://www.multicube.eu . The internet public website has been online since March 3rd, 2008. The website is hosted at ALARI-USI. The integrity of the project data has been ensured by periodic backups, which are maintained on a different storage server.

IV.1.3. Main features The public website has several sections devoted to present the project to external visitors. A screenshot of the home page of the public website is shown in Figure 1, while Figure 2 shows the sitemap of the MULTICUBE website.


Page 9of 52

Figure 1: Screenshot of the home page of the public website.

The website has the following main sections:

• Home: the home page of the website shortly introduces the MULTICUBE project and gives the important relevant information.

• About MULTICUBE: on this page are described the main goals of the MULTICUBE project. They are linked to the MULTICUBE poster and leaflet. A glossary has been created and inserted at the end of the page, to share common definitions used during the

Figure 2: Sitemap of the MULTICUBE public website.


Page 10of 52

project among the partners and to provide additional explanation to interested external users.

• Partners: this webpage section presents a brief description of the project partners, their logos and the links to the respective websites.

• Publications: this section lists research papers, related to the project, published by partners.

• Public Documents: public deliverables released during the project are listed in this page to be accessed by interested people from outside the Consortium. Moreover, this page lists some other documents of public interest such as the MULTICUBE GLOSSARY, the MULTICUBE Publishable Summary, MULTICUBE White Paper recently published at ISVLSI 2010 and the MULTICUBE XML Interface.

• Open Source tools area: this area give the possibility to the interested users to access the open source versions of the project toolsets such as M3 SCoPE and M3 Explorer. It also contains the links to the dedicated pages of M3 SCoPE and M3Explorer open source tools.

• News & Links: this page shows general news and events about the project. Some relevant links about the scientific domains covered in the project are listed there. A list of conferences on topics related to the project and other projects whose goals or activities are linked to MULTICUBE are also shown in this section.

• Contacts: this section enables people to easily get in touch with relevant contact people of the project Consortium.

• Members area: this page allows to access the collaborative website used for partnership internal communication (see Figure 3 and the next paragraph).

IV.2. Collaborative Website

IV.2.4. Goal The role of the collaborative website is to have a secure and private common place to share documents among project’s partners. The collaborative website is totally private and a password is mandatory to gain access to it. It has been implemented by using WebRatio® technology (http://webratio.com).


Page 11of 52

Figure 3: Screenshot of the login webpage to access the collaborative website.

IV.2.5. URL and hosting The collaborative website is hosted on: http://www.multicube.eu/multicube-intranet/ . The website is online since March 14th, 2008. It is fully operational since March 31st, 2008. This website is hosted by ALARI-USI partner. Daily incremental backups and a weekly global backup ensure the integrity of private data.

IV.2.6. Main features A screenshot of the welcome page of the collaborative website is provided in Figure 4. The website offers the following features to the project members:

• Shared Calendar: for the whole duration of the project.


Page 12of 52

• Workgroups: workgroups have been set up in order to provide members with differentiate accesses to the collaborative area. A better description of this feature is given in Section IV.2.7.

Figure 4: Screenshot of the welcome page of the MULTICUBE collaborative website.

• Working documents sharing: an area where to keep working versions of documents

(such as ongoing version of reports and deliverables) was set up. Members of a group can access working documents associated to that group and upload new versions. When uploading a new version of a document, tracks of the modifications and of the comments added to the document are kept and automatically sent by email to the members of the groups.

• Meetings minutes repository: a section has been devoted to keep minutes of the meetings held during the project by the several working groups. In Figure 5 a screenshot of this page is shown.

• Legal official documents: a special sub-repository containing official legal documents such as the Consortium Agreement, contracts and the Description of Work.

• Deliverables repository: deliverables (public and confidential) released during the project are kept in this repository.


Page 13of 52

Figure 5: Page of the collaborative web site showing some uploaded minutes of the PTC meetings.

• Templates: a special sub-section has also been set up to provide templates for slides, meeting minutes, deliverables and logos.

• Search News: an internal news section is maintained to keep the partners updated about special meetings and events of the project (for instance for deliverables achievement).

• Links: this section is a repository of relevant links about the scientific domains covered in the project, such as design space exploration.

• Training: a section to keep and manage training material has been set up. Information stored can include background material, tutorial, relevant references, and internal course material.

• People and contacts: people involved in the several working groups are listed in this section. Contact information for the people is provided.

• Shared calendar: to set up meetings and to highlights conference call for papers, a shared calendar was implemented (shown in figure 4).


Page 14of 52

IV.2.7. Working groups Several working groups have been identified for the project. Access rights to the collaborative area depend on the membership to the specific working groups. Working groups identified are listed next:

• PTC: Project Technical Committee

• GA: General Assembly

• WP: Work-package members

The Project Coordinator (PC) is in charge of managing documents for the PTC and GA working groups, while work-package Leaders (WPL) manage documents for their respective work-package. An Administrator (Admin) is in charge of users’ administration. Different views were created for each working group (PTC, GA, WPx), allowing a differentiated access to the resources provided by the collaborative area. For instance, in the GA view, only access to definitive versions of documents is given, while in the WPx view the working documents area is also implemented. Table 2 resumes access rights of the several users for the documents on the collaborative area.

USERS

INFORMATION

PC PTC GA WPL WP Admin

Deliverables

Acc, Add Acc Acc Acc, Add Acc Full

Templates


Legal Documents


Meetings Information


Ongoing Documents

Acc, Add Acc, Add Acc Acc, Add Acc, Add Full

User Information

Acc Acc Acc Acc Acc Full

Table 2: Table summarizing access rights of the several users

Legend: Acc – The user is enabled to access the document or the information and use it for project purposes Add - The user is enabled to upload new documents or information Full – The web-side administrator has full access to all documents or information


Page 15of 52

IV.3. MULTICUBE Websites Access Statistics

Usage statistics: The accesses to the MULTICUBE website as well as to the open source tools (M3 Explorer and M3 SCoPE developed in the project) have been monitored on a monthly basis (as shown in Figure 6 and Figure 7 for 2009 and 2010 respectively). The following Table 3 reports the total number of visits on the public websites from beginning to the end of the project’s period. During the website monitoring it appeared some correlation between project visibility and physical events to which partners participated actively. The Figure 8 below shows the distribution of originating countries. It can clearly be seen that MULTICUBE website has attracted a significant number of visits originating from countries far beyond the original project consortium.

Table 3. MULTICUBE public websites metrics for the project period

Metrics for project period MULTICUBE

website MULTICUBE

Explorer MULTICUBE

SCoPE

Number of visits (total) 5306 1870 1587

Number of unique visitors 3809 634 882

Number of page views 35962 8096 3821

Average time on site (sec) 241 166 -

Number of tool downloads - 465 261

Figure 6: Monthly access statistics for MULTICUBE public website for 2009


Page 16of 52

Figure 7. Monthly access statistics for MULTICUBE public website for 2010

Figure 8. Access statistics per country

MULTICUBE website statistics are accessible at the following address: http://www.alari.ch/awstats/awstats.pl?config=multicube

Google ranking has now become a good measure of the popularity of Internet websites. By attaching specifics keywords to the public website, we achieved a good ranking in this popular search engine. As an example, typing “multi-objective design space exploration” or “multicube explorer” or “design space exploration fp7” or “multicube fp7” and many more in the search engine will rank the MULTICUBE website first. This is a good point to ensure that people around the world are able to access the project’s website by just typing some simple keywords related to the MULTICUBE research therefore spreading the dissemination on the project.


Page 17of 52

Figure 9 demonstrates the access statistics per country (since December 08) for MULTICUBE Explorer open-source website (http://m3explorer.sourceforge.net/). Most of the accesses are originated in Europe, but MULTICUBE Explorer website has attracted a significant number of visits originating from countries outside the original countries of the project partners.

Figure 9 . Access statistics for M3Explorer website

The accesses to the M3-SCoPE website (page where could be downloaded the open source tool developed in the project) have been monitored on a monthly basis as the other. The M3- SCoPE website statistics’ details for 2009 and 2010 are listed in Table 3.


Page 18of 52

IV.4. Mailing lists and Wikipedia One channel for efficient sharing of the information during the entire project was through several mailing lists. In particular, currently they are: [email protected]: for all project members; [email protected]: for members of the Project Technical Committee; [email protected]: for members of the General Assembly; {WP1, WP2, WP3, WP4, WP5, WP6}@multicube.eu: for members of various work-packages. A page on Wikipedia (http://en.wikipedia.org/wiki/MULTICUBE) was also created to additionally disseminate general information about the project, its goals, and the methodologies being developed.

Figure 10: Screenshot of the MULTICUBE project’s page on Wikipedia


Page 19of 52

V. All Deliverables For a more technical and detailed dissemination of the project, deliverables reporting specific aspects of the problematic faced have been released according to the project Technical Annex. Some of the deliverables are containing sensitive data and thus they have marked as CONFIDENTIAL and distributed only within the Consortium. Internal project dissemination is reinforced by sharing confidential deliverables such as the integrated design prototype and demonstrators. This will facilitate future deployments of project outcomes internally to project partners. Some PUBLIC deliverables including open source prototype tools and the public demonstrator together with website and scientific publications have been released to fully enable the external dissemination of the project. Of particular attention for future dissemination and exploitation of project results are:

• The open source prototype tools M3 Explorer and M3 SCoPE released as D3.1.2 and D2.1.2 respectively.

• The public demonstrator D4.2.3 where the MULTICUBE framework has been exploited to develop the multimedia use case. This deliverable is extremely valuable for the external dissemination and exploitation providing to the overall design community a reference point for who wishes to start in the next future to use the MULTICUBE methodology.

• The Integrated Design Tool Prototype D1.4.2 and the two demonstrators D4.2.1 and D4.2.2. Project tools together with the use-cases not covered by the two demonstrators have been integrated together in a virtual machine representing the prototype in D1.4.2. These deliverables are CONFIDENTIAL and available only to the project Consortium for internal dissemination and exploitation purposes. They represent a reference point for academic and industrial partners for further internal dissemination activities reporting in all details how to exploit the MULTICUBE related products and methodologies.

Public Deliverables • D2.1.1 Initial performance and power estimation prototype tool. • D2.3.1 Initial multi-objective evaluation metrics. • D2.1.2 Refined performance and power estimation prototype tool. • D2.3.2 Refined and extended multi-objective evaluation metrics. • D3.1.1 Initial Prototype of the Open Source MULTICUBE exploration framework. • D3.1.2 Final Prototype of the Open Source MULTICUBE exploration framework. • D3.2 Implementation and evaluation of the exploration algorithms. • D3.3.1 Initial report on runtime component for task allocation and scheduling based on

Pareto information. • D3.3.2 Final report on runtime component for task allocation and scheduling based on

Pareto information. • D3.4.1 Initial report on architectural exploration and optimization of MPSoC

architectures. • D4.2.3 Demonstrator of use cases: Multimedia applications.


Page 20of 52

• D4.2.4 Final report on the application of MULTICUBE design flow to the demonstrators.

• D5.1.1: Set up the Website with public and private areas. • D5.1.2 Dissemination Plan (Initial Version) • D5.1.3 Dissemination Plan (Final Version).

Confidential Deliverables • D1.1: Definition of design tools requirements, and design evaluation metrics to be

evaluated. • D1.3 Definition of the specification for the industrial use cases. • D1.4.1 Definition of the specification of the design flow integration. • D1.4.2 Integrated Design Tool Prototype. • D2.2.1 Preliminary report on transaction level multi-core simulation environment based

on ConvergenSC. • D2.2.2 Transaction-level multi-core simulation environment based on ConvergenSC. • D3.4.2 Final report on architectural exploration and optimization of MPSoC

architectures. • D4.1.1 Initial Evaluation Plan • D4.1.2 Final Evaluation Plan. • D4.2.1 Demonstrator of use cases: Powerline application. • D4.2.2 Demonstrator of use cases: Advanced computing platform. • D5.1 Exploitation Plan (Initial Version). • D5.2 Exploitation Plan (Final Version). • D6.1 Periodic Progress Report 1 • D6.2 Periodic Management Report 1 • D6.3 Periodic Progress Report 2. • D6.4 Periodic Management Report 2. • D6.5 Periodic Progress Report 3. • D6.6 Periodic Management Report 3.


Page 21of 52

VI. Seminars, Workshops, Conferences and Presentations

VI.1. Internal Seminars and tutorials MULTICUBE cooperation among the partners has been enforced by organizing internal technical or plenary meetings, conference calls and tutorials. These meetings have been organized in order to support good functioning and sharing of information and vision over the MULTICUBE work during the several phases of the project development. The full list of the technical and plenary meetings is described in the Periodic Management Reports 1-2-3 (D.6.2, D.6.4, D.6.6). During the project, the modeFRONTIER tutorial has been organized by ESTECO in Trieste on November 27th , 2008 in conjunction with the WP1 technical meeting held on November 28th, 2008. The course titled “modeFRONTIER fundamentals and advanced optimization techniques, with emphasis on SoC design” has been tailored for MULTICUBE partners to describe basic and advanced optimization techniques exploiting modeFRONTIER as a multi-objective optimization and design environment targeting System-On-Chip. This tutorial represents the results of the retargeting activities of the modeFRONTIER tool towards the embedded systems field, carrier out by ESTECO in WP3.

VI.2. Academic courses and projects Since the beginning of the project, particular attention has been paid to create awareness also “from the bottom” on the design methodologies under development in MULTICUBE and in particular on the practical usage of the open source side of the foreseen design flow. The involvement of students is important both for reinforcing in the medium term the consciousness on such type of design flows and tool availability towards the industry, and as a test vehicle to debug the tools themselves while improving their usability. The dissemination activities through Universities curricula continued with presentation of project results to students and direct use of the open source toolset both for development of Master and PhD thesis and of the project assignment of courses at Politecnico di Milano, University of Cantabria, ALaRI and ICT-Chinese Academy of Sciences. More in detail, some academic courses on computer architectures, HW/SW co-design and embedded systems taught at the above mentioned institutions included presentations of specific concepts related to the design space exploration and optimisation problem based on the MULTICUBE open source tools (MULTICUBE-Explorer and MULCICUBE SCoPE). A significant vehicle for bottom-up dissemination of MULTICUBE project results has been the exploitation of the open source tools for academic and research purposes. In particular the MULTICUBE design concepts and methodologies have been presented within the context of Master courses and thesis by the academic partners (ALaRI; Polimi, UC, ITC) as follows:

• Specifically M3Explorer has been used at ALaRI Institute during the course of VLIW architectures (January 2009 and 2010) where 2 teams of 2 students each per year were using M3explorer for course project assignments. Moreover a one day seminar on Design Space Exploration for MPSoC has been given on April 10, 2010. M3Explorer tool has been used to develop project assignments and Master’s thesis also in the last two years of project work. Internally in ALaRI, there were finished 4 Master thesis by 5 students; other 3 students were involved to work on internal assignment and an internship for 3 months was completed.


Page 22of 52

• Concepts and tools developed in the context of the MULTICUBE project have been also presented to Master students at Politecnico di Milano through a set of seminars (4h to 6h) done in the context of the following Master courses: “Architectures for multimedia systems”, “Embedded system design” and “HW/SW co-design methodologies” in the Computer Engineering curricula. Presented slides are available online at: http://home.dei.polimi.it/silvano/ARC-MULTIMEDIA.htm

http://home.dei.polimi.it/gpalermo/doc/M3_MPHS_ES.pdf. Moreover at Politecnico di Milano, a number of Master thesis have been concluded and some are on-going by using the tools developed in the context of MULTICUBE project. In particular, MULTICUBE Explorer DSE tool has been used (and it is still in use) in the courses “Architectures for multimedia systems” and “HW/SW co-design methodologies” as the basic tool to develop a small final course project.

• Teaching activities related to MULTICUBE research topics were performed by University of Cantabria. In particular, M3-SCoPE has been presented in the "Specification and Co-design of Embedded Systems" course (5th year of Computer Engineering) and in the "Hardware/Software Co-design" course ("Master on Computing", time planned for M3-SCoPE: Theory: 5 hours, Teaching at laboratory: 5 hours, Student work: 30 Hours).

• The Institute of Computing Technology – Chinese Academy of Science in Beijing introduced MULTICUBE design methodologies and concepts within the student’s academic curricula. In particular a Master course titled “Speculation of the Future of Many Core Design” has been given and 2 Master thesis plus 3 PhD dissertations have been developed addressing MULTICUBE related topics.

Dissemination has been enabled by cooperation between the research centers for guidance of PhDs, Post Docs in the context of the MULTICUBE project. There were organized some training seminars by IMEC.

VI.3. Participation to international conferences and workshops During the entire project, MULTICUBE partners dedicated to publications at external conferences and workshops in the following fields: Embedded Systems, Mapping Applications for System on Chip; Real Time Multimedia; Systems, Architectures, Modeling and Simulation; etc. In addition to publications, the members of the Consortium have also been actively present in many scientific committees of conferences and scientific networks. This represents another valuable entry point for disseminating the MULTICUBE concepts as well as the possibility to organize specific sessions on MULTICUBE related topics. Among the others, the relevant participations to scientific committees have been: MICRO, FDL, DATE, DSD, ES-Week, SASP, SAMOS, NoC Symposium, VLSI SoC, HiPEAC. Concerning the actual participation to international events, the following workshops were attended by MULTICUBE partners:

• Software & Compilers for Embedded Systems (SCOPES) Workshop, 2008 Munich, Germany – March 13-14, 2008 SCOPES focuses on the software generation process for modern embedded systems. Topics of interest include all aspects of the compilation process, starting with suitable modeling and specification techniques and programming languages for embedded systems. The scope of SCOPES includes memory-architecture aware compilation. Since today's embedded devices


Page 23of 52

frequently consist of a multi-processor system-on-chip, the scope of this workshop is not limited to single-processor systems but particularly covers compilation techniques for MPSoC architectures. In addition, this workshop puts a spotlight on the interactions between compilers and other components in the embedded system design process. SCOPES 2008 was held as DATE Friday Workshop. The workshop was supported by the Artist2 network of excellence. http://www.scopesconf.org/scopes-08

• 1st Workshop on Mapping Applications to MPSoCs, 2008 St. Goar, Germany – June 16-17, 2008. At the workshop, requirements and partial solutions for the problem of mapping applications to MPSoCs were identified. The topic was partitioned into two related areas: mapping and code generation. Working groups were formed and it was agreed to have joint follow-up workshops. The workshop was supported by the Artist2 and ArtistDesign network of excellence. There were a total of 37 participants. http://www.artist-embedded.org/artist/Mapping-of-Applications-to-MPSoCs.html

• 2nd Artist Workshop on Models of Computation and Communication (MoCC 2008)

Eindhoven, The Netherlands, - July 3-4, 2008. The aim of the workshop was to bring together academic and industrial researchers in model-driven embedded system design, to discuss and advance the state-of-the-art in this field. The workshop presented worst-case analysis methods for scenario aware dataflow models. The workshop was supported by the Artist2 network of excellence. http://www.es.ele.tue.nl/~tbasten/mocc2008/

• 4th Workshop on Embedded Systems Education, 2008 Atlanta, US, – October 23, 2008 Embedded system education is still a very young area and frequently restricted to teaching the details of microcontroller programming. A long-term objective of this workshop is to stimulate the introduction of broader curricula. The workshop was supported by the ArtistDesign network of excellence. http://www.esweek.org/

• IEEE Workshop on Embedded Systems for Real-Time Multimedia. ESTIMedia Atlanta, Georgia, October 23-24, 2008 The aim of this workshop is to bring together people from different multimedia-related research communities (e.g, software, architectures, real-time systems, DSP, compilers, multimedia applications) who have worked separately, but did not interact sufficiently to address the challenges facing the design of hardware and software for multimedia systems. IEEE ESTIMedia ‘08 is organized as part of the Embedded Systems Week 2008 During the workshop G. Palermo (Politecnico di Milano) presented the paper titled “Robust Optimization of SoC Architectures: A Multi-Scenario Approach." disseminating concepts of the MULTICUBE project to an audience of more than 40 people. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyers have been also distributed during the conference. http://www.science.uva.nl/events/ESTIMedia08/

• HIPEAC Barcelona Computing System Week


Page 24of 52

Barcellona, Spain, June 2-6, 2008 The aim of this Week is to put together most of the European researcher working in the architecture area. This week includes the following three co-located events: The HiPEAC NoE Cluster Meetings, the HiPEAC NoE Industrial Workshop and the Barcellona Multicore Workshop on the challenges raised by the multi/many-core architectures of the future. During the HiPEAC NoE “Design Methodologies and Tools” Custer Meeting G.Palermo disseminated some concepts of the MULTICUBE project to an audience of more than 20 people with the presentation titled “Robust Design Space Exploration of Chip Multiprocessor Architectures” http://www.hipeac.net/computing_systems_week_barcelona The following international conferences were attended by some of the MULTICUBE partners

• Design, Automation and Test in Europe, DATE’08. Munich, Germany – March 10-13, 2008 DATE conference is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software. The conference addresses all aspects of research into technologies for electronic and (embedded) systems engineering. It covers the design process, test, and tools for design automation of electronic products ranging from integrated circuits to distributed large-scale systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecom, wireless communications, multimedia and automotive systems. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyers have been also distributed during the conference. http://www.date-conference.com

• IEEE Symposium on Application Specific Processors, SASP 2008 Anaheim, California. June 8-9, 2008 The symposium explores (micro)architectural design approaches and trade-offs and compiler technologies, for both domain-specific and customizable embedded processors. The aims of the symposium is the generation of a forum wherein challenges and solutions are explored, discussed and compared. During the symposium V. Zaccaria (Politecnico di Milano) presented the paper "An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints" disseminating concepts of the MULTICUBE project to an audience of more than 40 people. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. http://www.sasp-conference.org/

• International Conference on Systems, Architectures, MOdeling and Simulation. SAMOS-VIII

Samos, Greece, July 21-24, 2008


Page 25of 52

The main focus of IC-SAMOS is on the state-of-the-art techniques in the design of embedded computer systems, including mapping techniques and synthesis, processors design and implementation, architectures, modeling issues such as specification languages, formal models, simulation and hardware/software co-design. During the conference C. Silvano (Politecnico di Milano) presented the paper " An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods" disseminating concepts of the MULTICUBE project to an audience of more than 50 people. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyers have been also distributed during the conference. http://samos.et.tudelft.nl/samos_viii/

• 11th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: Architectures, Methods and Tools. DSD08

Parma, Italy, 3-5, September, 2008. The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded) digital and mixed hardware/software system engineering. It is a discussion forum for researchers and engineers working on state-of-the-art investigations, development, and applications. It focuses on advanced system, design, and design automation concepts, paradigms, methods and tools, as well as, modern implementation technologies that enable effective and efficient development of high-quality (embedded) systems During the conference G. Palermo (Politecnico di Milano) presented the paper “Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration" disseminating concepts of the MULTICUBE project to an audience of more than 50 people. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyers have been also distributed during the conference. http://dsd08.iet.unipi.it

• International Conference on Very Large Scale Integration of System-on-Chip. (VLSI-SoC)

Rhodes Island, Greece, October 13-15 2008 VLSI-SoC 2008 explores the state-of-the-art and the new developments in the field of Very Large Scale Integration Systems and their designs. The purpose of the Conference is to provide a platform, to exchange ideas and to present industrial and research results in the fields of VLSI/ULSI Systems, VLSI CAD and Microelectronic Design and Test. During the conference C. Silvano (Politecnico di Milano) presented the paper "An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Network" disseminating concepts of the MULTICUBE project to an audience of more than 40 people. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyers have been also distributed during the conference. https://vlsi.ee.duth.gr/vlsisoc-2008/

• International Symposium on Microarchitecture. MICRO41 Lake Como, Italy. November 8-12, 2008


Page 26of 52

The International Symposium on Microarchitecture is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas. During the conference several networking meeting have been used to disseminate the MULTICUBE concepts and ideas. MULTICUBE flyer have been also distributed during the conference. The Project Coordinator prof. Cristina Silvano, has been one of the General Co-Chairs of the Symposium. She also was the organizer of the Special Session on “EU-US Funded Research Opportunities and Trends in Computing Systems”, November 10th, 2008. The goal of this session has been presenting both the European and the US perspectives for the funded research projects in the field of computing systems. The invited speakers of the special session were:

• The European Perspective: FP7-ICT Outlook, Invited Speaker: Panagiotis Tsarchopoulos, Project Officer, European Commission, Belgium.

• The US Perspective: NSF Outlook, Invited Speaker: Timothy M. Pinkston (USC, USA), NSF Program Director.

http://www.microarch.org/micro41/

• “ASP-DAC 2009”Conference,

Yokohama, Japan, January 2009

A paper related to MULTICUBE activities has been presented: G. Palermo, C. Silvano, V. Zaccaria. "Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures". In Proceedings of ASP-DAC 2009, 14th Asia and South Pacific Design Automation Conference. Yokohama, Japan, January 2009, pp. 323-328 http://www.aspdac.com/aspdac2009/

• “1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO’09)”,

Paphos, Cyprus January 2009 held in conjunction with the 4th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC). The following paper related to MULTICUBE activities has been presented: “A DoE/RSM-based Strategy for an Efficient Design Space Exploration Targeted to CMPs”, G. Palermo, C. Silvano, and V. Zaccaria, Politecnico di Milano, Italy.

• DATE 2009

Nice, France, April 2009

During the conference a paper related to the MULTICUBE activities has been presented and included in the conference proceedings: L.Fiorin, G. Palermo and C. Silvano. “MPSoCs Run-Time Monitoring through Networks-on-Chip” In proceedings of DATE 2009, Conference on Design, Automation & Test In Europe. Nice, France, April 2009.

Moreover, MULTICUBE consortium organized the MULTICUBE booth at DATE 2009. In particular, we have been organized a full stand by exploiting the “European Project and Cluster Package”, to improve the visibility of the project in a comprehensive range of stakeholders


Page 27of 52

covering academic people, industry and EDA tool vendors. This presence in one of the two most representative international forums, represented also a valuable opportunity to get up to date information on the potential exploitation strategies for the MULTICUBE results. At DATE 2009, it was also organized the Friday Workshop on “Designing for embedded parallel computing platforms: architectures, tools, and applications”, Nice, France, April 2009 Where several posters related to MULTICUBE activities have been presented.

http://www.date-conference.com/date09/

• 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing (SNPD 2009),

Daegu, Korea, May 2009 in conjunction with 3rd International Workshop on e-Activity, IWEA 2009, 1st International Workshop on Enterprise Architecture Challenges and Responses, WEACR 2009, Catholic University of Daegu, Daegu, Korea, 27-29 May 2009. During this conference a paper related to MULTICUBE activities has been presented: Lei Yu, Zhiyong Liu, Dongrui Fan, Fenglong Song, Junchao Zhang, Nan Yuan. “Study on Fine-grained Synchronization in Many-Core Architecture” In Proceedings of the 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing (SNPD 2009), May 27~29, 2009

• SASP'09 Conference

San Francisco, CA, USA , July 2009

held in the conjunction with the Design Automation Conference. Topic related to the MULTICUBE project was presented in the following paper: G. Mariani, G. Palermo, C. Silvano, V. Zaccaria, “A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip”, In Proceedings, IEEE SASP’09, San Francisco, CA, USA, July, 2009, pp. 21-28. In this paper, was introduced a methodology for identifying a hardware configuration which is robust with respect to the variable workload scenario introduced by the run-time management. http://dogbert.eng.umd.edu/sasp09/

• IEEE IC- SAMOS'09 conference

Samos, Greece, July 2009

SAMOS is a premier and well-established symposium on embedded systems organized annually since 2001. The symposium brings together researchers from academia and industry on the quiet and inspiring northern mountainside of the Mediterranean island of Samos. It provides an environment where collaboration rather than competition is fostered.

A paper related to MULTICUBE activities has been presented: G. Mariani, G. Palermo, C.Silvano, V. Zaccaria, “Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques”, In Proceedings of IEEE IC- SAMOS'09, Greece, July 2009, pp. 118-124. In this paper they propose a methodology for heuristic platform based design based on evolutionary algorithms and multi-level simulation techniques. http://samos.et.tudelft.nl/samos_ix/

• DSD'09 - Conference on Digital System Design


Page 28of 52

Patras, Greece, August 2009

The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded and high-perfomance) digital and mixed hardware/software system engineering, down to microarchitectures, digital circuits and VLSI techniques. It focuses on advanced circuit and system design and design automation concepts, paradigms, methods and tools, as well as on modern implementation technologies from full custom in nanometer technology nodes to FPGA and to multicore infrastructures. In this conference a paper related with MULTICUBE activities has been presented.

G. Mariani, G. Palermo, C. Silvano, V. Zaccaria presented interesting topics related to MULTICUBE project in the following paper: ”Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip”, In Euromicro Proceedings of DSD'09 - Conference on Digital System Design. Patras, Greece, August 2009, pp. 383-389. In this paper, they address the MPSoC DSE problem by using an NSGA-II modified to be assisted by an Artificial Neural Network (ANN). http://www.vlsi.ee.upatras.gr/~euromicro/Around%20Patras.htm

• IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-09)

Chengdu and Jiuzhai Valley, China, August 2009

The objective of ISPA-09 is to provide a forum for scientists and engineers in academia and industry to exchange and discuss their experiences, new ideas, research results, and applications about all aspects of parallel and distributed computing and networking. ISPA-09 is sponsored by IEEE Technical Committee on Scalable Computing (TCSC) and IEEE Computer Society.

There were two papers related to MULTICUBE activities presented during this symposium. The first one, Fenglong Song, Zhiyong Liu, Dongrui Fan, He Huang, Nan Yuan, Lei Yu, Junchao Zhang, “Evaluation Method of Synchronization for Shared-Memory On-Chip Many-Core Processor” In Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-09), Aug 10~12, 2009, pp.571-576, focused on the evaluation method and criterion of synchronization scheme on the platform. The another one, Yongbin Zhou, Junchao Zhang, Shuai Zhang, Nan Yuan, Fan Dongrui, “Data Management: The Spirit to Pursuit Peak Performance on Many-Core Processor” In Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-09), Aug 10~12, 2009, provide a data management framework to implement high efficient on-chip traffic based on overall many-core system. http://grid.hust.edu.cn/ISPA2009/

• Conference III IFIP TC International Embedded Systems Symposium (IESS 2009)

Langenargen, Germany , September 2009

The goals of the International Embedded Systems Symposium are to present exchange and discuss the state of the art, novel ideas, actual research results, and future trends in the field of embedded systems.

The two following papers related to the MULTICUBE activities have been presented. A. Rettberg, M. Zanella, M. Amann, M. Keckeiser, F. Rammig (Eds.) introduced “Analysis, Architectures and Modeling of Embedded Systems” In IESS 2009 - Presented in the conference


Page 29of 52

III IFIP TC International Embedded Systems Symposium and H. Posadas, E. Villar presented “Automatic HW/SW interface modeling for scratch-pad & memory mapped HW components in native source-code co-simulation” In IESS 2009. http://www.iess.org/

• XXIV Conference on Design of Circuits and Integrated Systems (DCIS2009)

Zaragoza, Spain, November 2009

The DCIS conference has evolved from its origins, more than two decades ago, into an important international meeting for researches in the highly active fields of micro and nano electronics circuits and integrated systems. It provides an excellent forum to present and investigate the emerging challenges in modeling, design, implementation and test of circuits and systems. In this conference a paper related with MULTICUBE activities has been presented.

H. Posadas, E. Villar, G. de Miguel presented paper titled as “Automatic generation of modifiable platform models in SystemC for Automatic System Architecture Exploration” In (DCIS2009), November 2009. This work proposes a XML-based methodology oriented to describe and automatically create system models of fully configurable systems. http://dcis2009.unizar.es/index.php

• Second Mini Conference on Theoretical Computer Science, 12th International Information Society Multiconference

Koper, Slovenia, October 2009

The following paper: “Design Space Exploration for Embedded Parallel System-on-Chip Platforms using modeFRONTIER” at the Second Mini Conference on Theoretical Computer Science, 12th International Information Society Multiconference, Koper, Slovenia, October 2009. was introduced by C. Kavka, L. Onesti, P. Avasare, G. Vanmeerbeeck, M. Woutersand H. Posadas. The modeFRONTIER design environment is one of the most widely used tool for multi‐objective optimization in complex engineering domains. In the EU MULTICUBE project, modeFRONTIER is being retargeted to the domain of Embedded Parallel System‐on‐Chip (SoC) design. http://www.famnit.upr.si/en/konference/mini09/

• NoCArc'09 - Second International Workshop on Network on-Chip Architectures

New York City, USA , December 2009

was held in conjunction with the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42). This workshop is focused on issues related to design, analysis and testing of on-chip networks.

The following paper related to MULTICUBE activities has been presented: A. D. Choudhury, G. Palermo, C. Silvano and V. Zaccaria, “Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips” In NoCArc'09 - Second International Workshop on Network on-Chip Architectures New York City, USA, December 2009. Here is introduced an application specific methodology for identifying optimal NoCs mappings which minimize the variance of the system power and latency and maximizes the probability that the actual system will work when deployed, even in presence of faulty NoC links. http://www.diit.unict.it/users/mpalesi/nocarc09/


Page 30of 52

• 15th International Euro-Par conference on Parallel Processing

Delft, The Netherlands, August 2009

Euro-Par is an annual series of international conferences dedicated to the promotion and advancement of all aspects of parallel and distributed computing. Euro-Par focuses on all aspects of hardware, software, algorithms and applications for parallel and distributed computing.

Two papers related to MULTICUBE activities has been presented:

‐ Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zhang, Dongrui Fan. “High Performance Matrix Multiplication on Many Cores”. In this work, is intended to identify the key architecture mechanisms and software optimizations to guarantee high performance for multithreaded programs.

‐ Guoping Long, Dongrui Fan, Junchao Zhang. “Characterizing and Understanding the Bandwidth Behavior of Workloads on Multi-core”

http://europar2009.ewi.tudelft.nl/

• DATE 2010 conference

March 2010, Dresden, Germany

DATE conference is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems.

Three papers related to MULTICUBE activities have been presented:

‐ P. Avasare, C. Couvreur, G. Vanmeerbeeck, G. Mariani, G. Palermo, V. Zaccaria, C. Silvano. “Linking run-time management with design space exploration at multiple abstraction levels” In Workshop on "Designing for Embedded Parallel Computing Platforms" held during DATE10, Dresden, Germany, March 2010.

‐ Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria, Adrian Florea, Lucian Vintan, Cristina Silvano. “Energy-Performance Design Space Exploration of SMT Architectures Exploiting Selective Load Vale Predictions”

‐ Giovanni Mariani, Vittorio Zaccaria, Gianluca Palermo, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Cristina Silvano. “An industrial design space exploration framework for supporting run- time resource management on multi-core systems”

Moreover, MULTICUBE consortium organized the MULTICUBE booth at DATE 2010 in Dresden to improve the visibility of the project in a comprehensive range of stakeholders covering academic people, industry and EDA tool vendors. At DATE 2010, it was also organized the Second Friday Workshop on “Designing for embedded parallel computing platforms: architectures, tools, and applications”, where several posters related to MULTICUBE activities have been presented. http://www.date-conference.com/date10/

• IPDPS 2010 - IEEE International Parallel and Distributed Processing Symposium

Atlanta, Georgia, USA, April 2010


Page 31of 52

IPDPS is an international forum for engineers and scientists from around the world to present their latest research findings in all aspects of parallel computation. In addition to technical sessions of submitted paper presentations, the meeting offers workshops, tutorials, and commercial presentations and exhibits.

The following paper related to MULTICUBE activities has been presented: Xiaochun Ye, Dongrui Fan, et al. “GPU-Warpsort: A Fast Comparison-based Sorting Algorithm on GPUs” In IEEE International Parallel and Distributed Processing Symposium (IPDPS 2010), Apr., 2010. In this paper, we present a new algorithm, GPUWarpsort to perform comparison-based parallel sort on Graphics Processing Units (GPUs). http://www.ipdps.org/ipdps2010/2010_advance_program.html

• GLSVLSI'10 - 20th Great Lakes Symposium on VLSI

Providence, USA, May 2010

The following paper: “Fast Instruction Cache Modeling for Approximate Timed HW/SW Co-Simulation” In GLSVLSI'10 - 20th Great Lakes Symposium on VLSI, Providence, USA, May 2010. was introduced by J. Castillo, H. Posadas, E. Villar, M. Martinez (DS2). In this paper, a high-level instruction cache model is proposed, along with the required instrumentation for native simulation. This model allows the designer to obtain cache hit/miss rate estimations with simulation speeds very close to native execution. http://www.glsvlsi.org/archive/glsvlsi10/index.html

• DAC 2010: Design Automation Conference

Anheim, CA - USA, June 2010

The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions.

The following papers related to MULTICUBE project have been presented: • Prabhat Avasare, Geert Vanmeerbeeck, Carlos Kavka, Giovanni Mariani.

“Practical approach to design space explorations using simulators at multiple abstraction levels” Design Automation Conference (DAC) User Track Sessions, Anaheim, USA, June 2010.

• Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Aleksandar Brankovic, Jovana Jovic, Cristina Silvano. “A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip” In DAC 2010: Design Automation Conference, pages 120-125, Anheim, CA - USA, June 2010. The paper received the HiPEAC Paper Award in 2010 from the HiPEAC Steering Committee. The award is given to HiPEAC members publishing a full paper in one of the top international conferences in which Europe is not usually strongly represented.

http://www2.dac.com/dac+2010.aspx

• SIES 2010 - Symposium of Industrial Embedded Systems

Trento, Italy, July 2010

The aim of the symposium is to bring together researchers and practitioners from industry and academia and provide them with a platform to report on recent developments, deployments, technology trends and research results, as well as initiatives related to embedded systems and their applications in a variety of industrial environments.


Page 32of 52

S. Real, H. Posadas, E. Villar presented the paper related to MULTICUBE: “L2 Cache Modeling for Native Co-Simulation in SystemC” In SIES 2010 - Symposium of Industrial Embedded Systems. Trento, Italy, July 2010. In this paper an efficient technique to obtain the physical address, improving previous modeling solutions for L1 caches, is proposed. Furthermore, a high-level L2 cache model has been developed and integrated in a native co-simulation environment. http://events.unitn.it/en/sies2010

• IEEE Computer Society Annual Symposium on VLSI – ISVLSI

Kefalonia, Greece, July 2010

This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems and design methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies like nano- and molecular devices, MEMS, and quantum computing.

The following paper related to MULTICUBE activities has been presented in a Special Session dedicated to European projects: C. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, R. Zafalon, S.Bocchino, M. Wouters, G. Vanmeerbeeck, P. Avasare, C. Couvreur, L. Onesti, C. Kavka, A. Turco, U. Bondi, G. Mariani, E. Villar, H. Posadas, C. Y. q. Wu, F. Dongrui, Z. Hao and T. Shibin. “MULTICUBE: Multi-objective design space exploration of multi-core architectures” In IEEE Computer Society Annual Symposium on VLSI - ISVLSI, Kefalonia, Greece, July 2010.

Then, the paper has been selected to be extended for inclusion as a Chapter in the forthcoming book entitled: “Designing Very Large Scale Integration Systems: Emerging Trends & Challenges” with Editors: N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner, publisher by Springer in 2011.

http://www.isvlsi2010.org/

Figure 11: Presentation of the MULTICUBE project at ISVLSI 2010 in Kefalonia.


Page 33of 52

VI.4. Seminar/Talks in external organizations During the project, MULTICUBE partners gave several seminars/talks in organizations external to the project to disseminate project’s concepts and scientific results:

• Title of the talk: “Power Aware Design for Next Generation's Many cores Computing Platforms" by Roberto Zafalon at Tsinghua University (Beijing); Follow up by discussion with Prof. Yang, collaboration with Chinese universities in MULTICUBE project. October 2009.

• Title of the talk: "MULTICUBE Explorer: Leveraging DoE/RSM-based Techniques to Automate Design Space Exploration for CMPs" Host: Prof. Koen Bertels, Delft Technical University. May 14th, 2009. Delft Technical University, Computer Engineering Colloquium Series.

• Title of the talk: "MULTICUBE Explorer: Leveraging DoE/RSM-based Techniques to Automate Design Space Exploration for CMPs", Speaker: Cristina Silvano. Host: Dr. Matteo Monchiero (Exascale Computing Lab, HP Labs, Palo Alto). July 29th, 2009. Location: HP Labs, Palo Alto.

• Title of the talk: “The time of Many-Core is coming”. Speaker: Fan Dongrui. Date: October, 20. Location: YOCSEF organized by China Computer Federation.

• Title of the Seminar: "Automatic Design Space Exploration for Chip- Multi Processors". Speaker: Cristina Silvano. Host: Prof. Ruby Lee, Princeton University. December 16, 2009. Location: Princeton University, Department of Electrical Engineering, Computer Engineering Seminar.

• Title of the talk: "Automatic Design Space Exploration for Chip-Multi Processors". Speaker: Cristina Silvano. Host: Dr. Marcello Lajolo (NEC Laboratories America). December 17, 2009. Location: NEC Laboratories America, Inc., Princeton Campus, Princeton (NJ - USA).

• ESTECO presented the MULTICUBE project outcome and modeFRONTIER tool to universities outside the Consortium:

o Faculty of Mathematics, Natural Sciences and Information Technologies, University of Primorska, Koper, Slovenia (14 October 2009);

o Faculty of Electrical Engineering and Computer Science, University of Maribor, Maribor, Slovenia (11 November 2009);

o Department of Electronics and Computer Science, University of Trieste, Trieste, Italy (16 November 2009);

• Title of the talk: "A Design Space Exploration Framework for Run-Time Resource Management on Multi-Core Architectures". Host: Prof. Koen Bertels, Delft Technical University. Mrch 23th, 2010. Delft Technical University, Computer Engineering Colloquium Series.

• Title of the Seminar: “Automatic Design Space Exploration for Chip Multi-Processors”, Speaker: Cristina Silvano. Host: Prof. Alex Veidenbaum, University of California. June 17, 2010. Location: Dept. of Computer Science, University of California, Irvine

• Title of the Seminar: “Automatic Design Space Exploration for Chip Multi-Processors”, Speaker: Cristina Silvano. Host: Prof. Walid Najjar University of


Page 34of 52

California Riverside. June 18, 2010. Location: Dept. of Computer Science, University of California, Riverside

• Title of the talk: “ICT’s Research Work on Many-Core Processor Design”. Speaker: Fan Dongrui. Date: May 12, 2010. Location: Huawei Technologies Co., Ltd, ShangHai.

VI.5. Organization of International Workshop • Second Friday Workshop on “Designing for embedded parallel computing platforms:

architectures, tools, and applications” at DATE 2009, April 2009, Nice, France. The project partners (namely Cristina Silvano and Maryse Wouters) were among the organizers of the Friday workshop. Several posters were presented related to MULTICUBE project methodologies and results.

• Second Friday Workshop on “Designing for embedded parallel computing platforms: architectures, tools, and applications” at DATE 2010, March 2010, Dresden, Germany. The project partners were among the organizers of the Friday workshop. During the workshop, some of the invited speakers and some of the poster presenters were focusing on spreading the knowledge on the automatic design space automation issues and challenges, such as those developed in the context of the MULTICUBE project.

• RAPIDO Workshop (Edition 2009 and 2010) was held in conjunction with the International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC). The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance systems design. Cristina Silvano is one of the co-organizers in the RAPIDO 2009 and 2010 Editions.

• International modeFRONTIER Users’ Meeting 2010, 27-28 May 2010, Trieste, Italy. Some of the project partners attended the meeting providing presentations of their experience as modeFRONTIER users in the field of MPSoC design. Among other it has been a great opportunity for discussing with engineers of other field which deals with similar problems of multi-objective optimization.

VI.6. Participation to EU organized events and workshops • MULTICUBE project was presentation by William Fornaciari at the Consultation

Workshop "Analyzing Success in European Computing Research", June 25, 2009, Brussels. Detailed information can be found on http://cordis.europa.eu/fp7/ict/computing/events-20092506_en.html

• MULTICUBE project presentation by William Fornaciari during Networked Embedded Intelligence session at the Workshop on "Computing, Embedded and Control Systems", in the context of EUBR 2009, 8-9 September 2009, Sao Paulo, Brazil. Detailed information on http://www.cce.usp.br/servicos/eubr2009/2.html


Page 35of 52

VI.7. Dissemination in other EU-Projects MULTICUBE project announcement was available on the HiPEAC2 newsletter number 17 from January’09 and downloadable from the Network of Excellence website www.HIPEAC.net. The exploitation and dissemination of SCoPE and of its MULTICUBE extensions keeped on also during other European projects: ITEA 05015 SPICES and MEDEA+ 2A741 SoftSoc. Moreover, among several dissemination activities carried out to disseminate the project results to the worldwide embedded system community we can mention also some presentation done to partners of other European projects:

• Project: FP7-Saturn. Presenter: Hector Posadas - University of Cantabria. Location: Santander - Spain, May 2009. Partners: Thales, Artisan, University of Padenburg, Exite, Intracom.

• Project: Artemis-Scalopes. Presenter: Hector Posadas - University of Cantabria. Location: Santander - Spain, Sept 2009. Partners: Vista Silicon, Technical Institute on Informatics of Valencia (ITI)

• Project: HIPEAC-2 – EDA Cluster meeting. Presenter: Cristina Silvano – Politecnico di Milano. Location: Munich - Germany, June 2009.

• Project: HIPEAC-2 – Simulation Cluster meeting. MULTICUBE project presented by Cristina Silvano – Politecnico di Milano. Location: Munich - Germany, June 2009.

• Project: HIPEAC-2 – Innovation Event, Multicube Explorer poster presented by William Fornaciari – Politecnico di Milano. Location: Edinburgh - UK, May 2010.


Page 36of 52

VI.8. International Publications Besides the participation of partners to the external international workshops and conferences presented above, several publications and communications have been made during the project’s period. Publications are important tools for disseminating the research outcomes of the project. The members of the Consortium have demonstrated a strong commitment in publishing their work in relation to the MULTICUBE project’s theme and research topics in high quality conferences, journals, etc. During the project, thanks to the improved maturity of the MULTICUBE project, a stronger cooperation in terms of joint publications among the partners (in some cases involving both academic and industrial partners) was completed. The following list (ordered chronologically) provides an overall view of 48 scientific papers published by MULTICUBE partners during the project timeframe:

2008

1. R. Baert, E. de Greef, E. Brockmeyer (IMEC). “An automatic scratch pad memory management tool and MPEG-4 encoder case study”. In Proceedings of the 45th Annual Conference on Design Automation (Anaheim, California, June 08 - 13, 2008). DAC '08. ACM, 201-204, 2008.

2. G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). "An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints." In Proceedings IEEE SASP'08 - Symposium on Application Specific Processors, Anaheim, CA, USA, June 2008

3. G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). "An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods." In Proceedings of IEEE IC-SAMOS'08 - Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July 2008

4. C. Baloukas, J. Risco-Matin, D. Atienza, C. Poucet, L. Papadopoulos, S. Mamagkakis, D.Soudris, J. Hidalgo (IMEC). “Methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems”. In Journal of Systems and Software, Sept ‘08

5. G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). "Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration." In Euromicro Proceedings of DSD'08 - Conference on Digital System Design. Parma, Italy, September 2008

6. G. Mariani (ALARI-USI), G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). "An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks." In Proceedings of IFIP VLSI-SoC 2008, International Conference on Very Large Scale Integration of System-on-Chip. Rhodes Island, Greece, October 2008

7. L. Fiorin (ALARI-USI), G. Palermo, and C. Silvano (Politecnico di Milano). "A Security Monitoring Service for NoCs." In proceedings of CODES+ISSS'08 - IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. Atlanta, Georgia, USA, October 2008

8. G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). "Robust Optimization of SoC Architectures: A Multi-Scenario Approach." In Proceedings of ESTIMedia 2008 - IEEE Workshop on Embedded Systems for Real-Time Multimedia. Atlanta, Georgia, USA, October 2008


Page 37of 52

2009

1. G. Palermo, C. Silvano, V. Zaccaria(Politecnico di Milano). "Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures." In Proceedings of ASP-DAC 2009, 14th Asia and South Pacific Design Automation Conference. Yokohama, Japan, January 2009

2. G. Palermo, C. Silvano, and V. Zaccaria (Politecnico di Milano). “A DoE/RSM-based Strategy for an Efficient Design Space Exploration Targeted to CMPs” In the1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO’09)”, Paphos, Cyprus, January 2009

3. L.Fiorin (ALARI-USI), G. Palermo and C. Silvano (Politecnico di Milano). “MPSoCs Run-Time Monitoring through Networks-on-Chip” In proceedings of DATE 2009, Conference on Design, Automation & Test In Europe. Nice, France, April 2009.

4. C. Kavka (ESTECO), P. Avasare (IMEC), G. Vanmeerbeeck (IMEC), M. Wouters (IMEC), H. Posadas (UC). “Design space exploration for embedded parallel system-on-chip platforms using modeFRONTIER” In Workshop on "Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications" held during DATE09. Nice, France, April 2009.

5. C. Silvano, G. Palermo, V. Zaccaria, W. Fornaciari, R. Zafalon, S. Bocchio, M. Martinez, M. Wouters, G. Vanmeerbeeck, P. Avasare, L. Onesti, C. Kavka, U. Bondi, G. Mariani, E. Villar, H. Posadas, C. Y. Q. Wu, F. Dongrui, and Z. Hao. “MULTICUBE: Multi-Objective Design Space Exploration of Multiprocessor Architectures for Embedded Multimedia Applications” In Workshop on "Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications" held during DATE09. Nice, France, April 2009.

6. P. Avasare, G. Vanmeerbeeck, M. Wouterss, B. Vanthournouts, H. Posadas. “High-level performance estimation using simulators at multiple abstraction levels” In Workshop on "Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications" held during DATE09. Nice, France, April 2009.

7. G. Mariani, G. Palermo, C. Silvano, V. Zaccaria. “Multicube Explorer - A Design Space Exploration Framework for Embedded Systems-on-Chip” In Workshop on "Designing for Embedded Parallel Computing Platforms: Arctitectures, Design Tools, and Applications" held during DATE09. Nice, France, April 2009.

8. Lei Yu, Zhiyong Liu, Dongrui Fan, Fenglong Song, Junchao Zhang, Nan Yuan. “Study on Fine-grained Synchronization in Many-Core Architecture” In Proceedings of the 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing (SNPD 2009), May 27~29, 2009

9. G. Mariani (ALARI-USI), G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). “A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip” In Proceedings IEEE SASP'09, San Francisco, CA, USA, July 2009, pp. 21-28.

10. G. Mariani (ALARI-USI), G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). “Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques” In Proceedings of IEEE IC- SAMOS'09, Greece, July 2009, pp. 118-124.

11. G. Mariani (ALARI-USI), G. Palermo, C. Silvano, V. Zaccaria (Politecnico di Milano). ”Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip” In Euromicro Proceedings of DSD'09 - Conference on Digital System Design. Patras, Greece, August 2009, pp. 383-389.

12. Fenglong Song, Zhiyong Liu, Dongrui Fan, He Huang, Nan Yuan, Lei Yu, Junchao Zhang. “Evaluation Method of Synchronization for Shared-Memory On-Chip Many-Core Processor”


Page 38of 52

In Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-09), Aug 10~12, 2009, pp.571-576.

13. Yongbin Zhou, Junchao Zhang, Shuai Zhang, Nan Yuan, Fan Dongrui. “Data Management: The Spirit to Pursuit Peak Performance on Many-Core Processor” In Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-09), Aug 10~12, 2009.

14. Guoping Long, Dongrui Fan, Junchao Zhang. “Characterizing and Understanding the Bandwidth Behavior of Workloads on Multi-core” In Euro-Par 2009 international conference on Parallel Processing, Delft, Netherlands. August 2009 .

15. Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zhang, Dongrui Fan. “High Performance Matrix Multiplication on Many Cores” In proceedings of the 15th international Euro-Par conference on Parallel Processing, Delft, Netherlands. August 2009.

16. Rettberg, M. Zanella, M. Amann, M. Keckeiser, F. Rammig (Eds.). “Analysis, Architectures and Modelling of Embedded Systems” In IESS 2009 - Presented in the conference III IFIP TC International Embedded Systems Symposium

17. H. Posadas, E. Villar. “Automatic HW/SW interface modeling for scratch-pad & memory mapped HW components in native source-code co-simulation” In IESS 2009.

18. Xiaochun Ye, Dongrui Fan, Wei Lin. “A Fast Linear-Space Sequence Alignment Algorithm with Dynamic Parallelization Framework” In IEEE 9th International Conference on Computer and Information Technology (CIT2009), Oct 11~14, 2009.

19. Wei Lin, Nan Yuan, Dongrui Fan, He Huang. “A Low-Complexity Synchronization Based Cache Coherence Solution for Many Cores” In IEEE 9th International Conference on Computer and Information Technology (CIT2009), Oct 11~14, 2009.

20. Kavka, L. Onesti, P. Avasare, G. Vanmeerbeeck, M. Woutersand H. Posadas. “Design Space Exploration for Embedded Parallel System-on-Chip Platforms using modeFRONTIER” at the Second Mini Conference on Theoretical Computer Science, 12th International Information Society Multiconference, Koper, Slovenia, October 2009.

21. Dongrui Fan “The time of Many-Core is Coming” In YOCSEF Conference organized by China Computer Federation, Beijing, China. October 20, 2009

22. H. Posadas, E. Villar, G. de Miguel. “Automatic generation of modifiable platform models in SystemC for Automatic System Architecture Exploration” In (DCIS2009), Zaragoza, Spain. November 2009.

23. D. Choudhury, G. Palermo, C. Silvano and V. Zaccaria. “Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips” In NoCArc'09 - Second International Workshop on Network on-Chip Architectures New York City, USA, December 2009.

24. Gianluca Palermo, Cristina Silvano and Vittorio Zaccaria. “ReSPIR: A Response Surface-based Pareto Iterative Refinement for Application-Specific Design Space Exploration” In IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems. Volume 28 Issue 12, December 2009 pp. 1816-1829.


Page 39of 52

2010 1. Guoping Long, Diana Franklin, Susmit Biswas, Pablo Ortiz, Jason Oberg, Dongrui Fan,

Frederic T. Chong. Minimal Multi-Threading. “Finding and Removing Redundant Instructions in Multi-Threaded Processors” In the proceedings of 43rd International Symposium on Microarchitecture (Micro 43). 2010.

2. H. Posadas, E. Villar. “Modeling Separate Memory Spaces in Native Co-simulation with SystemC for Design Space Exploration” In 2PARMA - Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures, Hannover, Germany. February 2010.

3. Vittorio Zaccaria, Gianluca Palermo, Giovanni Mariani, Fabrizio Castro, Cristina Silvano. “Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors” In 2PARMA - Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures. Hannover, Germany. February 2010 pp. 325-331.

4. P. Avasare, C. Couvreur, G. Vanmeerbeeck, G. Mariani, G. Palermo, V. Zaccaria, C. Silvano. “Linking run-time management with design space exploration at multiple abstraction levels” In Workshop on "Designing for Embedded Parallel Computing Platforms" held during DATE10, Dresden, Germany. March 2010.

5. Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria, Adrian Florea, Lucian Vintan, Cristina Silvano. “Energy-Performance Design Space Exploration of SMT Architectures Exploiting Selective Load Value Predictions” In DATE 2010 - International Conference on Design, Automation and Test in Europe. Dresden, Germany. March 2010

6. Giovanni Mariani, Vittorio Zaccaria, Gianluca Palermo, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Cristina Silvano. “An industrial design space exploration framework for supporting run- time resource management on multi-core systems” In DATE 2010 - International Conference on Design, Automation and Test in Europe. Dresden, Germany. March 2010

7. Xiaochun Ye, Dongrui Fan, et al. “GPU-Warpsort: A Fast Comparison-based Sorting Algorithm on GPUs” In IEEE International Parallel and Distributed Processing Symposium (IPDPS 2010), Apr., 2010

8. J. Castillo, H. Posadas, E. Villar, M. Martinez.“Fast Instruction Cache Modeling for Approximate Timed HW/SW Co-Simulation” In GLSVLSI'10 - 20th Great Lakes Symposium on VLSI. Providence, USA. May 2010.

9. P. Avasare, G. Vanmeerbeeck, C. Kavka. “Design space exploration methodology in Multi-Processor System-on-Chip (MPSoC) embedded systems” In the International modeFRONTIER Users meeting, Trieste, Italy, May 2010.

10. Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Aleksandar Brankovic, Jovana Jovic, Cristina Silvano. “A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip” In DAC 2010: Design Automation Conference, pages 120-125, Anheim, CA - USA, June 2010.

The paper received the HiPEAC Paper Award in 2010 from the HiPEAC Steering Committee. The award is given to HiPEAC members publishing a full paper in one of the top international conferences in which Europe is not usually strongly represented.

11. Prabhat Avasare, Geert Vanmeerbeeck, Carlos Kavka, Giovanni Mariani. “Practical approach to design space explorations using simulators at multiple abstraction levels” Design Automation Conference (DAC) User Track Sessions, Anaheim, USA, June 2010.

12. Turco, C. Kavka: “MFGA: a GA for complex real-world optimization problems” Proceedings of BIOMA 2010 edited by B. Filipic and J. Silc.


Page 40of 52

13. Turco, C. Kavka: “MFGA: a GA for complex real-world optimization problems” to appear in International Journal of Innovative Computing and Applications (IJICA) (2010).

14. S. Real, H. Posadas, E. Villar. “L2 Cache Modeling for Native Co-Simulation in SystemC” In SIES 2010 - Symposium of Industrial Embedded Systems. Trento, Italy. July 2010.

15. Silvano, W. Fornaciari, G. Palermo, V. Zaccaria, F. Castro, M. Martinez, R. Zafalon, S.Bocchino, M. Wouters, G. Vanmeerbeeck, P. Avasare, C. Couvreur, L. Onesti, C. Kavka, A. Turco, U. Bondi, G. Mariani, E. Villar, H. Posadas, C. Y. q. Wu, F. Dongrui, Z. Hao and T. Shibin. “MULTICUBE: Multi-objective design space exploration of multi-core architectures” In IEEE Computer Society Annual Symposium on VLSI – ISVLSI 2010, Kefalonia, Greece, July 2010.

The paper has been selected to be extended for inclusion as a Chapter in the forthcoming book entitled: “Designing Very Large Scale Integration Systems: Emerging Trends & Challenges” with Editors: N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner, publisher by Springer in 2011.

16. Gianluca Palermo, Cristina Silvano and Vittorio Zaccaria. "A Variability-Aware Robust Design Space Exploration Methodology for CMPs", ACM Transactions on Embedded Computing Systems. Accepted for publication. To appear 2010.


Page 41of 52

VII. MULTICUBE Book In 2010, the MULTICUBE consortium signed with Springer, New York, USA an agreement to publish a book on the achievements of the MULTICUBE project. The title is “Multi-objective design space exploration of multiprocessor SoC architectures: the MULTICUBE approach”. Editors: William Fornaciari, Cristina Silvano, Eugenio Villar. The book is divided in two parts, the first one covers the methodological aspects of the MULTICUBE framework while the second part shows some case studies covered during the project to demonstrated how and when the proposed concepts and methodologies can be applied to design space exploration of future MPSoC architectures. The overall table of content is here reported hereafter.


Page 42of 52

PART I: Methodologies and Tools

Chapter 1: The MULTICUBE Design Flow The Multi-Objectives approach to the design developed during the MULTICUBE project: the methodology, the tools and the tool interface

Chapter 2: High-level Modeling based on MULTICUBE-Scope Simulation of Architecture and Applications tailored to support design space exploration

Chapter 3: Optimization Algorithms for Embedded System Design Exploration Multi-objective optimization algorithms targeted to DSE for Embedded Systems Design

Chapter 4: Response Surface Modeling for Embedded System Design Exploration The innovative approach to quickly analyze the design space, while reducing simulation time and achieving a “robust” solution in the “Pareto sense”.

Chapter 5: Design Space Exploration Supporting Run-Time Resource Management on Multi-Core Systems

Design methodology enforcing the capability of the systems to adapt to the changing of the execution environment and/or of the application requirements

Chapter 6: Run-time Resource Management at the Operating System level Analysis of the problem and of the existing (Linux-based) frameworks and approaches to manage at run-time the resources, to dynamically tune the system to the application needs and user goals.

Part II: Application Domains

Chapter 7: High-level modeling of a Power Line Communication SoC Case study focusing of the problem of modeling low-medium end, control dominated embedded systems

Chapter 8: Design space exploration of parallel architectures Case study showing the application of the DSE methodologies to parallel architectures, emphasizing the industrial perspective of the problem and the need of a tool-based design flow

Chapter 9: Design Space Exploration of a reconfigurable system for supporting video streaming run-time management

Case study to put emphasis on the domain of Multimedia applications, with run-time support

Conclusions The big picture, what the reader can do with the downloadable tools, perspectives of the field, how to probe further.


Page 43of 52

VIII. Various dissemination activities Besides the main dissemination channels described in the previous sections, various activities have contributed toward the dissemination of the MULTICUBE project. The goal for this was to present the Consortium and the main objectives of the project and also to give an identity of its own to the MULTICUBE research program. Among those activities:

• A general informative poster of the MULTICUBE has been prepared by the Consortium. The poster, available for download on the public website section About MULTICUBE, is meant to give general information on the objectives and scientific approach of the project. The design of the poster is in line with the project’s identity and at the moment the poster is used in conferences, workshops, and various events for enhancing the visibility and reach of the project. A copy of the poster is reported in Appendix I.

• MULTICUBE leaflet is available on the public website section About MULTICUBE for download. Leaflets are important support material for dissemination. As printed materials, they have been used for visibility in conferences, workshops and fairs. The flyers give general information about the project aims and vision. A copy of the leaflet is reported in Appendix II.

• Information about the MULTICUBE project has been disseminated through the HiPEAC2 NoE newsletter (published in January 09 and available at http://www.hipeac.net/node/2738). The aim of the newsletter is to establish a link between the partners of the MULTICUBE research community and the HiPEAC2 scientific community.

• The MULTICUBE GLOSSARY summarizes the list of main terms and acronyms used in the MULTICUBE project. The glossary can be found in the list of Public Document section of the MULTICUBE web site and it is reported hereafter as Appendix III.


Page 44of 52

IX. Dissemination plans after the end of the project Dissemination plans for the next period are related to further increase the visibility of project exploitable results mainly by enforcing the dissemination channels already used during the project timeframe. To further disseminate the knowledge and methodologies achieved during the MULTICUBE project, some of the partners have plans to submit some proposals for workshops and tutorials on the topic of Automatic Design Space Exploration to be considered by the Technical Program Committees of international conferences in the field of Computer Architectures and Embedded Systems design. Some workshops are already scheduled in 2011: RAPIDO Workshop co-located with HiPEAC 2011; Third Friday Workshop on “Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications” co-located with DATE 2011. There are plans for organizing a workshop to be co-located with the COMES Workshop (within the frame of the Swiss Federal Project Nano Tera) in order to facilitate the dissemination through other groups external to MULTICUBE project; in particular, the workshop will target the world of SMEs, to introduce the possibility of exploiting DSE methodologies and tools even in such environment. The MULTICUBE website still remains at the center of the project future dissemination plans. The MULTICUBE website together with the websites where the open source tools are distributed will be hold online for at least future 5 years. After the end of the project, open-source tools and public deliverables will be available on the public website for providing to possible users a deeper understanding of the project results. For facilitating the potential customers to obtain information about how to use the MULTICUBE framework and what benefits can be expected, a didactic online path will be organized around the public demonstrator (released as D4.2.3) and the open-source tools developed within the project. The user will be so driven to the pages where he/she will be able to download tools and realize an exemplar integration of the overall design flow. The book to be published by SPRINGER in 2011 will represent one of the most important vehicles for disseminating the project concepts and results after the end of the project.


Page 45of 52

X. References [1] MULTICUBE F7-216693 Annex I: Description of work [2] D5.1.1 Set up the Website with public and private area [3] D5.1.2 Dissemination plan (Initial version) [4] D5.1 Exploitation plan (Initial version) [5] D6.3 Periodic Progress report for Second year [6] D6.2 Periodic Management Report for Second year [7] D6.6 Periodic Management report for Third year


Page 46of 52

XI. Appendix I: Project Poster

Figure 12: MULTICUBE Poster


Page 47of 52

XII. Appendix 2: Project Leaflet

Figure 13: MULTICUBE leaflet, front and back side


Page 48of 52

XIII. Appendix III: MULTICUBE Glossary

MULTICUBE GLOSSARY [Ver.6]

June. 30th 2010

• API ‐ Application Programming Interface o Set of functions provided by an infrastructure that can be used by the application

developers to program the application code. • Application

o A computer program which is intended to perform a specific task. An application includes an executable file which is invoked to run the desired program.

• Approximately timed: o A modeling style for which there exists a one‐to‐one mapping between the externally

observable states of the model and the states of some corresponding detailed reference model such that the mapping preserves the sequence of state transitions but not their precise timing. The degree of timing accuracy is undefined.

• Approximately‐timed model o Add a notion of timing on top of functional level model. This timing is usually fed

externally into simulations at places where, in reality, time is spent in an operation (e.g. communication, processing or waiting for system resource).

• ASIC (Application‐Specific Integrated Circuit) o The common name for semi‐custom integrated circuits. A type of chip which is

composed of standard building blocks called cells that are designed to implement a specific customer application. These may include digital, linear, and mixed‐level circuits

• Automatic Design Space Exploration o Automatic version of the design space exploration. It works without the designer in

the loop. • Benchmark

o A design test case which is used to measure the capabilities, limitations, and breakthroughs reported for newly proposed and existing algorithms, architectures and tools.

• Behavioral modeling o System‐level modeling consisting of a functional specification plus modeling of the

timing of an implementation. A behavioral model consists of an HDL description of a device or component which is expressed at a relatively high level of abstraction (higher than the register‐transfer level or gate level). It uses underlying mathematical equations to represent the functional behavior of the component.

• Black box optimization o Optimization performed without any knowledge of the target problem except for

input and output variables. • CAD (Computer‐Aided Design)

o The electronic design automation of projects that were previously under manual methods considered to be drafting functions;

• CAE (Computer‐Aided Engineering) o The electronic design automation of projects that were previously under manual

methods considered to be electronic engineering functions


Page 49of 52

• Cycle accurate o A modeling style in which it is possible to predict the state of the model in any given

cycle at the external boundary of the model and thus to establish a one‐to‐one correspondence between the states of the model and the externally observable states of a corresponding RTL model in each cycle, but which is not required to explicitly re‐evaluate the state of the entire model in every cycle or to explicitly represent the state of every boundary pin or internal register. This term is only applicable to models that have a notion of cycles.

• Design cycle o The period of time required to complete an electronic design of any type, from

concept to production. • Design entry

o The process of creating a new design of any type — chip, board, module, or system — using textual and/or graphical tools such as schematic capture or other high‐level graphical methods, hardware description languages, Boolean equations, or other methods.

• Design flow o A series of connected processes used within the design cycle

• Design of Experiments, DoE: o Techniques that allow to perform a smart exploration of the design space by

extracting as much information as possible from a limited number of evaluations. They are used to identify the planning of experimentation campaign.

• Design Space: o Set of all possible design configurations.

• Design Space Exploration, DSE o Design phase used to evaluate different design alternatives by tuning the system

parameters. • Design Space Exploration Tool

o Tool that allows to specify and solve the exploration problem in terms of optimization metrics and constraints. Moreover it provides estimates of the optimal configurations of the use case and automatically interacts with the use case simulator.

• Design‐time Design Space Exploration o DSE phase done at design time to tune statically the system parameters.

• Dynamic evaluation o Simulation based system evaluation.

• Electronic system level (ESL) o The utilization of appropriate abstractions in order to increase comprehension about

a system, and to enhance the probability of a successful implementation of functionality in a cost‐effective manner.

• Exploration architect: o Designer responsible for interacting with the design space exploration tool, specifying

and running optimization strategies for the target Use Case and analyzing the DSE results.

• Framework o A computing architecture for integrating products from multiple vendors which

includes data representation, design data management, methodology management, a user interface, an extension language, and inter‐tool communication

• Functional Level Model o It is a high‐level model of digital systems where only the functionality of the different

components and their interactions with each other is modeled. This model does not


Page 50of 52

usually contain any timing information associated with communication or processing and hence this model simulates the fastest.

• HAL ‐ Hardware Abstraction Layer: o Part of the operating system that allows creating the rest of the OS independently

from the underlying platform. It is modified when the os is going to be executed in a different platform.

• HdS ‐ Hardware‐dependent Software o Part of the software highly dependent on the Hw platform and that must be rewritten

when the code is moved to another platform. • IP‐Core

o A reusable block of semiconductor intellectual property • IP‐XACT

o XML format that can be used to define and describe electronic components and their interconnections. It is a IEEE standard developed to enable automated configuration and integration through tools.

• ISS ‐ Instruction Set Simulator o Simulator of a processor that reads binary code for that processor and executes the

code instruction by instruction. • Levels of abstractions

o When a digital system is modeled, it can be modeled at various different level of abstraction. More close the model is to the real system, more accurate it becomes, but at the same time it simulates much slower. So various abstraction levels are defined in system models in order to make a trade‐off between accuracy and simulation time.

• MPEG‐4 (also called as MP‐4) o MPEG‐4 (Moving Picture Experts Group‐4) is a standard for compressing video into a

compact file without losing a significant amount of its quality. Used for the transmission and storage of images and video clips.

• Multi‐objective Optimization, MOO o Multi‐objective optimization (or programming), also known as multi‐criteria or multi‐

attribute optimization is the process of simultaneously optimizing two or more conflicting objectives subject to certain constraints.

• Multiprocessor System on‐Chip Architecture, MPSoC o Single chip architecture composed of two or more processors usually targeted for

embedded applications. It is used by platforms that contain multiple, usually heterogeneous, processing elements with specific functionalities reflecting the need of the expected application domain, a memory hierarchy (often using scratchpad RAM and DMA) and I/O components.

• Parameter o A means by which an application or user can customize the behavior or characteristics

of a model instance when it is created. A parameter is set to a constant value during design entry

• PLC, PowerLine Communication o Powerline communications (PLC) are systems for carrying data on a conductor also

used for electric power transmission. All power line communications systems operate by impressing a modulated carrier signal on the wiring system. Different types of powerline communications use different frequency bands, depending on the signal transmission characteristics of the power wiring used.


Page 51of 52

• POSIX ‐ Portable Operating System Interface [for uniX] o Standards specified by the IEEE to define the application programming interface (API),

along with shell and utilities interfaces for software compatible with variants of the Unix operating system, although the standard can apply to any operating system.

• RTOS ‐ Real‐Time Operating System o Operating system with Real‐Time qualities, as small, bounded latencies, real‐time

services. • Register Transfer Level Model or RTL model

o RTL model describes the electronic system in a high‐level hardware description language that describes the registers of a system (and transfer of data between registers) at a low level of abstraction. VHDL and Verilog are examples of RTL languages.

• Response surface modeling o It is a technique used to create mathematical models for the relationship between

one or more responses and a set of input variables. • Run‐Time Design Space Exploration

o DSE phase done when the system is working. It is used to select the system parameters which are run‐time tunable (i.e. working frequency and application mapping). A set of optimal configurations for the system is obtained at design time, while at run‐time the best configuration is selected considering working conditions.

• Run‐Time Manager: o It is a module (HW or SW) which has in charge the management of the system at run‐

time • Simulator

o It is the executable model of the use case and it provides the value of the estimated metrics, for a specific configuration of the architecture

• Simulation model o Simulation Model is a software‐based model designed to replicate the timing and

behavior of an IC design for the purposes of verification and debugging. • System metrics

o Metrics describing the behavior of the whole system. They are obtained considering the system as a black box (also called output variables) and used to drive the design space exploration phase.

• SystemC: o Set of C++ classes and macros which provide an event‐driven simulation kernel in C++,

which in certain aspects mimics the hardware description languages VHDL and Verilog, but more oriented to be used as a system‐level modeling language.

• Static evaluation o System evaluation based on analytical models

• Transaction level (TL) o The abstraction level at which communication between concurrent processes is

abstracted away from pin wiggling to transactions. This term does not imply any particular level of granularity with respect to the abstraction of time, structure, or behavior.

• Transaction level model, transaction level modeling (TLM) o A model at the transaction level and the act of creating such a model, respectively.

Transaction level models typically communicate using function calls, as opposed to the style of setting events on individual pins or nets as used by RTL models. Moreover, It is a high‐level abstraction model of digital systems where details of communication among different components are separated from the details of the implementation of functional units or of the communication architecture. This is used to explore


Page 52of 52

different design architectures without the overhead of designing or simulating the details of how particular transforms may be implemented.

• Use case o Combination of the target architecture and application running on it.

• Use case and simulator provider o It is the user agent that has in charge to release the use case (architecture and

application), the use case simulator program and the definition of the use case design space.

• Virtual platform o Virtual platforms are software models of complete systems that provide software

engineers with high‐speed, pre‐silicon development environments months before hardware is available. Virtual platforms enable concurrent development of hardware and software, significantly shortening embedded system suppliers’ hardware/software integration time and accelerating their products to market. Because they are based on software models, virtual platforms offer unmatched effectiveness for developing and debugging multi‐core designs.

• XML ‐ eXtensible Markup Language o Set of rules for encoding documents in machine‐readable form. It is a textual data

format oriented to emphasize simplicity, generality, and usability in the representation of arbitrary data structures.