EE 344 Electronics Design Lab

Digitally Programmable Analog Computer forSolving Non-linear Dynamical Systems

Project Report

Guide: Prof. Mukul C. Chandorkar Parthasarathi Khirwadkar - 16D070001Pranil Joshi - 16D070008

Sarthak Consul - 16D100012

Department of Electrical EngineeringIndian Institute of Technology

India15 April 2019

EDL2019 - DD04

Abstract

Mathematical modelling is an essential part of engineering. Many real-life scenarios can bemodelled as a multi-state differential equation. In some scenarios, it is possible to approximate thesystem as linear under certain assumptions. However, linearity is not guaranteed, nor is a goodapproximation for many engineering problems. For example, hardware-in-loop problems appear inseveral fields like power electronics, robotics and more. Although simulating such systems on acomputer is assured to give precise results, it is computationally expensive, slow and consumes alot of power, due to the iterative algorithms used for this purpose. Representing such systems usinganalog circuits can be much faster and requires a fraction of the power consumed by digital computer.Analog circuits have the capability to settle within the neighbourhood of the precise solution in afraction of the time. The down side to these circuits, however, is the potential inaccuracy in thesolution that could arise as a result of noise added to the system by each analog component. It iswith the intent to find a convenient middle ground that we look to explore a hybrid circuit that takesthe best of both the analog and digital worlds, and presents an excitingly fast simulation techniquewith many future applications. Combining the speed and efficiency of analog simulation with theprecision of digital system can make simulation of differential equations much cheaper.

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CONTENTS EDL2019 - DD04

Contents

Abstract 2

1 Introduction 31.1 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Background and Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3 System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 System Overview 42.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.2 Required Subsystems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2.1 Digital Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2.2 Analog Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2.3 Power Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Project Implementation 63.1 Power Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.2 Analog Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2.1 Down-shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.2.2 Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.2.3 Up-shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.2.4 Voltage Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.3 Digital Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.3.1 Microcontroller, ADC and DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.3.2 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.3.3 Setting up Initial Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Testing and Evaluation of Board 9

5 Experiments and Results 115.1 Single Variable Linear ODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.1.1 Sinusoidal Forcing Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115.1.2 Square Wave Forcing Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.1.3 Triangular Wave Forcing Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.2 Single Variable Linear ODE transients and initial conditions . . . . . . . . . . . . . . . . . . . . . 135.3 Two Variable Linear ODE (RLC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145.4 Single Variable Non-linear equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155.5 Non-Linear second-order ODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165.6 Van der Pol Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6 Future Prospects 16

7 Acknowledgements 17

Appendix A Programming Guide 17

Appendix B Jumper Connections 18

Appendix C Source of Misery - TS12A44514 19

References 19

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1. INTRODUCTION EDL2019 - DD04

1 Introduction

In this section, we begin by defining the objectives of the project, the motivation behind the choice, and thedesired system specifications.

1.1 Objectives

• To build a single board hybrid analog-digital computer capable of solving 8th order non-linear dynamicsystems described by

∂xk(t)

∂t= fk

(x1, x2, .., x8, u1(t), .., u4(t)

)for k ∈ 1, 2, ...8 (1)

The functions fk may contain non-linearities like products or trigonometric functions of the state variablesxk and forcing functions ui(t) for i = 1, 2, 3, 4.

• To demonstrate solutions to various linear and non-linear systems consisting of different numbers ofstate variables and forcing functions, and to evaluate the solutions obtained based on their accuracy andreliability.

1.2 Background and Motivation

The current project is an ambitious extension of a previously completed EDL project [1]. A successful attemptwas made to solve linear differential equations of up to 5th order through an entirely analog circuit.

Research in the area of analog accelerator for solving differential equations was extensively carried out atColumbia University (see [2], [3]). The approach described by [2] represented the state variables by analogcurrents which makes it easy to add variables by combining the currents onto a single node. The paper alsoimplements non-linear functions using look-up tables in SRAM using continuous time digital circuits and intro-duce a circuit to set initial conditions.

The goal now is to implement solution of non-linear differential equations by computing the terms through afast microcontroller instead of an analog circuit. This strikes the most convenient balance between the abilityof microcontrollers to digitally compute non-linear terms and the speed of computation of analog circuits.

Such a system poses several challenges that need to be tackled before it can be realized. The primary one isthat of integrating the analog and digital components of the circuit. The conversion of an analog signal to itssampled, digitized form and back again, demands a system that can sample and perform computations at highfrequencies. Special care has to be taken to ensure the difference in speeds of both types of operations does notcause significant deviations from the solution or cause the system to become unstable and diverge.

1.3 System Specifications

1. The Digitally Programmable Analog Computer can solve non-linear differential equations with at mosteight state variables. The equations are of the type :

∂xk(t)

∂t= fk(x1, x2, .., x8, u1(t), ..., u4(t)) for k ∈ 1, 2, ...8 (2)

2. There are at most four non-zero forcing functions uk

3. The system should provide accurate solutions to sinusoids of frequencies in the range of 600 Hz to 4 kHz.

4. The system should also have an inbuilt power management system and hence be directly connected todomestic power sockets.

5. The microcontroller will be powered by either the common power supply or the mini-USB port connectedto a computer. The USB connection will facilitate programming the microcontroller to set up requiredcomputations.

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2. SYSTEM OVERVIEW EDL2019 - DD04

2 System Overview

This section aims to paint a broad sketch of what the final system will consist of, and how each of the subsystemswill function.

The circuit consists of eight identical loops, each meant for one state variable. For each state variable, an analogintegrator is given the function as an input. The outputs of the integrator are estimates of the state variable andare each passed through an ADC to a microcontroller, where they are used (along with the forcing function(s))to compute the functions fk. The microcontroller, digitally, computes the non-linear functions and passes it tothe aforementioned analog integrators, through a DAC, thus completing the loop.

Now, the analog integrators that we mentioned will be made of simple op-amp circuits that will have a non-constant transfer function dependent on the passive components used in it. The frequency range must besatisfied by providing the option of variable passive components so as to prevent unacceptably high attenuationfor that frequency.

Having a digital module also adds additional flexibility and features such as:

1. A larger range of functions, both linear and non-linear, and any choice of coefficients can be used.

2. Initial conditions of the state variables can be set-up

3. The ADC can be protected by having the microcontroller short the integrator capacitor in case of consistenthigh voltage input. This would result in the ADC input being lowered to the base value of 1.5V.

Details of each subsystem will be elaborated in the subsequent section. One may refer to Figure 3 for a blockdiagram for a visual representation.

2.1 Block Diagram

Figure 1: Block Diagram

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2. SYSTEM OVERVIEW EDL2019 - DD04

2.2 Required Subsystems

2.2.1 Digital Subsystem

The digital subsystem, and the microcontroller in particular, is the heart of our circuit. The primary job of thedigital portion of the circuit is to compute the expressions of the first order derivatives in terms of the forcingfunctions being taken as inputs and the instantaneous values of the state variables. It also selects the appropri-ate frequency range to operate on by configuring the programmable switches and sets the initial conditions ofevery state variable.

The digital subsystem is interfaced with the analog circuit through a suitable Digital-to-Analog Converter(DAC) and an Analog-to-Digital Converter (ADC) combination.

2.2.2 Analog Subsystem

Figure 2: Analog Circuit Diagram

The analog subsystem has the main purpose of computing the integral. Analog integrators are preferred overdigital accumulators due to their faster convergence and inherently greater numerical stability (as method isimplicit) 1

As both the ADC and DAC are unipolar, down (or up) shifters have to be employed before (or after) theintegrator. If this is not done, the integrator would receive a unipolar signal and saturate. A voltage limitercircuit has been designed to prevent over-voltages from damaging the ADC.

2.2.3 Power Subsystem

The opamps (of the integrators, up/down-shifters and buffers) require rail voltages of ±5V . Meanwhile, themicroprocessor requires a voltage of 3.3V. The power subsystem is meant to convert 240V AC supply fromthe mains to the required DC levels. A 50Hz transformer first steps down 240V AC to 12V AC which is thenrectified by a full bridge rectifier. This rectified voltage is then supplied to the voltage regulators to get therequired DC levels.

Figure 3: Power Subsytem Overview

1using Analog itegrators instead of digital accumulators convert the solution scheme from the standard Euler method (explicit)to the Backward Euler Method (implicit)

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3. PROJECT IMPLEMENTATION EDL2019 - DD04

3 Project Implementation

We initially designed and tested single complete Analog-Digital loop on a breadboard using the Launch PadLAUNCHXL F28379D which uses the TMS320F28379D Delfino microcontroller by TI. We used this LaunchPad as the onboard microcontroller comes with in-built ADC and DAC although we are using TMS320F28069microcontroller which only has a in-built ADC.After bread boarding the design, Autodesk EAGLE (version 9.3.0 Education license) was used to design thecomplete PCB. The final board was fabricated by PCB Power Market. We chose all passive components to beof the surface-mount type (of package 1206) because they have much tighter tolerances than their through-holecounterparts in addition to being smaller. The components where ordered from Element14 and DigiKey.

Figure 4: Final PCB layout

The complete circuit lies in a double-sided PCB of dimension 148.36 mm x 164.36 mm.

Figure 5: Top View of PCB

For schematic and layout files along with the codes used in the subsequent sections, refer to this Githubrepository.

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3. PROJECT IMPLEMENTATION EDL2019 - DD04

3.1 Power Subsystem

Figure 6: Circuit Diagram of Power Subsystem

The input to the power management circuit is a 12V, 50Hz voltage from the transformer. A full-bridge dioderectifier has been employed to convert this to DC voltage. Voltage regulator ICs, LM7805 and LM7905 havebeen used to generate +5V and -5V DC voltages. These act as the rail voltages for all the analog components.Meanwhile, a low-dropout (LDO) voltage regulator, TPS7333 is used to obtain the +3.3V supply for the mi-crocontroller.

We have also ensured that the microcontroller, alone, can draw power from the USB port. This is done toease the testing of the microcontroller. We have given the provision to toggle between power source of themicrocontroller from the transformer and the USB jumper. Thus, if need be, the board can be used remotely,without a connection to a computer via USB.

It is important to note here, that the entire digital subsystem can be powered through the USB connectionalone, and the analog subsystem can draw its own power from the transformer output after rectification. Hence,by default, the ground voltage levels need not be the same for both the parts. In most projects like this one,this mutual exclusion is quite desirable to some extent - we would not want the noise in the digital ground level,caused due to continuous and rapid switching of voltage levels between high and low, to affect the fidelity ofthe signals in the analog portion of the circuit. Hence, instead of designing a PCB with a contiguous groundplane, we have made one in which there are two separated analog and digital ground connections, shorted onlyby a 0 Ω resistor instead.

Decoupling Capacitors of 0.1µF have been used at the power supply pins of every IC. The same has been addedat the output pins of the voltage regulator ICs to improve the reference voltage quality. Larger decouplingcapacitors of 470µF and 1000µF have been placed around the voltage regulators, LM7805 and LM7905.2 Boththese regulators require their input voltage levels to be atleast 8V to output the desired ±5V . While it isadvised to add reverse-biased diodes across the voltage regulators to prevent back-voltage, no appreciable effectwas seen without them. They have been added regardless as a precaution.

The output of the TPS7339 has a 1Ω resistor followed by a low ESR tantalum capacitor of 680nF in betweenthe output and ground. This removes ripples in the 3.3V generated, which would otherwise propagate into thedigital signals and introduce ripples. Note that the 1 Ω resistor and the tantalum capacitor are essential toremove the ripples in the voltage and they should not be replaced by components of approximate value.

3.2 Analog Subsystem

The main stages of the analog subsystem are the upshifters, downshifters, integrators, and limiters. They areimplemented using an op-amps (TL084) along with passive components (resistors, capacitors, diodes). Eachstate variable requires one of each stage and so uses all 4 op-amps of the TL084 IC. This allows for a modulardesign.

2Both regulators dissipate excess voltage in the form of heat and as such heat up significantly during the course of operation.Provision of a heat-sink is advised, else resort to air cooling.

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3. PROJECT IMPLEMENTATION EDL2019 - DD04

3.2.1 Down-shifter

As the DAC output is unipolar, it cannot be directly fed to the integrator, else it would result in the integratorop-amp saturating to its negative rail voltage. It is thus imperative to map the 0 to 3V output of the DAC to-5 to +5 V. This is done by a difference amplifier circuit, with one input being the DAC output and the other+1.5V provided by reference voltage IC. The resistance ratio is appropriately chosen such that the output ofthe downshifter is

VdX =10

3(VDAC − 1.5)

3.2.2 Integrator

The integrator circuit’s gain depends on the signal frequency, To ensure a reasonable gain for a larger rangeof frequencies, the functionality to change the resistance value of the non-inverting terminal has been added.The two possible settings are such that the integrator has a unity gain at 604.7Hz and 3930Hz. The transferfunction of this integrator is:

VX(s)

VdX(s)=R2

R1

1

1 + sR2C

The integrator must be operated at frequency above 1/2πR1C to get correct integration output.

3.2.3 Up-shifter

As the ADC accepts unipolar voltage, the bipolar output of the integrator has to be mapped to the 0-3V.Another difference amplifier circuit is used, with its resistance ratio to obtain the output:

VADC =3

10(5− VX)

As the signal range is first scaled up in the down-shifter and scaled down in the up-shifter, there is no loss inresolution.As the above equations show, we have scaled up and down or intermediate signal, mapping it from a range of0V to 3.3V to a range of -5V to 5V. This enabled us to use the full range of the integrator op-amp.Scaling the signals up and down was intended to have two direct advantages :

1. In case the intermediate values in the analog circuit blow up (an integrator saturates to rail voltages of+5V and -5V, say), the scaling down will ensure that the ADC does not receive an input beyond itspermissible range.

2. Scaling up can in theory increase the resilience of the circuit to noise that enters the circuit in the analogstages by maintaining a slightly better SNR.

This, however, results in a greater effect of the DC bias and so input has to be tuned appropriately. Smallerrors in reference voltages can also add unwanted DC shifts.

3.2.4 Voltage Limiter

To ensure that the ADC does not receive any volrage above its tolerated range, a voltage limiter circuit is usedto clip the signal to between -0.7V to 4V. A non-inverting buffer is used just before the ADC to ensure theADC does not have to sink the load current.

3.3 Digital Subsystem

3.3.1 Microcontroller, ADC and DAC

The heart of of the circuit is the Texas Instruments TMS320F28069 Piccolo™ Microcontroller. It operates at90MHz and is was selected primarily due to its capability of computing fixed-point precise multiplication ina single cycle. It also has an inbuilt 12-channel, dual sample-and-hold ADC capable of operating upto 3.46MSPS. The main function of the microcontroller is to calculate the various state-space equations. The forcingfunctions are directly fed into 4 channels of the ADC, with the remaining 8 used by each state variable. Thecomputed function signals are passed to the analog grid via an external 8 channel, 12 bit DAC (TLV5610 byTexas Instrument) .The microcontroller has 2 SPI modules, one is used to communicate with the DAC and the other is used tocontrol the MAX395 switches. For communication between the PC and microcontroller, a FT232 USB-to-UARTbridge is employed. Thus, a mini-USB cable can be used to connect the PC to the board. A JTAG pin headerhas also been provided so that it could be used to enable emulation on Code Composer Studio in future projects.

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4. TESTING AND EVALUATION OF BOARD EDL2019 - DD04

3.3.2 Switches

The circuit allows users to toggle between 2 settings, depending on the frequency range of the input signals.As such, MAX395 switches have been employed to chose between 2 resistance values at the non-inverting inputto the op-amp of the integrator. As all the 8 channels are assumed to operate at the same frequency range, allchannels can be configured at once and there is no need to daisy chain multiple MAX switches.To ensure proper initial conditions of the state variables, CMOS analog switches (TS12A44514DR) are controlledusing GPIO pin 2 of the microcontroller.

3.3.3 Setting up Initial Conditions

It is of utmost importance that we can set-up the initial condition of the state variable. For example the RosslerChaotic attractor is a system of three non-linear ODEs that exhibit chaotic properties unique to the initialconditions. Also, in the case of the zero-initial condition scenario, it is important to discharge the capacitor forproper functioning of the integrator.Initial conditions of the state variables can be set-up by initially setting the state variable xi to solve

dxi(t)

dt= −xi(t) + ci

and letting it attain equilibrium. Then the state variable can be set to solve the desired differential equation:

dxi(t)

dt= fi(x1, ..., x8, u1, ..., u4) with initial condition xi(0) = ci

4 Testing and Evaluation of Board

We tested our board at multiple stages. This helped us isolate the causes of errors.

1. As we had isolated the digital and analog system, we were able to check them independently. As themajority of the analog components had not arrived before the board, we tested the FT232 IC by ensuringit was detected by the our laptops using the command:

:$ lsusb

and checking for

Bus 00x Device 044: ID 0403:6001 Future Technology Devices International, Ltd

FT232 USB-serial (UART) IC→

2. Once the components arrived, we began soldering in earnest. We began with the power subsystem as itis critical that no incorrect voltage is routed, else risking IC damage. So every pin and via was checkedto ensure correct voltages.

3. The TPS7333 regulator produces an output having a constant average of 3.3V, as is desired. However,when we observed this voltage on the oscilloscope, we noticed a significant ripple of around 300 mVpp inthe 3.3V signal. As this signal is fed into the DAC as its reference voltage, the output of the DAC was alsofound to have had such a ripple, which could potentially reduce the accuracy of our results. We pinnedthis problem down to the series resistor-capacitor combination that connects the Reset pin of TPS7333to ground. The values of these resistor and capacitor govern the time constant of resetting the output ofTPS7333.The issue of ripples was resolved by ensuring the following two details :

(a) The capacitor of value 10µF should be an electrolytic capacitor, if not a tantalum one, and not asurface-mounted component.

(b) The value of the resistor, which should ideally be 1 Ω, affects the stability of the circuit, as one mayunderstand by glancing through its datasheet. We noted that using a value greater than this (4.7 Ω,say) was producing the undesired ripple, and using a smaller value (shorting it, for instance) causedthe microcontroller to instantaneously heat up, indicating unstable 3.3V supply.

4. By connecting the appropriate boot-circuit inputs so as to enable us to bootstrap via the SCI interface,we could successfully communicate with the microcontroller. The fact that the microcontroller was upand running was indicated by a glowing LED that we had connected to a General Purpose I/O pin ofthe microcontroller, in addition to the values of its key registers being displayed on the terminal on theconnected computer.

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4. TESTING AND EVALUATION OF BOARD EDL2019 - DD04

5. Further, we were successfully able to build on Code Composer Studio, and execute on the microcontrollerusing the CCM interface, a code that periodically toggles one of the LEDs on the board, thus establishingcorrect functioning of the entire digital subsystem.

6. We then tested the analog subsystem. We initially were experiencing a baffling error where the integratoroutput was being unipolarly clipped at -800mV. See Figure 20 in Appendix C for DSO captures of thesame. This error was inexplicably fixed after we removed the TS12A44513 ICs. This is puzzling as theresistors in series to the TS12A44513 switches were removed and so the switches were technically isolatedfrom the integrator.Note: Without the shorting switches in shunt with the integrator capacitor, it is necessary to manuallydischarge the capacitor. This manual task becomes unnecessary once the microcontroller can initializethe state variable.After each op-amp was tested individually, a complete open-loop test was done.For this test, a sinusoidwith a DC offset of 1.5V was supplied at the downconverter input and the output of the upconverter wasobserved.

Figure 7: Channel 1 - 0.5Vpp, 990Hz sinusoidal input, Channel 2 - 90°phase shifted output

The output of the upconverter is, as expected, a 90° phase shifted sinusoid with a DC offset of 1.5V.

7. After referring to the TRM[4], we mapped the ADC and DAC pins to their respective software handlesand checked their working by passing a known signal to the ADC channel and passed it out through theDAC, where the retireved signal was observed on the DSO.

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5. EXPERIMENTS AND RESULTS EDL2019 - DD04

5 Experiments and Results

5.1 Single Variable Linear ODE

dx(t)

dt=

1

RC

[− x(t) + u(t)

]x(0) = 0

5.1.1 Sinusoidal Forcing Function

For a sinusoidal forcing function u(t) = 0.2937 sin(2π600t)V , the MATLAB simulated output is:

x(t) = 207.677 sin(1200πt− 45°)

Figure 8: Simulated Output on MATLAB

which closely matches the observed output of

x(t) = 0.2118 sin(2π600t− 45°)V

Figure 9: Observed Output Waveform

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5. EXPERIMENTS AND RESULTS EDL2019 - DD04

In particular, note that the phase difference between the input and the output is 45° and that the amplitudeof the output signal is 212 mVpp, thus exemplifying an experimental result that is admirably close to the idealvalues found from MATLAB.Note that the above system has a forcing function of frequency 600Hz, the same frequency for which we hadtuned the gain of the integrator block to be unity. When we tested the same system with different frequencies(ranging from 400 Hz to 800 Hz), we observed that the actual outputs were still reasonably close to the expectedones, with the error in phase difference having a magnitude of less than 5°.

5.1.2 Square Wave Forcing Function

For a square wave forcing function u(t) = 0.211sgn[

sin(2π600t)]V , the MATLAB simulated output is:

Figure 10: Simulated Output on MATLAB

which closely matches the observed output:

Figure 11: Observed Output Waveform

5.1.3 Triangular Wave Forcing Function

For a triangular wave forcing function, the observed output matches the expected quadratic (parabolic) natureas seen in:

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5. EXPERIMENTS AND RESULTS EDL2019 - DD04

Figure 12: Simulated Output on MATLAB

Figure 13: Observed Output Waveform

5.2 Single Variable Linear ODE transients and initial conditions

dx(t)

dt=

1

RC

[− x(t) + u(t)

]x(0) = +2.5

the MATLAB simulated output is:

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5. EXPERIMENTS AND RESULTS EDL2019 - DD04

Figure 14: Simulated Output on MATLAB

which closely matches the observed output:

Figure 15: Observed Outpur waveform

5.3 Two Variable Linear ODE (RLC)

A simple second order ODE used to characterize RLC (R=2Ω, L=1H, C=1F) circuits can be described as:

x = (2π600)2[− x− 2x+ sin (2π600t)

]x(0) = x(0) = 0

Simulating this on MATLAB,

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5. EXPERIMENTS AND RESULTS EDL2019 - DD04

Figure 16: Simulated Output on MATLAB

Figure 17: Observed Output Waveform

5.4 Single Variable Non-linear equation

x = 2π600[− x3 + sin (2π600t)

]x(0) = ±1

Simulating this equation on Wolfram Alpha takes so long that it exceeds the free computation time. This is indirect contrast with our board’s almost insantaneos response.

(a) x(0) = +1 (b) x(0) = −1

Figure 18: Observed Output Waveforms

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6. FUTURE PROSPECTS EDL2019 - DD04

5.5 Non-Linear second-order ODE

We simulate the angular deviation of a damped pendulum, characterized by the equation:

θ = −gL sin θ − θ

To demonstrate the non-linear capabilities granted due to the use of the microcontroller, the linearizing approx-imation that sin θ ≈ θ has NOT been used and the sine is computed by its Taylor series expansion. It is alsopossible to compute the sine using the look-up-tables available in the iQMath library.

Figure 19: Observed Output Waveform

5.6 Van der Pol Oscillator

Van der Pol Oscillator is a 2nd order non-linear differential equation given by:

d2x

dt2− µ(1− x2)

dx

dt+ x = 0

This equation can be written in two dimensional form as follows:

dx

dt= y

dy

dt= µ(1− x2)y − x

We simultated the Van der Pol oscillator using this two dimensional form on our board and found the outputto be similar to MATLAB simulations.

6 Future Prospects

1. The current performance of the circuit is limited by the sampling rate of the DAC and ADC. Fastersampling would result in more stable and accurate results.

2. In switching circuits of power systems, operate at very high speeds and switching decisions cannot bemade by a slow digital differential equations solver. Implementing a switching model on the board willallow the controller to be incorporated in the hardware-in-loop simulations.

3. Although the analog integration is faster than digital methods, it is less accurate. This design can beexpanded so that we are able to correct the inaccuracies of the analog domain in the digital domain.

4. The range of frequencies that we can work is currently very limited due to attenuation caused by integratorat higher frequencies which causes error in ADC readings. Future work can aim at improving this dynamicrange.

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7. ACKNOWLEDGEMENTS EDL2019 - DD04

7 Acknowledgements

We would like to thank:

• Prof. Mukul Chandorkar for his unwavering support and guidance.

• Maheshwar Sir, Suraj Sir, Shekhar Sir and the rest of the WEL team for their invaluable assistance

• Our TAs Shubham Jain, Praveen Kumar and Yogesh Mahajan for helping us in all the stages of theproject to discuss and come up with innovative solutions.

• Prof. Joseph John and the entire EDL team for giving us this wonderful opportunity

A Programming Guide

In the experience of all 5 teams, it is advised to work on Ubuntu 18 over other distributions eg. MacOS/Windows.Previous releases of Ubuntu (specifically Ubuntu 16) is not advised due to having an older version of thelibreadline package.

1. Install Code Composer studio by TI

2. Install the C2000ware, a comprehensive set of documentation and example codes provided by TexasInstruments that will be modified for our own purposes. For our purpose, we have modified the examplesprovided in C2000ware.

3. Install Texas Instrument’s code generation tools,(TI-CGT)

4. You may also want to refer to the datasheet[5], TRM[4] or the readily available workshop material.

5. Install ccm to interface between the microcontroller and the PC. This is a custom built software writtenby Prof. Mukul Chandorkar and he was kind enough to send the setup over.

6. Open terminal and run

$: vim ∼/. bashrc

add the following line to the opened file (after pressing i on keyboard):

export PATH=$PATH:<hex2000_folder_location >

exit vim (Esc + :wq) and run the following command on terminal:

$: source ∼/. bashrc

7. Build the code on CCS and convert the resulting out file to a bin file by running this in terminal open atthe .out file directory (default location is in Debug folder of project):

$: hex2000 -boot -b code.bin code.out

8. Go to the folder containing ccm and run it by:

$: chmod 755 ccm

$: sudo ./ccm

9. Load the code on the microcontroller and execute it by:

ccm: l code.bin

ccm: x

10. exit the ccm by

ccm: q

To be able to execute our code, following this need to be taken care of

1. For this project, we have used the example spi loopback provided in the folder:C2000Ware 1 00 06 00/device support/f2806x/examples/c28/spi loopback

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B. JUMPER CONNECTIONS EDL2019 - DD04

2. Replace the code in Example 2806xSpi FFDLB.c with our code.

3. To be able to build our code, you will need to include F2806x Adc.c, F2806x Cla typedefs.h, etc locatedin f2806x/common or f2806x/headers folder. This can be done from the option Project/Add Files.

4. Issue of Uint16 not defined can be resolved by including F2806x Cla typedefs.h.

5. Build the project and follow the above steps and use ccm to transfer the generated .bin file to microcon-troller.

B Jumper Connections

To ensure flexibility of connections, our board is littered with many pins, which upon shorting with jumpersconnect the various modules of the closed loop. This section details the connections for the default operationand the different possible configurations.NOTE: The connections are described with respect to the board layout when the mini-USB connector is inthe bottom-left corner and the printed text is upright.

• XFORMER: Is a 3 pin header where the connections from the transformer h=are to be connected(left: -15V,

centre: (Analog) Ground, right: +15V)

• USB-5: The upper two pins are to be shorted always. This connects the USB to the digital 5V supply.The bottom two pins are to also be shorted if the entire board is to be powered by the mains. This shouldonly be done when the mini-USB connector is removed.

• JP57: This should only be shorted when the entire board is to be powered by the mains.

• REF+3V3: This should remain shorted. It connects the output of the TPS7333 to the bus supplying +3.3Vto the digital chips.

• FF: The 4 pins each accept one of the forcing functions into the ADC channel B2,B4,B5,B6 (from left toright) of the microcontroller.

• VCCI0: The top 2 pins should be shorted

• FTDI: The 2 rows shoulb be shorted horizontally (1:TMS TXD with 2:RXD and 3:TMS RXD with 4:TXD)

• BOOT JP: Short 1 (+3.3V followed by 820Ω: and 2 (GPIO34)

• DAC-MODE: For each 3 pin row, short the left-most and central pins

• SV1: This is the JTAG header. It was not used by us, but this allows for JTAG communication in thefuture

• IN-5V: Short the 2 left pins vertically to allow for the rectified -5V to be supplied to the rest of the analogcircuit. The other 2 pins are internally shorted and can be used to check if -5V is generated correctly.

• IN+5V:Short the 2 pins horizontally to allow for the rectified +5V to be supplied to the rest of the analogcircuit.

• AGND: The 3 pins are internally shorted to the analog ground.

The jumper connections for each of the 8 op-amps are identical. We shall describe the jumper connections inthe periphery of the first op-amp (in the top-leftmost corner of the board)

• X-PLS1: Short the 2 pins. This connects the output of the integrator (left pin) with the input of thepositive-level shifter block for the first state variable.

• DAC-IN1: Short the 2 pins. This connects the output of the DAC (left pin) with the input of the negative-level shifter block for the first state variable.

• X1DOT: Short the 2 pins. This connects the output of the negative-level shifter (right pin) with the inputof the integrator block for the first state variable.NOTE: For X2, X3, X6, X7, and X8, the 2 signals of the jumper have been switched (i.e the output ofthe negative level-shifter is the left pin). The jumper connections do not change, but this should be notedin the case of open-loop testing.

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C. SOURCE OF MISERY - TS12A44514 EDL2019 - DD04

• ADCIN1: This pin decides the input to the ADC by selecting to bypass the limiter circuit or not. This wasa provision made in the off-chance the limiter circuit severely affects the waveform shapes. We found noneed to bypass the limiter circuit and so shorted the top 2 pins.If the limiter circuit is to be bypassed in the closed loop test, short the bottom 2 pins instead.

• JP33: Short the 2 pins. This connects the 1.5V reference voltage generated by the adjacent VREF chipto the negative-level shifter of two state variables. Next to the pins, is a single pin head where the +1.5Vcan be checked.There are 4 such VREFs and so 4 such jumper connections to be made.

C Source of Misery - TS12A44514

As mentioned earlier in Section 4, we experienced a baffling error due to the TS12A44514 switches. When wewere testing the integrators, our integrator output was getting clipped unipolarly whenever it crossed -800mV.During this clipping, the excess voltage appeared at the inverting terminal of the integrator op-amp. board’salmost instantaneous response.

(a) Integrator output while clipping (b) Inverting terminal of integrator op-amp duringclipping

Figure 20: Observed DSO Waveforms during clipping

When the TS12A44514 switches were removed, this error was fixed and the integrator op-amp was able toachieve its rated voltage limits. This is surprising as the series resistance to the switches had been removed andso the switches were technically not in operation. Further analysis has to be done to explain this phenonmena.

References

[1] Dhruv Ilesh Shah Sachin Goyal, Srivatsan Sridhar and Mukul Chandorkar. DPAC- Digitally ProgrammableAnalog Computer. EE344: EDL, DD05, 2018.

[2] N. Guo, Y. Huang, T. Mai, S. Patil, C. Cao, M. Seok, S. Sethumadhavan, and Y. Tsividis. Energy-efficienthybrid analog/digital approximate computation in continuous time. IEEE Journal of Solid-State Circuits,51(7):1514–1524, July 2016.

[3] Y. Huang. Hybrid Analog-Digital Co-Processing for Scientific Computation (PhD thesis). Columbia Uni-versity, New York, USA, 2018.

[4] Texas Instruments. TMS320x2806x Piccolo Technical Reference Manual, April 2017. Rev. G.

[5] Texas Instruments. TMS320x2806x Piccolo Microcontrollers Datasheet, May 2018. Rev. G.

[6] Texas Instruments. 8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V Low Power DAC with Power Down, Nov2008. Rev. G.

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