Developments in integrated smart sensors

276 Sensors and Actuators A, 43 (1994) 276-288

Developments in integrated smart sensors

Johan H. Huijsing, Frank R. Riedijk and Gert van der Horn De@ University of Technology, Faculty of Ekctrical Engineering L&oratory of Electronic ImtrumentationjDIMES, Mekehveg 4, 2628 CD DeQl (Netherlands)

Ahstlnct

An integrated smart sensor (ISS) can be defined as a chip that contains the functions of sensing, signal conditioning, AD conversion and a bus output. It may also have on-chip calibration and self-test. This paper concentrates on the standardization of the output interface using on-chip AD conversion, calibration and bus output. First, it is shown how indirect AD-conversion techniques yield simple circuits which can easiiy coexist with the sensor on one chip. Sigma-delta conversion is a good example. Second, calibration methods are described for analog and digital sensor output signals. Finally, the use of two simple busses is described, the I*C bus and the IS’ bus. The required bus interfaces are relatively simple and can be integrated with sensors in bipolar as well as in CMOS brocesses.

_ _

1. Introduction

The coming automation revolution, following the industrial and information revolutions, needs sensors, many sensors [ 11. The greatest problem in the application of many sensors is that each sensor has its own par- ticularity. Some sensors produce an output voltage, others a current, or a resistance, or a capacitance [2]. The goal of this paper is to show how standardization of the output signal of integrated sensors can be realized.

A multi-sensor data-acquisition system can only be made technically feasible if these sensors are given a smart interface circuit which can communicate through a shared standard bus. This is already the case in industrial applications such as automated factories and aeroplanes. However, for consumer applications multi- sensor data-acquisition systems can only be made economically feasible if each smart sensor is fully integrated on a single integrated circuit. Figure 1 depicts the idea of an integrated smart sensor (ISS); shown particularly for such consumer products as smart cars, in Fig. 2, and smart homes, in Fig. 3. For smart household products, the integration of the smart sensor into one chip is of essential importance to keep these products economically acceptable.

The definition of an integrated smart sensor (ES), used in this paper, is: one chip, without external com- ponents, including the functions of:

(i) sensing: one or more sensors; (ii) interfacing: signal conditioning, analog-to-digital

conversion, and standardization of the output bus format;

n OPT.

Fig. 1. Integrated smart sensor.

(iii) calibration: zero, scale, linearity, cross-sensitiv-

ity; (iv) intelligence: self-test, self-identification.

Figure 4 shows an illustration of what we wish to obtain. There is still a long way to go before the sensors

appear in a comer of a microprocessor, or a microprocessor on a corner of a sensor chip. However, the first steps have been taken to make it happen.

This paper concentrates on the standardization of the output-signal format of integrated sensors by on- chip: analog-to-digital (AD) conversion in Section 2; calibration in Section 3; and bus output in Section 4.

2. Conversion

In this paper we restrict ourselves to analog-to-digital converters suitable for coexisting with sensors in bipolar

0924-4247/94/$07.00 Q 1994 Elsevier Science .%A. AU rights reserved SSDI 0924-4247(93)00657-P

GLOBAL POSITIONING

SECURITY

DASHBOARD CONTROLS/

TILT SENSORS

COLLISION PREDICTION

-.. _

DRIVER SETTINGS

M6TOR HEADLIGHT MANAGEMEN SENSORS/

ACTUATORS ABS SYSTEM

Fig. 2. Car with smart sensors and actuators connected to a shared standard bus.

‘X ROAD SENSOR SYSTEM

SOLAR PHONE SMART SECURll-Y HOME

PO’$‘ER COMPYTING SYSTEM i LIGHTING SENSING CONTROL SMOKE

i DETECTION /

Fig. 3. Smart home with smart household products, connected to a shared standard bus.

and CMOS technology. Indirect converters lend them- selves to combination with sensors. They obtain their digital output via the time domain. This can be done by frequency conversion, duty-cycle conversion, or sigma-delta conversion.

One advantage of this family of indirect converters is that the circuits in bipolar and CMOS technology are simple. The precision may be very high, even as high as 18 bits, without trimming. The linearity is also high. Only the zero and scale of the converter itself have to be trimmed.

The only disadvantage of indirect converters is that they are relatively slow. However, this is not a great

problem, for most sensors measure relatively slow quantities.

Figure 5 shows a conventional converter chain. The signal goes from the non-electrical measuring quantity via a sensor to the analog electrical domain, where it is ampl&xl, filtered, sampled in time, and finally quantized in amplitude.

Each of the four signal-processing blocks mentioned above adds to the inaccuracy of the measurement result. It is our aim to shorten the measuring chain by feedback over one or more blocks, so that the number of elements which determines the accuracy will be smaller. As we apply strong feedback the system will tend to oscillate.

278

2; v }SUPPLY _..

CLOCK

DATA SERIAL BUS

I

4 --_-- t

ANALOG

- ONE CHIP

Fig. 4. Functions on an integrated smart sensor.

I I

DIGITAL OUTPUT

_ AMPLIFIER SAMPLER - QUANTIZER -

I I NON-EL. ANALOG , SAMPLED , QUANTIZED

Fig. 5. Digital interface chain with no feedback.

NON-EL. ANALOG I I , SAMPLED , QUANTIZED

Fig. 6. Digital interface chain with harmonic oscillator with sinusoidal output.

We will not try to avoid these oscillations but, on the contrary, use it to our advantage. This is exactly what is done in the family of indirect converters, as we will see in the following.

The first step is shown by the block diagram of a harmonic oscillator in Fig. 6. It functions as a frequency converter [3]. One or more passive filter elements may be used as modulating [2] sensor elements which in- fluence the frequency. A simple comparator is sufficient to sample distinct pulses. Next, these pulses are counted to obtain a quantized number. It is obvious that it takes a gate time To equal to the maximum number of pulses N to be counted, multiplied by the minimal period time Tp of the oscillator: TG=iVTp. This might represent a relatively long measurement time, though

the circuit remains very simple. Alternatively, the number of pulses from a high-frequency clock can be counted that fits in between one or more oscillation cycles. However, short-time variations in the oscillator frequency may reduce the accuracy of the result.

The harmonic oscillator has the disadvantage of having a frequency which is not a linear function of thevalue of one filter element but a square root function. This generally complicates the use of a harmonic oscillator.

The second step to shorten the measuring chain by feedback is to insert the comparator into the loop, as shown in the block diagram in Fig. 7. The result is a relaxation oscillator [4]. The feedback is split into a direct path which provides a hysteresis by positive feedback, and a path through a first-order filter of which one or more elements may be used as a modulating sensor element to determine the frequency. Thus, a linear relation between frequency and the value of one sensor element can easily be obtained.

An example of this principle is shown in the thermopile voltage-to-frequency converter for a two-dimensional thermal flow sensor in Fig. 8. Two thermopile input Seebeck voltages V, and I$ represent temperature differences in the x and y directions of a ‘hot finger’ chip, while the input voltage V, represents the temperature increase of the chip over the ambient temperature. These voltages are chopped by the output voltage Vout of a comparator. One of the chopped voltages V, or V, is converted into a current and

NON-EL. ’ ’ I

INPUT --. COMPARATOR GATE

TIME REF

I I I

I I I NON-EL. , ANALOG , SAMPLED , OUANTIZED

Fig. 7. Digital interface chain with relaxation oscillator with frequency and duty-cycle output.

L._._._._._._._._._.-.-.-.-.-~~

Fig. 8. Thermopile voltage-to-frequency converter for two-dimensional thermal flow sensor.

279

integrated by a capacitor C into a voltage V, and fed to the comparator. The chopped voltage V, is converted into two currents, one of which is turned by a resistor R into a voltage V,, and used as a reference voltage to the comparator. The other current from the chopped voltage V, is added to that of V, or V,, in order to center the output frequency fx or f, on a value fO= $RC. This frequency is obtained when both V-I converters for the n and y signals are turned off by a multiplex function. The generated frequencies are in- sensitive to the offset of the V-I converter and comparator, because the signals alternate. If one of the V-I converters for either the x or y direction is turned on, the relative frequency difference x = (f, -f,)& or y = (f, -f& represents the flow in the x or y direction. This relative measurement result is independent of the RC time constant [5].

Figure 9 schematizes the thermocouples for producing the X, y and ca (chip-to-ambient) temperature signals on a micromachined chip with a ‘hot finger’ isolated island in the middle surrounded by a rim which stays at the ambient temperature. The actual situation with all the electronics on the rim is shown in the photograph in Fig. 10. A similar flow sensor chip with a resistive sensor bridge is published in ref. 6, and with bipolar sensors in ref. 7. Figure 11 visualizes the micromachined moat on the substrate side which thermally isolates the island from the rim. Figure 12 gives a cross section of the mounted flow sensor on a glass or ceramic carrier plate. This plate keeps the chip in thermal contact with the fluid or gas, while preventing it from being polluted. Finally, Fig. 13 shows the probe-head assembly for a two-dimensional wind meter with the sensor plate on top of a mushroom surrounded in the horizontal direction by a cylindrical grid, and in the vertical direction by two discs. This assembly protects the sensor from rain and insects, and provides a micro-turbulent hor-

I 3.5 mm

2.5 mm bmm

I t

Fig. 9. Thermopile sensing elements on a two-dimensional thermal flow sensor.

Fig. 10. Chip photograph of a two-dimensional thermal flow sensor with thermopile sensing element.

Fig. 11. Flow sensor chip with hot finger island thermally isolated from ambient temperature rim by micromacbining on the substrate side.

flow

glass carrier

component side

Fig. 12. Cross section of flow sensor chip with hot island and ambient-temperature rim glued to a carrier plate.

izontal flow guide in parallel to the sensor plate. With this wind meter assembly an accuracy could be obtained of 2% for the speed in a range between 1 and 40 m per s and 1” for the direction in a full range of 360“

PI.

280

Fig. 13. Probe-head assembly for two-dimensional wind sensor.

,__________________._________, I Chip ,

I I a “h

~____________.____._.._..-._~ o “iN

Fig. 14. Current-ratio-to-duty-cycle converter.

If the sensor signal or the feedback signal in the block diagram shown in Fig. 7 is not applied sym- metrically with positive and negative signs to the integrator, but asymmetrically, with either positive or negative sign, a duty-cycle modulation is obtained. Figure 14 shows an integrator capacitor C connected to a comparator with hysteresis as a Schmitt trigger. The comparator controls a switch that alternatively switches a reference current Z, and a measurement current I, to the integrator capacitor. In the long term, the charge on the capacitor balances out. The result is a square wave signal at the output of the Schmitt trigger with a duty cycle D=I,JI,.

An example of such a duty-cycle converter is used as a temperature sensor [9]. Here, Iz is a current derived from a band-gap voltage V, and 1, a current proportional to the absolute temperature (PTAT). These quantities can be derived from bipolar transistors. An accuracy of 1 “C, in a range of - 45 to 130 “C could be obtained.

An important disadvantage of free-running oscillators in smart sensors is that they tend to track other frequencies, such as clock signals. This leads to steps in the transfer function.

The third step in shortening the measuring chain by means of feedback is to include the quantizer in the loop, as is demonstrated in the bit-stream sigma-delta modulator of Fig. 15. The feedback now contains a one-bit DAC, which determines the accuracy from the analog electrical input signal up to the bit-stream output signal.

I I I NON-EL. , PINALOG , SAMPLED , QUANTIZED

Fig. 15. Digital interface chain with sigma-delta converter with bit-stream output signal.

/ Y sus

clock, TtTTTTTTTtTTt, N I

Fig. 16. Current-ratio-to-bit-stream conversion in a sigma-delta converter.

A block diagram of a sigma-delta converter is depicted in Fig. 16. An integrator capacitor C is connected with a comparator followed by a clocked gate. The gate output controls a switch which discharges the capacitor by a reference current 1, during one clock period if the capacitor voltage V, exceeds the comparator’s reference voltage V,. The capacitor is continuously being charged by the input current 1,. The result is a bit rate fb which, in regard to the clock fc frequency, is the ratio of the input and reference currents: f&=I,lIr.

The sigma-delta converter has been used in a temperature sensor [lo] where 1, is a PTAT current and Z, a reference currerit derived from a band-gap reference. An accuracy of 1.5 “C over a temperature range of -50 to + 150 “C has been achieved, using a clock frequency of 200 kHz.

In another example, the bit-stream converter was used to measure heat radiation with a thermocouple. It has a resolution of 14 bits, at a clock frequency of 150 kHz, while obtaining an input offset voltage of only 5 PV using bipolar multiplexer switches [ll].

A feature of the sigma-delta converter is the simple and dimensionless ratio of bit stream and clock rate which is a result of the ratio of two currents or two

voltages. This advantage has been exploited for interfacing a position-sensitive device (PSD) [12]. The PSD generates two currents at two end contacts of one node of a light-sensitive diode on which a light spot is focussed. The ratio between the currents is inversely proportional to the two distances between the focus point of the light spot and the two contacts. The ratio between bit stream and clock rate linearly determines the focus point of the light spot between the two contacts from 0 to 100%.

The most important feature of the sigma-delta converter is its ruggedness against tracking alien clocks, as it is already fully tracked by its own clock. Moreover, the signal-processing methods developed in audio converters, lie digital decimation filtering, to improve the response time, can be applied.

The fo&r and final step is to also include the sensor in the feedback loop. This results in a non-electrical sigma-delta converter, as shown in Fig. 17. A non- electrical one-bit DAC in the feedback path determines the total accuracy from non-electrical measurand input up to the bit-stream output.

It is clear that this method only makes sense if the non-electrical DAC can be made more accurate than the sensor. This is the case with, for instance, thermal pulses dissipated in a resistor to measure heat flow in a thermal flow sensor, mechanical pulses generated in a capacitor or inductor to measure force (accelerometer) or pressure, and chemical ion pulses produced by an electric current for measuring the acidity of fluids.

A block diagram of a thermal sigma-delta converter is shown in Fig. lg. It has been used to measure the heat loss in an integrated anemometer [13]. The chip is heated by dissipating heat pulses on the chip. The chip functions as a heat capacitor C,. A temperature comparator measures if the chip temperature T, de- scends below the reference temperature T, of 10 “C over the ambient temperature T,. If this occurs, an output pulse will be generated at the next clock pulse, and the chip is heated for one clock pulse. The ratio of bit-stream rate and clock rate is equal to the ratio of heat loss and maximum available heat dissipation.

II I NON-EL.C-EL. I FEEDBACK . I

I-BIT DAC I I

NON-EL. I DIGITAL ANALOG _ OUTPUT

NON-EL. _ FILTER

COMPARATOR+ GATE -

NON-EL.--*EL. CLOCK BITSTREAM I I I il I

NON-EL. I I SAMPLED I QUANTIZED

Fig. 17. Digital interface chain with non-electrical sigma-delta converter with non-electrical input signal and electrical bit-stream output signal.

281

Thermal Signal Domain _I_ , Electrical Signal Domain

Digital -0 out

Fig. 18. Thermal sigma-delta modulator.

h dissipating resistor North

and comparator TTL o”t~“t buffar

Fig. 19. Simple implementation of thermal sigma-delta converter circuit.

The non-electrical comparator and clocked flip-flop can be combined in a ‘flip-flop’ sensor [14], which enables the fabrication of two very simple circuits. Figure 19 shows the simple circuit of a thermal sigma- delta converter, which can be used for a simple anemometer. On the left side, two bipolar transistors compare the temperature difference between that of a chip and that of the ambient, represented by the difference of their base-emitter voltages, to a temperature difference of 20 “C, represented by a voltage source of 40 mV.

The result is taken by a clocked flip-flop. The TI’L buffer on the right side drives a heat dissipating resistor, which heats the chip.

Four of these circuits can be used to compose a two- dimensional thermal flow meter [U].

A chip has been micromachined from the substrate side into a square island and a rim. On the island are four thermal sigma-delta converters, one for each com- pass direction as shown in Fig. 20. The north-south direction component of the wind is determined by the bit-rate difference of the north and south thermal sigma- delta converters. A chip photograph is shown in Fig. 21.

282

TOP VIEW

I I

. temperature sensor - dlssipatlng element

Fig. 20. Two-dimensional thermal flow sensor with four thermal sigma-delta converters.

Fig. 21. Chip photograph of a two-dimensional thermal flow sensor with four thermal sigma-delta converters.

The accuracy is completely determined by the thermal conductivity of the sensors in regard to the flow, and by the accuracy with which the heat pulses can be generated.

We have shown how the measuring chain, from the sensor signal up to the digital signal, can be shortened by feedback to improve the AD conversion. This au- tomatically results iu the family of indirect converters, in which ‘time’ becomes an intermediate signal carrier. This brings about very simple circuits which can easily be placed on the sensor chip. The converters have high resolution and good linearity.

The only disadvantage is that these converters are relatively slow, but this is often not a drawback in sensors.

(1) Feedback through a sensor and amplifier results in a harmonic oscillator. A disadvantage is its non- linear transfer of the frequency conversion.

(2) Including the comparator into the feedback produces a relaxation oscillator. A disadvantage is the

sensitivity of the output frequency or duty-cycle to track to other clocks.

(3) Placing the clocked gate also in the feedback makes it a sigma-delta converter. This converter produces an interference-resistant bit-stream output signal to which all the welldeveloped signal processing tools of audio equipment can be applied.

(4) Finally, the feedback can be extended backwards into the non-electrical domain of the measurand. The accuracy of the total non-electric‘sigma-delta converter now only depends on the accuracy of a one-bit non- electric DAC feedback element, which can be made very good.

3. Calibration

The standardization of sensor output signals implies the standardization of the zero point and the scale factor, non-linearity, and cross-sensitivity. Only in this way, can a manageable data-acquisition system be com- posed using replaceable sensors with standard output format.

Sensor calibration contributes considerably to the sensor price. Often, the cost of calibration far exceeds the primary manufacturing costs.

To carry out calibration, the following general methods can be used:

(i) complete look-up table (ii) piece-wise-linear approximation (iii) polynomial fitting (iv) sinusoidal or exponential fitting

One or more of these methods might be required in one or more dimensions (different measurands) to calibrate cross-sensitivity [16].

To minimize the number of measurements required for calibration, a good choice of the model must be made to which the actual curve fits accurately. Often a second-order polynomial fitting is sufficient, requiring three calibration points for each measurand in each dimension.

The simplest way of performing calibration on the sensor chip is laser trimming or zener zapping for the zero point aud full scale. However, laser trimming is expensive. Moreover, one trim may unpredictably de- pend on the other. Hence, it might be wise not to trim directly but to program the calibration values in a memory for a dedicated signal processing circuit.

This is shown, for example, in Fig. 22 where an analog output signal is trimmed. Tbe weights of four multiplying DACs are trimmed, setting offset, gain, temperature coefficient of offset and gain [17]. Tbe DACs need not be calibrated, provided that they do not have dead zones.

283

Instr. Amp/Mb Multiplying DACs

_ Analoa

a1 82 a3

i--

DigitElI

aA Conlrol

dig&/ _ coefficients

BUS

Inletface

Fig. 22. Calibration of analog output with multiplying DACS for gain, of&et and temperature coetlicient of gain and offset.

The analog circuit can be greatly reduced when we replace the multiplying DACs by duty-cycle or bit- stream controlled choppers, realizing a weighted sum of analog signals at the output, as shown in Fig. 23. The duty-cycle or bit-stream signals can easily be generated and programmed digitally. The bandwidth of the transfer is restricted now by a low-pass filter to smoothen the chopped analog output signal.

If a digital output signal is required, a sigma-delta converter can be placed behind the trimming circuit of Fig. 23. The trimming can better be included as part of the sigma-delta converter, as shown in Fig. 24. A comparator and clocked gate control the feedback of the trimmin g circuit. Besides a reference signal V,, also a temperature signal VT-TO, weighted by a bit stream p2, is included in the feedback of the converter.

/Mr. AmPMiir 6itstmam modulation Low-Pes Nlfer

l-ll-l

Anabg

Output

+I LNgita/ Bus

Fig. 23. Calibration of analog output with bit-stream modulation for gain, offset and temperature coefficient of gain and offset.

In this way the temperature coefficient of the gain can be controlled. This eliminates the multiplier required in Fig. 23, and it improves the regularity of the bit stream. The calibrated bit stream can simply be counted to produce a digital signal. An analog output can be derived as well by feeding the bit stream through a low-pass titer.

Alternatively, the calibration can be completely ex- ecuted on bit-stream level. This is shown in Fig. 25. A sensor signal is converted into a bit stream. This bit stream is added to another bit stream which represents the offset correction. The resulting bit stream is multiplied by a third bit steam which represents the gain factor. A simple AND-gate, preceded by a ran- domizer that decorrelates the bit streams, performs the multiplication. A second-order correction can be in- troduced by also taking into account the primary sensor bit stream in the calculation of the gain correction. The temperature coefficient can be taken into account by correcting the of&et and gain settings with the bit stream from a temperature sensor. The correction can be calculated at a slower pace than the sensor signal since the temperature varies slowly. The final result can now be filtered or decimated to produce an analog or digital output signal.

We have shown four relatively simple calibration architectures that do not need a fully on-chip microprocessor. Operations on bit-stream level seem to be a powerful tool to implement simple calibration circuits in the future. These operations are compatible with the bit-stream converters discussed in Section 2.

284

Law-Pass Filter

V T-To+ + Oflret T.C. Delta Converter

L) : Sigma

w 611 PI+ . VT.10 _f___ _

t Pi= VW

.T’v,,, ;;_ E%am

Pd w R” Gain0 :7 p,+ generatora

4%

VT-10 R2 wb. 5

Gain T.C. Digital

BUS

Fig. 24. Calibration of digital and analog output with multiple-driven sigma-delta converter for gain, offset and temperature coefficient of gain and of&et.

Sensors AD conversion Biistraam Adder Bitstream Multiplier DA conversion

% CA : Analog

output

Memory

Int%ee

Fig, 25. Calibration of digital and analog output with operations on bit-stream signals by bit-stream signals.

4. Bus output

The final step in standardizing sensor output signals is to give them a suitable bus format. Several serial formats have been standardized, such as the Field, Home (DZB), CAN and J1852. These strong busses are still too complicated to be integrated with the sensor into one chip at low cost. However,‘hybrid solutions are presently satisfactory. Figure 26 show-s a number of hybrid solutions.

Going from left to right, we first find a general- purpose sensor interface with a strong bus interface which suits relatively low volumes of sensors with restricted differences in the type of’ sensors.

Next to the right, signal conversion with frequency, duty-cycle, or bit-stream output, is combined with the sensor on one chip and connected to a standard microprocessor with a strong bus interface. Both the smart sensor and microprocessor can be produced in medium volumes at a relatively low price.

Iexternal bus) HOME, FIELD, CAN

ext. bus Int.

A/D mod

Y neral improved local.bus ybrid hybrid

solution salutlon one-chip solution

tow volume medium volume

high volume

Fig. 26. Hybrid smart-sensor-bus development.

future ‘one-chip solution

high volume

One more step to the right, we find a solution with an intermediate bus format which is simple enough to implement its protocol on one smart sensor chip. The intermediate or local bus is not strong enough to be

SUPP’Y

Chip 2

TP

1% =%I chip 1

PC2

T?l I : 2 : 3 @ 4 5 : 6 : 7 H 8 9 : IO ’ Time

Fig. 27. Simple two-chip flow sensor with I%I bus interfacing.

The first smart sensor with an I*C bus for measuring temperature and flow has been realized [20]. The principle of temperature measurement was explained in the third step of Section 2 [lo]. A F’TAT current is compared with a constant current and converted into a bit stream. The bit stream is counted and the digital word representing the chip temperature T, is forwarded to the I*C bus output.

used as an external bus. Examples are the I% bus and The principle of flow measurement was explained in the IS’ bus, which will be explained in the following. the fourth step of Section 2 [20]. A system with two These serial busses can be utilized within the location chips performs a thermal sigma-delta modulation. This of one instrument, where we need up to several tens system is depicted in Fig. 27. The ‘cold’ Chip 1 measures of sensors combined with a central microprocessor. This the ambient temperature T,, = TA and presents this to solution is suitable for high-volume sensors. the microprocessor. The ‘hot’ Chip 2 measures its

285

Finally, at the far right we lind the future one-chip solution with a strong external bus output. Its high- volume production will be reality when it becomes feasible at a low price

The present state of the art allows us to place a local inter-integrated circuit (I’C) bus [18] or an integrated smart sensor (IS’) bus [19] on the sensor chip at low cost.

The simplest implementation of an I*C slave interface roughly takes 800 transistors and requires the signals to be fully digitized.

500 ,000 1500

Fig. 28. Chip layout of two-dip flow sensor with 1% bus.

286

Clock:

Data:

‘0’ I w

Fig. 29. Integrated smart sensor (IS’) bus with clock and data wire.

Fig. 30. Integrated smart sensor (IS’) bus protocol. S-start bit (always ‘O’), A=sensor address, R/W=data direction bit, A&= acknowledge bit (must be ‘I’), D... = sensor data: bytes/bit stream/analog.

Fig. 33. Chip photograph of a thermopile interface circuit with sigma-delta modulator (on the left) and IS2 bus interface (on the right) in bipolar technology.

Fig. 31. Chip layout of the temperature sensor with IS’ bus.

Clock

Fig. 32. Block diagram of a thermopile interface circuit with sigma-delta modulator and integrated smart sensor (IS’) bus with bit-stream output.

temperature TcL and the microprocessor compares it to that of the ambient temperature received from Chip 1. When its temperature Tcz lies below, for instance TH= the ambient temperature TA + 10 “C, a heat pulse Pcz is generated in Chip 2 during one time unit on command of the microprocessor. The number of heat

pulses in relation to the number of time units is a measure for the flow.

The chips T,, and T, are identical, as shown in the photograph of a prototype chip in Fig. 28. In the upper-left comer the analog temperature sensor with bit-stream output is shown. On the upper-left comer the heat generator is located. The rest of the chip contains the counters, the logic for the thermal sigma- delta modulator and the 1% bus output. The chip was made in a BiCMOS process. Other functions for testing have also been added.

To simplify the 1% bus, and allowing for more flexible sensor signals, the clock and data signals were detangled in the IS2 bus. This allows the transportation of a bit- stream signal or even an analog voltage over the data line, besides the transportation of a digital word. More- over, a simple IS2 slave only requires roughly 400 transistors.

The protocol of the IS2 bus is shown in Fig. 29. The clock lime is an open-collector line. As long as the clock is present, digital addresses, data words or bit-stream signals can be transported on the data line. When the clock is absent the clock line is high and an analog value can be sent on the data line. When the master (bus controller) or slave (smart sensor) pulls down the clock line the master starts the clock again and the

sending of the analog value on the data line is stopped. The data line is also an open-collector line. When it is high during one clock period, the line is idle. When it is low during one clock period, an error or stop signal is represented. A ‘zero’ is a data pulse asyn- chronous with the clock. A ‘one’ is a data pulse syn- chronous with the clock. When conflicting data is sent, the one which tirst senses a conflict stops sending.

The protocol of the IS bus is similar to that of the 1% bus, except that other types of data may be allowed other than g-bit words. The IS’ protocol is shown in Fig. 30.

A first CMOS realization of the IS’ bus interface on one chip with a temperature sensor, as explained in the third step of Section 2, is shown in the layout of Fig. 31. The temperature measurement is equal to that of the one with the 1% bus of Fig. 28. The temperature measurement produces a bit stream which is directly used as a bus output signal. Much of the digital circuitry of the smart sensor with the 1% bus could be left out, resulting in a much smaller chip.

A bipolar version of the IS2 bus interface on one chip with a thermocouple interface with bit-stream output is realized as well [21]. The block diagram is shown in Fig. 32. The photograph is shown in Fig. 33. The simplicity of the IS* bus interface made it possible to combine both the analog part (on the left) and the digital part (on the right) on one chip in bipolar technology.

5. Conclusions

Economically feasible data-acquisition systems with many sensors for consumer applications, such as smart cars and smart homes, need integrated smart sensors (ISS).

An integrated smart sensor has been defined as one chip with: (i) one or more sensors; (ii) interfacing including signal conditioning, AD conversion, and standard bus output; (iii) calibration; (iv) intelligence, such as identification and self-test.

This has not yet been fully accomplished. However, intermediate steps have been made. This paper has concentrated on simplifying AD conversion, calibration and bus output, so that these functions can be integrated with the sensor(s) and signal conditioning on one chip, providing a standard output signal format.

Digital interfacing can be realized efficiently with indirect converters, which produce a frequency, a duty cycle, or a sigma-delta bit stream. Sigma-delta bit- stream converters in particular appear to be a powerful tool.

281

Calibration with bit-stream signals considerably sim- plifies the circuit for analog as well as for digital output signals.

Two simple local bus interfaces, the inter-integrated circuit (12C) bus and integrated smart sensor (IS’) bus, are presently realized on the sensor chip. The IS* bus is able to transfer digital words as well as bit streams or true analog signals on the data line.

References

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16 J. Btyrek, Evolution of smart transducer design, Sensor Erpo Werr, San Jose, CA, USA, Mar. 2-4, 1993.

17 D. Hammerschmidt er aL, A CMOS piezoctsistive pressure sensor with on-chip programming and calibration,Proc. ISSCC 93, San Fmnckco, CA, USA, Feb. 24-26, 1993, pp. 128, 129, 274.

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19 F.R. Riedijk, R.F. Tuk and J.H. Huijsing, A bus-controlled interface environment for an accurate read-out and flexible interconnection of integrated smart sensors in local systems,

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20 E.J. Hogenbirk, H.J. Verhoeven and J.H. Huijsing, An integrated smart sensor for flow and temperature with I%! bus interface based on thermal sigma-delta modulation, Rec. 7th Int. Con5 Solid-State Sensors and Ac&akxs (Tmmducers ‘93), Yokohama, Japan, June 7-10, 1993, pp. 792-795.

21 M. Bredius, F.R. Riedijk, F.R. Tuk and J.H. Huijsing, A smart thermopile interface circuit with IS* bus conununication, Pmc 7th Int. Co@ Solid-State Sensor and Actuators (Tmns- ducers ‘93), Yokohama, Japan, June 7-10, 1993, late news abstr., pp. 4849.

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Developments in integrated smart sensors