Design Example – One-Lane Traffic Controller

(Class 14.1 – 11/27/2012)

CSE 2441 – Introduction to Digital Logic

Fall 2012

Instructor – Bill Carroll, Professor of CSE

Today’s Topics

• Reminders

– 12/4 – Lab open for demonstrating project

– 12/5 – Project report due

– 12/11 (2:00 PM to 5:00 PM) – Final exam

• Design example

– Design a one-lane traffic controller

– Illustrate hierarchical design – Modules

– Illustrate one-hot state assignments

Design Specifications

Traffic entering the one-lane section will be regulated by standard green/yellow/red traffic signals. Assume that each signal element can be controlled individually. Embedded sensors will detect when vehicles enter and leave the one lane section. Each sensor produces an output pulse, S1 and S2, when it detects a vehicle. The one lane section must be clear of vehicles before the direction of traffic flow is switched.

T1 = the time that light G1 is on. T2 = the time that light G2 is on. TY = the time that the yellow lights are on and is a constant (10 seconds). T1 and T2 are variable multiples of 10 seconds. Their values will be adjusted every five minutes based on traffic flow.

Traffic Controller Block Diagram

Time-Base Oscillator Subsystem

The time-base oscillator will generate a clock signal that will be used to compute the times at which lights will be switched. The 10-second yellow light period will be assumed to be the shortest event in this system. All other switching times will be computed as multiples of 10 seconds. Thus, a clock signal with a period of 10 seconds will be used. The amount of green light time allocated to each direction will be recomputed every 5 minutes. Therefore, the oscillator will increment a counter that will be used to generate a pulse every 5 minutes.

Time-base Generator Design

Cars-On-Road Counter

To determine whether cars remain on the road prior to activating a green light, a counter will be used to compute the difference between the number of cars entering the road, NE, and the number of cars leaving the road, NL.

The road is assumed to be all clear whenever NE – NL = 0.

The number of cars entering the road is determined by counting pulses from one sensor, and the number of cars leaving is determined by counting pulses from the other sensor. Since the only condition of interest is whether NE – NL = 0, the actual counts are not needed.

Therefore, an up/down counter will be used that will be incremented by pulses from sensor S1 and decremented by pulses from sensor S2. A counter output signal will indicate the condition NE – NL = 0.

Cars-On-Road Counter

Traffic Counter

To determine the relative amount of green light time allocated to each direction, a counter will be used to compute the difference between the numbers of cars traversing the road in each direction.

As with the cars-on-road counter, the traffic counter will be incremented by cars moving in one direction and decremented by cars moving in the opposite direction.

Pulses from S1 will be used in both cases. The count will be sampled every 5 minutes, signaled by a pulse from the time-base oscillator, after which the counter will be reset to zero to begin the next 5-minute period.

Green-Timer Design

Green-Time Allocator

This module will recompute the green light durations T1 and T2 at the end of each 5-minute period based on the output of the traffic counter.

Assuming D1 to be the traffic count in direction 1 and D2 to be the count in direction 2, T1 will be increased if D1 – D2 > 0 and decreased if D1 – D2 < 0.

T2 will be computed as Ttot - T1. Ttot = 160 seconds for this design.

Initially, T1 = T2 = 80 seconds.

Limit values will be used to ensure that neither T1 nor T2 drop below a minimum period of 40 seconds to prevent stalling traffic flow in either direction.

Green-Timer Design

Control Unit Design The state machine control unit will coordinate the operation of the traffic light controller and generate the ON/OFF signals for the six lamps, cycling through them according to the timing diagram previous shown, with switching times based on the outputs of the cars-on-road detector and the green time allocation module.

State definitions from previous timing diagram

State Light 1 Light 2

A Green Red

B Yellow Red

C Red Red

D Red Green

E Red Yellow

F Red Red

State Sequence

One-Hot State Assignments

• Assign one state variable per state

• Assignment for the previous state diagram – A: 100000

– B: 010000

– C: 001000

– D: 000100

– E: 000010

– F: 000001

• Advantages – simplicity of assignment

• Disadvantages – may require more complicated circuits

Control Unit Logic Circuit Diagram

G1 = A G2 = D Y1 = B Y2 = E

R1 = (G1 + Y1)’ R2 = (G2 + Y2)’ SHIFT_EN = A∙T1 + B + C∙CLR + D∙T2 + E + F∙CLR