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Controlled Impedance Line Designer
Pegah Alavi, Harald Davos
September 18, 2014 New Keysight EEsof EDA Simulation Tools for
Signal Integrity, Power Integrity, and EMI/EMC
Page Agenda
– Why Controlled Impedance Line Designer, CILD
– How CILD works
– See it in Action!
– Take Action!
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC 2
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Why use CILD
– Transmission lines are key components, which greatly influence signal integrity
– Their effect must be taken into account even during the ‘Pre-layout’ design phase
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
3
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Why use CILD
– Target characteristic impedance
• Find stack-up and line dimensions to reach
target impedance
• Investigate tolerances against manufacturing
variations in dimensions and material properties
– What really matters is not only the impedance but
also signal quality at the receiver
• Integrated design flow: use stack-up and
transmission line parameters in schematic and
layout
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
4
Page
How CILD Works
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
5
Page
How it works: Substrate
Technology Substrate
– Stack-up, materials, vertical dimensions
– Used by EM simulations from layout
– Now also used by Line Type components in schematic → schematic and layout substrate always in sync
– Graphical Editor
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
6
Page
How it works: Controlled Impedance Line Designer
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
7
- Microstrip Single-Ended
- Microstrip Edge-Coupled
- Microstrip Broadside-Coupled
- Stripline Single-Ended
- Stripline Edge-Coupled
- Stripline Broadside-Coupled
- Coplanar Waveguide Single-Ended
- Coplanar Waveguide Edge-Coupled
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How it works: Line Type Definition
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
8
Cross Section info
- Layers of signal lines and planes
- Width(s), spacing(s), clearance(s)
Stored in ADS library to be used in
- Schematic
- Layout
Page
Line Type Components and Traces
For Schematic and Layout
– Use Layer information from Line Type
– Width, Spacing and Corner Style either taken from Line Type or from a component’s parameter
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
9
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Typical design flow
– Substrate
– Controlled Impedance Line Designer
– Line Type definition
– Circuit simulation
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
10
Demo1: CILD
Page
Demo 2: Measurements Correlation at 40 GHz
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
11
T-LINE MODEL
MEASURE
EM MODEL
1.5 inches, 10mil width, 342 mil Stub
CMP28 Starter Kit
Page
Take Action!
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
12
– Try it for yourself!
• Download and try the CILD example on Keysight EEsof Knowledge Center
• Run your design using CILD
– Contact your Keysight representative for licensing and questions
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Appendix
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
13
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CILD Features by ADS version
Feature ADS 2014.01 ADS 2014.11
Controlled Impedance Line Designer Yes Yes
Optimize No Yes
Coplanar Waveguide No Yes
Trapezoidal Cross Section No Yes
LTLine component Yes Yes
LTBend, LTTee, LTCross components No Yes
Layout Traces support Line Type No Yes
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
14
