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DKT 122/3DIGITAL SYSTEM 1

WEEK #8 FUNCTIONS OF COMBINATIONAL LOGIC

(ENCODER & DECODER, MUX & DEMUX)

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Topic Outlines

Encoder Decoder Multiplexers (MUX) Demultiplexers (DEMUX)

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Topic Outlines

Encoder Decoder Multiplexers (MUX) Demultiplexers (DEMUX)

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Encoder

Encoder converts information such as decimal number, alphabetical character, or symbols into some coded form, such as BCD or binary

Encoder is usually used for: Data representation Data security

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Question 1:Design a Decimal to BCD Encoder

Hints:(a) Draw a Truth-Table showing input and output - How many inputs? : 10 (0 to 9) - How many outputs? : 4 because we need 4 bits to express 9 (1001)(b) From the Truth-Table, get the equation for each

output - How many Boolean expression? : 4 since there are 4 outputs(c) Based on the output equation, draw a circuit for

basic decimal-to-BCD encoder

Encoder

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Draw a Truth-Table showing input and output

DECIMAL DIGIT

BCD CODEA3 A2 A1 A0

0 0 0 0 01 0 0 0 12 0 0 1 03 0 0 1 14 0 1 0 05 0 1 0 16 0 1 1 07 0 1 1 18 1 0 0 09 1 0 0 1

Encoder

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(b) From the Truth-Table, get the equation for each output:

A3= Σ m(8, 9) A2= Σ m(4, 5, 6, 7) A1= Σ m(2, 3, 6, 7) A0= Σ m(1, 3, 5, 7, 9)

(c) Based on the output equation, draw a circuit for basic decimal-to-BCD encoder

(a) Logic symbol for a 10-line-to 4

line encoder(b) Logic diagram. A 0-digit input is

not needed because the BCD outputs are all low when there are no HIGH inputs

(a)

(b)

Encoder

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A decoder is a circuit that creates an output based on the binary states of a given input

Do the opposite of encoder

Decoder

Decoder block diagram

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Decoding logic for the binary code 1001 with an active-HIGH output.

Basic Binary DecoderExample: To determine when a binary 1001 occurs on the input of a

digital circuit, AND gate can be used as the basic decoding element.

AND gate -> produce HIGH output when all inputs are HIGH How to ensure that inputs to the AND gate are HIGH when

binary 1001 occurs?

Other than this inputcombinations, the output is 0

Decoder

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Question 2:(a) Determine the logic required to decode the binary

11100 by producing a high level (active-HIGH) on the output.

Active-HIGH produce HIGH output

Decoding function,

A4

A2

A1

A0

A3

Decoder

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4-bit Decoder

This type of decoder is called 4-line-to-16-line decoder or 1-of-16 decoder

For a 4-bit decoder, there are 16 possible combinations (24=16). This means that 16 decoding gates are required

Decoder

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3 to 8 Binary

Decoder

Question: Is this active-HIGH or active-LOW output?

Decoder

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Example: Seven Segment Decoder A seven segment decoder has

4-bit BCD input and the seven segment display code as its output:

In minimizing the circuits for the segment outputs all non-decimal input combinations (1010, 1011, 1100,1101, 1110, 1111) are taken as don’t-cares

D C B A a b c d e f g0 0 0 0 1 1 1 1 1 1 00 0 0 1 0 1 1 0 0 0 00 0 1 0 1 1 0 1 1 0 10 0 1 1 1 1 1 1 0 0 10 1 0 0 0 1 1 0 0 1 10 1 0 1 1 0 1 1 0 1 10 1 1 0 0 0 1 1 1 1 10 1 1 1 1 1 1 0 0 0 01 0 0 0 1 1 1 1 1 1 11 0 0 1 1 1 1 0 0 1 11 0 1 0 0 0 0 1 1 0 11 0 1 1 0 0 1 1 0 0 11 1 0 0 0 1 0 0 0 1 11 1 0 1 1 0 0 1 0 1 11 1 1 0 0 0 0 1 1 1 11 1 1 1 0 0 0 0 0 0 0 --

don

’t c

are

inpu

ts --

Decoder

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Multiplexers (MUX)

MUX is a device that allows digital information from several sources to be routed onto a single line for transmission

It is made up of several data-input lines and a single output line. It also has data-select inputs which permits digital data on any one of the inputs to be switched to the output line.

MUX is also known as data selectors

Logic symbol for a 4-input multiplexer (4:1 MUX)

n select inputs

1 data output

2n data inputs

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2:1 MUX

Logic circuit Truth-table

Multiplexers (MUX)

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DATA-SELECT INPUTS INPUT

SELECTEDS0 S1

0 0 D0

0 1 D1

1 0 D2

1 1 D3

If a binary 0 (S0=0 and S1=0) is applied to the data-select lines, the data on input D0 appear on the data-output line

2 data-select lines means thatany one of the 4 data-input linescan be selected

4-to-1MUX

S0

ZD1

D0

S1

D3

D2

D0D1D2D3 S1 S0

Z

4:1 MUX

Multiplexers (MUX)

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Total expression for the data output is:

013012011010 SSDSSDSSDSSDY

Logic diagram for 4:1 MUX

4:1 MUX

Multiplexers (MUX)

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Question 3:Construct an 8:1 multiplexer using block diagram.

8 input lines means there must be 3 data select lines.

Multiplexers (MUX)

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Demultiplexers (DEMUX)

DEMUX reverse the multiplexing functions It takes digital information from one line and distributes it

to a given number of output lines DEMUX is also known as data distributor

1-line to 4-line DEMUX

1 data input

n select inputs

2n data outputs

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1:4 DEMUX

Demultiplexers (DEMUX)

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Question 4:Construct a 1:4 DEMUX using block diagram. Show the equivalent Truth-Table.

1-4DEMUX

S 0

I0Q1Q0

S 1

Q3Q2

1-4DEMUX

S 0

I0Q1Q0

S 1

Q3Q2

S0

S1 Q0

Q1

I0

Q2

Q3

S1 S0 I1 Q3 Q2 Q1 Q0

0 0 1 0 0 0 1

0 1 1 0 0 1 0

1 0 1 0 1 0 0

1 1 1 1 0 0 0

Truth-table

Block diagram

Logic circuit

Demultiplexers (DEMUX)

END