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CODE BANKING USING THE KEIL 8051 TOOLS

1. Relevant DevicesThis application note applies to the following devices:C8051F120, C8051F121, C8051F122, C8051F123, C8051F124, C8051F125, C8051F126, and C8051F127.

IntroductionThe 8051 architecture supports a 64KB linear pro-gram memory space. Devices that have more than64KB of program memory implement a code bank-ing scheme to surmount this 64KB limit. Thisapplication note discusses software project man-agement techniques and provides example applica-tions that use code banking.

Key Points Projects requiring less than 64KB of FLASH

can leave the PSBANK register at its default setting which provides a 64KB linear address space.

Code banked projects with more than 64KB of program code typically contain multiple source files, one or more for each code bank.

Code Banking OverviewThe C8051F12x family of devices has 128KB ofon-chip FLASH, divided into 4 physical 32KBbanks. This program memory space can be used to

hold executable code or constant data. Figure 1shows the code banking model implemented bythese devices. Instruction fetch operations (normalcode execution) are handled independently of con-stant data operations (MOVC instructions, andMOVX instructions when used for writing toFLASH). Each type of operation has its own bankselect bits that may select any of the 4 banks asshown in Figure 1. All code bank switching is han-dled at the device level by writing to the PSBANKregister. The COBANK and IFBANK bits in thisregister control switching for constant codeaccesses and instruction fetches, respectively. Formore information on code bank switching, pleaserefer to the C8051F12x datasheet.

Constant DataBank SelectCOBANK = 2

CommonArea

0x0000through0x7FFF

Bank 1

0x8000through0xFFFF

Bank 2

0x8000through0xFFFF

Bank 3

0x8000through0xFFFF

Instruction FetchBank SelectIFBANK = 1

Bank 0

0x8000through0xFFFF

Default 64KBLinear AddressSpace When

COBANK = 1IFBANK = 1(reset value)

Figure 1. C8051F12x Code Banking Model

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For projects that require more than 64KB of codespace or non-volatile data space, the user has theoption of manually handling the bank switching insoftware or setting up a code- banked project. Bothmethods are discussed in this note.

User-Managed Bank Switching for Data Intensive ProjectsUser-managed bank switching is useful for projectsthat have less than 64KB of executable code butneed to store large amounts of data in FLASH. Inthis situation, the Common area and Bank 1 areused for program memory while Bank 2 andBank 3 are used for data storage. The project doesnot need to be set up for code banking.

The following data logging example shows howbank switching can be managed in application soft-ware.

Example 1: Data Logging ApplicationThis application uses a 22.1184 MHz crystal oscil-lator to implement a software real-time clock(RTC). PCA0, configured to count Timer 0 over-flows, generates an interrupt once every second.The interrupt handler records the current time anddevice temperature in a non-volatile log in FLASH.

The 112,640 byte log cycles through all 4 codebanks recording time and temperature. Each datarecord has 6 fields as shown in Figure 2. The log iscapable of storing 14080 records over a time periodof 3.9 hours. Once the log is full, it continues log-

ging at the beginning of log, erasing the FLASHpage with the oldest data as it progresses.

Managing the Instruction Fetch Bank Select

Since this application uses less than 32KB ofFLASH for program code, there will be no instruc-tion fetches from the 0x8000 to 0xFFFF memoryspace. This makes the value of IFBANK a dontcare. However, if an application uses between32KB and 64KB of FLASH for program code,IFBANK should be left at its reset value, targetingBank 1.

Advancing Through the Code Banks

This application reserves the first 16KB of FLASHin the Common area for program code. The logstarts at address 0x4000 in the Common area andends at location 0xF7FF in Bank 3 as shown in

Figure 2. Log Record Structure

":"0x3A 0xFFADC READINGMINUTES SECONDSHOURS

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Figure 3.

After storing a record in the log, the FLASH writepointer is advanced to the next record and checkedfor code bank boundaries. There are three possibleboundary conditions to consider when adjusting theFLASH write pointer. These cases are outlined in

Table 1 .

Preserving the PSBANK Register in Functions and Interrupt Service Routines

A program must preserve and restore the value ofthe PSBANK register in every function and inter-rupt service routine that switches code banks.

Choosing Log Record Size

Example 1 only writes entire records to FLASH. Ifthe record size is a power of 2 and the log starts atthe beginning of a FLASH page, then all recordswill be contained within one of the code banks. If arecord can cross a bank boundary, then boundschecking must be performed after every byte write.

Keeping Accurate Time

This application keeps track of time by implement-ing an interrupt driven real-time clock. WithSYSCLK at 49.7664 MHZ, Timer 0 in mode 2overflows exactly 4050 times every second whenclocked by SYSCLK/48. PCA Module 0 is config-ured in Software Timer Mode to count Timer 0overflows and generate an interrupt every second.

CommonArea

0x0000through0x7FFF

Bank 1

0x8000through0xFFFF

Bank 2

0x8000through0xFFFF

Bank 3

0x8000through0xFFFF

16KB reservedfor program code

0x4000

1KB FLASH, LockBits, and

Reserved Area

0xF7FF

0x7FFF

0x8000

0xFFFF

0xFFFF

0x8000

0x8000

0xF800

14080 x 8

Non-VolatileTimeand

TemperatureLog

112,640bytes total

0x0000

Figure 3. FLASH Memory Map for Example 1

Table 1. FLASH Write Pointer Boundary Conditions

Condition How to Detect Typical ActionFLASH write pointer reaches the end of the Common area.

FLASH write pointer will point to location 0x8000.

No action is necessary if COBANK is always set to Bank 1 whenever the pointer is moved to the beginning of the log.

FLASH write pointer reaches the end of Bank 1 or Bank 2.

FLASH write pointer will point to location 0x0000.

FLASH write pointer should be set to 0x8000 and COBANK should be incre-mented.

FLASH write pointer reaches the end of the log.

FLASH write pointer will point to location 0xF800 and Bank 3 will be selected by COBANK.

FLASH write pointer should be reset to the first location in the log (0x4000) and COBANK should select Bank 1.

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Project-Managed Bank Switching for Code- Intensive ApplicationsThe Keil 8051 development tools support codebanking by generating code that can automaticallyswitch and preserve the PSBANK register. Thisallows the user to expand 64KB projects to 128KBwithout modifying existing modules. Using thecode banking capability of the Silicon Labs IDE orthe Keil Vision2 for projects containing more than64KB of program code is recommended to takeadvantage of this feature.

To use the Keil 8051 tools for code banking, theproject needs to be configured. The configurationrequired for code banking is supported inVersion 1.7 and later of the Silicon Labs IDE andVersion 2.00 and later of Vision2. Step-by-stepinstructions on how to configure a Silicon LabsIDE project and a Vision2 project for code bank-ing are included in example 2.

Code banked projects typically contain multiplesource files, one or more for each code bank. Thisgreatly simplifies project configuration, as will beshown in example 2. In addition to source files, allprojects configured for code banking must includea code banked version of STARTUP.A51 andL51_BANK.A51. These files can be found in theSilicon Labs IDE installation directory,Cygnal\Examples\C8051F12x\Asm

Example 2: Project-Managed Code Banking This example shows how to set up a code bankedproject using the Keil development tools. It usesTimer 3 and Timer 4 interrupts to blink the LEDand output a 1 kHz sine wave on DAC1, respec-tively. The code that blinks the LED is located inBank 3 and the code that outputs a sine wave islocated in Bank 2. Since interrupts must be locatedin the Common area, both interrupts call a functionin one of the banks to perform the desired task.

This example contains three source files, one foreach bank and the Common area, and two requiredproject files, as listed in Table 2 .

Step by Step Instructions on Configuring a Code Banked Project Using the Silicon Labs IDEThe following steps show how to configure thecode banked example project using the SiliconLabs IDE.

1. Start the Silicon Labs IDE and add the fileslisted in Table 2 to a new project. Additionally,an example project is included named exam-ple2.wsp.

2. Open the Tool Chain Integration window fromthe Project menu and select the Linker tab asshown in Figure 4. Click on the Customizebutton. A window similar to the one shown inFigure 5 should appear on the screen. Select theprocessor you are using from the pull downmenu. This enables code banking by adding theBANKAREA directive to the linker commandline parameters. For more information on theBANKAREA directive, please refer to Chapter 9of the Keil Assembler/Linker manual,

Table 2. Files needed by Example 2

common.c

bank2.c

bank3.c

STARTUP.A51

L51_BANK.A51

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accessible in PDF format from the Help menuof the Silicon Labs IDE.

3. Open the Target Build Configuration windowfrom the Project menu and click the Customizebutton,