Class AB Output Stage - Penn Engineeringese319/Lecture_Notes/Lec_22...ESE319 Introduction to Microelectronics 1 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08

ESE319 Introduction to Microelectronics

12008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08 KRL

Class AB Output Stage● Class AB amplifier Operation● Multisim Simulations - Operation● Class AB amplifier biasing● Multisim Simulations - Biasing



Class AB Operation



Basic Class AB Amplifier CircuitBias Q

N and Q

P into slight conduction

when vI = 0.

Ideally QN and Q

P are:

1. Matched (unlikely with discrete transistors).

2. Operate at same temperature.

NOTE. This is base-voltage biasing with all its stability problems!

iL=iN−iP



Class AB Circuit Operation

I N=I P=I Q= I S eV BB

2V T

Output voltage:for v i0 vo=v i

V BB

2−vBEN ⇒vo≈vi

Base-to base voltage is constant!vBENvEBP=V BB

Using:

V T ln iN

I S V T ln iP

I S =2V T ln I Q

I S

for v i0 vo=v i−V BB

2vEBP⇒ vo≈v i

iN=iPi L

vBEN=V BB

2−vO

vEBP=vO−V BB

2

Also: iN=I S evBEN

vT iP=I S evEBP

V T&

Bias:

iN=I S evBEN

vT iP=I S evEBP

V T, I Q=I S eV BB

2V T&

for vi = 0



Class AB Circuit Operation - cont.

V T ln iN

I S V T ln iP

I S =2V T ln I Q

I S V T ln i N iP

I S2 =2V T ln I Q

I S V T ln iN iP−V T ln I S

2 =2V T ln I Q−2V T ln I S

ln iN iP =ln I Q2

iN iP=I Q2

iN=iPiL

Constant base voltage condition:




iN iP=I Q2

Constant base voltage condition:

Kirchhoff's Current Law condition:

iN=iPiL⇒ iP=iN−iL

Combining equations:iN iN−iL=I Q

2

Hence:iN2 −i N iL−I Q

2=0

iN=iPiL

iP iPiL=I Q2or

iP2iP i L−I Q

2=0orfor v

I > 0 V for v

I < 0 V

for vI > 0 V for v

I < 0 ViL=

vO

RL




Observations:1. Since with constant base voltage V

BB:

, if iP increases by

then iN decreases by , and vice-versa.

2. For vO > 0, the load current i

L supplied by the complementary emitter

followers QN and Q

P. As v

O increases, i

P decreases and for large, positive

vO i.e.

iN iP=I Q2

iP=iP 1 i i N=iN /1 i

iP=iN−iL=iN−vO

RLvO large⇒ iP0

i N=iPiL=iPvO

RL

hence

3. For vO < 0, the load current i

L supplied by the complementary emitter

followers QN and Q

P. As v

O decreases, i

N decreases and for large, negative

vO i.e. hence −vO−large⇒ iN 0

iN iP= I Q2iL=iN−iP




iP=I Q2

iNWrite the product equation as:

For example let IQ = 1 mA and iN = 10 mA.

iP=1⋅10−6

10⋅10−3=0.1mA= 1

100iN

The Class AB circuit, over most of its input signal range, operates as if the Q

N or Q

P transistor is conducting and the Q

P or Q

N transistor

is cut off.

Using this approximation we see that a class AB amplifier acts much like a class B amplifier; but without the dead zone.

where IQ is typically small.



Class AB VTC Plot



Class AB VTC Simulation

VBB/2

VBB/2

VCC

-VCC

RL

RSig

Amplitude: 20 Vp

Frequency: 1 kHz



Class AB VTC Simulation - cont.

V BB

2=0.1V

V BB

2=0.5V

V BB

2=0.7V

Amplitude: 2 Vp

Frequency: 1 kHz



Class AB Small-Signal Output Resistance Instantaneous resistance for theQ

N transistor - assume α 1 :

diN

dvBEN=

I S evBEN

V T

V T=

iN

V T

For the QP transistor:diP

dvEBP=

iP

V T

Hence:reN=

V T

iNreP=

V T

iPand

vI = 0 V

ac ground

ac ground

<=>BN

BP

EN

EP

CN

CP

Rout=reN∥rePfor v

I > 0 V: Rout≈r eN

for vI < 0 V: Rout≈r eP



Small-Signal Output Resistance - cont.The two emitter resistors are in parallel:

Rout=reN∣∣reP=

V T2

iN iP

V T

iN

V T

iP

=V T

iN iP i NiP

iN iP =

V T

i NiP

At iN = iP (the no-signal condition i.e. vO = 0 => i

L = 0): iN=iP=I Q

Rout=V T

2 I Q

So, for small signals, a load current flows => no dead-zone!



Class AB Amplifier BiasingA straightforward biasing approach: D1 and D2 are diode-connectedtransistors identical to QN and QP, respectively.They form mirrors with the quiescentcurrent set by R:

I Q=2V CC−1.42R

=V CC−0.7

Ror:

R=V CC−0.7

I Q

Recall: With mirrors, the device temperature for all transistors needs to be matched!

QN

QP

+

-

VBB

IQ

IQ

IQ

IQ



Widlar Current Source

I REF=V CC−V BE1

R=12V −0.7V

11.3k =1mA

V BE1=V T ln I REF

I S

I O Re=V T ln I REF

I O

IREF

VCC

IO

IO

VBE1

+ +- -V

BE2

R

Re

emitter degeneration

Q2 = QNI

O = I

N

Note: Pages 653-656 in Sedra & Smith Text.

IN = bias current for Class AB amplifier NPN

Note Re > 0 iff IO < IREF

V BE2=V T ln I O

I S

V BE1=V BE2I O Re

V BE1−V BE2=V T ln I REF

I S

I S

I O=V T ln

I REF

I O



Widlar Current Source - cont.

I O Re=V T ln I REF

I O I O=

V T

Reln I REF −ln I O

RI

REF

IO

IO R

e

VCC

Solve for IO graphically.

If IO specified (and IREF chosen by

designer): Re=V T

I Oln I REF

I O

If Re specified and IREF given:

Example Let IO = 10 µA & choose IREF = 10 mA, determine R and Re:

R=V CC−V BE1

I REF=12V−0.7V

10mA=1.13 k

Re=V T

I Oln I REF

I O =0.025V10 A

ln 10m A10A

.=2500 ln 1000=17.27k R=1.13k Re=17.27k



Widlar Current Mirror Small-Signal Analysis

r≫1/gm

.≈.

i x=g m viro=gm vv x−−v

r o

v=−r∥Re i x

i x=−gm r∥Re i xvx

r o−

r∥Re i x

ro⇒ Rout=

vx

i x=Re∥r1g m ro

gm ro≫1

Rout is greatly enhanced by adding emitter degeneration.



iL

Class AB Current Biasing SimulationBias currents set at I

REF and I

O by R and emitter resistor(s) R

e.

IREF I

ON

IOP

IL

PNP Widlar current mirror

NPN Widlar current mirror

RL=100 Ω

Amplitude: 0 Vp

Frequency: 1 kHz

Re=10 Ω

Re=10 Ω

IREFR=2.8 kΩ

R=2.8 kΩ

iN

iL

I REF≈4mA

R=V CC−V BE1

I REF

Re=V T

I Oln I REF

I O

I O≈2mA



Class AB IREF = 4 mA Current Bias Simulation

Quiescent Power Dissipation v

I = 0 V:

PDisp=P D−av=76.31mW75.53mW

.=151.84mW

NPN Widlar current mirror

PNP Widlar current mirror

Amplitude: 0 Vp

Frequency: 1 kHz 4.031m

2.329m

4.025m2.270m



For linear operation: - 9 V < vO < +9 V

VTC has no dead-zone.

Amplitude: 12 Vp

Frequency: 1 kHz

Class AB 4 mA Current Bias Simulation - cont.



Class AB VTC Limits

vCE2=V CC−iN Re−vO ≥V CE2sat

Q2 ≠ Saturation =>

where

2. Q3 ≠ Cutoff =>vBQ3≥ v I0.7V

vO=−iN Rev I

vCE2=V CC−v I ≥V CE2sat

v I ≤V CC−V CE2sat=v I−max1

vBQ3=V CC−iREF R

v I ≤V CC−iREF R−0.7V=v I−max2

v I−max=max v I−max1 , v I−max2

iP

Q2

Q3

Q1

Q4vI

iREF

vO

Linear VTC for vI-max ≤ vI ≥ 0 => 1. Q2, Q3 forward-active



VI V

O

PD+av

PD-av

PL-av

PD+av

PLav

PD-av

I REFN I ON

I OP

NOTE:1. Linear operation up to V

I = 9 V:

PDav

= 946mW, PLav

= 510mW =>

=PLav

PDav=510mW946mW

=0.540.785

2. At VI = 10 V: V

BEQ3 = V

BN – V

I = -0.1V

NPN Q3 is cutoff for VI ≥ 9.5 V.

3. By symmetry PNP Q4 is cutoff for V

I ≤ -9.5V .

3.324m0.018m

2.697m

4.734m1.776u

Class AB 4 mA Current Bias Simulation - cont.

309 mW

V BQ3

V BQ3



ConclusionsADVANTAGE:

Class AB operation improves on Class B linearity.

DISADVANTAGES:1. Emitter resistors absorb output power.2. Power Conversion Efficiency is less than Class B.3. Temperature matching will be needed – more so. if emitter resistors are not used.

TRADEOFFS:Tradeoffs - involving bias current - between powerefficiency, power dissipation and output signal swingneed to be addressed.

Documents

Class AB Output Stage - Penn Engineeringese319/Lecture_Notes/Lec_22...ESE319 Introduction to Microelectronics 1 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) updated 11Nov08