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TMPN3150/3120
Neuron Chip Local Operating Network LSIs
3
Local Operating Network(LON) are low cost, reliable, intelligent local network systems that facilitate communication between sensors and actuators (among a maximum of 32,385 nodes) (see Figure 1). LonWorks technology does not require the dedicated communications networking technology nor special communications protocols of LANs. In contrast, LonWorks can be developed into high-level networks simply by defining the functions to be performed at each node. Moreover, the special architecture of LonWorks systems means that, when reconfiguring an existing network or even changing its functions, the network itself can be used to modify the configuration data or to load programs, etc. Nodes can also be added or removed as required. Figure 2 shows the typical structure of a LonWorks node.
Figure 1. Example of LonWorks System Configuration
Figure 2. Typical structure of LonWorks node with the TMPN3150 (The TMPN3120 does not require external memory. This chip has 10 KB or 16 KB of ROM buit in for the LonTalk® protocol and I/O function programs.)
Neuron®
Neuron® Neuron®
Neuron® Neuron®
Neuron®Neuron®
Power lines
Light Wall controller Motor
Thermalsensor
Router
Remote control
Router RF
Power line transceiver Twisted-pair cable transceiver RF transceiver
Air conditioner Breaker Alarm
Neuron®
Neuron®Neuron®
16K to 58K EPROM/ROM/RAM
Crystal oscillator Power supply
I/O interface circuit
Transceiver
+5 V
Neuron chip(TMPN3150)
Sensor or actuatorFor example, motors, valves, encoders, switches, etc.
Networking medium (twisted-pair cable, RF, power lines, etc.)
I/O port
Communica-tions port
Neuron® Chip Now Available from Toshiba
TMPN3150B1AF(QFP64)
TMPN3120B1AM(SOP32)
TMPN3120E1M(SOP32)
TMPN3120FE3M(SOP32)
TMPN3120FE5M*(SOP32)
TMPN3120A20M*(SOP32)
TMPN3120A20U*(QFP44)
* : Under development
LonWorks System Features
LonWorks technology is a completely new network control system concept developed by Echelon Corporation, USA. The key feature of LonWorks technology is the incorporation of the communications programs in the LonWorks LSI (Neuron® Chip) as firmware (internal LonTalk®). This means that, by using LonWorks, the programs to handle the communication protolcol in communication network systems no longer need be provided by the user. Refer to pages 8 and 9 for details of the LonTalk® protocol. A special version of the C programming language (Neuron® C) is used to reduce the load involved in developing application programs. See page 5 for the features of Neuron® C.The Neuron® Chip has eleven I/O ports which are equipped with the firmware programmable function I/O facility. For example, available features include measurement of an input signal on time (Ontime input) or Triac output suitable for adjusting the intensity of an electric light (see Table 1 to 5). Users can avoid complex program development by selecting the appropriate function I/O facility for each node.
I/O Functions
Table 1. Summary of Direct I/O Mode
Table 4. Summary of Timer/Counter Input Objects
Table 5. Summary of Timer/Counter Output Objects
Table 2. Summary of Parallel I/O Mode
Table 3. Summary of Serial I/O Mode
Bit input/outputByte input/outputLeveldetect inputNibble input/outputTouch I/O
ObjectIO0 to IO10IO0 to IO7 IO0 to IO7 Any adjacent 4 in IO0 to IO7 IO0 to IO7
0, 1 binary data 0 to 255 binary data Falling edge detection 0 to 15 binary dataInterface to Dallas Semiconductor Corp. Touch Memory (TM) standard
Applicable I/O pins Input/Output Value
Muxbus I/OParallel I/O
IO0 to IO10IO0 to IO10
Parallel bidirectional port using multiplexed address technique Parallel bidirectional handshaking port
Object Applicable I/O pins Input/Output Value
Magcard input IO8 (CLK), IO9 (Data) andany of IO0 to IO7
Encoded ISO7811 track 2 data stream from magnetic card reader
Serial input IO8 8-bit characters at 600, 1200, 2400, 4800 or 9600*1 baud(255 bytes max)
Serial output IO10 8-bit characters at 600, 1200, 2400, 4800 or 9600*1 baud(255 bytes max)
I2C I/O IO8 (CLK) and IO9 (Data)Inter-Integrated Circuit bus protocol (usage must be licensed by Philips Electronics)
Magtrack1 input IO8 (CLK), IO9 (Data) and any of IO0 to IO7
For encoding data (ISO3554) from magnetic card reader
Wiegand input Any two adjacent 2 in IO0 to IO6 For encoding data (Wiegand standard) from magnetic card reader
Bitshift input/output Any adjacent pins Up to 16 bits of clocked data
Neurowire I/O IO8 (CLK), IO9 (Data out), IO10 (Data in) and any of IO0 to IO7
Up to 255 bits of bidirectonal serial data
Object Applicable I/O pins Input/Output Value
Dualslope inputEdgelog inputInfrared inputOntime inputPeriod inputPulsecount inputQuadrature inputTotalcount inputEdgedivide output
IO0, IO1 and IO4 to IO7IO4Any of pins IO4 to IO7Any of pins IO4 to IO7Any of pins IO4 to IO7Any of pins IO4 to IO7IO4 and IO5, IO6 and IO7Any of pins IO4 to IO7IO0, IO1 and any of pins IO4 to IO7
Analog input from external operating amp (integrator) A stream of input transitions Encoding of data stream from an infrared demodulator Pulse width of 0.2 µs to 1.678 s Signal period of 0.2 µs to 1.678 s 0.839 s input pulse count (0 to 65,535) Binary grey code change count (±16,383 max) Input pulse count (0 to 65,535) 2n division of input pulse frequency (where n = 0 to 65,535)
Object Applicable I/O pins Input/Output Value
Frequency outputOneshot outputPulsecount outputPulsewidth outputTriac outputTriggeredcount output
Note) Speeds and times given in Tables 1 to 5 are those for a 10-MHz input clock.*1 These values apply only to products for which a 20-MHz input clock is available.
IO0, IO1IO0, IO1IO0, IO1 IO0, IO1IO0, IO1 and any of pins IO4 to IO7IO0, IO1 and any of pins IO4 to IO7
Square wave of 0.3 Hz to 2.5 MHzPulse of duration 0.2 µs to 1.678 s0 to 65,535 pulses0 to 100% duty cycle pulse trainDelay of output pulse with respect to "w", "r" and "t" input edgeOutput pulse controlled by counting input edges
Object Applicable I/O pins Input/Output Value
4
Neuron® C Programming
1. Objects for I/O functionsAll I/O functions can be used simply by selecting the desired I/O object (see Table on page 4) and declaring the object for the I/O pin to be used.
Example: To use pin IO0 for bit input, make the following declaration:
IO_0 input bit Switch;
You can also use the io_in( ) and io_out( ) functions in programs.
2. Automation of network communication protocol (network variables)To expedite packet communications, Neuron® C includes special network variables.As with normal variables, type declaration (int, or unsigned long, etc.) is required, but input or output is specified at the same time.
Example: To declare an int type output network variable, declare the following:
network output int NV_switch_state;
The processing associated with this communications protocol is in firmware and no special code needs to be included in the application program. Messages can be automatically output to the network by assigning a value to a declared output network variable in the application program. Also, if you receive a message, the value of the declared input network variable is automatically updated. the nv_update_occurs( ) event is provided for checking for the automatic updating of input network variables.
3. Event driven schedulerThere is an inbuilt round-robin type scheduler (which does not use the main( ) function) which immediately executes the appropriate task when an event occurs.The event is evaluated in the when clause, and the appropriate task is then executed.
An example program listing is shown on next page.
When (event) task
Round-robin
When (event) task
When (event) task
The "Neuron® C" version of the C programming language is used to develop application programs for theNeuron® Chip. Neuron® C is based on ANSI C, but has added functions for LonWorks technology. The major changes are as follows:
5
6
Example of ProgramThis program uses pin IO5 at the switch node to measure how long a switch is depressed, then sends the time as data to the speaker node, which determines the pitch according to the data and outputs the corresponding frequency to pin IO0.
1: Changes to TRUE when the switch turns OFF 2: Changes to TRUE on receipt of network variable (nv)
IO–0 output frequency ALARM;
network input unsigned long T–in;
2
when(nv–update–occurs (T–in))
io out (ALARM, T–in);
IO0
I/O object
I/O object
Speaker node
Switch node
Network variable
Unsigned long-type data is output
Network variable
IO–5 input ontime SW;
network output unsigned long T–out;
when (io–update–occurs (SW))
T–out = input–value;
IO5
1
Example of Using Internal ∆∑-type A/D Block Diagram
∆∑-type A/D Block Diagram Example of Program
analoginput
Vref
max[1:0]
clk[2:0]
fast clk
A/D Logic
Counter
Latch[15:8] Latch[7:0]
IO4
DI4 enable
DI5 enable2
3
8
comp.
cmp enable status
control
Neuron Chip
+
–DI6 enable
DI7 enable
analog buffer
IO5
IO6
IO3
IO7
#define A2D_CTRL *(int *)0xFFA8 /* control reg. 0xFFA8 */
#define A2D_STS *(int *)0xFFA8 /* status reg. 0xFFA8*/
#define A2D_DATA *(unsigned long *)0xFFA9 /* data reg. 0xFFA9, 0xFFAA */
#define A2D_ENABL *(int *)0xFFAB
#define a2d_enable(clk, mask) A2D_CTRL = (A2D_STS&0x03) | ((clk)<<2) | 0x40; A2D_ENABL = (mask)
#define a2d_disable() A2D_CTRL = A2D_STS&0x1F
#define a2d_done() ((A2D_STS&0x80) !=0)
#define a2d_mux(mux) A2D_CTRL = (A2D_STS&0x5C) | (mux)
#define a2d_read() A2D_DATA
I0_3 output bit i03; // enable I0_3 driver
#pragma ignore_notused i03
unsigned long analog_data;
when( reset )
a2d_mux( 0 ); // I0_4 select
a2d_enable( 0,9 ); // clk 0 select, I0_4,7 DI disable
when(a2d_done())
analog_data = a2d_read();
Standard Network Variable Types (SNVTs)
For overall network program development, it is worthwhile considering the function to be performed at each individual node's I/O ports. For this reason, data required form the network can be logically connected to the network simply by issuing an input command with a network variable (see Table 6). If transmission across the network of data or information read form the I/O port is required, it can be logically connected to the network simply be issuing an output command with a network variable (SNVTs). These logical connections can be performed by binding across the network after the node has been configured. Optional data other than network variables can also be transmitted in packets. A maximum of 228 bytes per packet can be inserted and manipulated by the user as required. Consequently, in a LonWorks system, individual nodes can be developed using object-oriented programming and expanded to form a network with high overall performance.
Table 6. Example of Standard Network Variable Types (SNVTs)
7
Name Measurement
Length
Length
Temperature
Voltage
Count, event
Flow
Energy, elec
Level, continuous
Unit
m
km
˚C
V
counts
liters/second
kilowatt-hour
%
Range
0 to 6,553.5
0 to 6,553.5
–274 to 6,279.5
–3,276.8 to 3,276.7
0 to 65,535
0 to 65,534
0 to 65,535
0 to 100
OFF
LOW
MED
HIGH
ON
"Null State (U0)" not in use
"Call Initiated (U1)"
"Overlap Sending (U2)"
"Outgoing Call Pro-ceeding (U3)"
"Call Delivered (U4)" hearing ringback
0
1
2
3
4
0
1
2
3
4
Resolution
0.1 m
0.1 km
0.1 ˚C
0.1 volt
1 count
1 /s
1 kWh
0. 5 %
SNVT#
17
18
39
44
8
15
13
21
SNVT–length
SNVT–length–kilo
SNVT–temp
SNVT–volt
SNVT–count
SNVT–flow
SNVT–elec–kwh
SNVT–lev–cont
SNVT–lev–disc
SNVT–telcom
Level, discrete
Phone state
22
38
1
8
2
The LonTalk® Protocol
The LonTalk® protocol, which supports a wide range of applications, is designed to support all communications on the LonWorks network. Examples include electronic home appliances, factory automation equipment, motor vehicle control equipment, building control equipment, and home automation equipment. The LonTalk® is a full 7-layer protocol as defined by the Open Systems Interconnection (OSI) reference model of the International Standards Organization (ISO) (see Table 7). Compatible with other LonWorks-based products. Communications data is transferred in relatively small packets, increasing network efficiency. Compatible with multiple media.
Table 7. LonTalk® Protocol Layers
LonTalk® Protocol Features
Multiple Media Support The following media are supproted by the LonTalk® protocol: Twisted pair (TP) Power line (PL) Radio frequency (RF) Infrared (IR) Coaxial cable (CX) Optical fiber (OF)
Table 8. Example of Transceiver Specifications
The above transceiver modules are marketed by Echelon Corp.
Support for Multiple Communications Channels
A channel consists of one transmission medium block (see Figure 3). A network consists of multiple channels. The interconnection of these channels is supported by devices called bridges and routers. Bridge: A bridge transfers all packets input from one channel to another channel. Router: A router determines the destination node address for a packet on a channel and decides whether or not to transfer the packet to a different channel. The intelligent router improves the communica- tions efficiency of a medium.
Power line (PL) 10 kbps According to setup conditionUsing the modified direct sequence spectrum modulator LSI form Echelon Corporation
39 kbpsLess than 1.2 km for 32 nodes(using a RS-485 line transceiver IC)
With both ends of the twisted-pair cable terminated78 kbps Less than 2 km for 64 nodes (using a communications pulse transformer)
1.25 Mbps Less than 500 m for 64 nodes (using a communications pulse transformer)
78 kbpsLess than 500 m for 64 nodes(using free topology transceiver) Free topology
Twisted pair
78 kbpsLess than 500 m for 64 nodes(when using link power transceiver)
Free topologyPower supply can be linked to twisted-pair cable.
Medium Data rate Range Remarks
Figure 3.
Example of Network Topology
Subnet
Domain
Router
Groupmember
Group
Node
Bridge
Bridge
Services provided
7
OSI layer
Application compatibility
Purpose
Data interprotation
Remote actions
End-to-end reliability
Destination addressing
Media access and framing
Electrical interconnect
Network variable: Recognition of types and standardization. General-purpose message functions
Network variables, foreign frame transmission
Request/response, authentication, network management
Acknowledged and unacknowledged, unicast and multicast authentication, common ordering, duplicate detection
Addressing, routing information
Framing, data encoding, CRC error checking, predictive CSMA, collision avoidance, priority, collision detection.
Media-specific interfaces and modulation schemes
6
5
4
3
2
1
Application
Presentation
Session
Transport
Network
Link
Physical
The specifications of the LonWorks® transceivers that connect these media include transmission distance and data rate topology. Transceivers matching the required specifications enable interconnectivity with the LonWorksnetwork. Table 8 lists the transceivers defined to date.
9
3
4
5
6
Improved Communications Response Times
The LonTalk® protocol uses a unique collision avoidance algorithm.The collision avoidance algorithm allows a channel to manifest its maximum transmission throughput without any deterioration due to excessive collision. In addition, collision detection is supported as an option for particular media, including twisted pair. Collision detection further improves the response time in the event of a collision. The LonTalk® protocol can support more than 500 transactions per second (in the case of 12 byte length), when the transmission rate is 1.25 Mbps using twisted pair.Although it may not be possible to slow down transmission for certain node applications, the LonTalk® protocol supports media access in which a priority rating can be set for each node (priority mode).Immediate access to the medium is guaranteed when the end of communication on that medium is detected at a node for which a priority rating has been established.
Improved Communications Reliability
The LonTalk® protocol supports an end-to end communications acknowledge mode auto with retry function.When a node sends a message in this mode to another node or a group node, the receiving node sends an acknowledgment to the sender when the message is received. If the sender does not receive the acknowledgment within a set time, it automatically resends the message. The number of retries can also be set.The "Request/Response" mode is an even more reliable communications mode. When a sending node requests a certain process to be performed by another node, the receiving node executes the process and returns the result to the sending node.
Improved Security
The LonTalk® protocol includes an "Authentication mode". In this mode, authentication is carried out between the nodes that are to communicate without complex encryption being performed. This mode prevents unauthorized network access without any reduction throughout.
Communications Compatibility of LON Products
Products that use the LonTalk protocol are designed for mutual communications control even with the products of other manufacturers. The Standard Network Variable Type (SNVTs) declaration statement in the LonTalk® protocol firmware defines the format of data transmitted by the communications packet and, by using the variable types of the particular network, enables communications with other products using the same declaration statement without the tedium of developing communications protocols.
Network Management Service
The LonTalk® network management service is the heart of the LonTalk® protocol. Support for this service is built into every LonWorks®
node. Thus, irrespective of its location, every node can respond to LonTalk® commands from nodes that have been specified for executing the network management function. The following lists some of the services supported by network management messages. Find unconfigured nodes and download network address Stop, start, and reset node applications Access node communications statistics Configure routers and bridges Download new application programs To ensure security, authoriy can be specilied as a condition for network management messages irrespective of application messages.
Extract topology of active network
Modify network variable configuration table. The table contains information on the protocol service type used for sending the network variables and whether the authentication serviceis in use or to send the variables to a priority slot.
Neuron® Chip Communication Ports
The TMPN3150 and TMPN3120 have five dedicated communication ports, allowing them to be configured for communications with each type of medium. Table 9 shows the communication port conditions.
Table 9. Communication Port Pin Functions
Pin name
RX: Receive TX: Transmit CDet: Collision Detection This can be set by using option.
Currency consum(mA)
Differential mode Single-ended mode Special-Purpose mode
CP.0
CP.1
CP.2
CP.3
CP.4 1. 4
RX+(in)
RX–(in)
TX+(out)
TX–(out)
TX enable(out)
Up to Sleep(out)
Bit Clock(out)
Up to Sleep(out) or Wake-up(in)
Frame Clock(out)
1. 4
40
Up to CDet(in)
RX(in)
TX(out)
1. Differential Mode
Figure 4 shows a simple connection example using differential mode.
Example of twisted-pair direct connection(Conditions) Wire: Twisted pair (22 AWG)
Bus length: 30 m max Stub length: 30 cm max Number of nodes: 64 max/channel Communication rates: 1.25 Mbps
Figure 5 shows an example of the output waveforms in differential mode. A transformer can also be used for isolation from the media.
Example of transformer connection (1)(Conditions)
Example of transformer connection (2)(Conditions)
Wire: Twisted pair (22 AWG) Bus length: 500 m max (typical) Stub length: 30 cm max Number of nodes: 64 max/channel Communication speed: 1.25 Mbps
Wire: Twisted pair (22 AWG)Bus length: 2000 m max (typical) Stub length: 3 m max Number of nodes: 64 max/channelCommunication speed: 78 kbps
Neuron®
ChipTMPN3150orTMPN3120
Neuron®
ChipTMPN3150orTMPN3120
(All resistors are metal film ±1%, 1/8 W)
*All Neuron chips need common ground level.
Node #1
Node #64
102 Ω
CP0CP1CP2CP3CP4
2 kΩ51 Ω51 Ω
2 kΩ
2 kΩ
+5 V
+5 V
CP0CP1CP2CP3CP4
102 Ω
2 kΩ51 Ω51 Ω
2 kΩ
2 kΩ
+5 V
+5 V
Figure 4. Example of Differential Mode, Twisted-Pair Direct Connection
1CP2 (Output)CP0 (Input) +Data
CP3 (Output)CP1 (Input)
–Data
T
1 1 1 10 0 0 0
Bit Sync.
Preamble
ByteSync.
Data+16 bit CRC Line-CodeViolation
Beta 1 Beta 2
Figure 5. Example of Output Waveforms in Differential Mode (T: 800 ns, 1.25 Mbit/s)
10
3. Special-Purpose Mode
RS-485
1
T
1 1 1 10 0 0 0
1 0 7
Bit Cloock OutputCP2
Frame Clock OutputCP4
RX Input CP0
TX Output CP1
STATUSMSB LSB MSB DATA LSB
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6
1 0 7
MSB STATUS LSB MSB DATA LSB
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6
2. Single-Ended Mode
Figure 6 shows a connection example for a RS-485 transceiver using single-ended mode. In this example, both ends are terminated with 120 Ω. The maximum network bus length is 1200 m.
Figure 7 shows an example of the output waveforms in single-ended mode.
Wire: Twisted pair (22 AWG) Stub length: 0 cm Number of nodes: 32 max/channel Communication speed: 39 kbps
CP0CP1CP2CP3CP4
Neuron®
ChipTMPN3150orTMPN3120
120 Ω
Node #1
10 kΩ2 kΩ
+5 V
+5 V
120 Ω
Node #32
RS-485
(All resistors are metal film ±5%, 1/8 W)
CP0CP1CP2CP3CP4 10 kΩ
2 kΩ
+5 V
+5 V
Neuron®
ChipTMPN3150orTMPN3120
*All chips ground level must be within ±7 V.
Figure 6. Example of Single-Ended Mode RS-485
CP1(Output)
CP0(Input)
CP2(Output) TransmitEnable
Data
Bit Sync.
Preamble
ByteSync.
Data+16 bit CRC Line-CodeViolation
Beta 1 Beta 2
Figure 7. Example of Output Waveforms in Single-Ended Mode (T: 25.6 µs, 39 kbit/s)
Figure 8 shows an example of the communication waveforms in special-purpose mode. This mode allows more complex data trunsfer between the Neuron Chip and transceiver. It is used with transceivers such as electric power line trunsceivers.
Figure 8. Example of Input and Output Waveforms in Special-Purpose Mode
11
(Conditions)
Table 10. Comparison of TOSHIBA Neuron® Chip
2
V Ref
–+
Timing and control
Neuron® Chip Family
The neuron chip family provided by Toshiba consists of the TMPN3150B1AF and TMPN3120B1AM/E1M/A20M/ A20U/FE3M/FE5M. A block diagram of the TMPN3150B1AF is shown as following.The main hardware components of the TMPN3150B1AF and TMPN3120B1AM/E1M/A20M/A20U/FE3M/FE5M are the same unless noted in Table 10.
EEPROM
(512 Bytes)
RAM
(2 KBytes)CPU 1 CPU 2 CPU 3
Memory expansion bus
Internal 16-bitaddress bus
Internal 8-bitdata bus
ControlClockand
Timers
Networkcommunication
port(transceiver)
Application I/O blockWith 16-bit load registers, counters, latches,
scaled clock source, 20-mA sink current, programmable pull-ups (IO4 to 7), etc.
Low-voltagedetector
reset circuit ~ reset
~ serviceClock IO0 to IO7
Standard clock input: 10 MHz, 5 MHz, 2.5 MHz, 1.25 MHz, 625 kHz
CP0 to CP4IO8 IO9 IO10
Vss VDD 5 V ± 10%
TMPN3150B1AF Block Digram
12
Product No. EEPROM(in bytes)
RAM(in bytes)
ROM(in bytes)
8-bitCPU
MaximumoperationFrequency
(MHz)Package
Externalmemory
I/F
16-bit timer/counter
A/DCONVERTER
TMPN3150B1AF
TMPN3120B1AM
TMPN3120E1M
* TMPN3120A20U
* TMPN3120A20M
TMPN3120FE3M
* TMPN3150FE5M
512
512
1K
1K
2K
3K
2K
1K
1K
1K
2K
4K
No
10K
10K
16K
16K
16K
3
3
3
3
3
3
Available
No
No
No
No
No
10
20
2 ch
2 ch
2 ch
2 ch
2 ch
2 ch
–
–
–
3 ch
–
3 ch
QFP64-P-1414–0.80A
SOP32-P-525–1.27
SOP32-P525–1.27
QFP44-P-1010–0.80
SOP32-P-525–1.27
SOP32-P-525–1.27
SOP32-P-525–1.27
* Under development
13
The TMPN3120B1AM/E1M have 10 Kbytes and the TMPN3120A20M/A20U/FE3M/FE5M has 16 Kbytes of incorporate ROM enabling the construction of single chip systems. This ROM is preloaded with firmware such as the protocol and application library, supporting many kinds of applications. The TMPN3150B1AF does not incorporate ROM and is configured to access external memory (58 Kbytes max of which 42 Kbytes can be used for application programs). This makes the TMPN3150B1AF suitable for more complex applications. Through the combination of its unique hardware and firmware, the Neuron Chip contains all the key functions required for a LonWorks node. Processes all LonTalk® protocol messages. Includes input pin functions for detection and output pin functions for detailed operation of output devices. Includes a library of application functions (see Tables 1 to 5). Installation parameters are stored in non-volatile memory.These functions minimize the number of external components required to construct a LonWorks network, resulting in a low overall cost. Figures 9, 10 and 11 show the pin assignment of TOSHIBA Neuron Chip.
Features of Neuron® Chip Hardware
1 Incorporates there high performance,8-bit pipelined CPUs.
Two of the three CPUs perform LonTalk® protocol processing.The third CPU is used for user applications.
3 Incorporates two 16-bit programmable counter/timers.
4 Each device has a unique 48-bitID number.
Uses 6 bytes of E2PROM.
Refer to page 17.5 A service pin is provided for efficient network installation.
6 Five LonTalk® network interface pinsConnects to a baseband medium such as twisted-pair cable via simple components or an externally-mounted LonTalk® transceiver.
8 Internal E2PROM
For storage of network parameters and application programs.The TMPN3120E1M/A20M/A20U have 1-KB E
2PROM.
The TMPN3120FE3M has 2-KB E2PROM.
The TMPN3120FE5M has 3-KB E2PROM.
Other neuron chips have 512-bytes E2PROM.
9 Low-Voltage Reset CircuitPrevents incorrect operation or erroneous E2PROM writers if the supplied voltage is less than a specified voltage.
2 The eleven application I/O pins can beused in a variety of combinations.
Individually configurable digital I/O.Can be used as a parallel interface to an external microprocessor with eight data lines and three control lines.
10 Built-in AD converterBuilt-in 3-channel ∆Σ-type A/D converterTMPN3120A20M/A20U and TMPN3120FE5M.
7 Supports sleep mode for low power consumption.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
~ RESET
VDD
IO4
IO3
IO2
IO1
IO0
~ SERVICE
VSS
VSS
VDD
VDD
VSS
CLK2
CLK1
VSS
VDD
VSS
IO5
IO6
IO7
IO8
IO9
VDD
IO10
CP4
CP3
CP1
CP0
VDD
CP2
VSS
NCA14A13A12A11A10A9A8A7A6A5A4A3A2A1A0
NC
IO0
IO1
IO2
IO3
~ R
ES
ET
VD
D
VS
S
VS
S
IO4
IO5
IO6
IO7
IO8
IO9
IO10
CP4CP3CP2CP1CP0NCVDD
VSS
CLK1CLK2VDD
VSS
VDD
VSS
NC~ SERVICE
NC
A15
~ E
R/ ~
WV
DD
D0
D1
VD
D
VD
D
VS
S
D2
D3
D4
D5
D6
D7
4849
164
1617
3332
Neuron® CHIPTMPN3150
B1AF
Neuron®
CHIPTMPN3120
B1AM /E1M /
A20M /FE3M /FE5M
Neuron® Chip Family
Pin Assignments (Top View)
Figure 9. TMPN3150B1AF 64-pin QFP
Figure 10. TMPN3120B1AM/E1M/A20M/FE3M/FE5M 32-pin SOP
Figure 11. TMPN3120A20U 44-pin QFP
14
NC
IO6
IO5
VSS
VDD
NC
~ RESET
VDDin
IO4
IO3
NC
NC
IO2
IO1
IO0
~ S
ER
VIC
E
NC
VS
S
VS
S
VD
D
VD
D
NC
NC
CP1
CP0
VDD
CP2
NC
VSS
CLK1
CLK2
VSS
NC
NC
IO7
IO8
IO9
VD
D
NC
IO10
VS
S
CP
4
CP
3
NC
3334
144
1112
2322
Neuron® Chip
TMPN3120A20U
Pin Functions
Notes: ~ SERVICE and IO4 to IO7 have configurable pull-up. All VDD Pins must be connected together externally. All VSS Pins must be connected together externally.
CLK1
CLK2
~ RESET
~ SERVICE
IO0 to IO3
IO4 to IO7
IO8 to IO10
D0, D1, D2 to D7
R/ ~ W
~ E
A15, A14 to A0
VDD
VSS
NC
CP0 to CP4
TMPN3150B1AFPin No.
24
23
6
17
2 to 5
10 to 13
14 to 16
43, 42, 38 to 33
45
46
47, 50 to 64
7, 20, 22, 26, 40, 41, 44
8, 9, 19, 21, 25, 39
1, 18, 27, 48, 49
28 to 32
TMPN3120A20UPin No.
15
14
40
5
4, 3, 2, 43
42, 36, 35, 32
31, 30, 27
–
–
–
–
9, 10, 19, 29, 38, 41
7, 8, 13, 16, 26, 371, 6, 11, 12, 17, 22, 23,
28, 33, 34, 39, 44
20, 21, 18, 24, 25
TMPN3120B1AM/E1M/A20M/FE3M
/FE5MPin No.
15
14
1
8
7 to 4
3, 30 to 28
27, 26, 24
–
–
–
–
2, 11, 12, 18, 25, 32
9, 10, 13, 16, 23, 31
–
19, 20, 17, 21, 22
Input
Output
I/O(built-in pull-up)
I/O(built-in
configurable pull-up)
I/O
I/O
I/O
Output
Output
Output
Input
Input
–
I/O
Oscillator connection. Or external clock input.
Oscillator connection. Leave open when externalclock is input to CLK1.
Reset pin (active low).
Service pin. Indicator output during operation.
Large-current sink capacity (20 mA). General I/O port.
General I/O port. One of IO4 to IO7 can bespecified as No.1 timer/counter input. Output signalcan be output to IO0. IO4 can be used as the No.2timer/counter input with IO1 as output.
General I/O port. Can be used for serial communication with other devices.
Memory expansion data bus
Read/write control output port for memory expansion
Control output port for memory expansion
Address output port for memory expansion
Power input (5.0 V typ.)
Power input (0 V GND)
Not connected. Leave open.
Bidirectional port for communications. Supports several communications protocols by specifying mode.
I/O(built-inconfigurablepull-up)
Pin Name I/O Pin Function
1
2
3
Low output voltage (1)
Low output voltage (2)
Low output voltage (3)
Low output voltage (4)
High output voltage (1)
High output voltage (2)
High output voltage (3)
High output voltage (4)
Input current
Pull-up current
Current (operating)
Current (SLEEP mode)
Low-voltage detection level
Symbol
VOL(1)
VOL(2)
VOL(3)
VOL(4)
VOH(1)
VOH(2)
VOH(3)
VOH(4)
IIN
IPU
IDD(1)
IDD(2)
VLVD
Pins
IO0 to IO3
~ SERVICE
CP2, CP3
Misc.*1
IO0 to IO3
~ SERVICE
CP2, CP3
Misc.*1
*2
*3
IO4 to IO7~ SERVICE~ RESET
VDD
VDD
VDD
Test conditions
IOL = 20 mA
IOL = 10 mA
*1. Output voltage characteristics exclude the ~ RESET pin and CLK2 pin.*2. Excludes pull-up input pins.*3. The IO4 to IO7 and ~ SERVICE pins have programmable pull-ups. The ~ RESET pin has a fixed pull-up.
IOL = 40 mA
IOL = 1.4 mA
IOH = –1.4 mA
IOH = –1.4 mA
IOH = –40 mA
IOH = –1.4 mA
VIN = VSS to VDD
VIN = 0 V
VDD = 5.5 V (no load)
VDD = 5.5 V (no load)
duty
cycle = 50%
IOL = 20 mA
IOL = 10 mA
Min
0
0
0
0
0
0
VDD – 0.4
VDD – 0.4
VDD – 1.0
VDD – 0.4
–10
–30
3.8
Max
0.8
0.4
0.8
0.4
1.0
0.4
VDD
VDD
VDD
VDD
+10
–300
30
0.1
4.4
Unit
V
V
V
V
V
V
V
V
V
V
µA
µA
mA
mA
V
DC Characteristics (VDD = 5.0 V ± 10%, VSS = 0 V, Ta = –40 to +85˚C)(Operating conditions in item 2 above apply unless otherwise stated.)
Operating Conditions
Operating voltage
Input voltage
(TTL)
Input voltage
(CMOS)
Operating frequency
Operating temperature
Symbol
VDD
VIH(1)
VIL(1)
VIH(2)
VIL(2)
fosc
Topr
Min
4.5
2.0
VSS
VDD – 0.8
VSS
0. 625
–40
Typ.
5.0
–
–
–
–
–
–
Max
5.5
VDD
0.8
VDD
0.8
10
+85
Unit
V
V
V
V
V
MHz
˚C
Electrical Characteristics (TMPN3150B1AF)
Maximum Ratings (VSS = 0 V, VSS (typ.))
Power supply voltage
Input voltage
Power dissipation
Storage temperature
Symbol
VDD
VIN
PD
Tstg
Rating
–0.3 to 7.0
–0.3 to VDD + 0.3
800
–65 to 150
Unit
V
V
mW
˚C
15
Item
Item
Item
For a description of the electrical characteristics of other Neuron® chips, please refer to the datasheets for the chips in question.
32
17
49
48 33
1 16
64
0.16
14.0
± 0
.2
1.0
typ.
17.2
± 0
.2
2.7
± 0.
2
0.8 ± 0.2
0.15
+0.
1–0
.05
0 to 10˚
0.1 –0
.1
3.10
max
14.0 ± 0.2
0.35 ± 0.1
15.6 ± 0.2
0.1
0.8
17.2 ± 0.2
1.0 typ.M
10.7
± 0
.2
13.3
35
(525
mil)
14.1
3 ±
0.3
0.8 ± 0.2
0.15
+0.
1–0
.05
1 16
1732
0.250.3 ± 0.1
20.6 ± 0.2
2.4
± 0.
20.
19 ±
0.1
1.27
0.775 typ.M
0.1
21.1 max
2.8
max
+0.
15
22
12
34
33 23
1 11
44
0.16
10.0
± 0
.2
1.0
typ.
12.2
± 0
.3
1.5
± 0.
2
0.78 ± 0.2
0.15
+0.
1–0
.05
0.1 –0
.05
1.9
max
10.0 ± 0.2
0.35 ± 0.10.8
12.2 ± 0.3
1.0 typ.M
+0.
1
Neuron® Chip Family
Package Dimensions
TMPN3120A20U QFP44-P-1010-0.80 TMPN3150B1AF QFP64-P-1414-0.80A Unit : mmUnit : mm
Unit : mmTMPN3120B1AM/E1M/A20M/FE3M/FE5M SOP32-P-525-1.27
16
17
Service Pin
~ RESETResetswitch
VDD
100 pF
100 pF
VDD
Typical low-voltage detectorExternal device
~ RESET
Ce: optionalVref +–
The service pin supports the following functions, convenient for network installation and maintenance. Setting the service pin low transmits the Neuron® ID and program name on the network. That information is used at the following times.
To communicate with a node that does not have network configuration information.
To find out the program name.
An LED can be connected to the service pin to indicate the status of the node. Lit: The node has no valid application code.
Blinks at 1/2 Hz rate: The node has application code but no network configuration information.
Not lit: The node has both application code and network configuration information.
To access these input/output functions, the service pin is multiplexed between input and output by turning the N-ch open drain output ON/OFF at 76 Hz with a 50% duty cycle.
Output state
~ Service(Switch open and
LED ON)
Activelow
Tristate
Input Sampling
Pull-up enable signal
Service pin input signal
Indicator signal
Activelow
Tristate Activelow
Tristate
Input Sampling Input Sampling
LED
~ SERVICE
VDD
Reset Pin
Figure 12. Input/Output Waveforms and Circuit for Service Pin
The Neuron chip incorporates a low-voltage detector
circuit. When using this circuit in conjunction with an
external circuit, the external circuit may require an
open-collector or open-drain low-voltage detector
circuit. The external LVD must be used if Neuron® chip operated at 20MHz.
The reset pin has an open-drain output with an active-low input, and an internal pull-up resistor. When the reset pin is held at 0.8 V or below for at least 20 ns, the reset operation begins.The reset pin can be activated by a software reset or by output from a watchdog timer. Accordingly, this reset pin can be also reset external circuits such as a transceiver.
Figure 13. Typical Reset Circuit
Figure 14. External Reset Circuit with Low-Voltage DetectorTypical low-voltage detectors are the Mitsumi PST5xx series,the Dallas DS1xxx seriesand the Motorola MC3xxx series.
18
LonWorks System Development Environment
The LonWorks system can be developed using the LonBuilder dedicated development tool and a host computer (IBM PC/AT or compatible) (see Figure 15). Insert the LonBuilder dedicated I/F adapter card into the host computer for high-speed communications between the host computer and LonBuilder.
Host computer conditions
Processor: 486 or better (Pentium recommended)
Bus: 8-bit or 16-bit ISA bus-compatible
Memory: At least 8 MB (at least 16 MB for Windows 95)
Floppy drive: 3.5-inch 1.44-MB
Hard disk capacity: At least 10 MB available space
Graphics adapter: Windows-compatible
Mouse: Windows-compatible
OS: MS-DOS version 3.3 or later (version 6.2 or 7.0 recommended)
LonBuilder Development Tools LonBuilder development environment (Echelon® Corp.)The development environment requires combining one control processor board (with network manager and protocol analyzer functions) with at least one emulator board and router board. The development software is an integrated development environment set containing the Neuron C compiler and debugger.
Hardware and Software for LonWorks System Development
LonBuilder Hardware
LonBuilder router•Two Neuron 3150 chips•Memory•Two optional transceivers
LonBuilder controlprocessor
•Two Neuron 3150 chips•Network manager•Protocol analyzer
FTT transceiver
Neuron emulator•Neuron 3150 chip•Memory•Optional transceiver•Optional I/O•Debugger support
Linked power transceiver
Power line transceiver
Twisted-pair transceiver
I/O evaluation board
LonBuilder interface adapter
PC/AT-compatible machine (able to support tp to 24 emulators)
LonBuilder
Figure 15. LonBuilder Development Environment
19
LonBuilder Software
Applicationprogramming tools
LonBuilder networkmanagement tools
Integrated Development Environment
Protocolanalyzer
Uses information to manage object database node configuration and to configure application.
Integrated editor combining the Neuron C compiler and project manager
Neuron C cross compiler
Neuron C cross debugger
Manages LonWorks® nodes and the network.
Monitors the network traffic and performance and collects that information.
Projectmanager
Programeditor
Neuron Ccompiler
Neuron Cdebugger
Networkmanager
Miscellaneous PROM writer with serial transfer function
This is used to write to external ROM for the TMPN3150. And, when Echelon control module products are used, adaptors are needed for changing a connection from DIP package to PLCC package. because Echelon's products can support only PLCC-type EPROM or OTP (one-time PROM).
Neuron 3120 programmer device (made by Echelon Corp.) The programmer device marketed by Echelon is convenient for writing application programs to the TMPN3120. Control module (made by Echelon Corp.) This is used to evaluate application programs developed on LonBuilder by writing programs to EPROM or OTP
then inserting this board into the actual module.
Echelon, Neuron, LON, LonTalk, LonBuilder, LonWorks, 3150, 3120, and LonManager are registered tradmarks of Echelon Corp. Neuron Chip products are manufactured by Toshiba under licence from Echelon Corp. A "LonWorks® OEM Licence Contract" must be signed by the customer and Echelon Corp. in order to purchase these Neuron Chip products. The Toshiba IC (TMPN3150/3120) is covered by a patent agreement between Toshiba Corp. and Bull CP8 Corp. and cannot be used in any "portable device" (defined below) such as an IC card.Portable Device
A portable device that is within 10 mm of the width and within 3 mm of the length of devices defined in ISO 7816.A portable device that conforms to the arrange-ment and form of electrical contacts stipulated in Part 2 of ISO 7816.A protable, pocket-size device for identifying the person carrying the device or identifying the device itself, or for storing data on the history of the carrier or the device.BULL CP8 patent: US No. 4,382,279
Please note the following warning from Echelon Corp. when using I2C I/O objects:
PATENT NOTICE
Echelon's delivery to you of the "I2C Library" does not convey nor imply a right under any I2C patent rights of Philips Electronics N.V. ("Philips") to make, use or sell any product employing such patent rights.Please refer all questions with respect to I2C patents and licenses to Philips at:
Mr. H. B. SchoonheijmCorporate Patents and TrademarksPhilips International B.V.P. O. Box 2205600 MD EindhovenThe Netherlands
Telephone +31 40 743479Facsimile +31 40 743489
( )
( )
( )
©1999 TOSHIBA CORPORATIONPrinted in Japan
Electronic Devices Sales & Marketing Group1-1, Shibaura 1-chome, Minato-ku, Tokyo, 105-8001, JapanTel: (03)3457-3405 Fax: (03)5444-9324
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The information contained herein is subject to change without notice.
The information contained herein is presented only as a guide for the applications of our products.No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may resultfrom its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others.
TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devicesin general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibilityof the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunctionor failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs,please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent productsspecifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor ReliabilityHandbook.
Website: http://doc.semicon.toshiba.co.jp/indexus.htm
990219 (A)
The products described in this document are subject to the foreign exchange and foreign trade laws.