Characterization of Spiral Planar Inductors Built on Printed CircuitBoards

Monica Zolog , Dan Pitica and Ovidiu PopApplied Electronics Department, Technical University of Cluj-Napoca, Romania

Abstract. The purpose of this paper is to propose an electrical model for spiral planar inductors on

PCBs and estimate the electrical parameters ofthis model according to the technological parameters.In order to evaluate the accuracy of the model, several inductors on PCB were designed and themeasurements were compared to the theoretical results. The obtained electrical model was validatedby Pspice simulation. The design ofan electrical circuit consists ofseveral stages among which a very

useful one is the simulation. This process considerably reduces the time required to complete a projectas it helps the designer estimate the behavior of the circuit before actually building it. In the case ofcircuits that use inductors built on the PCB the simulation stage cannot be fulfilled due to the fact thatsimulators' libraries don't contain models for this type of inductors. These inductors are specialcomponents that require an appropriate simulation model that takes into account the parasiticelements that appear in the case of such a design. If these parameters are known (using some

theoretical or experimental methods), then it is possible to integrate the corresponding model in thetested circuit and analyze the effect of this component over the rest of the circuit. The advantages ofsuch inductors over the usual ones become from the manufacturing process that provides high-qualitycomponents, the performances of the systems being strongly influenced by the performance of itscomponents.

2. THEORETICAL BACKGROUND

In the last years, the interest for on-board passivecomponents has increased tremendously. While thereare several options for capacitors and most of theseimplementations are easy to model, considerableeffort was needed for the design and modeling ofinductor implementations, of which the only practicaloptions are bond wires and planar spiral geometries.Although bond wires permit a high quality factor (Q)to be achieved, with typical Q's in the 20-50 range,

their inductance values are constrained and can berather sensitive to production fluctuations [2]. On theother hand, planar spiral inductors have limited Q's,

but have inductances that are well-defined over a

broad range of process variations. Thus, planar spiralinductors have become essential elements ofcommunication circuit blocks such as voltagecontrolled oscillators (VCO's), low-noise amplifiers(LNA's), mixers, and intermediate frequency filters(IFF's).

Square spirals are popular because of the ease oftheir layout. However, other polygonal spirals havealso been used in circuit design. Some designersprefer polygons with more than four sides to improveperformance. Among these, hexagonal and octagonalinductors are used widely. Fig. 1(a)-(d) show thelayout for square, hexagonal, octagonal, and circularinductors, respectively. For a given shape, an inductoris completely specified by the number of turns n, theturn width w, the turn spacing s, and any one of thefollowing: the outer diameter dcI,, the inner diameterdjn, the average diameter davg=0. 5(d0,,+d1n), or the fillratio, defined as A =(doutdin)/(do±+din).

Starting from the existing models for embeddedinductors [1]-[3], we propose an electrical model forspiral inductors on printed circuit boards. Theelectrical model is presented in Figure 2. While theinductance was computed using the formulas given in

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1. INTRODUCTION

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b) c) dc

Fig. 1. On-board inductors

Fig. 2. Electrical model of the planar spiral inductor

2. An expression based on current sheetapproximation given in [1]:

[Lof2ndavg C1 Al+c4 /A2)LS= . ~jfI -+C3 Ac4' (2)

where:

- p0 - is the permeability of the vacuum,p0= 4n1 10-7[N-A-2]

[1] and [2], for the resistance and the capacitance weconsidered the approach from [4].

For determining the inductance of the discreteplanar spiral inductors, several expressions were used:

1. A modified Wheeler formula given in [2] statesthat the inductance can be calculated as:

Lmw = Kloavg

1+K2 -A(1)

where:- p0 - is the permeability of the vacuum, p0= 4nt 10-7[N A-2]- n, davg, A - have the same significance asmentioned above- K1, K2- are coefficients that depend on the layout(See Table 1.)

K1 K2 Shape

2.34 2.75 Square

2.33 3.82 Hexagonal

2.25 3.55 Octagonal

Tab. 1. Coefficients for modified Wheeler expression

- n, davg,, Amentioned above

- the coefficients(See Table 2.)

- have the same significance as

C1, C2, C3 ,C4 are layout dependent

cl c2 c3 c4 Shape

1.27 2.07 0.18 0.13 Square

1.09 2.23 0 0.17 Hexagonal

1.07 2.29 0 0.19 Octagonal

1 2.46 0 0.2 Circle

Tab. 2. Coefficients for current sheet expression

3. An expression based on a data fitting technique,which yielded the expression [2]:

Lmon = fldal Wa2 da3 a4 a5 (3)mon ~out avg

where:

- n, w, s, davg,, dout - have the same significanceas mentioned above

- /, ai- are layout dependent coefficients (SeeTable 3.)

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a) d)

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The results obtained by applying these formulasare not identical, but the difference in the inductancedoesn't exceed 10%.

The series resistance is calculated using the followingexpression [3]:

3 ocl o2 o3 o4 o5 Shape

1.62E-03 -1.21 -0.147 2.4 1.78 -0.03 Square

Hexagona1.28E-03 -1.24 -0.174 2.47 1.77 -0.049 l

1.33E-03 -1.21 -0.163 2.43 1.75 -0.049 Octagonal

Tab. 3. Coefficients for data fitted monomial expression

R = pI/w.8. 1-e S

where:

p - metal resistivity at dc [Q&m]

1 - overall length of the spiral

w - line width

(4)

Fig. 3. Two rectangular conductors are located distance dapart on the top of a circuit board with thickness h and

relative dielectric constant -r

The capacitance per unit length is givenapproximately by:

CI

nr(edf)WO [F/m]

In ~+I1 7;d-w)+t

(5)

where:

£o - vacuum permittivity, £o =8.8541878176 x 10-12F/m

8r(e/5- relative electric permittivity is the result ofplacing the conductors in an inhomogeneous media(in the case of the conductor lands on printed circuitboards - the air and the dielectric). Its value iscomputed as a function of the relative permittivity ofthe substrate:

a -metal skin depth, 8 = P2 71; -Hf o- Mr-L

t- metal thickness

The capacitance Cs is computed starting from theapproach in [4]. The capacitance value betweenhorizontal, rectangular conductors is importantbecause this configuration closely approximatesconductor lands on printed circuit boards such asthose shown in Figure 3.

-1, insulator E;-a d

Er(ef/) -1 for d<h

£r(ef +1 for d h2

(6)

h - the height of the insulator

We can consider the unit length to be very small,so that the two conductors that represent adjacentturns can be seen as parallel conductors. The length ofthe spiral is then computed and multiplied with thecapacitance per unit length.

3. RESULTS

The model needed to be validated by simulated aswell as by measured data. For this, inductors havingdifferent geometric parameters (width of theconductor, spacing between adjacent conductors,number of turns) were designed. The influence of theinductor's geometry was also analyzed (square spiral,hexagonal, octagonal and circular). The model wasverified using a simulation tool (PSpice) and theresults were compared with the measured data.

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27.8 - er (eff ) [pF/m]In n(d w) + I

w + t

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As an example, we present a round planar spiralthat was made, having the following geometricalparameters: width of the conductor w= 0.2 mm,spacing between the turns s=0.2 mm, number of turnsn= 17, internal diameter din= 1.55 mm (Figure 5). Forthis design, the value computed for the inductanceusing (2) is 1.93 pfH, while the measured one is 2.2pfH (the measurement was performed using an LRCbridge).

s=n 2-davg 1cl 2 +CLs= . I~n I+3 A c

2 A4*2

4. t.10-7 .172 8630 1 (l( 2.46 +0.2.O.8222 Y 0.82 2 )

= 1.93 [,uHl] (7)The resistance was computed to be 2.3 Q and

measured 3.3 Q (this was expected because theconductor width is actually smaller than 0.2 mm dueto technological reasons). The type of copper cladsheet used was FR4 with metal thickness t 18 ptm,metal resistivity for copper p= 1.72 10-8 [Qm]. If we

take into account the tolerance of the metal thickness(1.75 ptm) as well as the one of the conductor width,the computed resistance is 2.8 Q. The electric Ohmresistivity of electroless Cu depositions on dielectricsubstrates is a function of their thicknesses too. As thedimensions of interconnects shrink, the confinementeffects associated with a very small grain size lead toa significant increase in the resistivity of the metal.Substantial deviations (up to 10-20 times) from thestandard resistivity were observed in [5].

P./=1= 1.72p1-I-0.482RS= 0.2 10-3 8 2.3Qs-wt 0.2 .10-3.18.106

RS =Pw=W *t

1.72-10- .0.460.18.10-3*16.2510 6-6

(8)

(9)

Figure 4 illustrates the increase of the resistancewith frequency (the effect of metal skin depth).

When computing the capacitance, we have to takeinto account that the width of the insulator ish=1.5mm and er=4.1. We consider er,/ 1 using (6.1).By applying (5) we obtain CGl= 19 pF/m.

Rs vs. f

70

60

50

u 40E0un 30

20-

10 A oW a g sTh 11 XS11 || |z re

01.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05

f [Hz]

1.E+06 1.E+07 1.E+08 1.E+09 1.E+10

Fig. 4. Rs(f)

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c 278a r (eff )

w+t (027.8.1 (10)

=f~ K13 0 [pF/m] = 19 [pF/m]

200 + 18

The length of the spiral was computed using thefollowing formula:

/= Z (R2 -R)2 n(78552 7752)048m (11)w+s 200 + 200

Fig. 5. Round planar inductor

In order to verify the model, the configuration inFigure 6 was simulated in Pspice.

The parasitic capacitance is then 9.12 pF and it isvery difficult to be measured because it is too small.

inductor model

R1I LS RS

~~~~~~C

Fig.6. The circuit used to analyze the inductor. RI is theresistance of the signal generator (150 Q). Ls, Rs, Csrepresent the parameters of the planar inductor.

The effect of the parasitic elements was analyzedby comparison with an ideal inductor.

In the simulation we considered Ls= 1.93 fiH,RS=2.8Q and Cs=9.12 pF. The resonance frequency isfoz3 8 MHz.

1

fo=-29-LC (12)

The impedance of the component is compared withthe impedance of the ideal inductor in Figure 7. If wetake a closer look to these results (Figure8), weobserve that the impedance of the proposed modelexceeds 10% of the ideal inductor impedance in thefollowing intervals: 1kHz-445kHz (model impedance> ideal impedance; the series resistance has adominant effect); 10.7MHz-49MHz (modelimpedance > ideal impedance); and at frequencieshigher than 51.6 MHz (model impedance < idealimpedance; the parasitic capacitance is dominant).

The component can be used as an inductor in therange of frequencies 445kHz-10.7MHz (Figure8).

Fig.7. The component impedance and the ideal inductorimpedance for Ls=1.93 pfH, Cs=9.12 pF, RS=2.8 Q.

k | t | | t| 1 | | P | P |Impedance of the model

-~~~~~~~~~~~~~~~~~~~~~~~~~~~1 --ed -nc of -h -o-dl- -;< -

~ ~~~ ~ ~ ~ ~ ~ ~ ~~-:-:-0 deito fro th .i..pe.dan..ce.C-.~~~~~~~~~~~~~h ida .ind....uc .....\.tor..

.---------

~~~~~~~~~~~~~~~~~~~~~~~~~---0--r--T--- --- ------------r-- ---r--T--l----- ---|-- -- ----0----0-- --l--l-- --Ofteeido

Fig.8. The range in which the component can be used asinductor (it doesn't exceed 10% of the ideal impedance

value)

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4. CONCLUSIONS AND FUTURE WORK

A physical model for planar spiral inductors onPCB is presented. Parasitic elements are consideredand analyzed. The inductor model shows goodagreement with measured and published data.

Simple inductors on a single layer PCB weredesigned. In the future we plan to analyze how PGS -patterned ground shield - (beneath of insulator layer)improves the performance of inductors.

In order to obtain higher values for the inductancewhile keeping the occupied area as small as possible,we'll try to design an inductor on a two-layer PCB. Inthis case a supplementary parasitic capacitance Cp (seeFigure 2) appears between the two spirals. The worstcase is the one presented in figure 10 a, because theoverlap area of the turns is maximum. The minimumparasitic capacitance between the two layers isexpected to be obtained for the configuration in figure10 b. As one can observe, the overlap area betweenthe turns from the two layers is significantly reducedby shifting the spiral from one of the sides.

/ / 4 ~~~~~~~~~~insulator/ ~~~~~~~~PGS ____________Wb)

Fig.10. Inductor on a two-layer PCB a) worst case; b) mostfavorable case

REFERENCES

[1] Charles S. Walker, "Capacitance, Inductance andCrosstalk Analysis", Artech House, 1990

[2] Goran Stojanovic, Ljiljana Zivanov and MirjanaDamnjanovic, "Optimal Design of Circular Inductors",Elec. Energ. Vol. 18, No. 1, April 2005

[3] Sunderarajan S. Mohan, Maria del Mar Hershenson,Stephen P. Boyd, and Thomas H. Lee, "SimpleAccurate Expressions for Planar Spiral Inductances",IEEE Journal of Solid-state circuits, Vol. 34, No. 10,October 1999

[4] C. Patrick Yue, Changsup Ryu, Jack Lau, Thomas H.Lee, and S. Simon Wong, "A physical model for planarspiral inductors on silicon"

[5] M. Radoeva, B. Radoev, "Ohm resistivity ofelectroless copper layers as a function of theirthicknesses", Journal of Materials Science, Volume 30,Number 9 /May, 1995

[6] Sylvain Maitrejean, Roland Gers, Thierry Mourier,Alain Toffoli, Gerard Passemard, "Cu Resistivity inNarrow lines: Dedicated Experiments for ModelOptimization", Material Research Society

Fig.9. Square inductor with PGS

--copper4,--- insulator- -( -<<copper

a)

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copper

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