16
Copyright Cirrus Logic, Inc. 2011 (All Rights Reserved) www.cirrus.com Actual Size: 254mm x 44mm AC Line Input Regulated DC Output CDB150x-01 CS1501 90W, High-efficiency PFC Demonstration Board Features Variable On Time, Variable Frequency, DCM PFC Controller Line Voltage Range: 90 to 265 VAC RMS Output voltage: 400 V Rated Pout: 90 W Efficiency: 97% @ 90 W, 230 VAC No-load Power Dissipation: <0.3 W Low Component Count Supports Cirrus Logic Product CS1501 General Description The CDB150x-01 board demonstrates the performance of the CS1501 digital PFC controller with a 90 watt out- put at a link voltage of 400 volts. ORDERING INFORMATION CDB150x-01 PFC Demonstration Board - Supports CS1501 MAR ‘11 DS927DB3

CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

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Page 1: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

Copyright Cirrus Logi(All Rights Reserwww.cirrus.com

Actual Size:254mm x 44mm

AC LineInput

CDB150x-01

CS1501 90W, High-efficiency PFC Demonstration Board

Features

Variable On Time, Variable Frequency, DCM PFC Controller

Line Voltage Range: 90 to 265 VAC RMS

Output voltage: 400 V

Rated Pout: 90 W

Efficiency: 97% @ 90 W, 230 VAC

No-load Power Dissipation: <0.3 W

Low Component Count

Supports Cirrus Logic Product CS1501

General Description

The CDB150x-01 board demonstrates the performanceof the CS1501 digital PFC controller with a 90 watt out-put at a link voltage of 400 volts.

ORDERING INFORMATION

CDB150x-01 PFC Demonstration Board - Supports CS1501

c, Inc. 2011ved)

RegulatedDC Output

MAR ‘11DS927DB3

Page 2: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Contacting Cirrus Logic SupportFor all product questions and inquiries contact a Cirrus Logic Sales Representative. To find the one nearest to yougo to www.cirrus.com

IMPORTANT NOTICE

Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subjectto change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevantinformation to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of salesupplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrusfor the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of thirdparties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and givesconsent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This con-sent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-ERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FORUSE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISKAND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANT-ABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMEROR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE,TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, IN-CLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarksor service marks of their respective owners.

IMPORTANT SAFETY INSTRUCTIONS Read and follow all safety instructions prior to using this demonstration board.

This Engineering Evaluation Unit or Demonstration Board must only be used for assessing IC performance in a laboratory setting. This product is not intended for any other use or incorporation into products for sale.

This product must only be used by qualified technicians or professionals who are trained in the safety procedures associated with the use of demonstration boards.

Risk of Electric Shock • The direct connection to the AC power line and the open and unprotected boards present a serious risk of electric

shock and can cause serious injury or death. Extreme caution needs to be exercised while handling this board.

• Avoid contact with the exposed conductor or terminals of components on the board. High voltage is present on exposed conductor and it may be present on terminals of any components directly or indirectly connected to the AC line.

• Dangerous voltages and/or currents may be internally generated and accessible at various points across the board.

• Charged capacitors store high voltage, even after the circuit has been disconnected from the AC line.

• Make sure that the power source is off before wiring any connection. Make sure that all connectors are well connected before the power source is on.

• Follow all laboratory safety procedures established by your employer and relevant safety regulations and guidelines, such as the ones listed under, OSHA General Industry Regulations - Subpart S and NFPA 70E.

Suitable eye protection must be worn when working with or around demonstration boards. Always comply with your employer’s policies regarding the use of personal protective equipment.

All components, heat sinks or metallic parts may be extremely hot to touch when electrically active.

Heatsinking is required for Q1. The end product should use tar pitch or an equivalent compound for this purpose. For lab evaluation purposes, a fan is recommended to provide adequate cooling.

2 DS927DB3

Page 3: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

1. INTRODUCTION

The CS1501 is a high-performance Variable Frequency Discontinuous Conduction Mode (VF-DCM), ac-tive Power Factor Correction (PFC) controller, optimized to deliver the lowest system cost in switchedmode power supply (SMPS) applications. The CS1501 uses a digital control algorithm that is optimizedfor high efficiency and near-unity power factor over a wide input voltage range (90-265 VAC).

Using an adaptive digital control algorithm, both the ON time and the switching frequency are varied on acycle-by-cycle basis over the entire AC line to achieve close-to-unity power factor. The feedback loop isclosed through an integrated digital control system within the IC.

The variation in switching frequency also provides a spread-frequency spectrum, thus minimizing the con-ducted EMI filtering requirements. Burst mode control minimizes the light-load/standby losses. Protectionfeatures such as overvoltage, overcurrent, overpower, open circuit, overtemperature, and brownout helpprotect the device during abnormal transient conditions. Details of these features are provided in theCS1501 data sheets.

The CDB150x-01 board demonstrates the performance of the CS1501 with input voltage range of 90-265VAC, typically seen in universal input applications. This board has been designed for 400V Vlink, 90Watts, full load.

Extreme caution needs to be exercised while handling this board. This board is to be used by trained pro-fessionals only. Prior to applying AC power to the CDB150x-01 board, the CS1501 needs to be biasedusing an external 13 VDC power supply.

This document provides the schematic for the board. It includes oscilloscope screen shots that indicateoperating waveforms. Graphs are also provided that document the performance of the board in terms ofEfficiency vs. Load, Total Harmonic Distortion vs. Load, and Power Factor vs. Load for the CS1501 PFCcontroller IC.

DS927DB3 3

Page 4: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

2. SCHEMATIC

REV

B1

12/3

/201

0

600-

0047

3-Z2

CS1

501

SCHEM

., C

DB15

0X-0

1SH

EET

TITL

E:

ECO

#REV

DES

CRIP

TIO

NIN

C B

Y/D

ATE

CHK B

Y/D

ATE

OF

ENGIN

EER

SHEE

T1

OF

1SI

ZE

C

DRAW

N B

Y:

DATE

:

PART

#:

DES

CRIP

TIO

N:

MUR16

0

Bus

s Bar

NO

TES:

UNLE

SS O

THER

WIS

E SP

ECIF

IED;

1. A

LL R

ESIS

TOR V

ALU

ES A

RE

IN O

HM

S.

Opt

ion1

@ U

2=CS1

500:

1. N

o po

pula

ted

IC:

U1

2. N

o po

pula

ted

capa

cito

rs:

C5,

C8,

C9,

C11

3. N

o po

pula

ted

resi

stor

s: R

4,R6,

R10

,R17

,R18

,R21

,R22

4. S

hort

ed c

ompo

nent

s by

#28

wire:

L4,

NTC

2,R9

5. V

alue

_cha

nged

cap

acitor

s: C

13=

C14

=C15

=1n

F6.

Val

ue_c

hang

ed res

isto

rs:

R1=

R2=

R13

=R14

=1M

,R3=

R15

=88

7K7.

Boo

st ind

ucto

r L5

has

sam

e fo

otpr

int

RM

10, bu

t di

ffer

ent

indu

ctan

ce

Opt

ion2

@ U

1=CS1

501:

(PIN

2=ST

BY,P

IN3=

IAC)

1. N

o po

pula

ted

IC:

U2

2. N

o po

pula

ted

capa

cito

rs:

C5,

C8,

C9

3. N

o po

pula

ted

resi

stor

s: R

4,R10

,R17

,R21

,R22

4. S

hort

ed c

ompo

nent

s by

#28

wire:

L4,

NTC

25.

Val

ue_c

hang

ed c

apac

itor

s: C

13=

C14

=C15

=1n

F6.

Val

ue_c

hang

ed res

isto

rs:

R1=

R2=

R13

=R14

=1M

,R3=

R15

=88

7K7.

Val

ue_c

hang

ed res

isto

rs:

R6=

48.7

K,R

18=

1.74

K,R

9=0.

1/3W

8. B

oost

ind

ucto

r L5

has

sam

e fo

otpr

int

RM

10, bu

t di

ffer

ent

indu

ctan

ceO

ptio

n3 @

U1=

FAN75

29:(

PIN2=

CO

MP,

PIN

3=M

OT)

1. N

o po

pula

ted

IC:

U2

2. N

o po

pula

ted

capa

cito

rs:

C5,

C11

,C14

,C15

3. N

o po

pula

ted

resi

stor

s: R

1,R2,

R3,

R10

,R18

,R20

4. S

hort

ed c

ompo

nent

s by

#28

wire:

L4,

NTC

2

6. V

alue

_cha

nged

cap

acitor

s: C

9=47

nF,C

8=22

0nF

7. V

alue

_cha

nged

res

isto

rs:

R4=

820K

,R17

=10

K,R

21=

56K,R

22=

12.6

K8.

Val

ue_c

hang

ed res

isto

rs:

R6=

20K,R

13=

R14

=1M

,R9=

0.2/

1W9.

Boo

st ind

ucto

r L5

has

sam

e fo

otpr

int

RM

10, bu

t di

ffer

ent

indu

ctan

ce

Opt

ion4

@ U

1=L6

562A

: (P

IN2-

CO

MP,

PIN

3=M

ULT

)1.

No

popu

late

d IC

: U2

2. N

o po

pula

ted

capa

cito

rs:

C5,

C11

,C13

,C15

3. N

o po

pula

ted

resi

stor

s: R

4,R10

,R18

,R20

4. S

hort

ed c

ompo

nent

s by

#28

wire:

L4,

NTC

25.

Val

ue_c

hang

ed c

apac

itor

s: C

9=15

0nF,

C8=

2.2u

F,C14

=10

nF6.

Val

ue_c

hang

ed res

isto

rs:

R15

=0,

R17

=22

K,R

21=

15K,R

22=

12.6

K7.

Val

ue_c

hang

ed res

isto

rs:

R1=

0,R2=

R3=

R13

=R14

=1M

,R6=

47K,R

9=0.

3/1W

8. B

oost

ind

ucto

r L5

has

sam

e fo

otpr

int

RM

10, bu

t di

ffer

ent

indu

ctan

ce

Opt

ion5

@ U

1=NCP1

606B

:(PI

N2=

CTR

L,PI

N3=

CT)

1. N

o po

pula

ted

IC:

U2

2. N

o po

pula

ted

capa

cito

rs:

C5,

C11

,C13

,C15

3. N

o po

pula

ted

resi

stor

s: R

1,R2,

R3,

R10

,R18

,R20

,R4,

R21

4. S

hort

ed c

ompo

nent

s by

#28

wire:

L4,

NTC

25.

Val

ue_c

hang

ed c

apac

itor

s: C

9=10

0nF,

C8=

390n

F,C14

=1.

5nF

6. V

alue

_cha

nged

res

isto

rs:

R13

=R14

=1M

,R15

=2M

,R17

=54

.9K,R

22=

24.9

K7.

Val

ue_c

hang

ed res

isto

rs:

R6=

100K

,R9=

0.12

/1W

5. S

hort

ed c

ompo

nent

s by

0K res

isto

r: C

13

8. B

oost

ind

ucto

r L5

has

sam

e fo

otpr

int

RM

10, bu

t di

ffer

ent

indu

ctan

ce

AIN

ITIA

L REL

EASE

9/17

/10

9/17

/10

BCHANGED

L5

TO N

EW F

OO

TPRIN

T12

/9/1

0EC

O80

6

B1

CHANGED

R6

FRO

M 1

7.8K

TO

48.

7K01

/05/

11EC

O81

9

F1 4A

tNTC

130

NO

PO

P -

SHO

RT

WIT

H 2

8 AW

G W

IRE

C1

2200

pF

C2

2200

pF

C3

0.22

uFC4

0.22

uF

+ -

BR1

GBU4J

-BP

600V

C5

NO

PO

P

D1

C6

0.33

uF

D2

MUR46

0G60

0V

tNTC

2

30

NO

PO

P, S

HO

RT

WIT

H A

WG28

WIR

E

R8

20K

1 2

CO

N2

TERM

BLK

1 2 3

CO

N1

TERM

BLK

R3

1M

MH1

SCREW

-PHIL

IPS-

4-40

THR-P

H-5

/16-

L-Z

ASS

Y D

WG-

603-

0047

3-Z1

PCB D

WG-

240-

0047

3-Z1

SCH D

WG-

600-

0047

3-Z2

MH3

MH4

MH2

1

FD1

1

FD2

1

FD3

R20

1K

R6

48.7

K

R2

1M

R13

1M

R18

1.78

K

VZ

V30

0LA20

AP

300V

E11P

AD-H

78P1

08E2

1PAD-H

78P1

08

12

34

L1

IND-5

MH-T

SD-2

796

5mH

NO

PO

P, S

HO

RT

PIN 1

-2 &

PIN

3-4

with

28 A

WG w

ire

L2

IND-5

MH-T

SD-2

796

5mH

1 2 3

CO

N3

TERM

BLK

A1

1PAD-H

78P1

08A2

1PAD-H

78P1

08

R19

100

C7

100u

FEL

EC

R12 0

R11

1K

C10 4.7u

F

1VBIA

S22

STBY

3IR

ECT

4IL

INK

5GND

6GD

7VDD

8VBIA

S1

U2

CS1

500-

FSZ

NO

PO

P

HS1

12.5

W

C12

100p

F

SD

G

Q1

STP1

2NM

50FP

L3L4

NO

PO

P, S

HO

RT

WIT

H A

WG28

WIR

E

L538

0uH

RLC

S-10

07

R17

NO

PO

P

C8

NO

PO

P

C9

NO

PO

P R21

NO

PO

PR22

NO

PO

P

R4

NO

PO

P

R10

NO

PO

PD3

LL41

48

1IF

B2

NC

3IA

C4

CS

5ZCD

6GND

7GD

8VDD

U1

CS1

501-

FSZ

C11

33pF

R14

1M

R7

4.7

OHM

TP8

TP2

TP3

TP4

TP5

TP6

TP7

R5

NO

PO

P

R16

0

R23

0

R15

1M

JP10.800" WIRE JUMPER

C14

1000

pFX7R

NO

PO

P

C13

1000

pFX7R

C15

1000

pFX7R

NO

PO

P

R1

1M

R9

0.1

1W

TO22

0-IN

SUL-

MO

UNT-

HEA

TSIN

K-K

ITXHS1

LBL

SUBASS

Y P

RO

D I

D A

ND R

EV

LBL

SUBASS

Y P

RO

D N

UM

BER

Fig

ure

1.

Sc

he

ma

tic

4 DS927DB3

Page 5: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

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P 2

200p

F ±1

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CE

R N

Pb

RA

D2

C1

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MU

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50V

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C15

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TC

1206

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TE

RM

BLK

5.0

8mm

SP

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RA

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800V

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200

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NP

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DE

S IN

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4006

G-T

1707

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154-

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DIO

DE

RE

CT

600V

4A

NP

b D

O-2

01A

D T

H1

D2

ON

SE

MIC

ON

DU

CTO

RM

UR

460G

1807

0-00

001-

Z1A

DIO

DE

SS

75V

500

mW

NP

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OD

801

D3

DIO

DE

S IN

CLL

4148

1918

0-00

025-

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FUS

E 4

A S

LO B

LO 2

50V

NP

b R

AD

1F1

BE

LFU

SE

RS

T 4

2031

1-00

019-

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NK

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OC

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AB

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O22

0 N

Pb

1H

S1

AA

VID

TH

ER

MA

LLO

Y60

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GR

EQ

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ES

1 S

CR

EW

, 300

-000

25-

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AS

HE

R, 3

01-0

0013

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1

NU

T, 3

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0007

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0-00

013-

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4 A

WG

SO

LID

PV

C IN

S B

LK N

Pb

1JP

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IRE

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OM

PA

NY

3050

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AS

SY

DW

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OR

LE

NG

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2205

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796

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NO

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with

28

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% T

OR

VE

RT

NP

b TH

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UR

NS

2124

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0012

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OS

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Pb

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PC

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IRE

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CR

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4-4

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H

STE

EL

300-

0002

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2803

6-00

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RM

30

OH

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NP

b R

AD

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SE

NS

ING

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210

DO

NO

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OP

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HO

RT

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H

28 A

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0000

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ER

M 3

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1.5

A 5

% N

Pb

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GC

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PU

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, SH

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A

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3007

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FET

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V N

Pb

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01

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RO

ELE

CTR

ON

ICS

STP

12N

M50

FP

3102

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374-

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W ±

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Pb

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2 R

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13 R

14 R

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Pb

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5 R

17 R

21 R

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206

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NO

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0637

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EC

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0638

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4.7

OH

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NP

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061

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70FK

EA

EC

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020-

0631

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OH

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NP

b 12

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ALE

CR

CW

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3603

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3W

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Pb

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L1

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OH

MIT

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b 25

12 F

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CR

CW

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k O

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16 R

23D

ALE

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CW

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0639

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ES

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8K O

HM

1/4

W ±

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Pb

1206

1R

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ALE

CR

CW

1206

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FKE

A

DS927DB3 5

Page 6: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

C

IRR

US

LOG

ICC

DB

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Rev

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ILL

OF

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TER

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(Pag

e 2

of 2

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Item

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ence

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tor

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0002

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ON

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ST

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Pb

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3 TP

4 TP

5 TP

6 TP

7 TP

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4306

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PC

B C

DB

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Pb

1C

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US

LO

GIC

240-

0047

3-Z1

EC

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5/E

CO

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EC

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CH

EM

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RU

S L

OG

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0-00

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9/34

STR

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105

C N

P1

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WIR

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CO

MP

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CO

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SE

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SS

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6 DS927DB3

Page 7: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

4. BOARD LAYOUT

Fig

ure

2.

To

p S

ilk

scr

een

DS927DB3 7

Page 8: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Fig

ure

3.

Bo

tto

m R

ou

tin

g

Fig

ure

4.

Bo

tto

m S

ilks

cre

en

Fig

ure

5.

Bo

tto

m S

old

er

Pa

ste

Ma

sk

8 DS927DB3

Page 9: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

5. PERFORMANCE PLOTS

0

2

4

6

8

10

12

14

16

18

20

10 13.5 18 27 36 45 63 90 94.5

THD

(%)

Output Power (W)

Vin=110

Vin=220

85

87

89

91

93

95

97

99

5 6 7 8 9 10 13.5 18 27 36 45 63 90 94.5

Effic

ienc

y(%

)

Output Power (W)

Vin=110 Vin=220

Figure 6. Efficiency vs. Load at 110 VAC, 220 VAC

Figure 7. Distortion vs. Load at 110 VAC, 220 VAC

DS927DB3 9

Page 10: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

0.7

0.75

0.8

0.85

0.9

0.95

1

10 13.5 18 27 36 45 63 90 94.5

Pow

er F

acto

r

Output Power (W)

Vin=110

Vin=220

390

392

394

396

398

400

402

404

406

408

410

1 2 3 4 5 6 7 8 9 10 13.5 18 27 36 45 63 90 94.5

V Lin

k(V

)

Output Power (W)

Vin=110

Vin=220

Figure 8. Power Factor vs. Load at 110 VAC, 220 VAC

Figure 9. VLink vs. Output Power at 110 VAC, 220 VAC

10 DS927DB3

Page 11: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Figure 10. Steady State Waveforms — 110 VAC

Figure 11. Switching Frequency Profile at Peak of AC Line Voltage — 110 VAC

DS927DB3 11

Page 12: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Figure 12. Switching Frequency Profile at Trough of AC Line Voltage — 110 VAC

Figure 13. Steady State Waveforms — 220 VAC

12 DS927DB3

Page 13: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Figure 14. Switching Frequency Profile at Peak of AC Line Voltage — 220 VAC

Figure 15. Switching Frequency Profile at Trough of AC Line Voltage — 220 VAC

DS927DB3 13

Page 14: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Figure 16. Load Transient — 9 W to 90 W, 1 W/uS, 110 VAC

Figure 17. Load Transient — 90 W to 9 W, 1 W/uS, 110 VAC

14 DS927DB3

Page 15: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

Figure 18. Load Transient — 9 W to 90 W, 1 W/uS, 220 VAC

Figure 19. Load Transient — 90 W to 9 W, 1 W/uS, 220 VAC

DS927DB3 15

Page 16: CDB150x-01 - CS1501 90W, High-efficiency PFC Demonstration

CDB150x-01

6. REVISION HISTORY

Revision Date Changes

DB1 FEB 2011 Initial Release.

DB2 FEB 2011 Updated Efficiency vs. Load plot with more current data.

DB3 MAR 2011 Updated BOM & Layers to rev C.

16 DS927DB3