Behavioral Polymer Modeling for Virtual Fabrication

using Directed Self-Assembly at the 5 nm Node

Mattan Kamon, Yiguang Yan, William Clark, Daniel Faken, Ken Greiner, David Fried

Coventor, Inc.

1st International Symposium on DSA

October 26, 2015

Overview

Motivation

• To deploy DSA, it must reliably integrate into a full semiconductor process flow

• Virtual Fabrication software has proven vital in predicting yield issues in process integration, but not with DSA

NEW: Virtual Fabrication with DSA

• Behavioral DSA modeling for Virtual Fabrication

• Integration of DSA into 5nm SRAM:

• SAQP vs. LiNe DSA for Mx lines

Slide 2

Virtual Fabrication

Build integrated devices virtually

• Applicable to ANY process & ANY layout

• Replaces build & test with accurate 3D modeling of large areas & complex process sequences

• Models a complete integrated process flow; FEOL, MOL, BEOL

• Provides a predictive view of design-technology interactions

Layout:

Design, OPC, PrintSim, etc.

Process Sequence:

Step-by-Step Process

Behavioral Description

3D Result:

RMG FinFET Demo

Self-Aligned Contact

TFMHM BEOL w/ SAV

Slide 4

Virtual Fabrication

Modeling Engine

Click for full animation of above:

VirtualFabricationModelBuild.gif

(uses rackcdn.com)

Why Virtual Fabrication?

Slide 5

CMOS Scaling Era:

Fabrication flow was predictable and

mostly 2D

Scaled unit process challenges

Process variation was small compared

to nominal dimensions,

Time/Cost was spent on performance

optimization ramp

Technology modeling tools addressed

performance-centric metrics (ION, IOFF,

R, C, etc.)

Post-Scaling Era:

Fabrication flow is complex and

entirely 3D

Challenges are in integration;

Process variation is on the same scale

as nominal dimensions,

Time/Cost is spent on integration and

structural yield ramp

Technology modeling requires a more

structural, yield-centric approach

VIRTUAL FABRICATION

Trial-and-Error technology development is not acceptable

Behavioral Process Modeling

Slide 6

Start

Fin Module

STI Module

Wells

Gate Module

DEP SacOx

DEP SacGate Poly

CMP SacGate

DEP Cap Nitride

DEP Cap Ox

DEP ODL

DEP SiArc

DEP Resist

EXP Resist Gate

ETCH Gate HM RIE

ETCH Resist Strip

DEP Cut ODL

DEP Cut SiArc

DEP Cut Resist

EXP Cut Resist

ETCH Cut RIE

ETCH Resist Strip

ETCH Gate RIE

… etc …

How can we model a complete, integrated

process flow?

• Hundreds of individual unit processes

• Unit process models must simulate in minutes

NOT hours or days like typical unit process sim

Type: Planarizing Dep

Material: ODL

Nominal Depth: 35 nm

Smooth Radius: 35 nm

Answer:

• Fast, physics-based behavioral unit process

models

Type: Visibility-Limited Dep

Material: SiO2 LTO

Nominal Depth: 2 nm

Source Spread: 2 radians

Isotropic Ratio: 0.1

Epitaxy Model

Epitaxial growth is sensitive to crystal planes <111> directions normally grow slowest and form limiting facets.

22nm Tri-gate (Intel)

Embedded SiGe in planar technology

(Intel, IBM)

SiGe

FinFET SiGe Epitaxy

FinFET SiGe Epitaxy (with residual oxide)

Behavioral growth models, not atomistic models

Click for Animation:

SiGeEpitaxy.gif

Advanced Etch Modeling

Physics-driven etch modeling of

Multi-material film stacks

Multiple types of etch physics

Slide 10

STI Etches

Spacer Etches

Key Features • Etch physics:

• Redeposition (aka passivation)

• Sputtering (physical etching)

• Etch bias (lateral or chemical etching)

“Shoulder” forms on Nitride as HM pulls

back

TFMHM M2 Overetch

Click for Animation: M2_Overetch.gif

Virtual Metrology and Automation

Example Self-Aligned Contact

Overlay Variation

Auth, VLSI 2012

• Predictive process

deck built using

public TEMs

• Variation analysis

using Expeditor

batch tool

• Virtual Metrology extracting 3D interface

surface area – would require out-of-fab

destructive characterization

• Physical parameter serves as electrical

sensitivity for resistance or reliability

criteria

MOL Variation Analysis

Behavioral DSA modeling

Slide 13

• “Behavioral” (to be described)

• Cahn-Hillard / Cell-Dynamics Simulation

• Density Functional Theory (OK)

• Dissipative Particle Dynamics (DPD)

• Self-consistent field theory (SCFT)

• Coarse-grained Monte Carlo (CGMC)

• Atomistic models

Increasing

Detail,

slower

simulation

More

Behavioral,

faster

simulation

Cahn-Hillard Equation

Slide 14

𝜕𝜙 𝑟, 𝑡

𝜕𝑡= 𝑀𝛻2 −𝑏𝜙 + 𝑢𝜙3 − 𝐾𝛻2𝜙 − 𝐵𝜙

𝜙𝐴, 𝜙𝐵 are the volume fraction concentrations of block A and block B,

𝜙 𝑟, 𝑡 = 𝜙𝐴(𝑟, 𝑡) − 𝜙𝐵(𝑟, 𝑡)

Chemical brush strengths are added term (not shown)

Phenomenological Modeling

0

20

40

60

80

100

120

140

0 100000 200000 300000 400000

Ela

psed

Tim

e (

s)

Area (nm^2)

Simulates fast and time scales linearly with build area,

but 𝑏, 𝑢, 𝐾 𝑎𝑛𝑑 𝐵 depend on polymer properties 𝜒, 𝑁, 𝑓𝐴, 𝑓𝐵

Behavioral DSA

• Detailed polymer properties such as 𝜒, 𝑁, 𝑓𝐴, 𝑓𝐵 are

NOT of interest at time of Process Integration

• Polymer Domain size, L0, is detail of interest

• Choose 𝑏, 𝑢, 𝐾 𝑎𝑛𝑑 𝐵 that are a function of L0 only

and captures behavior

• Response to brush strength

• “Healing” effects of DSA (imperfect pattern)

• Incommensurability (when pattern pitch ≠ n*L0)

Slide 15

Brush strength contrast shortens anneal

Slide 16

Edwards, E. W., Stoykovich, M. P., Muller, M.

Solak, H. H., de Pablo, J. J. and Nealey, P.F.,

Journal of Polymer Science Part B: Polymer

Physics, 2005

T=3hr

T=6hr

T=24

hr

Experiment

S = 1 S = 2 S = 3

T = 1

T = 10

T = 20

.

Behavioral DSA Simulation

Increasing PS brush strength,

PMMA neutral

Commensurability

Slide 17

Paulina Rincon Delgadillo; Roel

Gronheid IMEC

Detcheverry and Liu . et al.,

Macromolecules, 2010, 3446-

3454

Experiment

0

5

10

15

20

25

30

35

40

0.95 0.97 0.99 1.01 1.03 1.05

An

ne

al T

ime

(Pattern Pitch)/(4*L0)

Anneal Time to Defect Free

1

2

3

Behavioral DSA

Simulation

Example: Integration of DSA for 5nm SRAM BEOL

Slide 18

Cell

Template M2 Lines for SAQP Mandrel or LiNe 4x DSA

SAQP vs DSA Patterning of M2 lines at 22nm pitch using 88nm pitch template

SAQP and DSA process flows

• DSA expected to be less sensitive to

process variation

• BUT BY HOW MUCH AND HOW? Click for animation:

DSA_animation.gif

Click for animation:

SAQP_animation.gif

Minimum Insulator Width

Slide 21

DSA and SAQP steps

• Tuned for 6nm Minimum Insulator

• Under ±2 variation in lithographic exposure, deposition

thickness and over-etch %

Minimum Line Width

Slide 22

SAQP: less robust minimum line width (tuned for min insulator)

DSA: better minimum line width at nominal and through variation

Overall: DSA much less sensitive to prior process variation than an SAQP

Summary

• DSA must reliably integrate into full semiconductor process flow

• To enable this integration, DSA added to a Virtual Fabrication using behavioral DSA simulation

• Demonstrated value by quantifying the difference in robustness of M2 line patterning between sample SAQP and DSA flows

Slide 23

Future and Thanks

Future work:

Cylinders!

Questions? Ask me matt@coventor.com

Slide 24

Special thanks: Paul Nealey, Juan de Pablo, Ricardo Ruiz

(SPIE Adv Litho Short Course on DSA)

Robert Seidel, Jimmy Liu, Grant Garner, Tim F.

(good hallway conversations at SPIE Adv Litho)

The End

http://www.coventor.com/semiconductor-solutions/

Slide 25