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Ching-Yuan Yang National Chung-Hsing University Department of Electrical Engineering Bandgap References 類比電路設計(3349) Ching-Yuan Yang / EE, NCHU Analog Circuit Design 11-1 Reading B. Razavi Chapter 11. Introduction Analog circuits incorporate voltage and current references extensively. Such references are dc quantities that exhibit little dependence on supply and process parameters and a well-defined dependence on the temperature. In this lecture, we deal with the design of reference generators in CMOS technology, focusing on well-established “bandgap” techniques. In most applications, the required temperature dependence assumes one of three forms: (1) proportional to absolute temperature (PTAT); (2) constant-G m behavior; (3) temperature independent. In addition, several parameters of reference generators, such as output impedance, output noise, and power dissipation, may be critical as well. Overview

Bandgap References - 國立中興大學cc.ee.nchu.edu.tw/~aiclab/teaching/AIC/lect11.pdf · Bandgap References 類比電路設計 ... reference generators in CMOS technology, focusing

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  • Ching-Yuan Yang

    National Chung-Hsing UniversityDepartment of Electrical Engineering

    Bandgap References

    (3349)

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-1

    ReadingB. Razavi Chapter 11.

    IntroductionAnalog circuits incorporate voltage and current references extensively. Such references

    are dc quantities that exhibit little dependence on supply and process parameters and a

    well-defined dependence on the temperature. In this lecture, we deal with the design of

    reference generators in CMOS technology, focusing on well-established bandgap

    techniques.

    In most applications, the required temperature dependence assumes one of three forms:

    (1) proportional to absolute temperature (PTAT);

    (2) constant-Gm behavior;

    (3) temperature independent.

    In addition, several parameters of reference generators, such as output impedance,

    output noise, and power dissipation, may be critical as well.

    Overview

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-2

    Current-mirror biasing using (a) an ideal current source, (b) a resistor.

    Simple circuit to establish supply-independent currents.

    Te output current is quite sensitive to VDD:

    How do we generate IREF independent of the supply voltage?

    Supply-independent biasing

    In order to arrive at a less sensitive solution, we postulate that the circuit must bias itself, i.e. , IREFmust be somehow derived from Iout.

    If M1-M4 operate in saturation and = 0, then Iout = KIREF, and hence can support any current level.

    ( )( )1

    2

    11 //

    /1 LWLW

    gRVI

    m

    DDout +

    =

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-3

    Addition of RS to define the currents Alternative implementation eliminating body effect

    The current is independent of the supply voltage (but still a function of process and temperature).

    Assuming = 0, then Iout = IREF and VGS1 = VGS2 + ID2RS

    SoutTHNoxn

    outTH

    Noxn

    out RIVLWKC

    IVLWC

    I++=+ 21 )/(

    2)/(

    2

    Neglecting body effect, we have SoutNoxn

    out RIKLWC

    I=

    11)/(

    2

    2

    2111

    )/(2

    =

    KRLWCI

    Snoxnout

    .

    Supply-independent biasing

    That is,

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-4

    Supply-independent biasing (contd)Addition of RS to define the currents (assuming 0). Determine Iout /VDD.

    R1 = ro1 || (1/gm1), R3 = ro3 || (1/gm3)

    143

    4 RVgRI

    rVV X

    mouto

    XDD =+

    The equivalent transconductance of M2 and RS is 2222

    222 )( oSmbmoS

    om

    X

    outm rRggrR

    rgVIG

    +++==

    Thus, ( )

    1

    341424

    11

    = Rg

    RrGrVI

    momoDD

    out 0, if ro4 = .

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-5

    Supply-independent biasing (contd)

    Addition of RS to define the currents

    Addition of start-up device

    An important issue in supply-independent biasing is the

    existence of degenerate bias points. For example, if all

    the transistors carry zero current when the supply is

    turned on, they may remain off indefinitely because the

    loop can support a zero current in both branches.In other words, the circuit can settle in one of twodifferent operating condition

    The diode-connected device M5 provides a current path from VDD through M3 and M1 to ground upon start-up.

    This technique is practical on if VTH1 +VTH5 + |VTH3| < VDDand VGS1 +VTH5 + |VGS3| > VDD, the latter to ensure M5remains off after start-up.

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-6

    Temperature-independent reference

    How to generate a quantity that remains constant with temperature?

    If two quantities having opposite temperature coefficients (TCs) are added with proper weighting, the result displays a zero TC.

    - Ex. VREF = 1V1 + 2V2, with zero TC, i.e., 1V1/T + 2V2/T = 0.

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-7

    Negative-TC voltageFor a bipolar device, where IC = IS exp(VBE /VT), where VT = KT /q.The saturation current IS is proportional to kTni2, where denotes the mobility of

    minority carries and ni is the intrinsic minority carrier concentration of silicon.

    Temperature dependence: 0Tm, and ni2 T3exp[Eg/(KT)], where m 3/2 and

    Eg 1.12eV is the bandgap energy of silicon.

    Find TC of VBE: since VBE = VT ln(IC /IS) and , then

    With VBE 750mV and T = 300oK, VBE /T 1.5mV/oK.

    The temperature coefficient of VBE itself depends on the temperature, creating error in constant reference generation if the positive-TC quantity exhibits a constanttemperature coefficient.

    kTE

    bTI gmS

    = + exp4

    ( )

    +

    +=

    ++

    243 expexp4

    kTE

    kTE

    bTkTE

    TmbTI ggmgmS ( ) TgTS

    S

    T VkTE

    TVm

    TI

    IV

    24 ++=

    ( )T

    qEVmVTI

    IV

    II

    TV

    TV gTBES

    S

    T

    S

    CTBE /4ln+

    =

    =

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-8

    Positive-TC voltage

    Generation of PTAT voltage

    Another type

    ( )mnqk

    TVBE ln=

    If IS1 = IS2, and the base currents are negligible, then

    Thus, VBE exhibits a positive temperature coefficient:

    The TC is independent of temperature or behavior of

    collector currents.

    nVIIV

    InIVVVV T

    ST

    STBEBEBE lnlnln

    2

    0

    1

    021 ===

    nqk

    TVBE ln=

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-9

    Bandgap referenceDevelop a reference having a nominally zero TC:

    Let VREF = 1VBE1 + 2(VT lnn), where VT lnn is the difference between the base-emitter voltage of the two bipolar transistors operating at different current densities.

    How to choose 1 and 2?

    Since at room temperature VBE /T 1.5mV/oK whereas VT /T +0.087mV/oK,

    we set 1 =1, and choose (2lnn)(VT /T) = 1VBE /T = 1.5mV/oK, then 2 lnn

    17.2,indicating that for zero TC: VREF VBE1 + 1.72VT 1.25V.

    Conceptual generation of temperature-independent voltage

    Two modifications:

    A mechanism must be added to guarantee VO1 = VO2.

    Since lnn = 1.72 translates to a prohibitively large n, the

    term RI = VT lnn must be scaled up by a reasonable factor.

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-10

    where VBE = VBE1 VBE2 = VT lnn.

    For a zero TC, we have (1 + R2/R3)lnn 17.2.

    For example, we may choose n = 31 and R2/R3 = 4.

    Note these results do not depend on the TC of the resistors.

    Actual implementation of bandgap reference

    ( ) ( )

    ++=+

    +=

    3

    2223

    32 1ln R

    RnVVRRRVVV TBEBEBEout

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-11

    What happens to the temperature coefficient of VBE if the collector currents

    are PTAT?

    Since VBE = VT ln(IC /IS), we have

    Since IC1 = IC2 (VT lnn)/R3 IC /T

    (VT lnn)/(R3T) = IC /T,

    we have

    indicating that the TC is slightly less negative than 1.5mV/oK at T = 300oK.

    Collector current variation

    +

    =

    TI

    ITI

    IV

    II

    TV

    TV S

    S

    C

    CT

    S

    CTBE 11ln

    ( )T

    qEVmVTI

    IV

    TV

    II

    TV

    TV

    gTBE

    S

    S

    TT

    S

    CTBE

    /3

    ln

    +=

    +

    =

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-12

    Compatibility with CMOS technology

    Realization of a pnp bipolar transistor in CMOS technology.

    Circuit implemented with pnp transistors

    The p-type substrate acts as the collector

    and it is inevitably connected to the most

    negative supply (usually ground).

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-13

    OP amp offset and output impedance

    Effect of op amp offset on the reference voltage

    If A1 is large, VBE1 VOS VBE2 + R3 IC2 and

    Vout = VBE2 + (R3 + R2)IC2. Thus,

    The key point is that VOS is amplified by 1 + R2/R3,

    introducing error in Vout. More importantly, VOS itself varies with temperature,

    raising the temperature coefficient of the output voltage.

    ( )

    ( )OSTBE

    OSBEBEBEout

    VnVRRV

    RVVVRRVV

    ++=

    ++=

    ln13

    22

    3

    21232

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-14

    R1 and R2 are ratioed by a factor of m, producing I1 mI2.

    Neglecting base currents and assuming A1 is large, we

    have VBE1 + VBE2 VOS = VBE3 + VBE4 + R3I2 and

    Vout = VBE3 + VBE4 + (R3 + R2)I2. It follows that

    The effect of the offset voltage is reduced by increasing the

    first term in the square brackets.

    The implementation is not feasible in a standard

    CMOS technology because the collectors of Q2 and

    Q4 are not grounded. We modify the series combination

    of the diodes as illustrated in Fig.(a), converting to one

    of the diodes to an emitter follower.

    Reduction of the effect of op amp offset

    Biased by PMOS current sources

    ( ) ( )3

    2343ln2

    RVmnVRRVVV OSTBEBEout

    +++=

    ( )[ ]OSTBE VmnVRRV

    ++= ln212

    3

    2

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-15

    Reduction of the effect of op amp offset (contd)

    Reference generator incorporating two series base-emitter voltage

    Discussion:

    Advantage:

    The op amp experiences no resistive loading.

    Disadvantage:

    The mismatch and channel-length modulation

    of the PMOS devices introduce error at the

    output.

    Since Q2 and Q4 have a finite current gain ,

    they generate an error in the emitter currents

    of Q1 and Q3 and introduce error at the output.

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-16

    Feedback polarity

    The negative feedback factor is given by

    The positive feedback factor is given by

    To ensure an overall negative feedback, P must be less than N, preferably by

    roughly a factor of two so that the transient response remains well-behaved with

    large capacitive loads.

    232

    32

    /1/1

    RRgRg

    m

    mN ++

    +=

    11

    1

    /1/1

    Rgg

    m

    mP +=

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-17

    Bandgap reference

    Bandgap reference VREF = VBE + VT lnn, then .

    Setting and ,

    we have

    Thus, we obtain

    The reference voltage exhibiting a nominally-zero TC is given by a few fundamental

    numbers: the bandgap voltage of silicon (Eg /q), the temperature exponent of mobility

    (m), and the thermal voltage (VT).

    The term bandgap is used here because as T 0, VREF Eg /q.

    nTV

    TV

    TV TBEREF ln+

    =

    0=

    T

    VREF ( )T

    qEVmVT

    V gTBEBE /4 +=

    ( )n

    TV

    TqEVmV TgTBE ln

    /4=

    +

    ( ) TgREF VmqE

    V ++= 4

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-18

    Supply dependence and start-up

    The output voltage is relatively independent of the supply voltage so long as the

    open-loop gain of the op amp is sufficiently high.

    The circuit may require a start-up mechanism because if VX and VY are equal to

    zero, the input differential pair of the op amp may turn off.

    The supply rejection of the circuit typically degrades at high frequencies owing to

    the op amps rejection properties, often mandating supply regulation.

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-19

    Curvature in temperature dependence of a bandgap voltage

    Bandgap voltages exhibit a finite curvature,

    i.e., their TC is typically zero atone temperature

    and positive or negative at other temperatures.

    The curvature arises from temperature variation of base-emitter

    voltages, collector currents, and offset voltages.

    Variation of the zero-TC temperature for differences samples

    Many curvature correction techniques have been devised

    to suppress the variation of VREF in bipolar bandgap

    circuits but they are seldom used in CMOS counterparts.

    This is because, due to large offsets and process variations,

    samples of a bandgap reference display substantially different

    zero-TC temperatures (right Figure) ,making it difficult to correct the curvature reliably.

    Curvature correction

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-20

    PTAT current generation

    Generation of a PTAT current Generation of a PTAT current using a simple

    amplifier

    M1 = M2, M3 = M4 ID1 = ID2 VX = VY

    In practice, due to mismatches between the transistors

    and the TC of R1, the variation of ID5 deviates from the

    ideal equation.

    121

    lnR

    nVII TDD ==

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-21

    PTAT current generation (contd)

    Generation of a temperature-independent voltage

    M1 = M2, M3 = M4 = M5, the output equals

    If VREF /T = 0 , we can find the required reference value.

    In reality, mismatches of the PMOS devices

    introduce error in Vout.

    nVRRVV TBEREF ln

    1

    23 +=

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-22

    Constant-Gm biasing

    Supply-independent bias

    It is often desirable to bias the transistors such that their transconductance does not

    depend on the temperature, process, or supply voltage.

    Supply-independent bias circuit:

    The transconductance of M1 equals ,

    independent of the supply voltage and MOS device parameters.

    In reality, the value of RS does vary with temperature and process.

    ( )

    2

    2111

    /2

    =

    KRLWCI

    SNoxnout

    =

    =

    KRI

    LWCg

    SD

    Noxnm

    1122 11

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-23

    Constant-Gm biasing (contd)Constant-Gm biasing by means of a switched-capacitor resistor.

    Switched-capacitor resistor

    Since the absolute value of capacitors is typically more tightly controlled and since the

    TC of capacitors is much smaller than that of resistors, this technique provides a higher

    reproducibility in the bias current

    and transconductance.

    CKSS fC

    R 1=

    Voltage-to-current conversion by means of a switched-capacitor resistor.

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-24

    Speed issueEffect of circuit transients on reference voltages and currents

    For fast changes in VN, the op amp cannot maintain VPconstant and the bias currents of M5 and M6 experience

    large transient changes. Also, the duration of the transient at

    node P may be quite long if the op amp suffers from a slow

    response. For this reason, many applications may require a

    high-speed op amp in the reference generator.

    The critical node P can be bypassed to ground by means of

    a large capacitor (CB) so as to suppress the effect of

    external disturbances.

    This approach involves two issues:

    The stability of op amp must not degrade with the addition of CB, requiring the op amp

    to be of one-stage nature.

    Since CB generally slow down the transient response of the op amp, its value must be

    much greater than the capacitance that couples the disturbance to node P.

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-25

    Speed issue (contd)

    Effect of increasing bypass capacitor on the response of a reference generator

    Setup for testing the transient response of a reference generator

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-26

    iD1 = iD2 = gmPVP = Vn,out /(R1 + gmN1) VP = gmP1Vn,out /(R1 + gmN1)

    and VP = A0Vin,op

    Node A:

    Since typically gmPA0 >> gmN >> R11, we have |Vn,out| Vn,op.

    The noise of the op amp directly appears at the output.

    Even the addition of a large capacitor from the output

    to ground may not suppress low-frequency 1/f noise

    components ,a serious difficulty in low-noise application.

    Noise issueA/D converter using a reference generator

    Circuit for calculation of noise in a reference generator

    outnopnopinmNmN

    outn VVVggR

    V,,,1

    1

    , 1 +=++

    If a high-precision A/D converter employs a bandgap

    voltage as the reference with which the analog input

    signal is compared, then the noise in the reference is

    directly added to the input.

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-27

    Simplified core of a bandgap circuit

    (a) Addition of cascode devices to improve supply rejection

    (b) Use of self-biased cascode to eliminate Vb1 and Vb2

  • Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-28

    Generation of a floating reference voltage

    nVRRV

    RRV TBEout ln2

    1

    54

    6

    4 +=

    Ching-Yuan Yang / EE, NCHUAnalog Circuit Design 11-29

    Regulation of supply voltage to improve supply rejection