Automatic generation of RF compact models from device ...serge/182.pdf · Automatic generation of RF compact models from device simulation ... ac- curacy, and ... When the device

Automatic generation of RF compact models from device simulation

S. Luryi and A. PacelliDepartment of Electrical and Computer Engineering

State University of New York, Stony Brook, NY 11794-2350, (serge,pacelli)@ece.sunysb.edu

ABSTRACT

We review a recently proposed methodology for auto-matic generation of equivalent circuits from physical devicesimulation. The method is based on the calibration on a sim-plified equivalent-circuit model on simulation results, andcan achieve an optimum balance of model complexity, ac-curacy, and generality. We discuss some of the possible ap-plications of the technique to the modeling of active devices,parasitic elements, and complex physical effects such as self-heating and hot-carrier transport.

Keywords: Compact models; device simulation; RF; inter-connects; self-heating

1 INTRODUCTION

Conventional RF modeling of device behavior is done byfitting parameters of a pre-conceived model of a given de-vice (e.g, the Gummel-Poon model of a bipolar transistor) toempirical dc and ac data (e.g, Gummel plots and scatteringparameters). This approach fails in at least three situations:

1. When one deals with a new type of device for which thedevice physicists have not done their homework;

2. When miniaturization of standard devices brings aboutnew phenomena not accounted for by the pre-conceived model; this situation is all too familiarand ranges from short-channel effects in a singleMOS transistor to mutual interference between severalclosely spaced devices to effects of packaging and en-vironment;

3. When the device operation is stretched into a new regime,where the old pre-conceived model does not work; thissituation includes high-power and/or high-frequencyoperation, operation in an unusual physical environ-ment, such as magnetic field, incident radiation, etc.

Modern device modeling codes enable the designer tosimulate the behavior of nearly arbitrary three-dimensionalsemiconductor device structures with multiple electrodes.The result can be employed to develop an equivalent circuit,but the way this is done conventionally is by simply usingthe simulator as a convenient “experiment in the bottle.” Thisprocedure may be even more convenient than an actual exper-iment, since it makes clear what is and what is not included

in the device behavior. However, the choice of the equiva-lent circuit topology still requires an expert guess. Clearly,this procedure suffers from the same limitations as fitting toexperiment.

Here we discuss a different approach to the prob-lem, based on physical device modeling without any pre-conceived circuit topology. Ultimately, we would like to au-tomate the choice of topology itself. If the choice is maderight, parameter calibration should be a routine procedure.As we will see, the approach is quite general, and can be ap-plied to areas well beyond semiconductor device modeling,such as interconnection networks and heat-transport effects.

A device modeling code solves the semiconductor trans-port equations together with Poisson’s equation, and pro-duces files that describe all the internal fields in the device,i.e., the electrostatic potential, carrier concentrations, andpossibly the effective carrier temperatures. The solutions arediscretized on a large grid, which typically comprises thou-sands to hundreds of thousands of nodes. In a sense, sucha grid may be viewed as an extremely complicated electri-cal network. We should be able to extract workable equiv-alent circuit elements by a systematic reduction of the solu-tion files — appropriately lumping together different nodesthat are seen to be at the same potential, replacing streamsof current by resistors, etc. Of course, this is precisely whata device physicist is doing implicitly while constructing anequivalent circuit based on a physical picture of the device.Our goal should be to automate this process, developing arobust procedure that would act as a postprocessor to de-vice simulators — producing equivalent circuits of any de-sired complexity to any multi-terminal semiconductor struc-ture under any operating conditions, that the device simulatoritself can model.

In this approach, the relation between the physical pic-ture provided by the simulator and that which exists in thereal semiconductor structure is not to be challenged. In-stead, we take the simulator model as infallible and inves-tigate means for reducing that model to an equivalent circuit.Is this model reduction always possible? After all, the physi-cal world in its complexity seems to go far beyond the effectsthat can be described by lumped-element electrical circuits.In the original program, as formulated by one of us [1], itwas assumed that a circuit representation should always bepossible so long as carrier concentrations and transport canbe adequately described by carrier quasi Fermi levels (QFL)

702 Modeling and Simulatiuon of Microsystems 2002, (www.cr.org), ISBN 0-9708275-7-1.

and their gradients. This description naturally takes into ac-count non-transport processes such as recombination, andhence describes currents flowing in real space and momen-tum space on equal footing. However, it was not clear ini-tially how to include the effects of electrostatics (Poisson’sequation) and the coexistence of conduction and displace-ment currents. A rigorous treatment due to Sah [2], based onprevious work by Linvill [3], provided a circuit representa-tion for both the Poisson and the transport equations. How-ever, the original formulation was valid only in the limit ofan infinitesimal semiconductor region. A breakthrough camewith an integral derivation of circuit equations [4] which ex-tended the model to regions of arbitrary size and enabled themethodology for automatic generation of circuits from thedevice simulation.

In this paper we review the essential elements of thismethodology and discuss its potential and limitations. InSection 2 we introduce the technique using a simple electro-static problem, including only ideal conductors, as an exam-ple. In Section 3 we generalize the picture to include chargetransport in semiconductors. Section 4 is a review of past,current, and future work in a variety of application areas. InSection 5 we discuss fine points in the method implemen-tation, and in Section 6 we comment on the advantages ofthe technique in comparison with black-box and table-basedmethods.

2 MODEL GENERATIONMETHODOLOGY

Our model extraction methodology is based on the cal-ibration of a physically-based equivalent circuit by a nu-merical solution of the relevant equations. Let us considerfor example an elementary electrostatic problem, compris-ing � conductors. The �� elements

��of the capacitance

matrix can be computed from a solution of the Poisson equa-tion, when a test voltage is applied to one of the terminals.The capacitance term

��is defined as1

� �� (1)

where �� is the variation in voltage applied to conductor � ,and �� is the variation in the charge induced on conduc-tor � .

The capacitance-matrix representation is rigorous, but re-quires a large number of coefficients. In circuit terms, eachnode is connected to � ��

other nodes via a capacitor, thusgiving rise to ��

distinct circuit elements. It is wellknown that the capacitance matrix is sparse, i.e., a large num-ber of elements is negligible due to screening. Taking advan-tage of this property, we can define a more compact repre-sentation, where each conductor is connected to a small setof nearest neighbors (Fig. 1). We denote the set of neighbors

1We use superscripts instead of the more common subscript notation, forconsistency with symbols introduced later.

Capacitance matrix Local model

Figure 1: Left: Full capacitance matrix for five conductorsover a ground plane. Right: Simplified local model.

of conductor � by � "! � �$# � � � �&%$%'% � ��(*)�+ . For conductor � ,we define a set of dielectric capacitances

�,��- , from � to eachof its neighbors in � . Applying a stimulus �� to conduc-tor � , the effective capacitance element

� ��- is defined as

� ��- � �� .0/ )2143 S %'5 � (2)

where 5 is the electric field as obtained from the solution ofthe Poisson equation. The capacitance is now defined as theflux of the displacement vector from � to � , divided by theapplied voltage stimulus. Even though this representation isnot rigorous, it is has a clear physical interpretation, and it ismore accurate than simply neglecting small terms in the ca-pacitance matrix. In fact, it is simply shown from the Gausstheorem that 6

�8749 ) � ��- 6:<;= � � � : >� � �?� � (3)

i.e., the small number of terms in the compact capacitancerepresentation includes the effect of elements in the capaci-tance matrix not explicitly accounted for in the model.

From the above example, we can identify the main fea-tures of the model generation technique:

1. A simplified, but physically sound, circuit topology is em-ployed to represent a complex system.

2. Expressions for the numerical values of the circuit ele-ments are derived from integral equations. This en-sures that basic conservation laws are obeyed in theresulting model.

3. Model calibration is obtained from a numerical solutionof the microscopic equations, where one or more stim-uli are applied to the system, and the resulting responseis plugged into the integral equations which define el-ement values.

In the example above, the topology is derived from sim-ple geometric considerations, by neglecting coupling to dis-tant conductors. The integral equation used to derive Eq. (2)is the Gauss theorem. The stimulus is the small-signal volt-age applied to conductor � .


It is apparent that the simplified topology shown in Fig. 1may not be a good model for the problem at hand. For ex-ample, the neglect of fringe capacitances between the firstand third conductor levels could be disastrous if an accuratecrosstalk estimation were needed. Moreover, there is someambiguity in the definition of the dielectric capacitance inEq. (2). In principle two different values for the capacitanceconnecting nodes � and � are obtained, one by applying astimulus to conductor � , and a different one when the stimu-lus is applied to conductor � :� �@�- �

�� .A/ 1B)C3 S %$5ED (4)

Of course it is highly desirable to obtain a model includingonly reciprocal capacitors. Nevertheless, if the circuit topol-ogy is sound, then

��- and�F�G�- will not be very different,

and the error can be minimized by taking the average of thevalues obtained from the two stimuli. Generalizing the aboveconsiderations, we obtain the fourth feature of the method:

4. The accuracy of the model depends on a good choice oftopology and stimuli.

One crucial feature of the integral-equation approach is that,if the conductors and the dielectric are partitioned into an in-finite number of very small regions, the integral equationsturn into differential equations, and the method becomes rig-orous (after all, Poisson’s equation is also a local micro-scopic model). Therefore, even though different choices oftopologies and stimuli will yield various degrees of accuracy,the exact solution can always be achieved by increasing themodel complexity.

3 SEMICONDUCTOR TRANSPORTMODEL

In the previous section, we only considered the Pois-son equation, which models electrostatic interactions. Themethod can be extended to include also electron and holetransport, and generation/recombination mechanisms. Thedevice, or simulation domain, is partitioned into discrete vol-umes. A circuit building block is associated with each vol-ume H � , with elements connecting it to its neighbors. Thefull equivalent-circuit block for two volumes H � and H � , andthe surface I �� between them, is shown in Fig. 2 [4]. Thedielectric capacitor

��- previously mentioned connects theelectrostatic potentials � �J and � �J . Capacitors

� �K and� �(

model hole and electron charge storage, respectively, andconnect the electrostatic potential node to the hole and elec-tron quasi-Fermi levels � �K and � �( . Current sources L ��Kand L ��( describe hole and electron current flowing betweenH � and H � . Finally, generation-recombination (G-R) is de-scribed to first order by a resistor M �N connecting the electronand hole QFLs � �( and � �K , so that the G-R rate depends onthe energy difference between the two levels (i.e., the quan-tity �0O � ��J ). External carrier generation (e.g., due to pho-

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Cpk

Igl Rr

l

VplVp

k

R kr Vi

kkgI

n

klpI

lVi

C lp

dkl

I kl

nC k

C

Figure 2: Circuit topology for two regions of semiconductor,labeled � and � , respectively, accounting for charge storage ineach, and exchange of conduction and displacement currentsbetween them. Generation and recombination elements arealso shown.

ton absorption) is likewise modeled by the current source L �Pconnecting nodes � �( and � �K .

All the currents and charges for the elements in the equiv-alent circuit in Fig. 2 are nonlinear functions of the appliedvoltages. Clearly, some elements will be more linear thanothers. For example, the dielectric capacitance is almost lin-ear, due to the weak dependence of the depletion widths onthe potential drops. On the other hand, the charge storage ca-pacitors are highly nonlinear, due to the exponential depen-dence of the charge on the energy levels. In a circuit simu-lation, nonlinear elements will be represented by table-basedinterpolation schemes, where the data points (e.g., total elec-tron charge � �( as a function of the driving voltage � �J � � �( )are tabulated for a matrix of bias points. In a simplified im-plementation, a small-signal model for a single bias point canbe obtained by linearizing all the elements.

The calibration of the semiconductor equivalent circuitmust be obtained from a numerical solution of the Poissonequation and the continuity equations for electrons and holes.We obtain such solutions from the device simulator PADRE[5]. In order to obtain values for the equivalent-circuit el-ements, numerical integrations of the current, charges andelectric fields are performed on the output of the device sim-ulator. PADRE is based on the semiconductor transport equa-tions, resulting from the first two moments of the Boltzmannkinetic equation. This includes the drift-diffusion equationsand the carrier temperature transport equations for both kindsof carriers. All these can be incorporated rigorously in ourmethodology in the sense that the automatically derived cir-cuit, if fine enough, will give results indistinguishable fromthose obtained by the device simulation.

How fine is fine enough? Experience with quasi one-onedimensional bipolar circuits [4] suggests that our procedureis robust and converges rapidly, using a number of elements


orders of magnitude smaller than the mesh points employedin PADRE. This is not surprising, since each of our circuit el-ements includes the knowledge of the full solution of the dif-ferential equations. The number of circuit elements we endup with is comparable to or less than that usually employed in“non-physical” fitting procedures. Naturally, the number ofelements will expand for two- and three-dimensional simula-tions, but we can expect it to remain manageable. However,it should be understood that approximate circuits containinga relatively small number of elements may not be unique.

It should be also clearly understood that the rigor of ourapproach is closely linked to the fact that on the physicallevel we are dealing with the first two moments of the Boltz-mann equation only, where the resultant differential equa-tions admit of a simple circuit representation. Dealing withvarious nonlocal phenomena which cannot be reduced tofirst moments, physical device simulators must incorporatefull Boltzmann solvers, such as Monte Carlo postprocessors.Needless to say, in this situation we are leaving the “rigor-ous” terrain in the attempt to construct an equivalent circuit.Nevertheless, in those cases when these nonlocal effects maybe treated as pseudolocal (with modified transport parame-ters) the present approach should be expected to give a rea-sonable approximation, since circuit elements are calibratedon simulations which do include such effects. This empirical,but effective, recalibration is similar to the way velocity satu-ration is included in drift-diffusion models, not by includingthe electron temperature in the model, but simply introducingan artificial limitation of the velocity at high electric fields.

4 APPLICATIONS

4.1 Bipolar devices

The automatic model extraction technique has been ini-tially applied to OQ� junctions and bipolar transistors. Bipolardevices are good testbeds for this approach, due to their one-dimensional nature which facilitates the extraction of datafrom the numerical simulation. At the same time, the correctprediction of the high-injection and high-frequency behav-ior even of the simplest OA� junction is a nontrivial model-ing problem, which has stimulated a substantial amount ofwork even in recent times [6], [7]. Fig. 3 shows results forthe low-frequency behavior of a uniformly-doped OA� junc-tion. A three-section model was employed, with two blocksfor the O and � quasi-neutral regions and one for the de-pletion region. The change of sign of the imaginary partof the admittance corresponding to a high-injection induc-tive effect, is correctly modeled. Note that this result wasobtained from a completely automatic procedure, which au-tonomously divided the device into discrete regions, based onthe location of the peaks of the differential charge concentra-tion [8]. Also, the circuit sections were not specifically op-timized for modeling quasi-neutral or depleted regions, butthe program was able to find appropriate values of the cir-cuit elements to perform the correct functionality. The same

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duct

ance

[S

/µm

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Abs

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acita

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[F/µ

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Forward bias [V]

Simulation, GSimulation, C

Model

Figure 3: Small-signal conductance R and capacitance�

at 100 kHz for a symmetric OA� junction with S�T m long Oand � regions of doping

�'U #WV'X?Y[Z]\. Symbols show device-

simulation results. The dip in the capacitance corresponds toa change of sign at 0.77 V.

identical procedure was applied to aU D � S&T m bipolar transis-

tor, yielding excellent match of the equivalent circuit to theac device simulation up to the device cutoff frequency [4]. Inthis case, only five circuit sections were employed, three forthe quasi-neutral regions (emitter, base, collector) and twofor the base-emitter and base-collector depletion regions.

4.2 Optoelectronic devices

By introducing carrier generation and recombination, theBJT modeling procedure was extended to reproduce the tran-sient behavior of a phototransistor. The base of the transistorwas left open, while the optical signal was simulated by auniform carrier generation. Figure 4 shows the small-signaltransient collector current in response to a small step in lightintensity. Note that since a linear extraction was performed,the step amplitude was maintained small enough not to causesignificant nonlinear effects. The two-step response is cor-rectly reproduced by the compact model, including the de-layed response of the transistor due to base-emitter chargestorage. Also in this case, the extraction was completely au-tomatic. Since the optical response was desired, an opticalstimulus was employed. The element values were definedfrom the small-signal response to a small variation in lightintensity.

4.3 Device parasitics

In the preceding two sections we have shown examplesof the validation of our model generation technique on tra-ditional devices, for which successful compact models al-ready exist. However, there is a wide range of parasiticeffects which are not adequately covered by existing mod-els, and whose dependence on the technological parameters


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rent

[A

/µm

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Time [s]

Device simulationCircuit model

I1

I2

Figure 4: Time transient of output current for a simple pho-totransistor, for a step increase of light intensity. Numericaldevice simulation (symbols) is compared to equivalent cir-cuit (solid line). The inset shows the schematics of deviceoperation. The initial small increase of current (in the pi-cosecond range) is due to the arrival of primary photocurrentL # to the collector, while the second step (reaching saturationat about

�'U Z]^`_) is due to the current L � ba L # by transistor

action.

requires new models to be developed almost continuously.Examples include MOSFET substrate coupling, distributedM � effects in isolation wells, substrate capacitive currentsand eddy currents in spiral inductors, etc. Such problemsdo not present great obstacles from the point of view of cir-cuit topology and model extraction, although the intrinsicallythree-dimensional geometries require a considerable effort inpartitioning the device (see Section 5 below).

4.4 Interconnections

Interconnection networks represent a challenge for tradi-tional modeling techniques, and an opportunity for employ-ing new approaches. The accurate modeling of capacitive,resistive, and inductive parasitic elements is key to effectiveIC design [9]. Such elements involve complex electromag-netics (e.g., skin effect), and must be extracted for a varietyof possible layouts. A modular approach to parasitic extrac-tion offers the following advantages:

1. The extraction does not depend on analytical expressions,which have been found to be short-lived due to the im-petuous technological progress.

2. Unlike physical models (e.g., fast solvers), an equivalent-circuit-based model lends itself to postprocessing suchas model reduction, interpolation, and transformationinto symbolic form suitable for synthesis and opti-mization.

3. Large-scale interconnection networks can be divided into

smaller networks and models can be separately ex-tracted and merged. Again, this is a major advantageover physical solvers, allowing application to full-chipinterconnect analysis which would otherwise requirestaggering computer resources.

While for capacitive and resistive parasitics a simplified ver-sion of the semiconductor-device building block of Fig. 2 canbe employed (using only one type of charge carrier), induc-tive effects require an extension of the model. Specifically,we can include magnetostatic effects by adding a circuitbranch corresponding to an integral equation for the mag-netic field, by analogy with electrostatic interactions. The ap-proach is in some ways similar to the partial-element equiv-alent circuit (PEEC) where a matrix of integral equations isinterpreted as a set of circuit equations [10]. However, thepresent technique, based on intrinsically local models, is ide-ally suited for inductive effects, where matrix sparsificationis a key issue. Moreover, in the PEEC approach, as in Sah’soriginal method, element values are computed from analyti-cal expressions, while in our methodology they are extractedfrom a solutions of the physical equations. This propertypromises a better accuracy with a smaller number of circuitelements.

4.5 Self-heating and thermal coupling

The same considerations made above for interconnectsalso apply to thermal effects in integrated circuits. High-performance technological solutions such as low-K di-electrics, SOI substrates, deep-trench isolation, and three-dimensional integration all contribute to a degradation ofheat removal. The consequent temperature gradients canhave a dramatic impact on the performance of analog anddigital circuits, and on electromigration [11]–[13]. Themodel-generation methodology can be easily adapted to dealwith thermal elements, so that, for example, thermal capaci-tance can be obtained as an incremental ratio of thermal en-ergy to temperature, and thermal resistance as a ratio of tem-perature increase to differential heat flow. A “thermal net-work” is then defined, composed of material regions whichexchange heat through the interfaces between them. Eachregion � has a capacitance

��c�d to ground which representsits thermal energy, while each interface I �� is associated toa thermal resistance M ��ced which corresponds to the heat ex-changed through it (Fig. 5). The dissipated power f �g$h iji isrepresented by a current source charging the thermal capac-itance. Note how the Kirchhoff current law for each tem-perature node corresponds to the first principle of thermo-dynamics (power in equals power out minus stored energy).This physically sound approach is likely to be more robustthan empirical connections of thermal resistances and ca-pacitances (e.g., a series connection of M � parallels [12]),which do have any meaningful interpretation. A typical de-vice model will include a small number of regions, ordersof magnitude less than in a typical simulation mesh. At the


kT T

P

th

dissP llCth

l

k

R kl

kCdiss th

Figure 5: Circuit topology for two regions of semiconduc-tor, labeled � and � , respectively, modeling thermal effects.The thermal capacitance

�,�ced represents the storage of ther-mal energy, and is charged by the dissipated power f �g$h iji .The thermal resistance M ��c�d models heat exchange betweenregions � and � .same time, each element models the behavior of the corre-sponding volume or interface with great accuracy. This isdue to the fact that the numerical values of thermal capaci-tances and resistances are not guessed from finite-differenceapproximations [14], but rather computed from the devicesimulation result. Thermal effects represent a significant gapin the state of the art of integrated circuit modeling, whichis ideally filled by an efficient, technology-independent tech-nique.

4.6 Hot-carrier and quantum-mechanicaleffects

So far we have assumed that charge storage can be ad-equately described by a single quasi-Fermi level. In manycases, the carrier population is not at thermal equilibrium,therefore more variables are needed to effectively describeits state. The thermal circuit described in the previous sec-tion can be extended to include the electron and hole effec-tive temperatures. Circuit elements can model energy ex-change between the lattice and the free carrier population,as a current flow between temperature nodes. This approachhas the advantage of leaving the topology of the electricalcircuit almost unchanged, and augmenting the thermal cir-cuit with additional thermal capacitors. Another advantageof this approach is that it parallels the methodology used inmodeling hot carrier effects in PADRE [5] by incorporatingenergy transport equations into the PDE system to be solved.Using this approach we modeled the real-space transfer inthe charge-injection transistor (CHINT) [15], [16], which isa device essentially based on hot electron effects. Subtle andunusual effects, both static (including multiply connected L �characteristic) and dynamic (hot-electron domain formation)were successfully simulated and understood and yet we wereunable to derive a viable physically-based circuit model forthe device.2

2The CHINT is a three-terminal device based on the real-space trans-fer of hot electrons between independently contacted semiconductor layers.

C kn2

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I kln1

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Vpl

R k12 R l

12

C ln2

V l

I12l

V ln1

C ln1

VilVi

k

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Figure 6: Extension of the equivalent circuit of Fig. 2 to ac-count for two electron populations, described by quasi-Fermilevels � (4# and � ( � . The two populations may correspond totwo subbands in a quantized electron gas, or to ‘cold’ and‘hot’ carriers in a high-field region.

An alternate way of modeling the same effect is by theuse of multiple quasi-Fermi levels, each describing a sepa-rate carrier population. For example, the occupancy of low-and high-energy states can be modeled by separate QFLs forthe ‘cold’ and ‘hot’ carriers (Fig. 6). A thermalizing resis-tor M �# � would tend to equalize the two levels, while a currentsource L �# � would transfer charge from the ‘cold’ to the ‘hot’populations, due to the heating action of the electric field.This topology (which is similar to the one originally adoptedby Sah to describe MOS interface traps [17]) is rather crudeif the carrier distribution is indeed a heated Maxwellian, asit happens at moderate electric fields. However, in this ap-proach a separate thermal subcircuit is not needed, makingthe model more compact. Moreover, the topology can begeneralized to account for more energy levels, allowing themodeling of phenomena with multiple thresholds, such asimpact ionization and oxide injection.

The same multiple-QFL approach can be employed torepresent a multiple-subband structure in a two-dimensionalelectron gas (2DEG). A separate Fermi level would be de-fined for each subband, adding one or more extra ‘rails’ tothe circuit of Fig. 2. In this case, the thermalizing resistorM �# � represents intersubband scattering.

The voltage applied to the third CHINT terminal controls the negative differ-ential resistance between the two other terminals. This property is attractive,for example, for the implementation of voltage-controlled oscillators. Cir-cuit design using charge-transfer devices has been hampered, however, bythe absence of a workable equivalent RF circuit of the CHINT. The frustra-tion felt by one of us (SL) due to this state of affairs was in fact an importantimpetus for initiating the current program.


5 IMPLEMENTATION ISSUES

As outlined in the preceding sections, there is a numberof theoretical and practical issues which must be addressedin the implementation of the model generation technique.Even though in the limit of an infinite number of elementsthe model is rigorous, it is obvious that a satisfactory accu-racy must be obtained using the smallest possible numberof elements. In turn, a low complexity can be achieved byadopting a good circuit topology, a good partitioning of thedevice, and a good set of stimuli.

Choice of circuit topology is the most important step inthe procedure. In principle, the topology and type of ele-ments is arbitrary. For example, electron current flow can bemodeled by a simple resistor connecting two electron QFLs.This representation is satisfactory for simple majority trans-port, but may not be well suited to diffusion, where the cur-rent is mainly controlled by the electron concentration at theinjecting end of the device. More importantly, and less ob-viously, a resistor is defined by only one numerical value,i.e., there is only one degree of freedom in fitting numeri-cal simulations. In many cases, one needs to simultaneouslysatisfy two or more constraints, for example, the forwardtransconductance and the Early effect in a bipolar transis-tor. The availability of two or more parameters increases therepresentational power of the model. In the example above,the simple resistor can be replaced by a parallel of a resistorand a voltage-controlled current source, where the control-ling voltage may be the difference between the electron QFLand the electrostatic potential, which is directly related to theelectron concentration [4].

In special circumstances, several completely differenttopologies exists to represent a given physical effect. Oneexample is the hot-carrier equivalent circuit described in Sec-tion 4.6. The choice of model is dictated by the particularapplication, and may require some empirical iterations.

The task of partitioning a device into discrete domains isalso challenging. In one dimension, partitioning consists inidentifying a set of points which separate one region fromits neighbors. In 2D and 3D, device partitioning becomes aserious problem in computational geometry. Drastic simpli-fications can be performed for the case of simple geometriessuch as interconnections with constant cross-section, so thatregions can be separated by horizontal and vertical planes.However, the general case of 3D devices with curved bound-aries (e.g., source/drain depletion regions) needs substantialwork. Fortunately, effective meshing algorithms are an es-sential part of most modern simulation codes. Once again wecan rely on a state-of-the-art modeling program, and obtain apartitioning by aggregating mesh nodes based on topologicaland physical criteria.

Finally, the choice of stimuli is crucial to the success ofthe model extraction process. In general, one would like tohave enough stimuli to properly calibrate all element val-ues, but not so many that the calibration problem is overcon-strained. Satisfying a large number of conditions requires a

large number of parameters, which leads to complicated cir-cuit elements such as nonreciprocal capacitance and induc-tance matrices. Such elements may be undesirable, mainlybecause they are hard to understand and can have unpre-dictable effects on circuit performance. On the other hand,the role of simple elements such as resistors and capacitorsis easily understood, which allows feedback from the usersof the model (circuit designers) to the device designers.

So far, we have considered only the case of model extrac-tion from a full physical simulation, where external variablessuch as voltages and currents are applied to the entire struc-ture. This procedure is optimal for active devices, where thesimulation domain and number of terminals are both small.In the case of interconnection networks at the subcircuit ordie level, the large number of terminals and the sheer size ofthe structure may make the method inapplicable to realisticcases. However, the technique can be extended to use ‘syn-thetic’ stimuli, where only a very simplified physical prob-lem is solved, for example, by injecting voltages or currentsdirectly into the region where the element extraction is beingperformed. This approach is being currently investigated andpromises to boost performance significantly.

6 DISCUSSION

In this paper we presented a rather general methodologyaimed at the derivation of equivalent lumped-element circuitsfrom physical device simulation. The fact that our techniqueis riding on the back of physical modeling and does not workindependently, is not its weakness but a major strength. Itenables us to faithfully mimic the rigorous fine-mesh simu-lation with a relatively small number of elements. However,as discussed above, small circuits carry a price — they arenot unique, and not all possible alternative implementationreach the same level of accuracy.

To assess the practical impact of this work, it is essen-tial to compare the present approach to black-box and table-lookup techniques for compact model generation, which invarious forms are used today, especially in the computer-aided design of microwave circuits. Typically, each of suchmethods is located at some point in an ideal plane of gener-ality versus accuracy. At one end, we have the true black-box models, where generic fitting functions such as polyno-mials or splines are used to model the behavior of an un-known device [18]. Clearly, in order to achieve satisfactoryaccuracy in a variety of applications, such models require alarge number of coefficients. At the other end of the spec-trum, we find table-based equivalent circuits, where some orall the elements of a predefined circuit topology have val-ues which are obtained from a table lookup [19]–[22]. If thetopology is applicable to the device under study, such mod-els achieve high accuracy, and their calibration is efficientdue to the small number of model parameters. Due to theadoption of a fixed topology, table-based models suffer fromthe same lack of generality, and technology dependence, ofthe more traditional compact modeling techniques. The mod-


els presented in this paper are closer to the latter class than toblack-box models. However, since a different topology is au-tomatically generated for each device, the range of applica-tion is vastly extended. In this respect, purely from the pointof view of taxonomy, one could speak of adaptive-topologytable-lookup models.

Finally, as illustrated in Sec. 4, the mathematical formal-ism presented here extends beyond the modeling of tran-sistors, and offers a unified description of electrical, mag-netic, thermal, and nonequilibrium effects in integrated cir-cuits. New physical effects can be included by the addition ofnew integral equations and/or new simulation codes into themodel-generation flow. Since the resulting circuit is physi-cally based, secondary effects such as noise and temperaturedependence can be added in a consistent manner, rather thanempirically. The larger computational effort required by themodel-generation technique is largely outweighed by the re-duction in human labor, development time, and errors.

ACKNOWLEDGMENT

The authors wish to thank M. Mastrapasqua and M. A.Alam for their contributions to this work over the last severalyears.

REFERENCES

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