Assuming you know how to create a new project and add a new source. Draw a schematic as required in

the problem. Here is an example schematic.

Create a testbench

Now, follow the same steps as you did to create a test-bench in lab1 and you should come to this screen. Here, you

need to select the testbench file in the Sources window and change the Sources for to: Post-Fit Simulation.

Now, Run the Simulate post-fit model under the Xilinx ISE simulator in the Processes window

Now, use Add measure and select the two points between which you need to calculate the time

difference. In this case, the delay is 15.5ns. The maximum and minimum delay is same.