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Laboratorio deTecnologías de Información
VHDL Digital Design- 1
An Introduction to the Digital An Introduction to the Digital Design ProcessDesign Process
Arturo Díaz-PérezSección
de Computación
Depto. de Ingeniería
EléctricaCINVESTAV-IPN
Laboratorio deTecnologías de Información
VHDL Digital Design- 2
The Design ProcessThe Design Process
CPUMem I/O
Control
DatapathReg.File
ALU
shift
er
src1src2
dst
Laboratorio deTecnologías de Información
VHDL Digital Design- 3
The Design Process, cont.The Design Process, cont.
adde
ra 32
32b32 c
HAa0b0
FAa1b1
FAa31b31
s0
s1
s31cout
Laboratorio deTecnologías de Información
VHDL Digital Design- 4
The Design Process, cont.The Design Process, cont.
sum
cout
ab
cin
in1
in2out
Vcc
Laboratorio deTecnologías de Información
VHDL Digital Design- 5
Abstraction HierarchyAbstraction Hierarchy
A set of interrelated representation levels that allow a system to be represented in varying amounts of detail
Level 1
Level iLevel i+1
Level N
Top
Botton
Detailvaries Transformation
Laboratorio deTecnologías de Información
VHDL Digital Design- 6
Design EnvironmentDesign Environment
Behavioral Design
Datapath
Design
Logic Design
Physical Design
Manufacturing
Design Idea
Chip or Board
Flow Graph, Pseudo Code, ...
Bus & Register Structure.
Gate Wirelist, Netlist.
Transistor List, Layout,...
Laboratorio deTecnologías de Información
VHDL Digital Design- 7
DatapathDatapath RepresentationRepresentation
Procedurefor Controlof Movementof DataBetweenRegistersandBuses
MAINLOGICUNIT
REG2REG1
REG3
LOGIC
DATA CONTROL
Laboratorio deTecnologías de Información
VHDL Digital Design- 8
Design ProcedureDesign Procedure
♦
Design: a series of transformation from one representation of a system to another until a representation exists that can be fabricated.
♦
Synthesis: The process of transforming one representation in the design abstraction hierarchy to another representation.
♦
At each level■
Design entry
■
Simulation■
Synthesis
■
Test generation
♦
Design automation helps transforming one format to another
Laboratorio deTecnologías de Información
VHDL Digital Design- 9
Types of DescriptionsTypes of Descriptions
♦
Behavioral domain: A domain in which a component is described by defining its input/output response.
■
Algorithmic: a procedure or program to model the behavior of the device without implying any particular physical implementation.
■
Dataflow: a model in which the data dependencies in the description match those in a real implementation.
♦
Structural domain: A domain in which a component is described in terms of an interconnection of more primitive components.
Laboratorio deTecnologías de Información
VHDL Digital Design- 10
Pictorial vs. Textual RepresentationPictorial vs. Textual Representation
s
c0
a
b
c
CCT full_adder( a, b, c, s, c0 )XOR( RISE = 16, FALL = 12 )
g1( w1, a, b )g5( s, w1, c )
NAND( RISE4 = 12, FALL = 10 )g2( w2, c, b );g3( w3, c, a );g4( w4, b, a );g6( c0, w3, w4, w5 );
INPUT a, b, clWIRE w1, w2, w3, w4;OUTPUT s, c0;END CIRCUIT full_adder
w1
w2
w3
w4
g1
g2
g3
g4
g5
g6
Laboratorio deTecnologías de Información
VHDL Digital Design- 11
Textual RepresentationTextual Representation
♦
Hardware description language: A high level programming language with specialized constructs for modeling hardware.
Text is better for representation for representing complex behavior; pictures are better for illustrating interrelationships.
Laboratorio deTecnologías de Información
VHDL Digital Design- 12
CAD ToolsCAD Tools
CAD ToolsCAD Tools
EditorEditor Checker/AnalyzerChecker/Analyzer Optimizer/SynthesizerOptimizer/SynthesizerSimulatorSimulator
TextText GraphicsGraphics StochasticStochastic DeterministicDeterministic
NaturalLanguageNatural
LanguageComputerLanguage
ComputerLanguage
Laboratorio deTecnologías de Información
VHDL Digital Design- 13
EditorsEditors
♦
Textual: Spice, VHDL.
♦
Graphics: schematic capture.■
A library of primitive symbols including a simulation model to each primitive: native or standar
parts
families: TTL, CMOS, etc.
■
A system of graphic windows which can be used to create an interconnect of graphic tokens.
■
Commands for creating wirelists: to physically build the circuit or to test circuit response.
Laboratorio deTecnologías de Información
VHDL Digital Design- 14
Simulation ToolsSimulation Tools
Behavioral Design
Datapath
Design
Logic Design
Physical Design
Manufacturing
Chip or Board
Flow Graph, Pseudo Code, ...
Bus & Register Structure.
Gate Wirelist, Netlist.
Transistor List, Layout,...
Behavioral Simulator
Datapath
Simulator
Gate Level Simulator
Device Simulator
Final TestingProducto sample
Design IdeaSimulation Tools
Simulator: A program which models the response of a system to input stimuli
Laboratorio deTecnologías de Información
VHDL Digital Design- 15
Oblivious SimulationOblivious Simulation
1
2
3
4
5
6
7
a
b
z
GATE FUNCTION INPUT1 INPUT2 OUTPUT
1234567
InputInputNOTNOTANDANDOR
ab21145
----326
0011000
Laboratorio deTecnologías de Información
VHDL Digital Design- 16
Event Driven SimulationEvent Driven Simulation
♦
Event driven simulation requires a linked list data structure
♦
Evaluate circuit only when events occur♦
Offers a faster simulation for digital circuits
♦
VHDL is an event driven simulation
- Inp 0
1
- Inp 0
2
- Not 0
3
- Not 0
4
And 0
5
And 0
6Or 0
7
a
b
Laboratorio deTecnologías de Información
VHDL Digital Design- 17
Simulator OrganizationSimulator Organization
TimeQueueTimeQueue
SignalTracer
SignalTracer
TimeQueue
Processor
TimeQueue
ProcessorProcessorExecutor
ProcessorExecutor
InsertandDelete
events activate
scheduler
Laboratorio deTecnologías de Información
VHDL Digital Design- 18
Simulation SystemSimulation System
TextEditorText
Editor
AnalyzerAnalyzer
DesignLibrary(IMF)
DesignLibrary(IMF)
SchematicEditor
SchematicEditor
ModelBuilderModelBuilder SimulateSimulate
VHDL SourceAnalyzerErrorMessages
Run timeerror messages
Simulation ResultsOther tools
Laboratorio deTecnologías de Información
VHDL Digital Design- 19
Synthesis ToolsSynthesis Tools
♦
Synthesizer: A computer program that automatically performs a translation from one design representation to another or a program that assists a human in making hte
translation.
♦
Ideally a behavioral description is synthesized to a layout (silicon compiler).
♦
Most current tools transform data path to gate list.
Laboratorio deTecnologías de Información
VHDL Digital Design- 20
SynthesisSynthesis
Behavioral Design
Datapath
Design
Logic Design
Physical Design
Manufacturing
Design Idea
Chip or Board
Flow Graph, Pseudo Code, ...
Bus & Register Structure.
Gate Wirelist, Netlist.
Transistor List, Layout,...
2
1
4
35
6
Synthesis Tools
Laboratorio deTecnologías de Información
VHDL Digital Design- 21
Synthesis ToolsSynthesis Tools
♦
High level synthesizers:■
Algorithmic
■
Dataflow■
Behavioral
♦
Low level synthesizers:■
logic: structural gate level to circuit or layout.
■
algebraic: behavioral gate level to structural gate level or layout.
■
silicon compilers: gate level to layout level.
Laboratorio deTecnologías de Información
VHDL Digital Design- 22
SummarySummary
♦
Design process is a series of transformations from one representation to another until until
a lowlevel
representation is achieved:
■
behavioral, datapath, logic, physical and manufacturing.♦
Synthesis is the process of transforming one representation in the design abstraction hierarchy to another representation.
♦
Two basic ways of description: structural and behavioral.♦
Two basic ways for design entrying: graphical and textual.
♦
HDL: a high level programming language with specialized constructs for modeling hardware.
♦
CAD tools are used at any level of the design process:■
editors, simulators, analyzers/checkers, and synthesizers/optimizers.