8/14/2019 An Efficient VLSI Architecture for Lifting-Based
Discrete Wavelet Transform.doc
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An Efficient VLSI Architecture for Lifting-Based
Discrete Wavelet Transform
AIM:
The main aim of the project is to design and implement An
Efficient VLSI
Architecture for Lifting-Based Discrete Wavelet Transform!"
ABST#A$T:
High-speed and reduced-area 2-D discrete wavelet transform (2-D
DWT)
architecture is proposed. Previous DWT architectures are mostl
!ased on the
modified lifting scheme or the flipping structure. "n order to
achieve a critical path
with onl one multiplier# at least four pipelining stages are
re$uired for one lifting
step# or a large temporal !uffer is needed. "n this !rief#
modifications are made to
the lifting scheme# and the intermediate results are recom!ined
and stored to
reduce the num!er of pipelining stages. %s a result# the num!er
of registers can !e
reduced to &' without etending the critical path. "n
addition# the two-inputtwo-
output parallel scanning architecture is adopted in our design.
*or a 2-D DWT with
the si+e ofN N# the proposed architecture onl re$uires three
registers !etween
the row and column filters as the transposing !uffer# and a
higher efficienc can !e
achieved.
BL%$& DIA'#AM:
V.Mallikarjuna (Project manager) Mobile No: +91-8297578555.
ISO: 9001- 2008 CERTIFIEDCOMPANY Branch!: "#$ra%a$
&Na'()r
