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Alberto Annovi FTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK ... an evolution of the CDF Silicon Vertex Trigger (SVT) A. Annovi for the Fast-Track group Work during 1998-2003: INFN, University of Pisa, SNS - Pisa University of Chicago University of Geneva Co-operating on standard cell AMChip: INFN, University of Ferrara FAST-TRACK COLLABORATION Offline-quality tracks @LHC Level 1 output rate

Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

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Alberto AnnoviFTK meeting - September 30, 2004  30 minimum bias events + H->ZZ->4  Tracks with P t >2 GeV Where is the Higgs?   FTK     30 minimum bias events + H->ZZ->4   Tracks with P t >2 GeV Where is the Higgs? Help! Online tracking: a tough problem

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Page 1: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger

(SVT)

A. Annovi for the Fast-Track group

Work during 1998-2003: INFN, University of Pisa, SNS - PisaUniversity of ChicagoUniversity of Geneva

Co-operating on standard cell AMChip:INFN, University of Ferrara

FAST-TRACK COLLABORATION

Offline-quality tracks @LHC Level 1 output rate

Page 2: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Fast-Track working principles

FTK performances overview• speed & size• track quality

FTK can grow with the experiment• Proposed plan

Possible applications and physics reach:• b-tagging • e/ selection

More details on Trans. on Nucl. Sci. papers:http://www.pi.infn.it/~orso/ftk

Outline

Page 3: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

30 minimum bias events + H->ZZ->4

Tracks with Pt>2 GeV

Where is the Higgs?

FTK

30 minimum bias events + H->ZZ->4

Tracks with Pt>2 GeV

Where is the Higgs?Help!

Online tracking: a tough problem

Page 4: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Where could we insert FTK?

Fast Track + few(Road Finder) CPUs

Track dataROB

high-qualitytracks:Pt>1 GeV

Ev/sec = 50~100 kHz

Very low impact on DAQ

PIPELINE

LVL1

Fast network connectionCPU FARM (LVL2 Algorithms)

CALO MUON TRACKER

BufferMemory

ROD

BufferMemory

FEFE

Raw dataROBs

2nd output 1st output

No changeto LVL2

Page 5: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Tracking in 2 steps

Roads1. Find low

resolution track candidates called “roads”. Solve most of the combinatorial problem.

2. Then track fitting inside roads.Thanks to 1st step it is much easier.

Page 6: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

...

The Pattern Bank

1st step: pattern recognition with the Associative Memory (AM)

• Dedicated device with maximum parallelism

• Store all patterns corresponding to interesting tracks

• Road search happens during detector readout

• How to send all hits to the AM?

SVT’s AMChip

Page 7: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Pixels barrel SCT barrel Pixels disks

1/2

AM

1/2

AM

Divide into sectors

6 buses 40MHz/bus

ATLAS Pixels + SCT

Feeding FTK @ 50KHz event rate

6 Logical Layers: full coverage

Allow a small overlapfor full efficiency

Simple configuration for the beginning

Page 8: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

AM input bandwidth = 40 MHz cluster/busAM input buses = 6

Logical layer <cluster/event> cluster rate

Pix 0 1300 64 MHzPix 2 + extra 1200 61 MHzSC0 + extra 1000 50 MHzSC1 + extra 1300 65 MHzSC2 + extra 1200 61 MHzSC3 + extra 1300 64 MHz

Ev/sec 50kHz

2 FTK processorsworking in parallel for the whole Pix+Si tracker

More processors as a backup option

ATLA

S-TD

R-11

Page 9: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Track dataROB

Raw dataROBs

~Offline quality Track parameters

~75 9U VME boards – 4 types

SUPER BINSDATA ORGANIZER ROADS

ROADS + HITS

EVENT # NPIPELINED AM

HITSDO-board

EVENT # 1AM-board

2nd step: track fitting

Inside Fast-TrackPixels & SCT

DataFormatter

(DF)

50~100 KHzevent rate

RODs

cluster findingsplit by logical layer

overlap regions

GB

Few CPUs

S-links

CORE

Page 10: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

proposed R&D program

2nd output 1st output

• Soon: in order to have the FTK in the future the only short term issue is the availabilityof the dual output HOLA. (also usefulfor diagnostic and commissioning)Alternative: use optical splitters

• 2008: @ very low luminosity minimal R&D FTK system

very cheap using low density CDF AMChip

(barrel only: ~40 boards)• 2009 ?: increase the R&D system to include disks

new AMChip for 2*1033 lumi (barrel+disks: ~75 boards)• 2011 ?: upgrade for high lum.

Page 11: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

How FTK core will look like?

AM-B

7AM

-B8

AM-B

1AM

-B0

DO5

DO4

DO3

DO2

DO1

DO0

CUSTOM BACKPLANE

Ghos

t Bu

ster

FTK INPUT

CPU

0 C

PU1

O(50 106) patterns

AM-B

2AM

-B3

CPU

2 C

PU3 AM

-B4

AM-B

5AM

-B6 • ~offline

quality tracking 50 kHz event (2*1033 lumi)

• 2 core crates

• + 3DF crates

128 AMChips/board

Page 12: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

ATLAS Barrel (~CERN/LHCC97-16) 7 layers: 3 Pixel + 4 strip (no stereo)Cylindrical Luminosity Region: R=1mm, z=±15cmGenerate tracks (Pt>1 GeV) & store NEW patterns

1/4BARREL15M

patterns Thin Road Width (r z): pixel 1mm6.5cm Si 3mm12.5cmMedium Road Width: pixel 2mm6.5cm Si 5mm12.5cmLarge Road Width: pixel 5mm6.4cm Si 10mm12.5cm

The Associative Memory can store any kind of tracks: Conversions, delta-rays, ks decays …Including them just requires a lager Associative Memory

These kind of tracks have not been studied.BUT we can do the exercise again.

Page 13: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Fit/trk <Nfit/Road>x<Nroads/track>

13 comb x 34 roads= 440 comb/track QCD Pt>401.4 fit x 4 roads = 6 comb/track QCD Pt102.3 fit x 6 roads = 14 comb/track QCD Pt407.8 fit x 9.5 roads = 74 comb/track QCD Pt10027 fit x 25 roads = 658 comb/track QCD Pt200

thinthin

large

large

Track fitting workload<N

fit/ro

ad>

Low luminosity: 2*1033

Page 14: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Step 2: Software Linear FitNfit/trk

65874146

Ntrk/ev1716108

L1 Trigjetjet

soft jetsoft

L1 Rate<100Hz<3KHz~5KHz

~40KHz

Pt 200Pt 100Pt 40Pt 10

Fits/sec<1.1MHz<3MHz750KHz3MHz8MHz

Pulsar TFfit/s 10 MHz

PIII 800MHzfit/s 1.1 MHz

Htt 130 comb/trk 34 trk/ev <latency> = 1ms max latency = 100ms

only 8 CPUs (barrel)

Latency Test

Pulsar TF + new mez.fit/s >30 MHz

Page 15: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Is 2nd step as good as offline?

/N

ATLAS Genova: M. Cervetto, P. Morettini, F. Parodi, C. Schiavi, presented on 20-Nov-2002 at PESA

• Track finding within a road is fast

• Fitting in linear approximation

• Testing the linear fit with a fast simulation of ATLAS Silicon TrackerTrack parameter residuals:(d0) = 17 m

Page 16: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

FTK R&D status

3 DF crates:cluster findingsplit by layer

2 “core” crates:road findingtrack fitting

S-linksRaw data

ROBsTrack data

ROB

AMChipAMBoard

Data OrganizerGhost BusterTrack Fitter

Data Formatter boardPixel cluster finder

TODO:

Pixels& SCTRODs

Page 17: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

TODO list• DF board have some ideas

• Pixel cluster finder need R&D work

• AMChip new design for 2*1033 lumi

• AMBoard modify prototype

• Data Organizer modify prototype / new R&D

• Ghost Buster Pulsar ??

• Track Fitter CPU or FPGA ???

• FTK simulation needed for design studies

Page 18: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

FTK R&D status FTK AMBoardModifing it for CDF SVT upgradeWill learn from CDF experiencethen modify it for ATLAS

FTK Data Organizer1st prototype never fully testedNeed a lot of RAM on boardBuffers up to 16 events more complex than SVT HB

Page 19: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

How to use Fast-Track to capture as much PHYSICS as

possible b

e

b

b

FT

K

e hb

b

Hard life for all LVL2 objects!

Page 20: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

ATL-DAQ-2000-033

Offline-quality b-tagging for

events rich in b-quarks

with Fast-Track offline b-tag performances early in LVL2

ATLA

S TD

R-01

6

0.6

100

10

1000

b

Ru Calibration sample

bbH/A bbbb tt qqqq-bb ttH qqqq-

bbbb H/A tt qqqq-bb

H hh bbbbH+- tb qqbb

Z0 bb

Page 21: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

ATLA

S +

FTK

4SE200 + J70 + J50 + J15 (||<2.5)

““

““

2.6MU6 + J25 + J10 (||<2.5)

50mini ev.

2 b-jets +Mbb > 50

160mini ev.

2 b-tags +Mbb > 50

13b leading

43 b-tags

ATL-

COM

-DAQ

-200

2-02

2 F.

Gia

notti

, LH C

C , 0

1/0 7

/ 20 0

2 &

CM

S T D

R 6

Triggers w/o and with FTKScenario: L= 2 x 1033 deferral

ATLA

S

CMS 5b-jet 237Inclusive b-jet

0.20.20.2

J2003J904J65

4020210

0.80.2

MU202MU6

HLT rate (Hz)

HLT selection

LVL1 rate (kHz)

LVL1selection

25

j4003j1654j110

Page 22: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

bbH/A bbbbAT

LAS-

TDR-

15 (1

999)

MA (GeV)

tan

200

Analysis:4 b-jets |j|<2.5 PT

j > 70, 50, 30, 30 GeV efficiency 10%Effect of trigger thresholds(before deferrals)

ATLAS + FTK triggers

13%3b leading3J + SE2008%3 b-tagsMU6+ 2J

Effic.LVL2LVL1 As efficient as offline selection:full Higgs sensitivity

ATL-

COM

-DA Q

-200

2-02

2

Page 23: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Electron Identification

Swapping trigger algorithms can reduce trigger rate while increasing efficiency!

CERN

/LHC

C/20

00-1

7

L2 tracking

EF tracking

ATLAS

With FTK tracks are ready on the shelf: using tracks could be even faster than using calorimeter raw data!

Efficiency & jet rejection could be enhanced by using tracks before

calorimeters.

Page 24: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

L=2x1033 cm-2 sec-1

HLT selection @ CMS H(200,500 GeV) 1,3h± + X

0.4

0.5

0.6

0.7

0.8

0.9

1.

0 0.02 0.06 0.1 0.14 (QCD 50-170 GeV) (

H(20

0,50

0 Ge

V)

1,3

h+X)

mH=500mH=200

TRK tau on first calo jetsPix tau on first calo jet

Staged-Pix tau on first calo jet

TRK tau on both calo jetsCalo tau on first jet

0.0070.004

Efficiency & jet rejection could be enhanced by using tracks before

calorimeters.

Page 25: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

FTK can find offline quality tracks @LVL1 output rate!

FTK is very compact: 2 “core” crates + 3 DF’s crates (for a first barrel only R&D system)

More efficient LVL2 triggers: Lower LVL1 & LVL2 thresholds and save CPU power!

b-jet, -jet tagging at rates 10-20 KHz: more Higgs physics !

Conclusion

Page 26: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Mbb(GeV)

Even

ts

Z0 b-bbarImportant b-jet calibration tool

CDF RunIIpseudo exp. (with SVT)

Cdf/anal/top/cdfr/4158

ATL-

COM

-DAQ

-200

2-02

2

ATLAS + FTK 20fb-1

20Mbb > 503J + SE200

60Mbb > 50MU6+ 2JS/BLVL2LVL1

(S/B = 35)

2fb-1

Mbb(GeV)

Even

ts

Page 27: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Standalone program to produce hits from tracks; it includes:• multiple scattering• ionization energy losses• detector inefficiencies• resolution smearing• primary vertex smearing: xy=1mm z=6cm

Detector hits generated from: (Pythia) • QCD10 sample: QCD Pt>10 GeV L1 • QCD40 sample: QCD Pt>40 GeV L1 soft jet• QCD100 sample: QCD Pt>100 GeV L1 jet • QCD200 sample: QCD Pt>200 GeV L1 jet

all samples + noise + <5 MB>. Road finding 6 layers/7 (FTK simulation)

Page 28: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Data Organizer

Hits

Tracks parameters(d, pT, , z)

Roads

AssociativeMemory

Hits

Pattern recognition with Associative Memory (AM) using up to 12 layers no need for initial seed

highly parallel algorithm using coarser resolution to reduce memory size

Roads + hitsTrack Fitter

Track fittingusing full resolution of the detector

Use CPUs for maximum flexibility

FTK Basic Architecture

Page 29: Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A

Alberto Annovi

FTK meeting - September 30, 2004

Step 1: Pattern Recognition

Hardware + CPU:•4 AM (40M patterns)•8 CPUs•Ev/sec 50KHz

AM Simulation:•107 CPUs•Ev/sec 50 KHz

Software future:better algorithms(region of interest)

Barrel