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Z. Feng MTU EE5900 1.1 Advanced Computational Methods for VLSI Systems Lecture 1 Introduction Zhuo Feng

Advanced Computational Methods for VLSI Systems

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Page 1: Advanced Computational Methods for VLSI Systems

Z. Feng MTU EE59001.1

Advanced Computational Methods for VLSI Systems

Lecture 1 IntroductionZhuo Feng

Page 2: Advanced Computational Methods for VLSI Systems

Z. Feng MTU EE59001.2

■ Prof. Zhuo Feng► Office: EERC 513► Phone: 487-3116 ► Email: [email protected]

■ Class Website ► http://www.ece.mtu.edu/~zhuofeng/EE5900Spring2013.html► Check the class website for lecture materials, and

announcements

■ Schedule► TR 9:35am-10:50am EERC 218

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Z. Feng MTU EE59001.3

Textbook► Pillage, Rohrer and Visweswariah, Electronic circuit and

system simulation methods, McGraw-Hill, 1995.

References► [1] Various IEEE journal and conference papers: IEEE

Trans. on CAD, IEEE/ACM Design Automation Conference, IEEE/ACM Intl. Conf. on CAD, IEEE Trans. on Circuits and Systems.

► [2] Farid Najm, Circuit simulation, Wiley-IEEE Press, 2010.► [3] Kundert, White and Sangiovanni-Vincentelli, “Steady-

state methods for simulating analog and microwave circuits,” Kluwer, 1990.

► [4] Celik, Pileggi and Odabasioglu, “IC interconnect analysis”, Kluwer 2002.

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Topics (tentative)

■ Brief review of linear algebra and numerical methods

■ Basic circuit analysis methods ■ RF circuit simulation methods■ Statistical timing analysis methods■ Fast algorithms for IC modeling and simulations■ Parallel CAD algorithms

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■ Project► This is a project/research oriented course. ► Research explorations are strongly encouraged.► Students are expected to read research papers assigned

before lectures and actively participate in class discussions.

■ Grading► Course project 1: 40% (a SPICE simulator)► Course project 2: 60% (flexible research projects)

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■ A plethora of VLSI CAD problems

Devices, interconnects, circuits, systems, signal, power, analog, digital …..

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■ Where are we in the design flow?Specifications

System-level Design

RTL-level Design

Gate-level Design

Transistor/Circuit Level

Final Verification

Layout

Top-down Design

Bottom-up Verification

Electrical & Thermal Properties,Delays, Waveforms,Parasitics Effects, Coupling Noise …

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■ Why circuit analysis?

►Performance verification

▼A critical step for evaluating expected performanceprior to manufacturing

▼Simulation is always cheaper and more efficient than actually making the chip

▼True more than ever for today’s high manufacturing costs

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■ Why circuit simulation (cont’d) ?

► Design optimization/synthesis

▼Need to evaluate circuit performances many times in an optimization loop before meeting all the specs

▼Can only be practically achieved via simulation (models)

Circuit Optimizer

SimulationEngine

Update design parameters

PerformanceEvaluation

Meet all specs?

YesNo

Convergence

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■ Why models?► Models are integral parts of system simulation and/or optimization

Abstract Executable Models

Abstract Executable Models

Cycle AccurateModels

Cycle AccurateModels

VHDL/Verilog Models

VHDL/Verilog Models

InterconnectGate ModelsInterconnectGate Models

Device ModelsDevice Models

Cost

Speed

High

Low

Low

High

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■ Assessment of simulators

Accuracy

RuntimeMemory

Accuracy

RuntimeMemory

Accuracy

RuntimeMemory

Robustness/Applicability

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■ Selected Topics

►Classical circuit simulation methods (SPICE)▼LU factorization, Newton’s method

▼(Modified) nodal formulation (MNA)

▼Nonlinear DC analysis

▼AC analysis

▼Linear/nonlinear transient analyses

▼SPICE device models

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■ Many problems are modeled by some form of coupled (nonlinear) first-order differential equations

■ For circuit problems this is usually done using MNA formulation

3v

f(v)i 1v2v 4vC

R

v

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N dimensional vector of unknownnode voltages

vector of independent sources

nonlinear operator

0)()()(12

4131 vvfR

vvdt

vvdC

0))(),(),(( tutxtxF Xx

)0(

)(tx

)(tu

F

■ Write KCL (Kirchoff’s Current Law) at node 1:

■ If we do this for all N nodes:

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How can we solve this set of nonlinear differential equations?

0))(),(),(( tutxtxF Xx

)0(

■ Closed-form formula/hand analysis easily becomes infeasible

■ Need to develop computer programs (circuit simulators) to solve for the solution numerically

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Simple example: nonlinear LC ckt with sinusoidal input current

2nd order nonlinear diff. equation:

tAvLC

vdt

vd012

2

cos)(

1;122

L

vvC

v

tAvvv 0132 cos

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■ Selected Topics►Statistical timing analysis & optimization

Process Characterization

InterconnectGate Models

Delay Calculators

SSTAStatistical Opt.

Variability

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Z. Feng MTU EE59001.18

■ Selected topics►Parallel CAD

Courtesy Intel Courtesy AMD Courtesy TI

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GPU Computing for CAD■ Dedicated for graphics rendering

CPU(host)

GPU is connected to MCHvia 16x PCI-Express

Video Out

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■ Reading assignments► Textbook. Chapters 1 and 2

■ History of SPICE► CANCER at UCB: Computer Analysis of Nonlinear Circuits

Excluding Radiation

► Government project SCEPTRE: System for Circuit Evaluation and Prediction of Transient Radiation Effects

► CANCER evolved to SPICE: Simulation Program with Integrated Circuit Emphasis

► SPICE became the industry standard

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■ SPICE overview►N equations in terms of N unknown Node voltages►More generally using modified nodal analysis

G(v)i 1v2v

3v

4vC

R

v

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Time Domain Equations at node 1:

If we do this for all N nodes:

N dimensional vector of unknownnode voltages

vector of independent sources

nonlinear operator

0)()()(12

4131 vvGR

vvdt

vvdC

0))(),(),(( tutxtxF Xx

)0(

)(tx

)(tu

F

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■ Closed form solution is not possible for arbitrary order of differential equations

■ We must approximate the solution of:

■ This is facilitated in SPICE via numerical solutions

0))(),(),(( tutxtxF Xx

)0(

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■ Basic circuit analyses►(Nonlinear) DC analysis

▼Finds the DC operating point of the circuit▼Solves a set of nonlinear algebraic eqns

►AC analysis▼Performs frequency-domain small-signal analysis▼Require a preceding DC analysis▼Solves a set of complex linear eqns

►(Nonlinear) transient analysis▼Computes the time-domain circuit transient response▼Solves a set of nonlinear different eqns▼Converts to a set nonlinear algebraic of eqns using

numerical integration

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■ SPICE offers practical techniques to solve circuit problems in time & freq. domains

► Interface to device models▼Transistors, diodes, nonlinear caps etc

► Sparse linear solver

► Nonlinear solver – Newton-Raphson method

► Numerical integration

► Convergence & time-step control

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■ Circuit equations are usually formulated using

►Nodal analysis ▼N equations in N nodal voltages

►Modified analysis▼Circuit unknowns are nodal voltages & some branch

currents▼Branch current variables are added to handle

– Voltages sources– Inductors– Current controlled voltage source etc

■ Formulations can be done in both time and frequency

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How do we set up a matrix problem given a list oflinear(ized) circuit elements?

Similar to reading a netlist for a linear circuit:

* Element Name From To Value

3

2

1

1

RRRI

2110

0201

1005101mA

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The nodal analysis matrix equations areeasily constructed via KCL at each node:

1I 1R

2R

3RmA1

5

10010

1 2

0

JvY

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■ Naïve approach► a) Write down the KCL eqn for each node► b) Combine all of them to a get N eqns in N node voltages

■ Intuitive for hand analysis

■ Computer programs use a more convenient “element” centric approach► Element stamps

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Instead of converting the netlist into a graph and writing KCL eqns, stamp in elements one at a time:

Stamps: add to existing matrix entries

RR

RR11

11 Fromrow

Torow

Fromcol.

Tocol.

j

i

i j

i

jRY

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RHS of equations are stamped in a similar way:

II

i

jI

From row

Torow

ij

J

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Stamping our simple example one element at a time:

10002521

1001110

3

2

1

1

RRR

mAI

01

2

1

322

221 IVV

GGGGGG

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We know that nonlinear elements are firstconverted to linear components, then stamped

EQI EQG

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For 3 & 4 terminal elements we know that the linearized models have linear controlled sources

Gdsv

D DG

S S

gsv

gsmvg dsr

We can stamp in MOSFETs in terms of a completestamp, or in terms of simpler element stamps

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Voltage controlled current source

kv 0I

k

kmvgi

p

q

Voltmeter

mm

mm

gggg

k

p

qrow

row

colcol

Large value that does not fall on diagonal of Y!

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All other types of controlled sources includevoltage sources

Voltage sources are inherently incompatiblewith nodal analysis

Grounded voltages sources are easily accommodated

1

0

v2

21

2

1

vv

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But a voltage source in between nodes is more difficult

Node voltages and are not independentk

k

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We no longer have N independent node voltagevariables

So we can potentially eliminate one equation and one variable

But the more popular solution is modified nodalanalysis (MNA)

i

Vk

Create one extra variable and one extra equation

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Extra variable: voltage source current

Allows us to write KCL at nodes and

Extra equation

Advantage: now have an easy way of printingcurrent results - - ammeter

Vvvk

k

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Voltage source stamp:

Vi0111

1

row

row

row

col colcol

k

k

1N

1N

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Current-controlled current source (e.g. BJT) has to stamp in an ammeter and a controlled current source

12 ii 1i

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In general, we would not blindly build the matrixfrom an input netlist and then attempt to solve it

Various illegal ckts are possible:

Cutsets of current sources

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Loops of voltage sources

Dangling nodes

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■ Once we efficiently formulate MNA equations, an efficient solution to is even more important

■ For large ckts the matrix is really sparse► Number of entries in Y is a function of number of elements

connected to the corresponding node

■ Inverting a sparse matrix is never a good idea since the inverse is not sparse!

■ Instead direct solution methods employ Gaussian Elimination or LU factorization

JvY

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■ Reading assignment: ► Textbook, sections 3.1-3.4, 7.1-7.5

■ We need to solve a linear matrix problem for the simple DC circuit

■ Linear system solutions are also basic routines for many other analyses► Transient analysis, nonlinear iterations etc

■ Sounds quite easy but can become nontrivial for large analysis problems► O(n3) – general dense matrices► O(n1.1~ n1.5) -- sparse circuit problems► O(n1.5) – 2D mesh O(n2) – 3D mesh