ABSTRACT

Title of Document: LOW POWER SMARTDUST RECEIVER WITH

NOVEL APPLICATIONS AND IMPROVEMENTS OF AN RF POWER HARVESTING CIRCUIT.

THOMAS STEVEN SALTER JR., DOCTORATE

OF PHILOSOPHY, 2009 Directed By: Professor Neil Goldsman, Department of

Electrical and Computer Engineering, University of Maryland

Smartdust is the evolution of wireless sensor networks to cubic centimeter

dimensions or less. Smartdust systems have advantages in cost, flexibility, and rapid

deployment that make them ideal for many military, medical, and industrial

applications. This work addresses the limitations of prior works of research to

provide sufficient lifetime and performance for Smartdust sensor networks through

the design, fabrication and testing of a novel low power receiver for use in a

Smartdust transceiver. Through the novel optimization of a multi-stage LNA design

and novel application of a power matched Villard voltage doubler circuit, a 1.0 V, 1.6

mW low power On-Off Key (OOK) receiver operating at 2.2 GHz is fabricated using

0.13 um CMOS technology. To facilitate data transfer in adverse RF propagation

environments (1/r3 loss), the chip receives a 1 Mbps data signal with a sensitivity of -

90 dBm while consuming just 1.6 nJ/bit. The receiver operates without the addition

of any external passives facilitating its application in Smartdust scale (cm3) wireless

sensor networks. This represents an order of magnitude decrease in power

consumption over receiver designs of comparable sensitivity.

In an effort to further extend the lifetime of the Smartdust transceiver, RF power

harvesting is explored as a power source. The small scale of Smartdust sensor

networks poses unique challenges in the design of RF power scavenging systems. To

meet these challenges, novel design improvements to an RF power scavenging circuit

integrated directly onto CMOS are presented. These improvements include a

reduction in the threshold voltage of diode connected MOSFET and sources of circuit

parasitics that are unique to integrated circuits. Utilizing these improvements, the

voltage necessary to drive Smartdust circuitry (1 V) with a greater than 20% RF to

DC conversion efficiency was generated from RF energy levels measured in the

environment (66 uW). This represents better than double the RF to DC conversion

efficiency of the conventional power matched RF energy harvesting circuit. The

circuit is integrated directly onto a 130 nm CMOS process with no external passives

and measures only 300 um by 600 um, meeting the strict form factor requirement of

Smartdust systems.

BREAK. [delete in final draft]

LOW POWER SMARTDUST RECEIVER WITH NOVEL APPLICATIONS AND IMPROVEMENTS OF AN RF POWER HARVESTING CIRCUIT.

By

Thomas Steven Salter Jr.

Dissertation submitted to the Faculty of the Graduate School of the University of Maryland, College Park, in partial fulfillment

of the requirements for the degree of Doctorate of Philosophy

2009 Advisory Committee: Professor Neil Goldsman, Chair Professor Martin Peckerar Professor Shuvra Bhattacharyya Professor Reza Ghodssi Professor Aris Christou, Dean’s Representative

© Copyright by Thomas Steven Salter Jr.

2009

ii

Dedication

This thesis would be incomplete without a mention of the support given to me by my wife, Toni, to whom this thesis is dedicated. More than once, obstacles appearing too great to overcome challenged my resolve. Without her unwavering love and support,

I doubt this thesis would ever have been completed.

iii

Acknowledgements

Thanks to Professor Neil Goldsman for the contribution of his experience and patient support that aided the writing of this thesis. In addition, sincere appreciation is

expressed to Dr. George Metze for recommending this research topic and for his support of this project. Lastly, this thesis would not have been written without the

support and encouragement of Dr. Norman Moulton.

Special thanks to the Laboratory for Physical Sciences for sponsoring the project.

iv

Table of Contents Dedication ..................................................................................................................... ii

Acknowledgements ...................................................................................................... iii

Table of Contents ......................................................................................................... iv

List of Tables ............................................................................................................... vi

List of Figures ............................................................................................................ viii

List of Equations ........................................................................................................ xiv

Chapter 1: Literature Survey ......................................................................................... 1

Introduction ............................................................................................................... 1

Brief History of Wireless Sensor Networks.............................................................. 7

Motivation for Research ........................................................................................... 9

Defining Characteristics of a Sensor Network........................................................ 12

Challenges in Physical Layer Implementation ....................................................... 14

Current Research in Wireless Sensor Network Transceiver Design ...................... 16

Coherent Modulation .......................................................................................... 16

Non-Coherent Modulation .................................................................................. 19

M-ary vs Binary Modulation .............................................................................. 26

Weak Inversion ................................................................................................... 27

Optics .................................................................................................................. 29

Passive Tags/RFID.............................................................................................. 30

Current Research in Energy Harvesting ................................................................. 30

Alternative Sources for Energy Harvesting ........................................................ 31

RF Energy Harvesting......................................................................................... 35

Voltage Doubler .................................................................................................. 36

Resonant Voltage Boosting................................................................................. 39

Energy Harvesting with Multiple Antennas ....................................................... 40

Substrate Losses .................................................................................................. 43

Alternative Designs ............................................................................................. 43

Pseudo-Schottky Diode ....................................................................................... 45

Voltage Doubler Stacking ................................................................................... 46

Conclusions ............................................................................................................. 47

Chapter 2: Survey of Ambient RF Energy Sources .................................................... 49

Introduction ............................................................................................................. 49

Survey Methodology ............................................................................................... 50

Spatial Survey Measurements ................................................................................. 58

Suburban ............................................................................................................. 58

Urban................................................................................................................... 65

Time Domain Survey Measurements ...................................................................... 70

Conclusions ............................................................................................................. 75

Chapter 3: Modeling the Power Matched Villard Voltage Doubler ........................... 79

Introduction ............................................................................................................. 79

Design Methodology ............................................................................................... 81

Modeling the Rectification Structure .................................................................. 82

v

The DC Loop Equations ..................................................................................... 90

The AC Nodal Equations .................................................................................... 98

Model Validation .................................................................................................. 103

Effects of Parasitics on Energy Scavenging Performance .................................... 108

Effect of Number of Voltage Doubler Stages on RF Energy Scavenging Performance .......................................................................................................... 111

Optimization example ........................................................................................... 114

Conclusions ........................................................................................................... 117

Chapter 4: Improved RF Energy Harvesting Circuit ................................................ 119

Introduction ........................................................................................................... 119

Design Methodology ............................................................................................. 120

Design Improvements to RF Power Harvesting Circuit ....................................... 122

PMOS with Floating Body to Reduce Body Affect.......................................... 122

Parasitic Resistant Matching Network. ............................................................. 127

Sacrificial Biasing ............................................................................................. 133

Design and Simulation .......................................................................................... 138

Measurements ....................................................................................................... 141

Conclusions ........................................................................................................... 147

Chapter 5: Improved Low Power Receiver Architecture ......................................... 149

Introduction ........................................................................................................... 149

Design Methodology and System Architecture .................................................... 150

Power Matched Voltage Doubler for Demodulation ........................................ 152

Optimization of a Multi-Stage LNA ................................................................. 165

Baseband ........................................................................................................... 180

Measurements ....................................................................................................... 183

Conclusions ........................................................................................................... 184

Chapter 6: Conclusions ............................................................................................. 187

Appendix A – Derivation of Select Results .............................................................. 193

Appendix B – Source Code....................................................................................... 215

Bibliography ............................................................................................................. 239

This Table of Contents is automatically generated by MS Word, linked to the Heading formats used within the Chapter text.

vi

List of Tables TABLE I Statistical measurements of the Received Signal Strength of Cellular and UHF Signals Over Time. ............................................................................................ 70

TABLE II Model Parameters ............................................................................... 81

TABLE III Output Voltage and Efficiency of Proposed RF Power Harvesting Circuits. 140 TABLE IV Comparison of Measured and Simulated Results of RF Power Harvesting Circuit Testing. ....................................................................................... 142

TABLE V Performance Metrics of Low Power Receiver and Subcomponents 184

vii

viii

List of Figures

Fig. 1 Smartdust sensor node. ................................................................................. 2

Fig. 2 Typical transceiver design [21]. .................................................................. 17

Fig. 3 Energy consumption vs transient start up time for a 100 bit packet transmitted at 1 Mbps [23] .......................................................................................... 18

Fig. 4 Plot of Bit Error Rate (BER) for OOK and FSK modulation vs the ratio of signal energy per bit to noise energy per bit (Eb/N0). .................................................. 22

Fig. 5 BER versus the ratio of the desired signal to interfering signal (in dB) for the indicated desired signal SNRs of 10 dB, 15 dB and 20 dB. [29] .......................... 24

Fig. 6 Maximum frequency (f) versus inversion coefficient (IC) for the indicated current gains (G) in the AMI .5 um process [32]. ..................................................... 28

Fig. 7 Single stage of a voltage doubler circuit. .................................................... 37

Fig. 8 Resonant tank boosting circuit. ................................................................... 39

Fig. 9 RF Energy harvesting utilizing multiple antennas in the same space. ........ 41

Fig. 10 Power generated from board 1 (single antenna), board 2 (two antennas), and board 3 (four antenns) at various distances form an RF energy source. ..................... 42

Fig. 11 Full wave rectifier circuit. ........................................................................... 44

Fig. 12 Pseudo Schottky RF power harvesting circuit design................................. 45

Fig. 13 Stacked stages of voltage doubler circuits. ................................................. 46

Fig. 14 Photo of RF energy survey system (a) and illustration of a car mounted survey system (b). ....................................................................................................... 53

Fig. 15 Algorithm utilized in monitoring temporal fluctuations in received RF energy (a) and spatial fluctuations in received RF energy (b). ................................... 55

Fig. 16 Antenna gain of RE1903U anetnna versus frequency. ............................... 57

Fig. 17 Overhead views of RF signal strength for commercial area. ...................... 59

Fig. 18 Overhead views of RF signal strength for campus area. ............................ 59

Fig. 19 Peak RF signal strength received by survey system for each suburban landscape type. ............................................................................................................ 60

Fig. 20 Distribution of peak RF signal strength received by survey system for each suburban landscape type. ............................................................................................ 61

Fig. 21 Increase in avaible energy from broadband collection over narrowband collection. .................................................................................................................... 62

Fig. 22 Comparison of the distribution of received RF signal strength for narrowband collection and broadband collection in a commercial setting ................. 63

Fig. 23 Increase in received RF signal strength for UHF narrowband collection over cellular narrowband collection in a various suburban areas. ...................................... 64

Fig. 24 Overhead view of RF energy measurements in Baltimore, MD. ................ 66

Fig. 25 Overhead view of RF energy measurements in Washington, DC. ............. 67

Fig. 26 Comparison of the distribution of peak received RF signal strength in an urban and suburban setting. ........................................................................................ 68

Fig. 27 Comparison of the distribution of peak received RF signal strength in the UHF and cellular bands of an urban setting................................................................ 69

ix

Fig. 28 Measurement of peak signal strength received over time in the cellular band at location 1. ................................................................................................................ 71

Fig. 29 Measurement of peak signal strength received over time in the cellular band at location 1 as a function of time of day. ................................................................... 72

Fig. 30 Measurement of peak signal strength received over time in the cellular band at location 2. ................................................................................................................ 73

Fig. 31 Measurement of peak signal strength received over time in the UHF TV band at location 1. ....................................................................................................... 74

Fig. 32 Illustration of a cascaded multi-stage Villard voltage doubler. .................. 79

Fig. 33 Illustration of diode connected MOSFET ................................................... 82

Fig. 34 Illustration of substrate connections for diode connected MOSFET and the associated sources of parasitic. ................................................................................... 83

Fig. 35 Large signal model of diode connected MOSFET that is forward biased (a), reverse biased (b) and general case (c) . ..................................................................... 84

Fig. 36 Illustration of the operating voltage levels and current through the DC loop of a single stage of the Villard voltage doubler. ......................................................... 90

Fig. 37 The voltage drop, Vds,M1(t) (a), current, Ids,M1(t) (b), and power dissipated, Pds,M1(t) (c) across diode connected MOSFET, M1. .................................................... 92

Fig. 38 The voltage drop, Vds,M2(t) (a), current, Ids,M2(t) (b), and power dissipated, Pds,M2(t) (c) across diode connected MOSFET, M2. .................................................... 93

Fig. 39 The voltage drop across M1 and M2 (Vds,M1(t) and Vds,M2(t)) and Vds,approx(t) which is a valid approximation for both Vds,M1(t) and Vds,M2(t). ................................. 95

Fig. 40 Model of the multi-stage Villard voltage doubler as a DC power source. . 96

Fig. 41 Illustration of the Villard Voltage doubler with incident voltage and resulting AC current. ................................................................................................... 98

Fig. 42 The input voltage to the Villard voltage doubler, Vinc(t) (a), sum of current, Ids,M1(t) and Ids,M2(t) (b), and power input to the Villard voltage doubler, Pinc(t) (c). 100

Fig. 43 The AC impedance model of a Villard voltage doubler consisting of ns stages including the parasitics of CMOS integration. ............................................... 101

Fig. 44 Input power vs output voltage as determined by the analytical model presented and a harmonic balance simulation using the BSIM 4.0 model for a single stage power matched Villard voltage doubler (a) and eight stage power matched Villard voltage doubler (b). ....................................................................................... 104

Fig. 45 Magnitude of the input impedance vs input power as determined by the presented analytical model and a harmonic balance simulation using the BSIM 4.0 model for a single stage power matched Villard voltage doubler (a) and eight stage power matched Villard voltage doubler (b). ............................................................. 104

Fig. 46 Real component of the input impedance vs input power as determined by the presented analytical model and a harmonic balance simulation using the BSIM 4.0 model for a single stage power matched Villard voltage doubler (a) and eight stage power matched Villard voltage doubler (b). ............................................................. 105

Fig. 47 Conversion efficiency vs. gate width and number of stacked voltage doubler stages............................................................................................................ 106

Fig. 48 Modeled and measured input power vs output voltage of RF energy scavenger design. ...................................................................................................... 107

x

Fig. 49 RF to DC conversion efficiency versus output load impedance and threshold voltage without losses due to parasitic gate impedance. ........................... 108

Fig. 50 RF to DC conversion efficiency versus parasitics capacitance (defined as parasitic capacitance factor times modeled parasitic capacitances) of gate impedance without threshold voltage losses. .............................................................................. 109

Fig. 51 RF to DC conversion efficiency versus threshold voltage with parasitic gate impedance losses. ...................................................................................................... 109

Fig. 52 RF to DC conversion efficiency to generate 1V across a 50 kΩ load versus gate width (number of 2.08 um fingers) and number of voltage doubler stages. ..... 112

Fig. 53 RF to DC conversion efficiency to generate 1V across a 10 MΩ load versus gate width (number of 2.08 um fingers) and number of voltage doubler stages. ..... 113

Fig. 54 3-dimensional view of the efficiency of an RF scavenging circuit as a function of the number of 2.08 um fingers and the number of cascaded voltage doubler stages............................................................................................................ 115

Fig. 55 Top view of the efficiency of an RF scavenging circuit as a function of the number of 2.08 um fingers and the number of cascaded voltage doubler stages. .... 115

Fig. 56 Harmonic balance simulation of RF to DC conversion efficiency and incident input power versus output voltage for the optimal design determined by the analytical model using the BSIM 4.0 model. ............................................................ 116

Fig. 57 Improved RF power harvesting circuit ..................................................... 120

Fig. 58 Conventional RF power harvesting circuit. .............................................. 123

Fig. 59 Power harvesting circuit with NMOS 2 replaced by a PMOS with floating body. 124 Fig. 60 Improvement to drain current (Ids) for a given Vds (.3V) as Vbs is varied for a diode connected PMOS (13.6 um/.25 um) and diode connected NMOS 2 (27.2um / .25um) as depicted in Fig. 58 and Fig. 59. ................................................................ 125

Fig. 61 Layout of NMOS and PMOS device with appropriate connections for RF power harvesting circuit indicated. The voltage across the PN junction is labeled to show how diode is reverse biased and current will not flow under operating conditions since Vout is always greater than the circuit ground. ............................... 126

Fig. 62 Villard voltage doubler power matched to RF source. ............................. 127

Fig. 63 Villard voltage doubler not power matched to RF source. ....................... 127

Fig. 64 Step-by-step simplification of equivalent effective circuit impedance of conventional matching circuit. .................................................................................. 129

Fig. 65 Step-by-step simplification of equivelent effective circuit impedance of parasitic resistant matching circuit. ........................................................................... 130

Fig. 66 Plot illustrating the reduction in turn on voltage for diode connected MOSFET with gate biasing versus a standard diode connected MOSFET. ............. 134

Fig. 67 Biasing the gate of diode connected MOSFETs to reduce the threshold voltage. 135 Fig. 68 Circuit design illustrating the use of sacrificial current biasing to reduce the threshold voltage of diode connected MOSFETs. ................................................... 136

Fig. 69 Ideal diode response vs diode connected MOSFET with regular FETs and diode connected MOSFET using low threshold voltage FETs. ................................ 137

xi

Fig. 70 Image of test chip layout with RF power harvesting circuits comprised of various combinations of the design improvements discussed in this work. Design was implemented in a 130 nm IBM process. ................................................................... 139

Fig. 71 Image of test chip with RF power harvesting circuits comprised of various combinations of the design improvements discussed in this paper. Design was fabricated in a 130 nm IBM process. ........................................................................ 141

Fig. 72 Comparison of measured RF to DC conversion efficiency vs output voltage across a 200 kΩ load for both an RF energy harvesting circuit with biasing and without biasing. ......................................................................................................... 143

Fig. 73 Measurement of Vout vs input power for the RF energy harvesting circuit utilizing all design improvements with a 70 kΩ load. .............................................. 144

Fig. 74 Comparison of this work to recent works commercial and academic works operating at comparable RF power levels and output loads ..................................... 145

Fig. 75 Comparison of this work to recent works tested under similar output loads and input power conditions. ...................................................................................... 146

Fig. 76 Proposed low power receiver architecture implementing RF energy scavenging circuit for demodulation and an optimized multi-stage LNA. ............... 150

Fig. 77 Villard voltage doubler power matched to RF source. ............................. 153

Fig. 78 Conventional envelope detector connected to RF power source. ............ 153

Fig. 79 BSIM 4.0 simulation of power gain of Villard voltage doubler over a conventional envelope detector................................................................................. 154

Fig. 80 Normalized transient response of the Villard voltage doubler to a strong input signal (-13 dBm) and weak input signal (-43 dBm) modulated at 1 MHz. ..... 156

Fig. 81 Normalized transient response of the Villard voltage doubler to a strong input signal (-13 dBm) and weak input signal (-43 dBm) modulated at 1 MHz. ..... 156

Fig. 82 Power matched Villard voltage doubler acting as demodulator of On-Off keyed RF sigal (a) and equivalent impedance presented to the demodulated signal after the RF signal has been removed(b). ................................................................. 157

Fig. 83 Normalized discharge curve of strong and weak demodulated signal from the Villard voltage doubler. ...................................................................................... 160

Fig. 84 Demodulation bandwidth of the Villard voltage doubler as a function of demodulated signal amplitude. ................................................................................. 161

Fig. 85 Normalized output voltage vs frequency for an RF power harvesting circuit with 3dB bandwidth points indicated by arrows....................................................... 162

Fig. 86 Normalized output voltage vs frequency for an unmatched rectifier circuit. 163

Fig. 87 Common source cascode low noise amplifier implemeted in the multi-stage LNA design of this work........................................................................................... 169

Fig. 88 Image of fabricated common source cascode LNA. ................................. 174

Fig. 89 Comparison of measured and analytically modeled power gain of common source cascode LNA as a function of bias voltage. .................................................. 174

Fig. 90 Comparison of measured and analytically modeled DC supply power consumption of common source cascode LNA as a function of bias voltage. ......... 175

Fig. 91 Comparison of measured and analytically modeled noise figure of common source cascode LNA as a function of bias voltage. .................................................. 175

xii

Fig. 92 Comparison of measured and analytically modeled total power consumption of optimized multi-stage LNA as a function of bias voltage. ............. 176

Fig. 93 Comparison of measured and analytically modeled number of LNA stages necessary to meet receiver noise figure requirement as a function of bias voltage. . 177 Fig. 94 Output Power vs. Input Power for Fundamental (blue data pts) and 3rd Order Tone (red data pts). The intersectino of these two lines determines the third order intermodulation point (IIP3 and OIP3)............................................................ 178

Fig. 95 Output Power vs Input Power for Fundamental Tone (2.2GHz, .41V bias). This plot is used to determine the 1 dB compression point. ..................................... 179

Fig. 96 Single stage of multi-stage baseband differential amplification circuit.... 180 Fig. 97 Cumulative voltage gain after each stage of baseband amplification versus frequency................................................................................................................... 181

Fig. 98 Comparator design implementing Miller capacitor to increase stability. . 182 Fig. 99 Image of fabricated low power receiver ................................................... 183

Fig. 100 Comparison of the energy effiency of the low power receiver design resulting from this work to other low power receiver designs in the literature. ....... 185

xiii

Eqn. 1. Probability of error for an OOK signal [28].Eqn. 2. Probability of error for an FSK signal [28].Eqn. 3. Relation of SNR to the energy per bit (Erate (fb), and bandwidth (B).Eqn. 4. Probability of error from coEqn. 5. Probability of error when the symbol “1” was transmitted given a decision threshold of Vt, received signal level of SdEqn. 6. Probability of an error when a zero is transmitted and the interfering signal transmits a zero given a decision threshold of VEqn. 7. Probability of an error when a zero is transmitted and the interfering signal transmits a one given a decisionstandard deviation of [29].Eqn. 8. α is the ratio of energy required for required for binary modulation.Eqn. 9. Inversion coefficient of a MOSFET as defined by EKV model Eqn. 10. Specific current of a MOSFET as defined by the EKV model [31].Eqn. 11. Carnot efficiency of electrical to thermal conversion defined as a function of the high (Thigh

Eqn. 12. Effective area of quarter wavelength antenna as a function of the signal wavelength (λ) or the speed of light (c) and tEqn. 13. Power received from a 900 MHz source on a quarter wavelength antenna from an electric field intensity of .5 uW/cmEqn. 14. Voltage at input to energy harvesting circuit from Joe and Chia model.Eqn. 15. Voltage at output of RF energy harvesting circuit from Joe and Chia model. 38 Eqn. 16. Power loss in NMOS of RF energy harvesting circuit.Eqn. 17. Output voltage from resonant tank circuit and voltage doubler as a function of the circuit parameters defined in Fig. 8.Eqn. 18. High Q approximation of output voltage form resonant tank circuit.Eqn. 19. Current generated on wire loop from electromagneticEqn. 20. Output voltage at nth stage of stacked voltage doublers.Eqn. 21. Output voltage of stacked voltage doublers as a function of the output voltage from a single stage with an open load, the load resistance, and the internal DC resistance of the diode. ................................Eqn. 22. Gain as determined from two matching antennas place a distance d from each other. 57 Eqn. 23. Channel current of a diode connected MOSFET.Eqn. 24. Effective large signal channel resistance of a diode connected MOSFET. 86

Eqn. 25. Gate capacitance of a diode connected MOSFET.Eqn. 26. Gate resistance of a diode connected MOSFET [89].

xiv

List of Equations

Probability of error for an OOK signal [28]. ................................Probability of error for an FSK signal [28]. ................................Relation of SNR to the energy per bit (Eb), noise per bit (N0), channel data

), and bandwidth (B). .......................................................................................Probability of error from co-channel interference of an OOK signalProbability of error when the symbol “1” was transmitted given a decision

, received signal level of Sd1 and standard deviation of Probability of an error when a zero is transmitted and the interfering signal

transmits a zero given a decision threshold of Vt and standard deviation oProbability of an error when a zero is transmitted and the interfering signal

transmits a one given a decision threshold of Vt, received signal level of Si[29]. .....................................................................................

is the ratio of energy required for m-ary modulation to the energy required for binary modulation. ..................................................................................

Inversion coefficient of a MOSFET as defined by EKV model Specific current of a MOSFET as defined by the EKV model [31].Carnot efficiency of electrical to thermal conversion defined as a

high) and low (Tlow) temperatures of the thermal gradient.Effective area of quarter wavelength antenna as a function of the signal

) or the speed of light (c) and the signal frequency (f). ........................Power received from a 900 MHz source on a quarter wavelength antenna

ensity of .5 uW/cm2. .............................................................Voltage at input to energy harvesting circuit from Joe and Chia model.Voltage at output of RF energy harvesting circuit from Joe and Chia

Power loss in NMOS of RF energy harvesting circuit. ..........................Output voltage from resonant tank circuit and voltage doubler as a

function of the circuit parameters defined in Fig. 8. ...................................................High Q approximation of output voltage form resonant tank circuit.Current generated on wire loop from electromagnetic flux. ...................Output voltage at nth stage of stacked voltage doublers. ........................Output voltage of stacked voltage doublers as a function of the output

voltage from a single stage with an open load, the load resistance, and the internal DC ................................................................................................

Gain as determined from two matching antennas place a distance d from

Channel current of a diode connected MOSFET. ................................Effective large signal channel resistance of a diode connected MOSFET.

Gate capacitance of a diode connected MOSFET. ................................Gate resistance of a diode connected MOSFET [89]..............................

.............................................. 20 ................................................ 20

), channel data ....................... 21

channel interference of an OOK signal ......... 22 Probability of error when the symbol “1” was transmitted given a decision

[29]. ....... 23 Probability of an error when a zero is transmitted and the interfering signal

and standard deviation of [29]. 23

Probability of an error when a zero is transmitted and the interfering signal , received signal level of Si1 and

..................... 23

ary modulation to the energy .................. 26

Inversion coefficient of a MOSFET as defined by EKV model [31]. ........ 28 Specific current of a MOSFET as defined by the EKV model [31]. ...... 28 Carnot efficiency of electrical to thermal conversion defined as a

) temperatures of the thermal gradient. ...... 33 Effective area of quarter wavelength antenna as a function of the signal

........................ 35

Power received from a 900 MHz source on a quarter wavelength antenna ............................. 35

Voltage at input to energy harvesting circuit from Joe and Chia model. 37

Voltage at output of RF energy harvesting circuit from Joe and Chia

.......................... 38

Output voltage from resonant tank circuit and voltage doubler as a ................... 40

High Q approximation of output voltage form resonant tank circuit...... 40 ................... 43

........................ 46

Output voltage of stacked voltage doublers as a function of the output voltage from a single stage with an open load, the load resistance, and the internal DC

................................ 47

Gain as determined from two matching antennas place a distance d from

................................... 85

Effective large signal channel resistance of a diode connected MOSFET.

................................. 87

............................. 87

xv

Eqn. 27. Large signal capacitance of the PN junction formed between the body and drain. 88 Eqn. 28. Instantaneous capacitance of the PN junction formed between the body and drain [90]. ............................................................................................................. 88

Eqn. 29. Leakage current through the reverse bias diode connected MOSFET. .. 89

Eqn. 30. Effective DC resistance of a diode connected MOSFET in the Villard voltage doubler............................................................................................................ 91

Eqn. 31. Voltage difference between the drain and source terminals of a diode connected MOSFET in the Villard voltage doubler. .................................................. 94

Eqn. 32. Voltage difference between the drain and source terminals of a diode connected MOSFET in the Villard voltage doubler. .................................................. 94

Eqn. 33. Approximation of the incident voltage across the drain and source terminals of a MOSFET valid when solving the DC loop equations. ........................ 95

Eqn. 34. DC current across output load, Rout. ....................................................... 96

Eqn. 35. DC current across effective MOSFET resistance, RDC. .......................... 97

Eqn. 36. DC resistance of the diode connected MOSFET derived from the model depicted in Fig. 40....................................................................................................... 97

Eqn. 37. Output DC voltage of a multistage Villard voltage doubler. .................. 97

Eqn. 38. Effective DC resistance of diode connected MOSFET derived from Fig. 40 arranged as a function of Vout. ............................................................................... 98

Eqn. 39. Input incident voltage for a multi-stage Villard voltage doubler as a function of output voltage. .......................................................................................... 98

Eqn. 40. Effective AC resistance of the drain source channel for a diode connected MOSFET in a Villard voltage doubler........................................................................ 99

Eqn. 41. Input AC power draw of a multi-stage Villard voltage doubler without the presence of parasitic losses. ................................................................................ 101

Eqn. 42. Input AC impedanceof a multi-stage Villard voltage doubler in the presence of parasitic losses. ...................................................................................... 102

Eqn. 43. Parasitic impedance of MOSFET gate. ................................................. 102

Eqn. 44. Parasitic impedance of the PN junction formed between the body and drain of the diode connected MOSFET. ................................................................... 102

Eqn. 45. Input AC power draw including parasitic losses. ................................. 103

Eqn. 46. Threshold voltage of a diode connected MOSFET resulting from the body effect. 123 Eqn. 47. Output voltage of the Villard voltage doubler resulting from the RF power source depicted in Fig. 62 (Derivation Appendix A). .................................... 128

Eqn. 48. Output voltage of the Villard voltage doubler unmatched to the RF power source depicted in Fig. 63. ........................................................................................ 128

Eqn. 49. Conditions under which the power matched Villard voltage doubler will outperform a non power matched Villard voltage doubler (Derivation Appendix A). 128

Eqn. 50. Effective parallel resistance of the Villard voltage doubler. ................. 132

Eqn. 51. Required NF of the reciever to meet the -90 dBm sensitivity requirement for OOK receiver operating with a 10-3 BER. 1 MHz receiver bandwidth is assumed. 151

xvi

Eqn. 52. Noise figure (NF) of the non-coherent OOK receiver depicted in Fig. 76 (Derivation Appendix A). ......................................................................................... 152

Eqn. 53. Power gain of RF energy harvesting circuit over conventional envelope detector. 154 Eqn. 54. Leakage current of diode connected MOSFET when no RF signal is present 158 Eqn. 55. Approximation of MOSFET resistance due to leakage current and amplitude of demodulated signal. ............................................................................. 158

Eqn. 56. Representation of load resistance as a multiple of the leakage resistance from the diode connected MOSFETs. ...................................................................... 158

Eqn. 57. General solution to transient response of discharging voltage on Capacitor C1 (Derivation Appendix A)..................................................................... 158

Eqn. 58. First root of the auxiliary equation to the differential equation describing the circuit presented in Fig. 82b (Derivation Appendix A). ..................................... 159

Eqn. 59. Second root of the auxiliary equation to the differential equation describing the circuit presented in Fig. 82b (Derivation Appendix A)..................... 159

Eqn. 60. First constant to Eqn. 57 derived from the boundary conditions (Derivation Appendix A). ......................................................................................... 159

Eqn. 61. Second constant to Eqn. 57 derived from the boundary conditions (Derivation Appendix A). ......................................................................................... 159

Eqn. 62. Demodulation bandwidth of the Villard voltage doubler (Derivation Appendix A).............................................................................................................. 161

Eqn. 63. 3 dB bandwidth of the power matched Villard voltage doubler (Derivation Appendix A). ......................................................................................... 163

Eqn. 64. Input impedance of the Villard voltage doubler depicted in Fig. 77 as a function of its real and capacitive elements. ............................................................. 164

Eqn. 65. Efficiency metric utilized by Daly and Chandrakasan. ........................ 165

Eqn. 66. Optimization of efficiency metric for variable X. ................................ 166

Eqn. 67. Friis formula. Determines total NF or a receiver as a function of each stage’s noise figure and gain. .................................................................................... 166

Eqn. 68. NF of multi-stage LNA. ........................................................................ 166

Eqn. 69. NF of the receiver depicted in Fig. 76 comprised of multi-stage LNA, demodulator, and baseband circuitry. ....................................................................... 167

Eqn. 70. Simplification of Eqn. 67 as a geometric sequence. ............................. 167

Eqn. 71. Minimum number of LNA stages to meet receiver noise figure requirement. .............................................................................................................. 167

Eqn. 72. Power consumption of optimized multi-stage LNA. ............................ 168

Eqn. 73. Convergence of the optimization methodology proposed by this work to the inverse of the metric utilized by Daly and Chandrakasan as NF of the LNA converges to zero. ..................................................................................................... 168

Eqn. 74. Equivalency of an optimization performed on the methodology proposed by this work to an optimization of the metric utilized by Daly and Chandrakasan as NF of the LNA converges to zero. ............................................................................ 168

Eqn. 75. Power supply consumption of a single common source cascode LNA stage. 170 Eqn. 76. Supply current of LNA biased in strong inversion. .............................. 171

xvii

Eqn. 77. Supply current of LNA biased in weak inversion. ................................ 171

Eqn. 78. Optimal transistor width for power restricted common source cascode LNA. 171

Eqn. 79. Supply current of common source cascode LNA as a weighted average of the drain current modeled by weak and strong inversion. ........................................ 171

Eqn. 80. Weight factor used to properly model the drain current of a common source cascode LNA. ................................................................................................ 172

Eqn. 81. Power gain common source cascode LNA (Derivation Appendix A). . 172

Eqn. 82. Voltage gain of input power matching circuit for common source cascode LNA. 172

Eqn. 83. Parasitic gate capacitance of common source cascode LNA. ............... 173

Eqn. 84. Parasitic gate resistance of common source cascode LNA. .................. 173

Eqn. 85. Noise figure (NF) of common source cascode LNA. ........................... 173

1

Chapter 1: Literature Survey

Introduction

A topic of intense interest in radio frequency (RF) wireless research is that of wireless

sensor networks. Wireless sensor networks are characterized by the ad-hoc

distribution of many tiny sensor devices in an area. These devices are capable of

sensing data, performing data processing, and wireless transmission to other sensor

nodes. When distributed in a random fashion in an area, these sensor nodes organize

themselves into a network capable of routing data back to a central access point.

Unlike existing wireless networks, wireless sensor networks have minimal bit rate

requirements. These requirements are typically on the order of bits per day [1].

Because these networks often must operate in areas without pre-existing

infrastructure, they are typically required to operate for extended periods of time on a

single battery charge. Thus, low power design and techniques for extracting energy

from the environment are important technologies for wireless sensor networks.

2

Fig. 1 Smartdust sensor node.

Smartdust systems are the evolution of wireless sensor networks to cubic centimeter

dimensions or less (Fig. 1). Such small scale integration of the various

subcomponents (transceiver, microcontroller, memory, etc.) poses unique challenges

in the design of Smartdust systems. One of the most difficult challenges in the

implementation of Smartdust systems is the difficulty in realizing long term operation

given the limited availability for on-system energy storage.

This work seeks to help resolve this issue in two ways; first through the development

of a low power receiver design compatible with the form factor of Smartdust systems;

and second through the novel improvement of RF energy scavenging circuitry to

extend the operational lifetime of Smartdust sensor nodes. Towards this goal, this

work first assess the availability of RF energy in the environment, then identifies the

performance limitations of RF energy scavenging, and lastly, through various means,

improves and applies RF energy scavenging technology to enhance the performance

of Smartdust sensor networks.

<1 cm

<1 cm

3

The first aspect of this work, summarized in Chapter 2 is a comprehensive survey of

the RF energy present in the environment due to the cellular and ultra-high frequency

(UHF) TV infrastructure. The goal is to characterize the availability of RF energy in

the environment that can be scavenged to recharge the battery of a Smartdust sensor

node.

Chapter 3 summarizes the development of an analytical model by which the

performance of the power matched Villard voltage doubler circuit as an RF energy

scavenger can be examined. The model is applied as a tool to study the effect of

various parasitic sources on scavenging performance. Subsequently, a determination

is made of the dominant parasitic losses under different operational conditions.

Furthermore, this model has the novel ability to enable swift optimization of a multi-

stage power matched Villard voltage doubler over multiple design parameters

including transistor width and number of stacked stages.

Novel modifications to the power matched Villard voltage doubler are presented in

Chapter 4 to reduce the performance degradation of the parasitics that were identified

in Chapter 3. Techniques to reduce the body effect, threshold voltage losses, and

parasitic input losses are examined. These design improvements enable the

fabrication of an RF energy scavenging circuit that is more than twice as efficient as

the conventional RF power harvesting circuit. This represents sufficient RF

scavenging performance to recharge the battery of a Smartdust sensor node by

4

beaming power from an RF source or even from scavenging RF energy levels

detected in the environment as reported in the survey presented in Chapter 2.

The last topic of this work presents a novel receiver design that implements the power

matched Villard voltage doubler as a non-coherent demodulator to realize an ultra

low power on-off key receiver compatible with the cubic centimeter form factor of

Smartdust systems. Furthermore, to meet the link range requirements of Smartdust

sensor nodes, a novel methodology is presented for optimizing a multi-stage low

noise amplifier (LNA) to achieve a desired sensitivity at the minimum possible power

consumption. This work culminates in the fabrication and verification of a low power

receiver requiring an order of magnitude less power per bit than receivers of

comparable sensitivity.

The contributions to the field of wireless sensor networks include:

o (Chapter 2) RF energy survey of the environment

Study received variation in received RF energy as function of

time

Survey RF energy received in environment as a function of

location

o (Chapter 3) Identify and study the effect of parasitic sources on

performance of RF energy harvesting circuits through the development

5

and application of an analytical model of the RF energy harvesting

circuit.

Identify dominant parasitic loss mechanisms in the Villard

voltage doubler as an RF energy scavenging circuit.

Model and quantify the effects of stacking multiple Villard

voltage doublers in series.

Utilize model to optimize design parameters of a Villard

voltage doubler.

o (Chapter 4) Study novel enhancements to RF power harvesting circuits

to improve power harvesting efficiency, generate sufficient voltage at

lower RF power levels to power a Smartdust node, and more

efficiently demodulate RF signals.

Reducing body effect

Novel sacrificial current biasing

Novel parasitic resistant matching

Design and layout circuits that meet performance goals while

meeting DRC/Antenna/Floating Gate rules

o (Chapter 5) The novel implementation and performance analysis of an

RF power harvesting circuit as the demodulating element in an on-off

keyed (OOK) receiver.

Studied and quantified the gain improvement of the power

matched Villard voltage doubler as opposed to the

conventional voltage rectifier.

6

Study and quantify the novel gain control characteristics of a

RF power harvesting circuit as a receiver demodulator.

Study and quantify improved RF filtering resulting from a RF

power harvester as the demodulating element in a receiver.

o (Chapter 5) Optimize LNA and RF amplification stages of an OOK

receiver for low power operation through determination of optimal

number of stages and proper biasing between weak and strong

inversion operation.

Development of a novel methodology from optimizing bias

point and number of stages in a multistage LNA to achieve

desired receiver sensitivity at minimal power cost.

Study improved RF filtering of multi-stage LNA design.

o (Chapter 5) Integrate complimentary metal on silicon (CMOS) RF

receiver circuits (low noise amplifier, RF power harvester, base band

amplifier and comparator) under ultra low power constraints

1 V supply

~ 1 mW power draw

To better illustrate how this work is the necessary evolution of wireless sensor

networks, the remainder of this chapter will begin with a brief history of wireless

sensor networks. In addition, to properly motivate this work, the economic outlook

and market applications for this technology will be reviewed. Finally, this chapter

will present the characteristic and challenges of wireless sensor networks along with a

7

comprehensive survey of prior work in the fields of wireless sensor networks and

energy scavenging to illustrate how this work addresses existing problems in the

development of Smartdust sensor networks.

Brief History of Wireless Sensor Networks

The origins of the modern wireless data networks can be traced back to the ALOHA

system. Developed in 1970 at the University of Hawaii, ALOHA was the first system

to employ random access control. It spanned four of the Hawaii islands utilizing a 24

kbaud link operating at 400 MHz [2].

Research continued in the 1970s, thanks largely to support from the U.S. federal

government. In 1972, the U.S. Defense Advanced Research Projects Agency

(DARPA) initiated a program called the DARPA Packet Radio Network (PRNET)

[1]. PRNET showed significant advancement over prior wireless digital networks

such as the ALOHA system. It utilized direct sequence spread spectrum to enhance

its performance in the presence of multi-path interference. Support for wireless

sensor networks continued in 1980 when DARPA initiated the Distributed Sensor

Networks (DSN) program [3]. Support for wireless data networks by DARPA has

continued through the 1990’s. As an example, the SensIT program founded in 1998

by DARPA has funded twenty-nine wireless network programs [1].

8

Support for wireless data networks in the commercial sector began to materialize in

1997, with the establishment of the 802.11 Wireless LAN (WLAN) standard by the

Institute for Electronics Engineers [1]. These networks represented a major leap in

wireless performance and at 54 Mbps rivaled the data rates of wired connections at

the time [3].

More recently, there has been a trend towards smaller, low power networks called

wireless personal area networks (WPANs) based on the 802.15 standard [1][3].

These networks are typically characterized by wireless links of a few meters. While

there are several examples of WPANs, Bluetooth is the most common and successful

standard for personal area networks [1]. At only 1 Mbps, data rates are significantly

lower than those of WLANs.

Initiated in 1993 at University of Los Angeles and Rockwell Science Center, the

Wireless Integrated Network Sensors (WINS) system was the first wireless network

to sacrifice data rate and range to extend operational lifetime. In this manner it

became the first example of the modern wireless sensor network. Data rates were

limited to less than 100 kbps and multi hop protocols were used to limit the power

used during transmission. In addition, time division multiple access (TDMA) was

used for media access and a spread spectrum radio was utilized to enhance the

performance of nodes in the presence of multi-path interference [4].

9

Development of wireless sensor nodes has continued with Picoradio, uAMPS and the

Smart-Dust project. Picoradio, under development at Berkley, is a system on a chip

approach to wireless sensor networks utilizing a spread spectrum transceiver [5].

This approach offers the potential for very low cost manufacture and is a continuation

of the trend for smaller, lower power designs. uAMPS is an MIT project with the

principal goal of lowering node power consumption [6]. A defining characteristic of

the system is the LEACH protocol, which spreads cluster formation responsibility

among varying nodes in the network to enhance node lifetime [1]. Smart-Dust is

another MIT project with the goal to create a sensor node so small that it can be

suspended in air. This requires a system volume on the order of a cubic millimeter.

Towards this goal, optical communication is being pursued [7].

Motivation for Research

The market for wireless sensor networks is projected to experience rapid growth in

the next few years. In 2005, there were 200,000 deployments of wireless sensor

nodes worth 100 million dollars [8]. By 2011 the wireless sensor network market is

expected to be worth 1.6 trillion dollars [9]. That represents growth by four orders of

magnitude in market value.

10

Such large growth projections are largely a function of the broad spectrum of

potential applications for wireless sensor networks. Among the most common

applications are [1][5][7][10][11][12]:

• Security and Military Sensing

• Industrial Monitoring

• Asset Tracking

• Environmental Sensing

• Health Monitoring

The application of wireless sensor networks in these industries promises to change the

way we live. Low cost, miniature sensor nodes could be sprayed or painted onto

roads, walls, and machines; flooding human perception with a wealth of

environmental knowledge ranging from traffic patterns to supply chains [13]. Even

the human body could have wireless sensor nodes literally swallowed to provide

critical information on the condition of the human body. Access would be a gained to

a database of current environmental data that would never be outdated or require

refreshing [13].

All of these applications have distinct requirements that make them highly suitable

for the application of wireless sensor networks.

11

The first is that these applications require deployment into areas where a networking

infrastructure does not currently exist. For example, in security sensing, possible

deployment scenarios involve rapid deployment after a natural disaster. In a natural

disaster such as a hurricane, the traditional networking infrastructure may be

inoperative. Wireless sensor networks could provide a fast means to gather real time

data on conditions shortly after such a disaster.

In addition, these applications share the need for wireless nodes with a very small

system form factor. Health monitoring could utilize “dust size” systems on the order

of a few millimeters cubed to deploy wireless sensor networks directly into the

human body. Such systems could provide real-time feedback to surgeons and doctors

on a patient’s condition without the use of more invasive procedures.

A third characteristic shared by these applications, is the need for networks that

organize themselves in an ad-hoc fashion. Asset tracking involves the creation of a

network of nodes that are constantly being moved spatially. The spatial movement of

the nodes translates into an ever-changing link configuration between nodes and

network routing must be able to dynamically adjust routing to changes in the network

topology.

The ability to operate for long periods of time unassisted is a fourth characteristic

desired by the applications. Environmental sensing is generally characterized by the

ability to deploy wireless sensor nodes into remote locations. Such a location

12

requires a network node that can last for long periods of time without access to a

power infrastructure, maintenance or recharge [12].

Given the scale of possible deployments of wireless sensor nodes, all of the example

applications require that individual nodes be very low cost. Given the desire to

maximize profit, asset tracking and industrial monitoring require that wireless sensor

networks cost be minimized such that the there is a net overall profit from their use.

In addition, military and health monitoring requires that node cost be minimized to

prevent large deployments of wireless sensor networks from becoming prohibitively

expensive.

Defining Characteristics of a Sensor Network

Wireless sensor networks represent a major research challenge. To better understand

the scope of that challenge, one should look at the defining characteristics of a

wireless sensor network:

• Sensor networks are made of tiny sensor nodes [4][14] – Target sizes for

nodes are on the order of a centimeter cubed. Among the components that need to be

13

incorporated into this confined space are the microprocessor, memory, sensors,

transceiver and power sufficient to perform sensing and networking.

• Sensor nodes will be randomly distributed [13][14] - Sensor nodes will also be

expected to operate efficiently no matter how they are oriented. Environmental

obstruction may be common and ideal orientation of the antenna or transmit and

receive structures cannot be guaranteed.

• Sensor nodes are self-contained [1][13][14] – Sensor nodes will be required to

maintain operation for long periods of time (> 1 month). Due to the size restrictions

on sensor nodes, extremely small batteries must be used. Therefore, power

consumption must be kept to a minimum to allow for adequate battery life. Power

harvesting from the environment may be possible to extend node life. Solar power,

kinetic energy, radio frequency, and thermal power are among the possible external

power sources under study.

• Network topology changes frequently [12][14] – Sensor nodes will be prone

to failure due to a variety of reasons. Changing environmental conditions can weaken

transceiver links. Power restrictions can require motes to go off-line either

temporarily or permanently. In addition, network topology can change due to the

actual movement of sensor nodes.

14

• Sensor nodes will be deployed in large numbers [12][14] – Sensor networks

may be deployed with nodes numbering in the hundreds to thousands. As a result,

sensor networks need to be highly scalable.

• Sensor networks broadcast information [12] – A sensor network’s primary

function is to move information from the sensors back to the access point.

Traditional networking protocols use global identification to enable point-to-point

communication. Due to the sheer volume of sensor nodes deployed in a network,

global identification is impractical. Therefore, access points will make requests for

data types to the network, and the nodes that can address that requirement will

respond.

Challenges in Physical Layer Implementation

The characteristics of wireless sensor networks have implications at the physical layer

of the network. For example, wireless sensor networks must have a long lifetime.

This facilitates the need for a physical layer that is very low power. The modulation

format must be carefully chosen to minimize the energy necessary to transmit and

receive each bit of data. Furthermore, given that data rates are low, and it is desirable

to minimize the time spent broadcasting, data is best broadcast in short bursts [15].

15

Another characteristic with important implications to physical layer design is the need

for small size. Dimensions of less than a cubic centimeter severely limit the amount

of energy that can be stored on a system’s battery. This again facilitates the need for

low power transceiver design, but also makes the use of energy scavenging from the

environment attractive. In addition, the small size requirement of wireless sensor

networks translates into a small antenna. Smaller antennas generally require the use

of a higher carrier frequency for transmission. Higher carrier frequencies require

higher power requirements; therefore, a system optimization is necessary to balance

the requirement for small size and low power.

Given that sensor nodes will be deployed in large numbers, the cost of individual

nodes is an important consideration. To drive down the price, is it desirable to

implement the design directly onto CMOS. This is also consistent with the desire for

a small system size.

Lastly, since sensor nodes are randomly distributed, the physical layer must be able to

cope with the possibility of a non-optimal orientation or placement. Under ideal

conditions, signal power degrades as the inverse square of the distance, r, from the

transmitting source (1/r2). Given that sensor nodes could be located behind

obstructions or directly on the ground, 1/r2 free space path loss is unlikely. Therefore,

the physical layer implementation of the transceiver must have a sensitivity sufficient

to bridge air gaps even when 1/r3 or even 1/r4 path loss is encountered [4][16]-[20].

16

Current Research in Wireless Sensor Network Transceiver Design

A literature survey in the fields of low power wireless transceiver design and RF

power harvesting provides the context for contrasting this work with prior works in

wireless sensor networks and energy scavenging.

Coherent Modulation

Given that low power operation is a critical requirement for wireless sensor networks,

it is important to choose a modulation technique that is optimal for low power

consumption. Typically transmission systems are designed to be spectrally efficient

utilizing coherent modulation and demodulation techniques. Coherent demodulation

and modulations refers to mixing an RF data signal with a synthesized frequency of

known phase. In this manner, data can either be stored or extracted from and

combination of the phase, amplitude and frequency of an RF signal.

17

Fig. 2 Typical transceiver design [21].

The coherent architecture in Fig. 2 is necessary for spectrally efficient phase shift

keying (PSK) and quadrature amplitude modulation (QAM) transceivers. PSK and

QAM are very popular modulation techniques. PSK stores the transmitted

information in the phase of the RF signal, while QAM stores information in both the

phase and amplitude of the transmitted RF signal.

However, this system architecture requires the use of RF mixers, phase locked loops

(PLL) and voltage controlled oscillators (VCO). These components dominate the

power consumption of the transceiver due to long turn on times [22]. Given that

sensor node communication is characterized by short bursts of data, long transient

start up times result in a large amount of wasted energy to start up the transceiver

[21]. The importance of minimizing start up time can be further illustrated by

plotting energy consumption per bit versus transient start up time for the transmission

of a single data packet.

18

Energy Consumption vs. Transient Start Up Time

Fig. 3 Energy consumption vs transient start up time for a 100 bit packet transmitted at 1 Mbps [23]

Several efforts in wireless sensor node transceiver design have championed the use of

spread spectrum as the digital modulation scheme [4][5][24]. Spread spectrum shows

strong performance in the presence of multi-path [25]. Spread spectrum refers to the

practice of mixing an RF data signal with a chipping signal from a pseudo-orthogonal

set that is faster than the symbol rate of the RF signal. The signal’s spectrum in the

frequency domain becomes flat and spread out resulting in a signal that can be

difficult to distinguish from the thermal noise. The spread signal offers an inherent

immunity to narrowband interference sources. The original RF data signal can be

19

retrieved by remixing the spread signal with the original chipping code. Like PSK

and QAM modulation, spread spectrum has a start up time limited by the transient

turn on time of the frequency synthesizer [24]. Therefore, it is not optimal for low

power communication.

Non-Coherent Modulation

The need for a transceiver system with a fast transient turn on time favors non-

coherent modulation and demodulation techniques. Non-coherent modulation refers

to the addition or recovery of data from an RF signal without knowledge of the phase

of the RF signal. Work has been proposed that favors the use of non-coherent

frequency shift keying (FSK) modulation [26]. FSK modulation stores the

transmitted data as the instantaneous frequency of the RF signal. The simplest binary

implementation of FSK modulation refers to indicating a binary one by transmitting

at a given frequency during the bit period, or indicating a binary zero by transmitting

at another tone during the bit period.

Through the use of a fractional N synthesizer with sigma delta modulation, transient

turn on times as low as 10 us can be realized for an FSK transmitter. However, such

a design requires an estimated transmit power on the order of 12 mW. 10 mW of the

transmit power is required to operate the fractional N frequency synthesizer. Given

that the design is estimated to transmit 0 dBm, the system achieves a power out to DC

power draw efficiency of only 8.3%. Although this design minimizes energy

20

consumption from a transient turn on time perspective, it clearly does not achieve a

high power efficiency.

On-off keying (OOK) modulation is another technique that can be implemented in a

non-coherent manner of reception. OOK modulation stores the transmitted data as

the amplitude of the RF signal. The simplest form of OOK modulation is binary

OOK and indicates the state of digital data through the presence or absence of RF

energy during a bit period.

A criticism of OOK modulation has been the perception of poor performance

compared to FSK [27]. This assumption is not entirely valid. The probability of a bit

error for non-coherent OOK and FSK can be expressed as:

4,

11

2

1 SNR

OOKerror eSNR

P−

⋅

⋅+=

π

Eqn. 1. Probability of error for an OOK signal [28].

4, 2

1 SNR

FSKerror eP−

⋅=

Eqn. 2. Probability of error for an FSK signal [28].

21

Where signal to noise ratio (SNR) is the power of the desired data signal to the power

of the noise in the RF signal. The Nyquest theorem can be utilized to determine the

relation between SNR and the ratio of the total signal energy to noise energy in a bit

period (Eb/N0) assuming non return to zero (NRZ) signaling.

0NB

EfSNR bb

⋅

⋅=

Eqn. 3. Relation of SNR to the energy per bit (Eb), noise per bit (N0), channel data rate (fb), and bandwidth (B).

By plotting the two equations (Eqn. 1) and (Eqn. 2) against Eb/N0, it can be concluded

that there is very little difference between the probability of a bit error (BER) for non-

coherent FSK and non-coherent OOK modulation (Fig. 4).

22

BER for OOK and FSK Modulation vs. the Ratio of Signal Energy to Noise Energy

Fig. 4 Plot of Bit Error Rate (BER) for OOK and FSK modulation vs the ratio of signal energy per bit to noise energy per bit (Eb/N0).

Another criticism of OOK transmission has been its performance in the presence of

co-channel interference. To refute that criticism, the probability of error for a signal

of interest in the presence of an interfering signal in an OOK transceiver is derived in

the work by Anthes [29].

jamalarmfalsemisserr PPPP4

1

4

1

2

1_ ++=

Eqn. 4. Probability of error from co-channel interference of an OOK signal

Where Pmiss is the probability of error when a one is present for the desired signal.

Pfalse_alarm is probability of error when both desired signal and interfering signal

transmit a 0. And Pjam is the probability of error when the

the interfering signal is a one.

The probability of each error condition is expressed as:

PSdV

miss

t

∫−

∞−⋅= σ

π2

1

Eqn. 5. Probability of err

V t, received signal level of Sd

P Valarmfalse ∫⋅=_

2

1

π

Eqn. 6. Probability of an error when a zero is transmitted and the interfering signal transmits a

zero given a decision threshold of V

P SiVjam t∫∞

−⋅

=1

2

1

σπ

Eqn. 7. Probability of an error when a zero is transmitted and the interfering signal transmits a

one given a decision threshold of V[29].

When the probability of error (

signal and interfering signal

23

is the probability of error when a one is present for the desired signal.

is probability of error when both desired signal and interfering signal

is the probability of error when the desired signal is a 0 and

the interfering signal is a one.

he probability of each error condition is expressed as:

dzeSd z

−σ

12

2

Probability of error when the symbol “1” was transmitted given a decision threshold of

level of Sd1 and standard deviation of [29].

dzetV

z

∫∞ −1

2

2

σ

Probability of an error when a zero is transmitted and the interfering signal transmits a

given a decision threshold of Vt and standard deviation of [29].

dzeSi

z−

1

2

2

Probability of an error when a zero is transmitted and the interfering signal transmits a

given a decision threshold of Vt, received signal level of Si1 and standard deviation of

probability of error (Perr) is plotted versus the difference between desired

signal and interfering signal in decibels, it can be seen that for 15 dB of SNR, a

is the probability of error when a one is present for the desired signal.

is probability of error when both desired signal and interfering signal

desired signal is a 0 and

given a decision threshold of

Probability of an error when a zero is transmitted and the interfering signal transmits a

Probability of an error when a zero is transmitted and the interfering signal transmits a

and standard deviation of

is plotted versus the difference between desired

5 dB of SNR, a

24

minimum delta between the desired signal and interfering signal of 13 dB is needed to

prevent a significant increase in BER (Fig. 5).

BER for A Signal In The Presence of Co-Channel Interference

Fig. 5 BER versus the ratio of the desired signal to interfering signal (in dB) for the indicated desired signal SNRs of 10 dB, 15 dB and 20 dB. [29]

In contrast, FSK should theoretically be immune to an interfering signal, until the

interfering signal strength is larger than the desired signal. For this reason, FSK

clearly demonstrates superior performance in the presence of co-channel interference.

However, wireless sensor networks must be able to operate in the presence of

25

unreliable link communications [12]. Therefore, a certain susceptibility to channel

interference may be acceptable.

Given that rejection of channel interference is not a critical design parameter and that

a non-coherent OOK transceiver is the simplest and thus, has the least components to

draw power, non-coherent OOK modulation is an attractive option for wireless sensor

networks. Daly and Chandrakasan propose the use of a non-coherent OOK

transceiver for wireless sensor networks [30]. The transmitter is a simple surface

acoustic wave (SAW) resonator connected to a power amplifier. The receiver

consists of an LNA, followed by a series of differential RF amplifiers. The signal is

then fed into a differential voltage rectifier and then amplified using a base band

amplification circuit. Operating at 916.5 MHz, the system consumes only 2.6 mW

when receiving a 1 Mbps signal. This is a significant reduction in the power

requirements compared to other works in the field [4][5][6].

However, the system Daly and Chandrakasan is not without its limitations. Receiver

sensitivity is limited to only -65 dBm [30]. This translates to about 20 m of

transmission range using the ideal free space path loss model. Given that typically

path losses on the order of r3 and even r4 can be expected, -65 dBm is not sufficient to

meet the 10 m goal of wireless sensor networks [4][16]-[20]. In addition, transmitter

efficiency is poor due to a transmitter that requires over 9 mW but transmits only -2.2

dBm. Furthermore, due to the SAW oscillator having a turn on time greater than a bit

26

period, the transmitter cannot be turned off during the transmission of a zero bit. This

effectively doubles the average power requirement of the transmitter.

M-ary vs Binary Modulation

A reduction in transmit time to send a packet could directly lead to energy savings

and extend the operational life time of a sensor node. It then stands to reason that m-

ary modulation which transmits more than one bit per symbol could reduce power

consumption. However, the m-ary transmitter is significantly more complex and as a

result requires more power than a binary modulated transmitter.

( )

⋅

−+

−

+<−

−

onB

stonBFS

TP

TTn

P

nmod

11

1

ββ

α

Eqn. 8. α is the ratio of energy required for m-ary modulation to the energy required for binary modulation.

Through the derivation and analysis of Eqn. 8, the work by Shih et al. concludes that

the transient start up time must be less than the packet transmit time for m-ary

modulation to operate at lower power than binary modulation [22]. α is the ratio of

energy required for m-ary modulation to the energy required for binary modulation

and is a function of the power draw of the frequency synthesizer (PFS-B) and

modulator (Pmod-B) of a binary transceiver; the ratio of power draw for a m-ary

frequency synthesizer versus binary frequency synthesizer, β; the transmission time

(Ton) and startup time (Tst); and n is the number of bits per symbol. The paper

27

admits that this analysis is only valid if the output power of the transmitter is very

small compared to the DC power draw of the transmitter. In other words, the power

of the transmitter must be dominated by the modulation circuitry power requirement,

not the power amplifier power requirement. This is not desirable in a power efficient

transmitter.

Weak Inversion

Up to this point, alternative system architectures and modulation formats have been

explored to improve the power efficiency of a Smartdust receiver. However, the

circuit design and physical implementation of a receiver is also important design

criteria for low power receiver design. For example, work by Enz et al. on the EKV

model (named after the authors Enz, Krummenacher, and Vittoz) suggests that the

operation of RF circuits in weak inversion represents an effective means to lower the

power consumption of receiver designs regardless of the system architecture or

modulation format used [31].

The operation of a transceiver in weak inversion has been examined by researchers at

the Swiss Federal Institute of Technology [32][33][34]. Given a supply voltage of

only 1 V in the .5 um AMI process, the best inversion coefficient (IC) achievable was

10. The inversion coefficient is a measure of the level of inversion of the metal on

silicon field effect transistor (MOSFET) channel and is defined as:

28

s

dc I

II =

Eqn. 9. Inversion coefficient of a MOSFET as defined by EKV model [31].

Where Id is the drain current and Is is the specific current which is defined as a

function of the thermal voltage (VT), gate oxide capacitance (Cox), gate dimensions

(W, L), electron mobility (un), and transconductance of the gate (gmg) and source

(gms):

22 Toxng

ss V

L

WCu

gm

gmI ⋅⋅⋅⋅

⋅=

Eqn. 10. Specific current of a MOSFET as defined by the EKV model [31].

Maximum Frequency vs. IC for Varying MOSFET Gain Levels in the AMI .5 Um Process

Fig. 6 Maximum frequency (f) versus inversion coefficient (IC) for the indicated current gains (G) in the AMI .5 um process [32].

29

Fig. 6 above illustrates that with an IC of only 10, a gain of 18 dB was still achievable

at 433 MHz. Although weak to moderate inversion has a negative impact on the

bandwidth gain product of the MOSFET, it offers a better trans-conductance to DC

current draw ratio [31]. The system achieved the impressive feat of transmitting 24

kbps with a -95 dBm sensitivity and the transmitter was forty percent efficient with

10 dBm output power. However, limiting the carrier frequency to 433 MHz, places

constraints on the minimum antenna size. In addition, the system relied upon external

passives, which also places constraints on minimal system size.

Optics

The use of optical communication has been proposed in the Smart-Dust program at

MIT. The goal is to create a sensor node so small that it can be suspended in air.

This requires a system volume on the order of a cubic millimeter [7]. Optical

communication is well suited for small form factors since an antenna is unnecessary.

In addition, the power necessary to transmit and receive over millimeter distance is

small (sub milliwatt) [7]. However, optical free space communication requires line

of sight. Akyildiz et al. indicate that line of sight may not be dependable in wireless

sensor network communication [12].

30

Passive Tags/RFID

Low power transceivers have been proposed that utilize RF power harvesting to

directly power the system. These designs, which are often referred to as passive radio

frequency identification (RFID) tags, rely on a capacitor for energy storage and do

not carry a battery. Therefore, they must receive enough input RF energy to supply

the instantaneous current demands of the transceiver. Facen and Boni propose a

system that utilizes a full wave rectifier and charge pump to power the transceiver

from the 895.5 MHz received data signal. This system has a predicted operational

range of only 5.3 m [35]. Gregori et al. propose an alternative design that utilizes a

power matched half wave rectifier circuit [36]. This design requires 250 uW of

energy to correctly function. These designs illustrate the primary disadvantage of

passive tags. They typically only operate at close range (<10 m) to strong power

sources.

Current Research in Energy Harvesting

As the demodulating element in the low power receiver and energy source for the

system, RF energy harvesting is a critical component of the research presented in this

work.

31

Alternative Sources for Energy Harvesting

Many works in the literature have proposed alternative sources for energy harvesting.

By reviewing the work done on these alternative techniques, distinct advantages of

RF power harvesting become apparent.

Vibrational energy has been a popular topic for energy harvesting research. The three

techniques for converting vibrational energy to electrical energy are piezoelectric,

electrostatic and electromagnetic. Roundy et al. report that up to 300 uW/cm2 of

electrical power could be generated form vibrational energy in the environment [37].

Measurements on fabricated systems in the same work report 180 uW/cm2 of

electrical power generated when exposed directly to the vibrating case of an operating

microwave oven.

There has been additional work in vibrational energy harvesting. Work by

Shearwood and Yates, and Williams et al. reports .3 uW generated form a 4.4 kHz

source using electro-magnetics and MEMS [38][39]. Meninger et al. model a system

that could generate 8.6 uW [40][41]. Work by Kulah and Najafi reports 2.5 uW at 150

mW theoretical output [42].

The human gait has been examined extensively as a source of energy for vibrational

energy scavenging [43][44]. Amirtharajah and Chandrakasan theorize as much as

400 uW could be generated from the human gait [43].

32

All of these works share one common problem. They all require that the vibrational

energy-scavenging device be connected to specific environmental sources that are

known to have high densities of vibrational energy. Useful environmental sources

seem to be limited by close proximity to microwaves, milling machines, kitchen

blenders, etc [37].

Solar cell efficiencies of twenty five to twenty seven percent have been realized in

recent works [45][46]. Theoretical modeling predicts efficiencies as high at 46.6%

but this has not yet been measured experimentally [47]. Solar power density ranges

from about 100 mW/cm2 outdoors on a sunny day to 100 uW/cm2 for office light

conditions. This ranges from a generated power density of 27 mW/cm2 to 27

uW/cm2. Solar energy is currently under investigation as the power source for the

Smart-Dust program at the University of California at Berkeley [48][49].

Solar energy shows significant potential for outdoor environments, but as indicated

by the lower power density for office lighting conditions, has limited value for indoor

conditions. In addition, the orientation of the solar cell is a critical parameter in the

use of solar power and may not be controllable in a wireless sensor network.

Several works have investigated the generation of electrical energy from thermal

temperature gradients. The efficiency of converting thermal power to electrical

power is limited by the Carnot efficiency [50].

33

high

lowhigh

T

TTN

−=

Eqn. 11. Carnot efficiency of electrical to thermal conversion defined as a function of the high (Thigh) and low (Tlow) temperatures of the thermal gradient.

Useful energy levels are reported for temperature gradients of a few degrees over

short distances (millimeters). One work reported the generation of 40 uW from only

a 5 degree (Celsius) temperature gradient [51] . The device was .5 cm2 by a few

millimeters thick. Other groups have reported similar successes. Thermolife is a

device measuring only 1.4 mm thick and 9.3 mm in diameter and is able to generate

up to 100 uW from a 10 degree (Celsius) temperature gradient [52]. Stordeur and

Stark report 20 uW generated from a 20 degree Celsius temperature gradient [53]

while Strasser et al. have successfully generated 1 uW from a 5 degree Celsius

temperature gradient [54].

Thermo electrics haven’t been confined to low power. Ono et al. report 7.6 mW

generated from 64 degree Celsius temperature gradient [55]. Unfortunately, system

performance degraded to 5.6 mW after 10 days due to increase resistivity of the

Na.7CoO2.

Techniques are also being developed to improve the performance of thermal

scavenging. V-VI materials as well as nano wires are among the device

improvements being investigated [56][57]. A system improvement under

investigation is the use of pulsed outputs to generate a higher average output power

[58].

34

Novel applications and structures for thermal energy harvesting are also under

investigation. Work by Rahman and Shuttleworth has demonstrated a working

system to operate a computer off of thermoelectrically-generated energy [59].

Fleurial at al. have proposed a battery hybrid that can be recharged thermally [60].

Among the more novel structures under investigation, Hasebe et al. have successfully

fabricated flexible devices for scavenging thermal energy that can generate 15.4 uV

per degree Kelvin [61].

The human body has been proposed as a source of thermal energy for energy

scavenging. Jacqout et al, theorize that 60 uW could be generated from the waste

heat of the body [62]. However, this has not yet been realized experimentally.

Unfortunately, little information is available on how common 5 to 10 degree (Celsius)

temperature gradients over short distances are in the environment. Anatychul and

Mikityuk report that thermal differences in soil are highly seasonal [63]. At 25 to 30

cm under the surface, temperature gradients of 15 to 30 degree Celsius are common

in the summer but only 5 to 8 degrees is typical in the winter. Therefore, the ability to

use thermal energy as a source of energy for wireless sensor networks is questionable.

35

RF Energy Harvesting

The environment is full of radiated emissions. Even at a kilometer away from an FM

radio tower, peak indoor power densities better than .5 uW/cm2 can be detected [64].

Similar power densities can be detected at higher frequencies (including cellular

bands) both domestically and internationally [65][66].

Given a radiated frequency of 900 MHz from a cell tower and a simple quarter

wavelength antenna at the RF power harvesting circuit, .5 uW/cm2 equates to

approximately 60 uW of received power (Eqn. 12 and Eqn. 13). This power level is

consistent with the expected received RF energy 150 meters from a cell tower

transmitting at 100 W.

2

2

2 13481

81

~ cmf

cAeff =

⋅=λ

Eqn. 12. Effective area of quarter wavelength antenna as a function of the signal wavelength (λ) or the speed of light (c) and the signal frequency (f).

uWAPcmuW

effreceived 66~5. 2⋅=

Eqn. 13. Power received from a 900 MHz source on a quarter wavelength antenna from an electric field intensity of .5 uW/cm2.

Fundamentally, approximately 60 uW of power is available to recharge a battery or

power a system from the radiated RF power from a cell tower signal at a distance of

over a 100 m.

36

Roundy et al. questions the usefulness of the expected power densities for RF energy

when applied to wireless sensor networks [37]. However, the reported power

densities for RF are for the average amount of RF energy found anywhere in the

environment as compared to energy densities right next to a strong vibrational or

thermal source. If one was to place the RF energy harvesting device within .1 m of

an RF energy source commonly found in the environment, as is done in the case of

reported vibrational and thermal power harvesting experiments [37]-[41][52][52], one

could easily achieve power densities of greater than 450 uW/cm2 from a 250 mW

transmitter such as cell phone. This compares favorably with reported energy

densities for thermal and vibrational energy scavenging.

Voltage Doubler

To generate voltages sufficient for powering wireless sensor nodes from ultra low

power levels, the voltage doubler has been a popular topic for RF energy harvesting

research.

37

Fig. 7 Single stage of a voltage doubler circuit.

Fig. 7 illustrates the basic voltage doubler circuit. An intuitive understanding of this

circuit can be gained by first examining what occurs when current flows in the

direction of I1 (the down swing of the AC current). D2 blocks the flow of current

through C2. As a result, all the current goes across C1. This charges C1 up to roughly

the same level as the peak of the AC voltage. Once, the upswing of the AC cycle (I2)

is reached, the voltage across both the AC source and C1 drop across C2, charging it

to approximately twice the peak voltage of the AC signal [67].

Joe and Chia propose a more rigorous analysis that is based on the diode equivalent

model [68]. The analysis relates the input power to the voltage at the input of the

voltage doubler through a matching circuit as:

ind PRV ⋅⋅= 21

Eqn. 14. Voltage at input to energy harvesting circuit from Joe and Chia model.

38

Rd is the real part of the diode equivalent model impedance and Pin is the input RF

power. V1 is then related to the output voltage of the AC model as:

ddout CR

ViV

⋅⋅

⋅=′ω

1

Eqn. 15. Voltage at output of RF energy harvesting circuit from Joe and Chia model.

Where Cd is the effective capacitance of the diode equivalent model at the desired

angular frequency, ω. Finally, the output DC voltage is defined as the AC output

voltage in series with an internal resistance. The internal resistance is defined as the

inverse of the slope of the diode characteristic curve when the DC current approaches

zero. This is an approximation that assumes the diode acts as a linear junction when

forward biased.

In the case where the diodes are replaced by diode connected NMOS, Yao et al.

provides for an analysis of the expected efficiency of the voltage doubling circuit

[69]. The power lost in a diode connected MOSFET is derived to be:

⋅⋅+= 222

,

1

2

1pc

cilossnmos CR

RVP ω

Eqn. 16. Power loss in NMOS of RF energy harvesting circuit.

39

Where Rc and Cp are the junction resistance and capacitance in the diode equivalent

model for a diode connected MOSFET, ω is the angular frequency, and Vi is the

incident AC voltage to the voltage doubler. Yao et al. use this analysis to show that

the efficiency is maximized at a single distinct load resistance [69]. This result is

supported by the analysis in Joe and Chia [68].

Resonant Voltage Boosting

The work by Yan et al. provides a methodology for boosting output voltage from a

voltage doubler utilizing a resonant tank [70]. A resonant tank is illustrated in Fig. 8.

Fig. 8 Resonant tank boosting circuit.

From the circuit parameters presented in Fig. 8, the output voltage of the resonant

tank which is the source voltage for the voltage doubler is derived by Yan et al. to be:

40

s

sout

RCjQ

LLj

Q

LLj

VV+++

+⋅=

ωω

ω

ωω

1

Eqn. 17. Output voltage from resonant tank circuit and voltage doubler as a function of the circuit parameters defined in Fig. 8.

In the ideal case where Q is extremely high, this can simplify to:

ss

VCL

RVout ⋅⋅=

1

Eqn. 18. High Q approximation of output voltage form resonant tank circuit.

The analysis assumes that the input impedance to the voltage doubler is orders of

magnitude larger than the inductance used in the resonant tank. Given typical

junction capacitances for diodes, this may not be true for large inductances.

Energy Harvesting with Multiple Antennas

Mi et al. propose the use of multiple antennas in the same space (Fig. 9) to increase

the energy generated through RF power harvesting [71].

41

Fig. 9 RF Energy harvesting utilizing multiple antennas in the same space.

The proposed multi antenna design is impedance matched to a voltage doubling

circuit with each antenna connected to its own voltage doubling circuit. Circuit

topologies for connecting the RF energy scavenging antennas in series and parallel

are presented and analyzed.

RF Power Harvested vs. Distance from an RF Source for Various Multi-antenna RF Energy

Harvesting Designs

42

Fig. 10 Power generated from board 1 (single antenna), board 2 (two antennas), and board 3 (four antenns) at various distances form an RF energy source.

A parallel circuit is chosen and experimental measurement (Fig. 10) confirms that the

combined RF power scavenged from a multi-antenna design is four times greater than

the RF power scavenged from a single antenna design. The factor of four power

increase is obtained at an increase in form factor of only 1.83 times the single antenna

area. Thus, the work demonstrates a 300% increase in power while utilizing only

83% more space.

43

Substrate Losses

The work by Heikkinen et al. studies the effect of substrate loss on surface mount

voltage doubler circuits used for RF power harvesting [72]. Surface mount substrates

were modeled and compared including RT 5870, RT 6010 and FR4. RT 5870 was

shown both through simulation and through measurement to provide the best

performance. The work supports that the substrate for surface mount designs must be

chosen to minimize parasitic losses.

Alternative Designs

Inductive coupling utilizes the flux from an electromagnetic field (B), through a loop

of area A, and resistance Rloop, to generate current.

( ) ( )( )

loop

tAB

loop

dtdaBd

RRI ∆

⋅⋅∆∫ ⋅ −=

−=

φcos

Eqn. 19. Current generated on wire loop from electromagnetic flux.

Inductive coupling is a near field technique and as such has limited range. Work in

the literature has reported maximum ranges of 28 mm from an RF signal described

only as high power operating at 4 MHz [73].

The full wave rectifier depicted in Fig. 11 is another alternative to the voltage doubler

circuit.

44

Fig. 11 Full wave rectifier circuit.

However, each swing of the input voltage must overcome two diode threshold

voltages. This is in contrast to the voltage doubler, which only attenuates each swing

of the input voltage through one diode threshold voltage. Therefore, the

characteristics of the full wave rectifier are less favorable for RF power harvesting.

In addition, the maximum voltage out of the full wave rectifier is the voltage at the

input of the rectifier as opposed to twice the input voltage as is the case with the

voltage doubler circuit.

45

Pseudo-Schottky Diode

Fig. 12 Pseudo Schottky RF power harvesting circuit design.

A new approach under investigation is the use of body driven NMOS FETs to reduce

threshold voltage (Fig. 12) [74]. These devices are sometimes referred to as Pseudo-

Schottky diodes. The Pseudo-Schottky diode is an NMOS diode with the body

connected to the gate. Such a device does reduce the body effect and thereby increase

efficiency. However, since one of the MOSFET bulk terminals is connected to

ground and one terminal is connected to a voltage other than ground, isolation must

be provided between bulk terminals. This can be achieved by using a CMOS process

with an n doped substrate and placing the NMOS devices in p doped wells. However,

given that the body of the Pseudo-Schottky diode is driven by an RF signal, such a

device would result in lost efficiency due to excess capacitance between the n doped

bulk and p doped well. Another alternative is to use a silicon-on-insulator process.

46

However, such processes are not as well characterized as bulk CMOS processes

resulting in longer development times and added expense.

Voltage Doubler Stacking

These circuits can be stacked to repeatedly double the initial input peak AC voltage

(minus any parasitic losses) to achieve the desired output voltage. Fig. 13 shows a

chain of four of these circuits stacked together.

Fig. 13 Stacked stages of voltage doubler circuits.

Yao et al. proposes a treatment of the voltage doubler for determining the output

voltage of the voltage doubling circuit [69]. Through recursion, the voltage at the

output of a stacked voltage doubling circuit consisting of n stages is defined as:

( )din VVnV −⋅⋅= 2

Eqn. 20. Output voltage at nth stage of stacked voltage doublers.

47

Where Vi is the voltage incident at the input of the first voltage doubler stage and Vd

is the threshold voltage of the diode or diode connected MOSFET. Harrist proposes

an alternative treatment that defines output voltage as a function of the DC output

voltage and internal resistance of a single voltage doubler stage [67]. Under this

treatment, Vout for an n stage voltage doubler is defined as:

nR

RVR

RRn

VnV

L

LL

out 11

00

0

0

+=⋅

+⋅

⋅=

Eqn. 21. Output voltage of stacked voltage doublers as a function of the output voltage from a single stage with an open load, the load resistance, and the internal DC resistance of the diode.

Where RL is the load impedance, R0 is the internal DC resistance and V0 is open load

voltage of the output of the voltage doubler. A central figure of merit for power

harvesting circuits is the ability to convert input power to an output voltage. Neither

treatment models this effect. Thus, a more comprehensive analysis is desirable.

Conclusions

Given the limitations of the prior works of research to properly address the design

challenges in providing sufficient lifetimes and performance for Smartdust sensor

networks, the purpose of this research is to design, fabricate and test a novel low

power receiver for use in a Smartdust transceiver. Among the performance goals of

the Smartdust receiver are to demonstrate adequate sensitivity for reliable

transmission over 10 m from a 1 mW source in poor propagation environments (close

48

to ground plane, walls, etc.), a receiver power draw on the order of 1 mW, and

integration directly onto CMOS without any external passives. Towards this goal,

several techniques and novel ideas are proposed for improving sensitivity. Among

them is the use of a RF power harvesting circuit for demodulation and development

of an analytical methodology for optimizing a multistage LNA to meet sensitivity

requirements at minimal power draw. In addition several other benefits of the

proposed ideas will be explored including Automatic Gain Control (AGC) and

increased RF pass band filtering.

In an effort to further extend out the lifetime of the Smartdust transceiver, RF power

harvesting is explored as a power source. Work by Roundy et al. has reported that

there is not enough ambient RF energy in the environment to effectively act as a

power source for wireless sensor networks [37]. This work seeks to disprove the

conclusion of Roundy et al. through a careful survey of the RF energy in the

environment and through the application of novel improvements to RF power

harvesting circuits that will improve RF power harvesting efficiency over what has

previously been reported in the literature. To better understand the performance

limitations of power harvesting circuitry, an analytical model is developed by which

the dominant parasitics can be identified under various regimes of operation. The goal

of this work is to generate sufficient voltage to drive analog and digital electronics (>

1 V) from RF energy levels that can be detected from RF sources such as cell towers.

This is in contrast to previous works that have required close proximity to an RF

energy source (<15 m).

49

Chapter 2: Survey of Ambient RF Energy Sources

Introduction

RF wireless electronics play a crucial role in collecting and relaying information in

modern society. To support the wireless transfer of data, an extensive wireless

infrastructure has been established across the country. Examples of this infrastructure

range from the radio and television networks established in the 1920’s and 1940’s

respectively [75] to the more recently established GSM and CDMAone cellular

networks.

As a result of wireless networks, significant RF energy can be detected in the

environment. Even at a kilometer away from an FM radio tower, indoor power

densities better than .5 uW/cm2 can be detected [64]. Comparable power densities

can be detected at higher frequencies both domestically and internationally [65][66]

including the cellular bands near 900 MHz.

Through efficient conversion of this RF energy to DC power, the wireless

infrastructure could serve not only as a communication source, but also as a source of

power. This power source would require no physical tether to utilize. In addition, the

cost of utilizing this source of power represents no additional cost to the wireless

network providers, as RF power harvesting effectively reclaims RF power that would

be absorbed by the environment.

50

The major reluctance in implementing RF energy scavenging from the wireless

infrastructure is whether sufficient RF power to operate portable electronics can

reliably be received. This work seeks to answer that question through an examination

of the amount of RF energy present in the environment.

Survey Methodology

The goal of this research is to perform a comprehensive survey of ambient RF energy

in the environment due to cellular and UHF TV band emissions. This work studies

the RF energy present in the urban and suburban environments (as opposed to rural

areas), because of the abundance of RF wireless sources present to facilitate

communications for the higher population densities characteristic of these areas. This

work will be used to better predict the RF energy levels that can be expected in urban

and suburban areas from RF energy sources common in the environment.

The survey methodology was divided into a spatial and time domain survey. The

spatial survey was conducted by driving through various urban and suburban areas

recording periodic samples of the received RF signal strength from a ¼ whip antenna.

The origin of the survey measurements was identified as urban or suburban to

indicate the effect of population density on RF energy levels.

Urban areas are defined as areas characterized by dense population and large

commercial development. Environmental features are characterized by roads

51

typically laid out in a grid structure between large multi-story buildings. Urban areas

are located in areas that have been incorporated as a city and represent focal points of

trade and commerce for the region [76].

Suburbs are commonly defined as residential areas near a city or large town. Suburbs

are characterized as a collage of large residential zones consisting of single family

homes or multifamily dwellings and commercial zones primarily consisting of single

story buildings [77].

In addition, measurements in suburban areas were subdivided into five additional

categories to compare the effect of different districting types, commercial densities,

and road types on expected RF energy levels.

Highway - Highways are major multi-lane roads with controlled access for

entering and exiting traffic. Highways often pass through both commercial and

non-commercial zones [78].

Commercial Road - Commercials Roads are characterized as roads populated

by retail stores including strip malls, shopping malls, chain restaurants, and

retail parks. These areas are characterized by retail buildings and automobile

parking [79].

52

Non-Commercial Road - Non-commercial roads are characterized by the

absence of commercial or residential buildings. They are often smaller roads

that provide access between commercial and residential areas along paths of

lighter traffic density.

Residential - Residential areas consist of small plots of land populated by single

family or multi-family homes, or larger plots of land populated by apartment

buildings with residual parking lots in between them. Some subdivisions are

isolated form retails areas, offices and other subdivisions by artificial walls and

natural barriers. Most subdivisions are surrounded on all sides by large, multi

lane roads to handle large concentrations of traffic due to the lack of through

streets inside the subdivision itself [80].

Campus - Campus designs are common for public buildings and consist of

complexes of two or more religious, commercial, industrial, governmental, or

educational buildings grouped on a plot of land. Instead of the traditional front

yard and backyard design, the land area is laid out in a more complex system of

spaces between buildings. The spaces between buildings often consist of

courtyards and quadrangles. Colleges are typically laid out in a campus

arrangement [81].

The survey required the ability to log both absolute position and record RF energy

levels at regular intervals. To meet this requirement the RF measurement system

depicted in Fig. 14 was designed.

Fig. 14 Photo of RF energy survey system

53

The survey required the ability to log both absolute position and record RF energy

levels at regular intervals. To meet this requirement the RF measurement system

was designed.

(a)

(b)

of RF energy survey system (a) and illustration of a car mounted survey system (b)

The survey required the ability to log both absolute position and record RF energy

levels at regular intervals. To meet this requirement the RF measurement system

(a) and illustration of a car mounted survey system (b).

54

The system consisted of a ruggedized laptop with built in GPS and an Agilent

Technologies N9340A Handheld Spectrum Analyzer connected to a RE1903U-SM

magnetic mount omni-directional antenna. MATLAB scripting was executed on the

laptop utilizing the Instrument Control Toolbox to remotely interrogate the handheld

spectrum analyzer through a USB port and laptop GPS through a serial port. The

Instrument Control Toolbox provides access to USB and serial ports through the

VISA IO standard. A VISA device driver provides a generic interface by which

MATLAB can communicate with various IO devices including USB and serial ports.

For surveys of spatial fluctuations in received RF energy, the position and signal

strength of the six strongest signal peaks was averaged over two samples and

recorded on the spectrum analyzer every six seconds. Signal peaks were identified by

remotely triggering a marker peak search on the spectrum analyzer remotely from the

MATLAB script running on the laptop. Each RF measurement was associated with a

spatial position measurement obtained through serial interrogation of the internal GPS

in the laptop. The GPS data acquired from the laptop is presented in the industry

standard NMEA format. When measuring fluctuations in received RF signal strength

over time, time stamp data was logged in addition to the position, strength and

frequency of RF measurements. The full set of data was saved to a tab delimited

ASCII text file. In addition, for spatial surveys of RF energy the data was saved to a

KML script with color coded pictorial representation of signal strength for easy

import into Google Earth. An illustration of the algorithm implemented by the

MATLAB code to acquire spatial and temporal data is presented in

full code utilized to acquire and process data is presented in Appendix B.

(a)

Fig. 15 Algorithm utilized in monitoring temporal fluctuations in rec

55

MATLAB code to acquire spatial and temporal data is presented in Fig. 15

full code utilized to acquire and process data is presented in Appendix B.

(b)

Algorithm utilized in monitoring temporal fluctuations in received RF energy (a) and spatial fluctuations in received RF energy (b).

Fig. 15, and the

full code utilized to acquire and process data is presented in Appendix B.

eived RF energy (a) and spatial

56

The RF energy survey targeted RF frequency bands commonly utilized throughout

the country. The UHF TV band located between 470 and 806 MHz and the cellular

CDMAone/GSM bands located in the frequency bands of 824-849 MHz, 869-894

MHz, 896-901 MHz, and 935-940 MHz are utilized in communications infrastructure

where very broad coverage is required. This coverage is achieved for the UHF TV

band through a high power source (up to 1 MW) centralized to one tower. These

systems utilize one tower to cover areas greater than 50 miles [82]. Cellular systems,

on the other hand, utilize many lower power (< 500 W) broadcast towers to cover an

area. The area that each cellular tower covers varies greatly, but is typically limited

to a few miles [83]. Thus, given the wide coverage of the UHF TV and cellular

bands, the RF frequency band between 500 MHz and 1 GHz was monitored. This

range was large enough to sample the RF bands of interest, but small enough to allow

a new sample every six seconds.

The antenna used for measurement was the RE1903U-SM 900/1800/1900 MHz tri-

band 3 dBi magnetic mount omni-directional antenna. To calibrate the antenna

measurements to a 0 dBi monopole, the signal strength received by the antenna from

a known power source was measured from 100 MHz to 2.5 GHz over a known

distance of 1.25 meters. The gain of the antenna could then be calculated from Eqn.

22 [84].

−=

PP

Gtransmitedreceived

antenna

Eqn. 22. Gain as determined from two matching antennas place a distance d from each other

Fig. 16 presents the resulting gain as a function of frequency for the collection

antenna.

Fig. 16 Antenna gain of RE1903U anetnna versus frequency.

By subtracting the antenna gain from the measured signa

signal incident on a 0 dBi monopole could be calculated.

detected in the survey range (500 MHz to 1GHz) was about

scope sample bandwidth was set to enable a scope sensitivity of

enables a measurement sensitivity of

gain monopole antenna.

57

2

4log20 10

⋅⋅⋅+

λπ d

transmited

Gain as determined from two matching antennas place a distance d from each other

presents the resulting gain as a function of frequency for the collection

Antenna gain of RE1903U anetnna versus frequency.

By subtracting the antenna gain from the measured signal strength, the received

signal incident on a 0 dBi monopole could be calculated. The lowest antenna gain

detected in the survey range (500 MHz to 1GHz) was about -21 dBm. Therefore the

scope sample bandwidth was set to enable a scope sensitivity of -85

enables a measurement sensitivity of -65 dBm after calibrating to the theoretical unity

Gain as determined from two matching antennas place a distance d from each other.

presents the resulting gain as a function of frequency for the collection

l strength, the received

The lowest antenna gain

21 dBm. Therefore the

85 dBm. This

65 dBm after calibrating to the theoretical unity

58

Spatial Survey Measurements

A spatial survey was conducted of the RF energy levels present in the environment.

The test was conducted between the hours of 9 am to 4 pm on weekdays between the

dates of April 15th, 2008 and June 15th, 2008 in the greater Baltimore-Washington

area. The survey was conducted in both urban and suburban environments allowing

for analysis on the effect of population density and land use on expected RF signal

strength.

Suburban

Measurements for RF energy levels present in suburban areas were carried out in the

I-295/95 corridor between Baltimore, Maryland and Washington, D.C. As described

in the previous section on survey methodology, measurements were taken in a variety

of settings ranging from residential and campus areas to commercial roads and

highways. Received RF power was normalized to the unity gain monopole antenna

and then converted to KML format with RF strength indicated by color coded circles

at measurement locations. Fig. 17 and Fig. 18 give example images of RF signal

strength measurements in suburban settings.

59

Fig. 17 Overhead views of RF signal strength for commercial area.

Fig. 18 Overhead views of RF signal strength for campus area.

The first metric by which the

signal strength detected during the survey.

Fig. 19 Peak RF signal strength received by survey system for each suburban landscape type.

As indicated by Fig. 19, RF energy levels as high as

commercial roadways of the suburban environment by a monopole antenna. The

peak signal levels detected in the other four regions were not quite as high

represented significant energy levels at ~

gain, this represents tens of microwatts of available RF energy.

To better understand the

curves of the RF power

plotted in Fig. 20.

60

The first metric by which the suburban areas was evaluated by was the peak RF

signal strength detected during the survey.

eak RF signal strength received by survey system for each suburban landscape type.

, RF energy levels as high as -11.7 dBm can be detected on the

commercial roadways of the suburban environment by a monopole antenna. The

peak signal levels detected in the other four regions were not quite as high

represented significant energy levels at ~-20 dBm. Even in the absence of antenna

gain, this represents tens of microwatts of available RF energy.

To better understand the likely hood of receiving such strong RF levels,

RF power received by the strongest RF source (narrowband)

suburban areas was evaluated by was the peak RF

eak RF signal strength received by survey system for each suburban landscape type.

11.7 dBm can be detected on the

commercial roadways of the suburban environment by a monopole antenna. The

peak signal levels detected in the other four regions were not quite as high but still

20 dBm. Even in the absence of antenna

of receiving such strong RF levels, distribution

RF source (narrowband) were

Fig. 20 Distribution of peak RF signal strength received by survey system for

Fig. 20 shows that strong peak RF levels on the order of

available in significant quantity along commercia

RF levels were generally limited to

weak in residential areas and along non commercial roads with over 97% of the

samples detected at RF levels of

Broadband collection of RF energy has been proposed as a way to increase the

amount of energy collected from the environment

increase in RF energy detected by summing the six strongest RF sources collected

(broadband) collection over narrowband peak collection for each suburban setting

61

Distribution of peak RF signal strength received by survey system for each suburban landscape type.

hows that strong peak RF levels on the order of -20 dBm or better are only

available in significant quantity along commercial roadways. In the other regions,

RF levels were generally limited to -25 dBm or lower. RF levels were particularly

weak in residential areas and along non commercial roads with over 97% of the

samples detected at RF levels of -25 dBm or less.

Broadband collection of RF energy has been proposed as a way to increase the

amount of energy collected from the environment [85]. Fig. 21 presents the average

increase in RF energy detected by summing the six strongest RF sources collected

(broadband) collection over narrowband peak collection for each suburban setting

each suburban

20 dBm or better are only

l roadways. In the other regions,

25 dBm or lower. RF levels were particularly

weak in residential areas and along non commercial roads with over 97% of the

Broadband collection of RF energy has been proposed as a way to increase the

presents the average

increase in RF energy detected by summing the six strongest RF sources collected

(broadband) collection over narrowband peak collection for each suburban setting.

Fig. 21 Increase in avaible energy from broadband collection over narrowband collection

This demonstrates that integration over a broad energy spectrum

received RF energy. However,

order of magnitude increase one might hope for. This is a result of the large variation

in the strength of RF energy received by various sources. The strongest RF signal

source tends to dominate received RF energy

roadways, this represents RF levels of

third of the measurements (

62

Increase in avaible energy from broadband collection over narrowband collection

This demonstrates that integration over a broad energy spectrum does increase

received RF energy. However, the increase is only about 3 dB as opposed to the

magnitude increase one might hope for. This is a result of the large variation

in the strength of RF energy received by various sources. The strongest RF signal

source tends to dominate received RF energy. However, in the case of commercial

his represents RF levels of -25 dBm or higher present during almost one

third of the measurements (Fig. 22).

Increase in avaible energy from broadband collection over narrowband collection.

increase total

as opposed to the

magnitude increase one might hope for. This is a result of the large variation

in the strength of RF energy received by various sources. The strongest RF signal

. However, in the case of commercial

25 dBm or higher present during almost one

Fig. 22 Comparison of the distribution of received RF signabro

UHF TV broadcast and cellular signals are known sources of RF power in suburban

communities. The data indicates that there is significantly more power in the UHF

TV band than in the cellular band

pronounced in the residential areas and non

the result of poorer cellular coverage in those areas.

received energy in the UHF TV and cellular bands,

RF signal detected in the UHF

type of suburban setting.

63

Comparison of the distribution of received RF signal strength for narrowband collection and broadband collection in a commercial setting

UHF TV broadcast and cellular signals are known sources of RF power in suburban

communities. The data indicates that there is significantly more power in the UHF

TV band than in the cellular band in suburban areas. This result is particularly

in the residential areas and non-commercial roadways and appears to be

the result of poorer cellular coverage in those areas. To illustrate the difference in

received energy in the UHF TV and cellular bands, Fig. 23 plots the increase in peak

the UHF TV band over that detected in the cellular band in each

or narrowband collection and

UHF TV broadcast and cellular signals are known sources of RF power in suburban

communities. The data indicates that there is significantly more power in the UHF

This result is particularly

commercial roadways and appears to be

illustrate the difference in

plots the increase in peak

etected in the cellular band in each

Fig. 23 Increase in received RF signal strength fnarrowband collection in a

On average, over 16 dB more power was detected in the UHF TV band than in the

cellular band in residential suburban settings. However

present in the UHF TV and cellular bands is more equitable in the commercial

roadways, highways and campus settings. This is likely due to the increased call

volume resulting from the higher population density of these areas over non

commercial and residential areas. The

cellular channels [86], and a

64

received RF signal strength for UHF narrowband collection overnarrowband collection in a various suburban areas.

On average, over 16 dB more power was detected in the UHF TV band than in the

cellular band in residential suburban settings. However, the amount of RF energy

TV and cellular bands is more equitable in the commercial

roadways, highways and campus settings. This is likely due to the increased call

volume resulting from the higher population density of these areas over non

commercial and residential areas. The increased demand necessitates the use of

and as a result, more RF energy is present in the environment.

collection over cellular

On average, over 16 dB more power was detected in the UHF TV band than in the

, the amount of RF energy

TV and cellular bands is more equitable in the commercial

roadways, highways and campus settings. This is likely due to the increased call

volume resulting from the higher population density of these areas over non

the use of more

more RF energy is present in the environment.

65

In summary, a link was demonstrated between the availability of RF energy and

population density. A greater average RF energy was obtainable in more densely

populated areas such as campuses and commercial roadways than in the more lightly

populated residential and non-commercial roadways. In addition broadband collection

of RF energy showed only a limited 3 dB increase in RF energy collected. This is

likely a result of the low number of carrier channels necessary to meet the call

demand requirements of areas with lower population density.

Distinctions were also present in the availability of RF energy between UHF TV

bands and cellular bands. The suburban environment demonstrated that RF energy

present in the UHF TV band is on average stronger than that found in the cellular

band. In residential and non-commercial roadways, the difference in energy available

in the two bands was dramatic, resulting in up to 16 dB difference in average energy

received.

Urban

The measurements for an urban environment were conducted in Baltimore, MD and

in Washington, DC. As was done with the suburban measurements, the measured

data normalized to the gain of a unity gain monopole antenna was saved in KML

format enabling the data to be plotted using Google earth. Color coding was used to

indicate RF signal strength at the indicated positions. Fig. 24 and Fig. 25 illustrate the

data that was measured in both Baltimore, MD and Washington, DC.

66

Fig. 24 Overhead view of RF energy measurements in Baltimore, MD.

67

Fig. 25 Overhead view of RF energy measurements in Washington, DC.

Although the peak RF signal level measured in the urban environment of -15.2 dBm

is lower than the peak signal received in the commercial area of a suburban

environment, it is apparent after conducting the survey that overall the urban

environments host significantly higher RF energy levels than suburban regions. This

is supported in Fig. 26 which compares the distribution curves of the strongest

received narrowband signal in an urban environment to the narrowband signal

strength in the suburban environment.

Fig. 26 Comparison of the distribution of peak received RF signal strength in an urban and suburban

Urban environments have on average

environments. However, as was the case in suburban environments, broadband

collection yields only about a 3 dB increase in collected RF energy. Therefore,

despite the presence of more RF energy, the total energy collected is still dominat

by the presence of one or two particularly strong sources in any one spot.

In suburban areas it was apparent that UHF TV was the strongest source of RF

energy. However, in urban areas, the level of power available from cellular and UHF

TV is considerably more equitable (

much stronger cellular coverage and is likely due to the use of many cell sites within

a smaller coverage range to meet call demand requirements in urban areas.

68

Comparison of the distribution of peak received RF signal strength in an urban and suburban setting.

rban environments have on average over 4 dB more energy than suburban

However, as was the case in suburban environments, broadband

collection yields only about a 3 dB increase in collected RF energy. Therefore,

despite the presence of more RF energy, the total energy collected is still dominat

by the presence of one or two particularly strong sources in any one spot.

In suburban areas it was apparent that UHF TV was the strongest source of RF

energy. However, in urban areas, the level of power available from cellular and UHF

considerably more equitable (Fig. 27). This would appear to be the result of

much stronger cellular coverage and is likely due to the use of many cell sites within

a smaller coverage range to meet call demand requirements in urban areas.

Comparison of the distribution of peak received RF signal strength in an urban and suburban

y than suburban

However, as was the case in suburban environments, broadband

collection yields only about a 3 dB increase in collected RF energy. Therefore,

despite the presence of more RF energy, the total energy collected is still dominated

by the presence of one or two particularly strong sources in any one spot.

In suburban areas it was apparent that UHF TV was the strongest source of RF

energy. However, in urban areas, the level of power available from cellular and UHF

This would appear to be the result of

much stronger cellular coverage and is likely due to the use of many cell sites within

a smaller coverage range to meet call demand requirements in urban areas.

Fig. 27 Comparison of the distribution of peak received RF signal strength in the UHF and cellular

In summary, the urban environment demonstrated more RF en

cellular and UHF TV sources than its suburban counterpart. RF energy was equally

abundant in both the cellular and UHF bands.

environment, in an urban environment the ability to conduct broad

scavenging showed only a 3 dB improvement

available from narrowband collection of the peak carrier.

in the environment in the cellular and UHF TV bands appears to be dominated by one

or two strong RF sources.

69

Comparison of the distribution of peak received RF signal strength in the UHF and cellular bands of an urban setting.

In summary, the urban environment demonstrated more RF energy available from

cellular and UHF TV sources than its suburban counterpart. RF energy was equally

abundant in both the cellular and UHF bands. However, as with the suburban

environment, in an urban environment the ability to conduct broadband RF energ

only a 3 dB improvement in collected energy over the energy

available from narrowband collection of the peak carrier. Thus, available RF energy

in the environment in the cellular and UHF TV bands appears to be dominated by one

trong RF sources.

Comparison of the distribution of peak received RF signal strength in the UHF and cellular

ergy available from

cellular and UHF TV sources than its suburban counterpart. RF energy was equally

as with the suburban

band RF energy

in collected energy over the energy

Thus, available RF energy

in the environment in the cellular and UHF TV bands appears to be dominated by one

70

Time Domain Survey Measurements

The energy received from cellular and UHF TV sources vary with time [86]. To

determine the extent of this power fluctuation, the RF signal strength received at two

different locations was monitored over a week long period. As was done with the

spatial measurements, the frequency and amplitude of the top six RF signal levels

were recorded. Samples were recorded every minute and the received signal strength

was averaged over two samples. The spectrum was monitored from 50 MHz to 2.95

GHz. Both cellular and UHF band data was gathered at location 1. At location 2,

while cellular data was gathered, the UHF signal was below -80 dBm and therefore

no measurement was obtainable.

TABLE I STATISTICAL MEASUREMENTS OF THE RECEIVED SIGNAL STRENGTH OF CELLULAR AND UHF SIGNALS OVER TIME.

UHF TV Location 1 Cellular Location 1 Cellular Location 2

Maximum -21.19 -47.20 -38.37

Minimum -32.08 -59.36 -48.83

Mean -27.71 -56.81 -43.48

Median -27.85 -56.90 -43.17

Standard

Deviation 1.356 .878 1.528

Range 10.89 12.16 10.45

TABLE I presents a statistical summary of the data gathered. As expected, the power

received varied greatly. The range over which the RF energy was received varied for

both the cellular and UHF TV measurements was approximately 10 dB. This

represents a variation of up to an order of magnitude in received RF energy. Such

large variation in received energy suggests that the availability of sufficient RF

energy for RF energy scavenging may be int

necessary to allow the energy received to be integrated over time. This variation over

time is illustrated in Fig. 28

Measurement of Peak Received Over Time at Location 1

Fig. 28 Measurement of peak sign

The arrows indicated in Fig. 28

to close proximity to a cellular handset engaged in an active call. This demonstrates

that proximity to an active handset presents a significant but short lived source of RF

energy. The RF energy rec

10 dB greater than the average strength of the received signal from the cell tower.

71

represents a variation of up to an order of magnitude in received RF energy. Such

large variation in received energy suggests that the availability of sufficient RF

energy for RF energy scavenging may be intermittent. Thus energy storage will be

necessary to allow the energy received to be integrated over time. This variation over

Fig. 28 through Fig. 31 below.

Measurement of Peak Cellular Signal Strength Received Over Time at Location 1

Measurement of peak signal strength received over time in the cellular band at location 1.

Fig. 28 illustrate the increase in received RF emanations due

to close proximity to a cellular handset engaged in an active call. This demonstrates

that proximity to an active handset presents a significant but short lived source of RF

energy. The RF energy received as a result of close proximity to a hand set

ater than the average strength of the received signal from the cell tower.

represents a variation of up to an order of magnitude in received RF energy. Such

large variation in received energy suggests that the availability of sufficient RF

ermittent. Thus energy storage will be

necessary to allow the energy received to be integrated over time. This variation over

the cellular band at location 1.

illustrate the increase in received RF emanations due

to close proximity to a cellular handset engaged in an active call. This demonstrates

that proximity to an active handset presents a significant but short lived source of RF

close proximity to a hand set is up to

ater than the average strength of the received signal from the cell tower.

An additional feature of interest found in

energy is significantly lower during the first several days than during the following

days. The first two days represent the fourth of July weekend and would suggest that

major holidays represent a period of lower cell phone use and consequentially lower

levels of RF energy present from cellular communications.

In addition, Fig. 28 seems to show

energy rises and falls during the course of each day. To better illustrate this behavior,

Fig. 29 plots the received RF measurements as a function of the time of day.

Peak Cellular

Fig. 29 Measurement of peak sign

72

An additional feature of interest found in Fig. 28 is that the variation in received RF

energy is significantly lower during the first several days than during the following

days. The first two days represent the fourth of July weekend and would suggest that

represent a period of lower cell phone use and consequentially lower

levels of RF energy present from cellular communications.

seems to show a periodic pattern as the average amount of RF

energy rises and falls during the course of each day. To better illustrate this behavior,

d RF measurements as a function of the time of day.

Cellular Signal Strength Received During the Course of the Day at Location 1

Measurement of peak signal strength received over time in the cellular band at location 1 as a function of time of day.

is that the variation in received RF

energy is significantly lower during the first several days than during the following

days. The first two days represent the fourth of July weekend and would suggest that

represent a period of lower cell phone use and consequentially lower

a periodic pattern as the average amount of RF

energy rises and falls during the course of each day. To better illustrate this behavior,

d RF measurements as a function of the time of day.

the cellular band at location 1 as a

73

Fig. 29 clearly indicates that on average, received RF energy is greatest during the

morning period and decreases trough the afternoon until reaching a minimum during

the early evening. However, the periodic nature of the received RF energy from a cell

tower during the course of a day results in less than a 1 dB variation in average

received RF energy.

Measurement of Peak Cellular Signal Strength Received Over Time at Location 2

Fig. 30 Measurement of peak signal strength received over time in the cellular band at location 2.

Like the measurements of received RF signal strength in the cellular band in Fig. 28,

Fig. 30 clearly indicates a periodic structure in transmitted RF energy by the cell

tower near location 2. However, unlike the measurements in Fig. 28, the periodic

structure in RF energy manifests itself as a reduction in minimum RF energy received

by the cell tower for 24 hours every fourth day. The RF energy clearly drops at

midnight before returning to normal levels 24 hours later. This behavior appears to

Wed 6/25/08Thurs 6/26/08Fri 6/27/08Sat 6/28/08Sun 6/29/08Mon 6/30/08Tues 7/1/08Wed 7/2/08Thurs 7/3/08Fri 7/4/08 Sat 7/5/08 Sun 7/6/08Mon 7/7/08Tues 7/8/08Wed 7/9/08-50

-48

-46

-44

-42

-40

-38

Date

RF

Sig

nal

Str

eng

th (

dBm

)

Peak Signal StrengthSignal Strength MeanStandard Deviation

74

be intended by the operators of the monitored cell tower. However, during these

periods of low minimum power, peak signal levels comparable to that detected during

periods of higher minimum power were still detected.

Measurement of Peak UHF TV Signal Strength Received Over Time at Location 1

Fig. 31 Measurement of peak signal strength received over time in the UHF TV band at location 1.

The received RF signal strength from the UHF TV tower near location 1 showed no

periodic structure as indicated in Fig. 31. Significant variations in received RF

energy did occur as illustrated by the rise in RF energy received on 4/6/08. Given

that UHF TV does not implement power management, these variations in signal

strength are likely the result of environmental conditions.

In summary, fluctuations in received RF energy of up to 10 dB were observed during

the measurement period. In addition, close proximity to active cellular handsets

Wed 4/2/08 Thurs 4/3/08 Fri 4/4/08 Sat 4/5/08 Sun 4/6/08 Mon 4/7/08 Tues 4/8/08 Wed 4/9/08 Thurs 4/10/08 Fri 4/11/08-34

-32

-30

-28

-26

-24

-22

-20

Date

RF

Sig

nal S

tren

gth

(dB

m)

Peak Signal StrengthSignal Strength MeanStandard Deviation

75

represents an increase of up to 10 dB over the average power available from the cell

tower, but is available for only brief durations (minutes). A periodic structure in the

received RF energy received from a cell tower was observed at two measurement

locations while the received RF energy from UHF TV transmissions demonstrated no

periodic structure. This suggests that daily variations in network demand and power

management techniques implemented by cellular systems have a modest but

predictable impact on the average RF energy levels detected in the environment.

Conclusions

The RF energy survey presented in this work represents a major investment in time

with over thirty thousand samples collected and two hundred miles driven over a two

month period. This data provides a tool by which the probability of receiving a given

RF power level can be predicted under a variety or suburban and urban landscapes.

In addition, time domain analysis has resulted in a clearer picture of how signal

power received from both UHF TV and cellular sources can fluctuate with time.

The strongest signal measured during the course of this work was -11.7 dBm,

supporting the result of prior works that RF energy levels as high as -12 dBm can be

detected in the environment from UHF and cellular sources. In addition, by

examining the distribution of energy levels present in the environment, this work

reveals that RF signal levels on the order of -20 dBm are consistently detected in

76

close proximity (< 200 meters) to cell towers and are encountered about five to ten

percent of the time during travel in urban and commercial areas.

In addition, this work has revealed some of the properties and characteristics of RF

energy present in the environment from cellular and suburban sources including:

1. RF energy levels are on average higher in urban areas than suburban

areas.

2. Cellular towers are typically placed at the intersections of major roads

resulting in stronger RF energy levels.

3. RF energy present in the environment from UHF TV signals is on average

stronger than that of cellular signals in suburban areas.

4. In urban areas, power present form UHF TV and cellular communications

are comparable.

5. Over time, signal levels received from both UHF TV and cellular

communications vary by an order of magnitude or greater.

6. Close proximity to cellular handsets presents opportunities for significant

increases in RF energy received over short durations.

7. Holidays can significantly affect the peak available RF energy from

cellular networks.

8. Fluctuations in the demand for cellular networks over the course of a day

result in a modest periodic change in average received RF energy.

77

9. Power management techniques implemented by cellular providers can

result in periodic variation over the course of several days in expected

received RF energy from a cell tower.

10. Broadband collection of RF energy represents, on average, a 3 dB

increase in received RF energy over narrowband reception.

The RF to DC conversion efficiency of RF energy scavenging systems is highly

dependent upon the power of the RF signal received. By gathering expected signal

strength data over time and for various landscapes, this work presents the necessary

information by which the ability of past, current, and future research in RF energy

scavenging systems to provide efficient conversion of RF to DC power can be

measured. Thus, the suitability of an RF energy scavenging technology for a given

deployment can be more effectively predicted.

78

79

Chapter 3: Modeling the Power Matched Villard Voltage Doubler

Introduction

A common approach to RF energy scavenging employs the power matched Villard

voltage doubler circuit. In solid state circuits, the diodes used for rectification are

typically replaced with diode connected MOSFETs. This approach facilitates the

integration of these circuits directly onto CMOS by using diode structures that are

easily realized on most CMOS processes. The difficulty in the design of Villard

voltage doublers that employ diode connected MOSFETs is that of determining

proper sizing for the MOS transistors.

Fig. 32 Illustration of a cascaded multi-stage Villard voltage doubler.

The core cell of the Villard voltage doubler can be stacked sequentially to repeat the

doubling effect of the input voltage (Fig. 32). Several systems have demonstrated

this technique to good effect and realized improved RF to DC conversion efficiency

at lower input power levels [67],[69]. However, as is the case with transistor sizing,

80

determining the number of stages for optimal RF to DC conversion presents a

challenging problem in the design of multi-stage Villard voltage doubler systems.

The most common technique used to optimize transistor sizing and the number of

stages in Villard voltage doubler system is an iterative approach that relies on

harmonic balance or time domain circuit simulations. This approach is both time

consuming, difficult to optimize for multiple design variables, and fails to provide a

tool by which the effects of device parasitics can easily be explored.

An alternative solution is to develop an analytical model by which the relevant

system variables including transistor size, number of stacked stages, and threshold

voltage for an energy scavenging circuit can be optimized. Previous works in

modeling RF energy scavenging circuits predict performance over a fairly narrow

region of operation and often fail to analytically relate the physical design parameters

(transistor width, number of cascaded stages, parasitics) to the performance of the

circuit [69],[68]. These restrictions limit their suitability for performing design

optimizations of the Villard voltage doubler circuit.

This work expands upon these previous works through the development of a model of

the Villard voltage doubler that is derived directly from its physical realization and

design parameters. This model provides a unique tool to examine the complete

design space of the Villard voltage doubler and quickly determine the single most

efficient design to meet the output voltage and load requirements at the minimum

81

possible input RF power. In addition, this model allows identification of the

fundamental limits of RF to DC conversion efficiency as circuit parameters are

changed and parasitics are added or removed.

Design Methodology

TABLE II MODEL PARAMETERS

Process Variables Vth MOSFET threshold voltage Wsingle Width of a single finger of the MOSFET gate Leff Effective length of MOSFET gate n MOSFET capacitance ratio Vt Thermal voltage

FC Forward-bias depletion capacitance coefficient M Bottom junction capacitance grading coefficient Eox Permittivity of gate oxide Tox MOSFET gate oxide thickness Rres Sheet resistance of MOSFET gate nf Number of fingers for MOSFET gate Ivth drain-source current at threshold voltage Rs Contact and metal resistance of gate Cj,area Depletion region capacitance per unit area Cj,per Depletion region capacitance per unit length γ Channel length modulation parameter un Mobility Rsx Source resistance due to velocity saturation Y Junction potential Ajunc Area of PN junction Pjunc Perimeter of PN junction Circuit Variables Vout,Vinc input AC voltage or DC output voltage f RF frequency Rout Impedance of output load ns number of stacked voltage doubler stages Dependant Variables Cox Eox/Tox K (un*Cox*Weff/Leff)/2; Weff nf*Wsingle

82

The development of an analytical methodology for solving the power matched Villard

voltage doubler begins with the derivation of an analytical model for the diode. The

variables necessary for this model are presented under process variables in TABLE II.

This diode model is used to determine the performance of the rectifying element

when inserted into the Villard voltage doubler circuit. Upon completion of the diode

model, proper analysis of the Villard voltage doubler circuit involves DC loop

analysis and AC nodal analysis. The DC loop analysis serves as the tool by which an

output DC voltage can be related to the incident AC voltage. The AC nodal analysis

provides the means by which the input RF energy necessary to generate a given

incident AC voltage can be determined.

Modeling the Rectification Structure

Due to the popularity of integrating RF scavenging circuits directly onto CMOS, the

diode connected MOSFET is a common choice as the rectification element in a

Villard voltage doubler (Fig. 33).

Fig. 33 Illustration of diode connected MOSFET

83

To determine a large signal model, it is necessary to identify the resistance of the

rectifying structure, as well as any sources of parasitic impedance.

Fig. 34 Illustration of substrate connections for diode connected MOSFET and the associated sources of parasitic.

Fig. 34 illustrates the physical realization of the diode connected MOSFET and

identifies the MOSFET elements and parasitics that contribute to modeling the diode

connected MOSFET.

84

(a)

(b)

(c)

Fig. 35 Large signal model of diode connected MOSFET that is forward biased (a), reverse biased (b) and general case (c) .

85

The resulting large signal model for the diode connected MOSFET that has been

forward biased, reverse biased and a general model that is valid in either regime of

operation is presented in Fig. 35. In Fig. 35b, the path for the gate parasitics is

dashed to indicate that although present, Cgd is approximately zero when the diode

connected MOSFET is reverse biased, effectively negating any contribution to the

impedance presented by the diode connected MOSFET. The total impedance

presented by the diode connected MOSFET is the cumulative result of the rectifying

channel resistance when forward biased, Rds(t); the gate parasitics, Cgd(t) and Rgd(t);

the parasitic capacitance due to the PN junction at the drain, Cbd(t); and finally the

leakage current across the MOSFET channel when reverse biased, Rleak(t).

The channel resistance, Rds(t) due to the rectifying path is derived from the channel

current for the MOSFET. As indicated in Eqn. 23, the channel current for a diode

connected MOSFET that is forward biased is modeled by the transconductance

equations for a MOSFET in three separate regions based on the level of inversion of

the channel between the drain and source where Vds(t) is equal to Vgd(t) [87].

( ) ( )( ) thds

thdssx

dsthdsds

thdsT

ds

T

thdsvth

eff

effds

dsds

VtVVtVRK

tVVtVKtI

VtVV

tV

Vn

VtVI

L

WtI

tVtI

>−⋅⋅⋅+

⋅+⋅−⋅=

<<

−−

⋅

−⋅⋅=

<=

)()(21

)(1)()(

)(0)(

exp1)(

exp)(

0)(0)(

2 γ

Eqn. 23. Channel current of a diode connected MOSFET.

86

The parameters used in Eqn. 23 include the dimensions of the MOSFET (Weff, Leff),

channel length modulation parameter (γ), source resistance due to velocity saturation

(Rsx), MOSFET capacitance ratio (n), thermal voltage (VT), drain source current at

threshold (Ivth), and parameter K defined in TABLE II.

It’s important to note that the PN junction formed between the body and drain is

forward biased at the same time that Vds is greater than Vth allowing current to flow

across the channel of the MOSFET. However, current lost to the PN junction (Ipn) is

very small compared to the channel current, Ids and can be modeled simply as a

reduction in threshold voltage [88]. Ids dominates Ipn because the MOSFET threshold

voltage is less than the junction potential of the PN junction and thus turns on more

quickly.

Given that Vds(t) and Ids(t) are a function of time, and the performance of the circuit is

governed by the average resistance over a period of the input RF signal presented

between the drain and source, Rds is derived to be:

( )( ) ( )( )tItV

VR

dsds

rmsds

ds⋅

=2

Eqn. 24. Effective large signal channel resistance of a diode connected MOSFET.

Where Vdsrms is equal to the rms value of Vds(t) while forward biasing the rectification

structure.

87

The second path is a result of the AC coupled path between the gate and the drain and

is a product of the combined contribution of the gate capacitance and the gate

resistance derived in Eqn. 25 and Eqn. 26. Fig. 34 presents a simplified view of the

gate resistance as the sheet resistance of the polysilicon gate. A more complex view

of the gate resistance used in this analysis is presented by the work in [89] and models

the gate resistance as a function of the polysilicon sheet resistance and the channel

resistance.

0)(0

0)(3

2

>=

≤⋅⋅⋅=

tVC

tVLWCC

dsgd

dseffeffoxgd

Eqn. 25. Gate capacitance of a diode connected MOSFET.

⋅⋅⋅⋅⋅++

⋅

⋅⋅=

toxneff

effs

efff

effresg VCuWn

LR

Ln

WRR

12

1

12

12

Eqn. 26. Gate resistance of a diode connected MOSFET [89].

The gate resistance, Rg is a function of the sheet resistance of the gate (Rres), transistor

size (Weff, Leff), number of gate fingers (nf), mobility (un), oxide capacitance per unit

area (Cox), thermal voltage (VT), and total resistive losses due to layout connections to

the gate (Rs). The quantity 1/12 is a fitting parameter.

88

The third path is formed at the PN junction between the drain and the body indicated

in Fig. 34. This path contributes to the parasitic capacitance of the junction. The

resulting expressions for Cbd is a time average of the junction capacitance (Cj(t)) over

a single period of the RF signal.

( )tCC jbd =

Eqn. 27. Large signal capacitance of the PN junction formed between the body and drain.

Where Cj(t) is the time dependant instantaneous capacitance of the PN junction as

modeled under the BSIM 3.3 model [90].

( )

( )( ) YFCtVYFCtV

FCY

M

FC

PCACtCj

YFCtV

Y

tV

PCACtC

dsds

M

juncperjjuncareaj

dsM

ds

juncperjjuncareaj

j

⋅>

⋅−×

−×+⋅

−

⋅+⋅=

⋅≤

−

⋅+⋅=

)()(1

1

1)(

)()(

1

)(

,,

,,

Eqn. 28. Instantaneous capacitance of the PN junction formed between the body and drain [90].

The instantaneous capacitance of the PN junction (Cj(t)) is a function of the per unit

area junction capacitance (Cj,area), per unit perimeter junction perimeter (Cj,per), area of

89

the junction (Ajunc), perimeter of the junction (Pjunc), junction potential (Y), grading

coefficient (M), and forward bias depletion capacitance coefficient (FC).

The final path is a result of the leakage current through the MOSFET that is reverse

biased. An ideal MOSFET allows no current to flow when off, but in practice small

amounts of current flow when in the off state. This effect can cause minor impedance

changes for a voltage doubler under low power operation and is modeled by Rleak.

( )

−−

⋅

−⋅⋅

⋅=

⋅===

T

inc

T

thvth

eff

eff

inc

increversedsgsds

reversedsleak

V

V

Vn

VI

L

W

V

VVVI

VR

exp1exp

2

2,0 ,

,

Eqn. 29. Leakage current through the reverse bias diode connected MOSFET.

Eqn. 29 approximates Rleak as the current and voltage drop across the diode connected

MOSFET at the maximum reverse bias voltage, Vds,reverse. As will be seen in the next

section on DC loop equations, the maximum point of reverse bias is approximately

equal to 2*Vinc, where Vinc is the magnitude of the voltage incident on the Villard

voltage doubler.

90

At this point, a model and analytical expressions for the behavior of the diode

connected MOSFET have been established. This model serves as the basis for the

DC loop analysis and AC nodal analysis to follow.

The DC Loop Equations

The DC solution is derived through the application of Kirchhoff’s loop analysis and

provides a means to relate the voltage incident on a series of stacked voltage doublers

to the resulting output voltage.

Fig. 36 Illustration of the operating voltage levels and current through the DC loop of a single stage of the Villard voltage doubler.

Fig. 36 presents an illustration of the DC loop for a single stage Villard voltage

doubler.

91

The periodic incident voltage gives rise to a current across each rectifying MOSFET

(M1 and M2). The rectifying diodes are in series in the DC loop and parallel to the

charge storing capacitors. Therefore, Eqn. 24 is modified resulting in an RDC of:

( )( )

( )( ))()()( ,,

2

,

2

tItV

V

tP

VR

MndsMnds

peakds

Mnds

peakds

DC⋅

==

Eqn. 30. Effective DC resistance of a diode connected MOSFET in the Villard voltage doubler.

Where Pds,Mn(t) is the average power over one period through the diode connected

MOSFET, Ids,Mn(t) is the current through the diode connected MOSFET, and Vds,Mn(t)

is the time domain voltage drop across the diode connected MOSFET, Mn where n

equals 1 or 2 (M1 or M2). Vdspeak is the maximum forward bias across the diode

connected MOSFET as depicted in Fig. 36 for diode M1, resulting from the voltage

incident on the rectifying diodes following the DC blocking capacitor.

Fig. 37 The voltage drop, V

92

(a)

(b)

(c)

The voltage drop, Vds,M1(t) (a), current, Ids,M1(t) (b), and power dissipated, Pds,M

diode connected MOSFET, M1.

ds,M1(t) (c) across

Fig. 38 The voltage drop, V

93

(a)

(b)

(c)

The voltage drop, Vds,M2(t) (a), current, Ids,M2(t) (b), and power dissipated, Pds,M2

diode connected MOSFET, M2.

ds,M2(t) (c) across

94

The voltage, resulting current, and power dissipated across M1 (Vds,M1(t), Ids,M1(t),

Pds,M1(t)) and M2 (Vds,M2(t), Ids,M2(t), Pds,M2(t)) over one period are illustrated in Fig.

37 and Fig. 38. Peak forward bias across the diode connected MOSFETs, Vdspeak and

the mean power dissipated across each diode connected mosfet (Pds,M1(t) and Pds,M2(t))

are also indicated in Fig. 37 and Fig. 38.

From Fig. 37a and Fig. 38a, it can be seen that for the voltage doubler circuit,

Vds,M1(t) is:

( )peakdsincincMds VVftVtV −+⋅−= )2sin()(1, π .

Eqn. 31. Voltage difference between the drain and source terminals of a diode connected MOSFET in the Villard voltage doubler.

And Vds,M2(t) is:

( )peakdsincincMds VVftVtV +−⋅= )2sin()(2, π .

Eqn. 32. Voltage difference between the drain and source terminals of a diode connected MOSFET in the Villard voltage doubler.

Since, both Ids,M1(t) and Ids,M2(t) are approximately equal to zero while the respective

diodes M1 and M2 are reverse biased, when calculating power dissipation across the

diode connected MOSFETs (M1 and M2), Vds,approx(t) can be used as an approximation

of Vds,M1(t) and Vds,M2(t).

)(V ,Mn(t)ds, VtV dsapproxds =≈

Eqn. 33. Approximation of the incident voltage across the drain and source terminals of a MOSFET valid when solving the DC loop equations

Fig. 39 The voltage drop across M1 and M2 (approximation for both

The waveforms Vds,M1(t)

illustrated in Fig. 39. Vds,approx

(Ids,Mn(t) ≠ 0, were n =1 or 2) for both

95

)2sin( tfpeakds ⋅⋅⋅⋅ π

Approximation of the incident voltage across the drain and source terminals of a MOSFET valid when solving the DC loop equations.

The voltage drop across M1 and M2 (Vds,M1(t) and Vds,M2(t)) and Vds,approx(t) which is a valid approximation for both Vds,M1(t) and Vds,M2(t).

(t), Vds,M2(t) and the resulting approximation, V

ds,approx(t) provides an approximation of the conductive region

0, were n =1 or 2) for both Vds,M1(t) and Vds,M2(t).

Approximation of the incident voltage across the drain and source terminals of a

which is a valid

Vds,approx(t) are

(t) provides an approximation of the conductive region

96

Fig. 40 Model of the multi-stage Villard voltage doubler as a DC power source.

With the capacitive elements acting as charge storage devices for the rectifying

elements, a Villard voltage doubler of ns DC loops can be modeled as indicated in

Fig. 40 [91]. From this model, utilizing the simple relationship, V=I*R, the DC

current across the output load (Rout) and DC current across the effective MOSFET

resistance (RDC) can be derived.

( )out

peakdsincs

RDC R

VVnI

out

⋅−⋅⋅=

22,

Eqn. 34. DC current across output load, Rout.

97

DC

peakds

RDC R

VI

DC=,

Eqn. 35. DC current across effective MOSFET resistance, RDC.

By equating these two currents and algebraic manipulation, the second equation for

RDC presented in Eqn. 36 can be extracted where ns is the number of stacked stages.

( )peakdss

outpeak

dsDC

VVn

RVR

inc⋅−⋅⋅

⋅=

22

Eqn. 36. DC resistance of the diode connected MOSFET derived from the model depicted in Fig. 40.

By setting Eqn. 30 and Eqn. 36 equal, Vdspeak can be solved for. This equality is best

solved through numeric methods. Once Vdspeak has been determined, Vout can be

evaluated from:

( )peakdsincsout VVnV ⋅−⋅⋅= 22

Eqn. 37. Output DC voltage of a multistage Villard voltage doubler.

Alternatively, one can determine |Vinc| from a given Vout, by expressing RDC as:

98

out

outpeak

dsDC V

RVR

⋅=

Eqn. 38. Effective DC resistance of diode connected MOSFET derived from Fig. 40 arranged as a function of Vout.

Once again Vdspeak can be determined from Eqn. 30 and Eqn. 38 while Eqn. 37 can be

rearranged to express |Vinc| as a function of Vout.

2

2 peakds

s

out

inc

Vn

V

V

⋅+

=

Eqn. 39. Input incident voltage for a multi-stage Villard voltage doubler as a function of output voltage.

Thereby, one can determine Vout as a function of |Vinc| or |Vinc| as a function of Vout.

The AC Nodal Equations

Fig. 41 Illustration of the Villard Voltage doubler with incident voltage and resulting AC current.

99

The AC analysis of the diode connected MOSFET is more complex than the DC

analysis. Fundamentally, the AC input equations are an application of Kirchhoff’s

Current Law. Therefore, as illustrated in Fig. 41, the AC current incident on the

voltage doubler is the summation of the currents through both diodes, Ids,M1(t) and

Ids,M2(t). Ids,M1(t) and Ids,M2(t) are functions of Vds,M1(t) and Vds,M2(t), respectively, (or

Vds,approx(t) as previously discussed) as illustrated during the DC loop analysis in Fig.

37 and Fig. 38. The current draw of a single stage of the Villard voltage doubler

represents a real resistance equal to:

( )( )( )

( )( )( ) ( ) ( )( )( )tItItV

tV

tP

tVR

MdsMdsinc

inc

inc

incAC

2,1,

22

22 +⋅⋅=

⋅=

Eqn. 40. Effective AC resistance of the drain source channel for a diode connected MOSFET in a Villard voltage doubler.

RAC represents a diode structure with no parasitics except the threshold voltage. As

illustrated in Fig. 41, Vinc(t) is the time domain voltage incident on the Villard voltage

doubler; Pinc(t) is the average power draw of the Villard voltage doubler; and Ids,M1(t)

and Ids,M2(t) are the time domain current through the diode connected MOSFETs, M1

and M2.

Fig. 42 The input voltage to the Villard voltage doubler, VIds,M2(t) (b), and power input to the Villard voltage doubler, P

0 V

-|Vinc|

|Vinc|

100

(a)

(b)

(c)

voltage to the Villard voltage doubler, Vinc(t) (a), sum of current, I(t) (b), and power input to the Villard voltage doubler, Pinc(t) (c).

M2 is forward biased

and conducts current

M1 and M

not forward

biased

Vdspeak

Vdspeak

M1 is forward biased

and conducts current

(a), sum of current, Ids,M1(t) and

is forward biased

and conducts current

and M2 are

not forward

biased

101

Fig. 42 plots example waveforms for Vinc(t), the sum of Ids,M1(t) and Ids,M2(t), and

Pinc(t). The average power entering the Villard voltage doubler, Pinc(t) is also

indicated.

It is assumed that a matching circuit is used, as in Fig. 41, to match the input power

source to the impedance presented by the cascaded voltage doubler of ns stages.

Therefore, the power necessary to generate the incident voltage from the DC loop

equations when no additional parasitic are present would be expressed as:

( )AC

incsin R

VnP

⋅

⋅=

2

2

Eqn. 41. Input AC power draw of a multi-stage Villard voltage doubler without the presence of parasitic losses.

Fig. 43 The AC impedance model of a Villard voltage doubler consisting of ns stages including the parasitics of CMOS integration.

102

However, as indicated previously, while determining the model for the diode

connected MOSFET, there are parasitics that affect the impedance presented at the

input to the Villard voltage doubler. Given that the DC bypass capacitors are

sufficiently large to appear as shorts at the RF operating frequency, a Villard voltage

doubler can be modeled as in Fig. 43 and the total impedance can be expressed as:

s

leakpngateACin n

RXZRZ

||||||=

Eqn. 42. Input AC impedance of a multi-stage Villard voltage doubler in the presence of parasitic losses.

Where Rleak was defined in Eqn. 29, while Zgate and Xpn, can be expressed as:

⋅⋅⋅

−+=

gateggate Cf

jRZ

π2

Eqn. 43. Parasitic impedance of MOSFET gate.

Cgate refers to the gate capacitance, Cgd when the diode connected MOSFET is

forward biased. Therefore, Cgate is equal to Cgd when Vds is less than zero from Eqn.

25.

⋅⋅⋅

−=

bdpn Cf

jX

π2

Eqn. 44. Parasitic impedance of the PN junction formed between the body and drain of the diode connected MOSFET.

103

The power transferred to a cascaded Villard voltage doubler of ns stages to generate

|Vinc| at the input to the Villard voltage doubler becomes:

⋅=

in

incin Z

VrealP

2

2

Eqn. 45. Input AC power draw including parasitic losses.

While the DC loop analysis provides the means to relate the DC output voltage to the

input AC voltage, the AC nodal analysis provides the tool to relate input AC voltage

to input RF energy. Thus, the input RF energy incident on the power matched Villard

voltage doubler can be related to the resulting output voltage.

Model Validation

From the analysis presented, a model has been developed for the diode connected

MOSFET. The DC loop equations were presented for relating the AC voltage

incident on the Villard voltage doubler to the DC voltage generated at the output and

AC nodal analysis was used to determine the power necessary to generate the voltage

incident on the voltage doubler due to matching both with and without parasitic

effects. To validate this model, the output voltage, as predicted by this model from a

900 MHz RF power source, was compared to harmonic balance simulations using the

BSIM 4.0 model provided by a 130 nm IBM process. All required performance

metrics for the model were either obtained from published values or were

experimentally determined.

104

Accuracy of the Analytical Model As Compared to the BSIM 4.0 Model in Predicting the Output Voltage vs. Input Power

0.01

0.1

1

10

-40 -30 -20 -10 0

Ou

tpu

t Vo

lta

ge

(V)

Input Power (dBm)

BSIM, 10M ohm load

Analytical, 10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

0.01

0.1

1

10

-40 -30 -20 -10 0 10

Ou

tpu

t Vo

lta

ge

(V)

Input Power (dBm)

BSIM, 10M ohm load

Analytical, 10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

(a) (b)

Fig. 44 Input power vs output voltage as determined by the analytical model presented and a harmonic balance simulation using the BSIM 4.0 model for a single stage power matched Villard

voltage doubler (a) and eight stage power matched Villard voltage doubler (b).

Accuracy of the Analytical Model As Compared to the BSIM 4.0 Model in Predicting the Magnitude of the Input Impedance for A Single And Multi-Stage Villard Voltage Doubler vs. Input Power

0

200

400

600

800

1000

1200

1400

1600

1800

-40 -30 -20 -10 0

Mag

nit

ud

e o

f Z

in (

oh

ms)

Input Power (dBm)

BSIM, 10M ohm load

Analytical, 10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

0

50

100

150

200

250

-40 -20 0 20

Mag

nitu

de

of Z

in (o

hm

s)

Input Power (dBm)

BSIM, 10M ohm load

Analytical, 10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

(a) (b)

Fig. 45 Magnitude of the input impedance vs input power as determined by the presented analytical model and a harmonic balance simulation using the BSIM 4.0 model for a single stage power matched

Villard voltage doubler (a) and eight stage power matched Villard voltage doubler (b).

105

Accuracy of the Analytical Model As Compared to the BSIM 4.0 Model in Predicting the Real Input Impedance for A Single And

Multi-Stage Villard Voltage Doubler vs. Input Power

0

50

100

150

200

250

-40 -30 -20 -10 0

Rea

l Par

t of Z

in (o

hm

s)

Input Power (dBm)

BSIM, 10M ohm load

Analytical,10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

0

20

40

60

80

100

120

-40 -20 0 20

Rea

l Par

t of Z

in (o

hm

s)

Input Power (dBm)

BSIM, 10M ohm load

Analytical, 10M ohm load

BSIM, 100k ohm load

Analytical, 100k ohm load

(a) (b)

Fig. 46 Real component of the input impedance vs input power as determined by the presented analytical model and a harmonic balance simulation using the BSIM 4.0 model for a single stage

power matched Villard voltage doubler (a) and eight stage power matched Villard voltage doubler (b).

Fig. 44 through Fig. 46 demonstrate the accuracy by which this model matches the

results of the more complex and time consuming harmonic balance simulation with

the BSIM 4.0 model under a variety of load conditions, input powers, and number of

stacked voltage doubler stages.

Further validation of the analytical model was achieved through its application in

fabricating the optimal RF energy scavenging circuit in a 130 nm IBM process

designed to generate 1 V across a 50 kΩ load from a 2.2 GHz RF power source. The

matching circuit was assumed to be an L circuit consisting of an inductor and

capacitor in either a series or shunt configuration. From previous experimental

106

measurement, the power loss at 2.2 GHz from the finite Q of the inductors was

determined to be ~6 dB in the 130 nm IBM process used for fabrication.

Fig. 47 Conversion efficiency vs. gate width and number of stacked voltage doubler stages

Fig. 47 illustrates that the peak efficiency occurs using one voltage doubler stage and

a total gate width of 13.6 um. To validate the model, the optimal circuit design as

predicted by this model was fabricated using the IBM 130 nm process.

107

Fig. 48 Modeled and measured input power vs output voltage of RF energy scavenger design.

Fig. 48 shows very good agreement between the output voltage versus input RF

power predicted by the analytical model and the measured data. The optimal design

yielded an output voltage of 1 V representing an RF to DC conversion efficiency of

~14% with only -8.5 dBm of input RF energy.

Thus the analytical model has been validated through comparison to harmonic

balance simulation of the BSIM 4.0 model and through optimization and

measurement from a chip fabricated in the modeled 130 nm IBM process.

108

Effects of Parasitics on Energy Scavenging Performance

Having been validated against the BSIM 4.0 model and against measurements from a

fabricated chip, the analytical model presented in this paper provides a useful tool by

which the effect of performance degrading parasitics can be examined under different

regimes of operation. The two types of parasitics degrading the performance of the

power matched Villard voltage doubler are the losses due to the threshold voltage and

parasitic capacitances and resistance formed from the gate of the rectifying diodes.

The different sources of parasitics dominate the performance of the circuit in different

regimes of operation. By plotting RF to DC conversion efficiency from a 900 MHz

RF power source versus output load resistance and magnitude of the parasitic effect,

Fig. 49 through Fig. 51 illustrate when the two parasitic sources, threshold voltage

and parasitic gate impedance, will limit the performance of the power scavenging

circuit.

Fig. 49 RF to DC conversion efficiency versus output load impedance and threshold voltage without

losses due to parasitic gate impedance.

102

104

106

108

0.05 0.1

0.150.2

0.250.3

0

0.2

0.4

0.6

0.8

1

Threshold Voltage (V)

RF to DC Conversion Efficiency vs. Output Resistance and Threshold VoltageNo Gate Parasitics

Output Resistance

Conversion Efficiency

109

Fig. 50 RF to DC conversion efficiency versus parasitics capacitance (defined as parasitic capacitance

factor times modeled parasitic capacitances) of gate impedance without threshold voltage losses.

Fig. 51 RF to DC conversion efficiency versus threshold voltage with parasitic gate impedance losses.

100

105

1010

0

0.2

0.4

0.6

0.8

1

0

0.2

0.4

0.6

0.8

1

Output Resistance (ohms)

RF to DC Conversion Efficiency vs. Output Resistance and Parastic Capacitance Factor for No Threshold Voltage Loss

Parasitic Capacitance Factor

Con

vers

ion

Eff

icie

ncy

11e2

1e41e6

1e8

0.05

0.1

0.15

0.2

0.25

0.30

0.2

0.4

0.6

0.8

Output Load Impedance (ohms)

RF to DC Conversion Ef f iciency vs. Load Impedance and Threshold VoltageIncludes the Ef fects of Gate Parasitics

Co

nver

sio

n E

ffic

ienc

y

110

Fig. 49 examines the effect of threshold voltage on power scavenging efficiency for a

single stage power matched Villard voltage doubler. As illustrated, given a constant

incident voltage (.5 V) in the presence of a threshold voltage, as output load decreases

(load current increases) the conversion efficiency is reduced. As threshold voltage

increases, the reduction in conversion efficiency occurs more swiftly than the

reduction in output load impedance. Therefore, a reduction in the threshold voltage

improves performance when high output load currents are expected. The power loss

due to the threshold voltage is modeled as RDC in Fig. 40.

Alternatively, increasing the parasitic capacitance portion of the gate impedance (Rg

and Cgd in Fig. 35) decrease RF scavenging efficiency as the output load increases in

magnitude (load current reduces). This is illustrated in Fig. 50 by plotting RF to DC

conversion efficiency versus output resistance and parasitic capacitance factor. The

parasitic capacitance factor is a constant by which the expected parasitic capacitance

of the gate is scaled while the parasitic resistance of the gate remains unchanged. In

this way, the power lost to the resistive gate impedance is increased or decreased as

the gate capacitance is increased or decreased, respectively. In addition, to remove

the effect of the threshold voltage it was necessary that K and Ivth defined in TABLE

II approach infinity and Vth approaches zero. The power loss due to gate parasitics is

modeled in Fig. 40 as a reduction in the resulting V inc for a given input RF power

level.

111

As a result of the threshold voltage dominating power loss when the load current is

high, and the parasitic gate impedance dominating power loss when the load current

is low, for a defined incident voltage there is an optimal load resistance. By plotting

RF to DC conversion efficiency as a function of threshold voltage and load

impedance, Fig. 51 illustrates that there is optimal load resistance when the capacitive

parasitics are included in the modeling. In this case, the optimal load resistance is

about 50 kΩ’s.

This is an important result. Previous works in the field have targeted reducing the

threshold voltage of the rectifying element to improve power scavenging performance

[69],[74],[92]. This work supports that approach to improving system performance as

the load resistance is lowered. However, considerable new research is aimed at very

low power RF energy scavenging for trickle charging a battery. Trickle charging

presents a high load impedance. As a result, this work indicates that for low power

RF scavenging systems, the dominate power loss mechanism is due to parasitic gate

impedance in the rectification structure.

Effect of Number of Voltage Doubler Stages on RF Energy Scavenging Performance

As discussed previously, Villard voltage doubler stages can be stacked to increase the

output DC voltage. This effect can be thought of as increasing the resulting source

voltage of the DC power supply created at the output of the RF energy harvesting

circuit as depicted in Fig. 40. However, as also indicated in Fig. 40, additional

112

stacked Villard voltage doubler stages result in an increased source resistance for the

output DC power source created from the RF energy harvesting circuit. This reduces

the ability of stacked voltage doubler stages to drive lower output load impedances

(high load currents) and necessitates the stacking of voltage doubler stages be used

only when driving high output load resistances.

RF to DC Conversion Efficiency to Generate 1V Across a 50 kΩ Load Vs. Gate Width and Number

of Voltage Doubler Stages

Fig. 52 RF to DC conversion efficiency to generate 1V across a 50 kΩ load versus gate width (number of 2.08 um fingers) and number of voltage doubler stages.

113

RF to DC Conversion Efficiency to Generate 1V Across a 10 MΩ Load Vs. Gate Width and Number

of Voltage Doubler Stages

Fig. 53 RF to DC conversion efficiency to generate 1V across a 10 MΩ load versus gate width (number of 2.08 um fingers) and number of voltage doubler stages.

This effect is illustrated by Fig. 52 and Fig. 53, which depicts RF to DC conversion

efficiency when generating 1 V across a high output load (10 MΩ) and low output

load (50 kΩ) versus gate width (number of 2.08 um gate fingers) and number of

voltage doubler stages. The model assumes that the IBM 130 nm process is used and

the RF energy scavenging circuit is power matched to a 900 MHz RF source. In Fig.

52, one can see that the maximum RF to DC conversion efficiency is achieved for a

gate width of 41.6 µm and only one voltage doubler stage. However, once output

114

load impedance is increased to 10 MΩ, maximum RF to DC conversion efficiency is

achieved by stacking 8 voltage doubler stages and utilizing a gate width of 20.8 µm.

Optimization example

A significant benefit of the analytical model presented and validated, is its application

to predict the optimal design of an RF energy scavenging circuit. To illustrate, the

analytical model developed was used to determine the optimal transistor width and

number of stacked stages for an RF energy scavenging circuit designed to generate 1

V across a 1 MΩ load from a 900 MHz RF power source.

The matching circuit was assumed to be an L Circuit consisting of an inductor and

capacitor in either a series or shunt configuration. The value of the inductor and

capacitor, as well as, the choice of a series or shunt L circuit was governed by the

input impedance to the multi stage Villard voltage doubler. As the width of the

transistor and the number of cascaded voltage doubler stages was varied, solutions

that required unusually large inductors, small capacitors, or had a real component to

their impedance nearing the parasitic resistance of the circuit were discarded. To this

end, the inductor was limited to 30 nH or smaller, the capacitor was limited to .1 pF

or larger, and the real component of the input impedance of the Villard voltage

doubler was limited to larger than 5 Ω.

115

3D View of RF to DC Conversion Efficiency vs. Transistor Width and Number of Cascaded Stages

with Boundary Conditions

Fig. 54 3-dimensional view of the efficiency of an RF scavenging circuit as a function of the number

of 2.08 um fingers and the number of cascaded voltage doubler stages.

Top View of RF to DC Conversion Efficiency vs. Transistor Width and Number of Cascaded Stages

with Boundary Conditions

Fig. 55 Top view of the efficiency of an RF scavenging circuit as a function of the number of 2.08 um

fingers and the number of cascaded voltage doubler stages.

Fig. 54 and Fig. 55 illustrate the efficiency of the design over the sample space and

clearly demonstrate that there is an optimal solution consisting of 30 fingers result

in a transistor 62.4 um wide and with six voltage doubler stages cascaded together.

This results in a total efficiency of approximately 25% while requiring only about

dBm of input RF energy. This assumes an ideal L match circuit. Thus, a physical

realization of such a design would require a larger input RF energy due to the finite Q

of the inductor and capacitor used for the matching circuit.

Fig. 56 Harmonic balance simulation of RF to DC conversion efficiency and incident input power versus output voltage for the optimal design determined by the analytical model using the BSIM 4.0

116

illustrate the efficiency of the design over the sample space and

clearly demonstrate that there is an optimal solution consisting of 30 fingers result

in a transistor 62.4 um wide and with six voltage doubler stages cascaded together.

This results in a total efficiency of approximately 25% while requiring only about

dBm of input RF energy. This assumes an ideal L match circuit. Thus, a physical

realization of such a design would require a larger input RF energy due to the finite Q

of the inductor and capacitor used for the matching circuit.

Harmonic balance simulation of RF to DC conversion efficiency and incident input power voltage for the optimal design determined by the analytical model using the BSIM 4.0

model.

illustrate the efficiency of the design over the sample space and

clearly demonstrate that there is an optimal solution consisting of 30 fingers resulting

in a transistor 62.4 um wide and with six voltage doubler stages cascaded together.

This results in a total efficiency of approximately 25% while requiring only about –25

dBm of input RF energy. This assumes an ideal L match circuit. Thus, a physical

realization of such a design would require a larger input RF energy due to the finite Q

Harmonic balance simulation of RF to DC conversion efficiency and incident input power voltage for the optimal design determined by the analytical model using the BSIM 4.0

117

This result was validated by performing a harmonic balance simulation using the

BSIM 4.0 model. As indicated in Fig. 56, the BIM 4.0 based simulation yielded an

output voltage of 1 V with an RF to DC conversion efficiency of 25% with only -25

dBm of input RF energy. This agrees very closely with the optimal design predicted

by the analytical model.

Conclusions

A model has been presented for the analytical modeling of a multistage Villard

voltage doubler for RF energy scavenging. The model presented is completely

analytical and relies only on twenty-five parameters, of which most model a physical

effect (TABLE II). This is in contrast to simulations base on the BSIM 4.0 model,

which have over 250 parameters, of which a significant number are empirically

derived fitting parameters [93].

The model has been validated and shows excellent agreement with the harmonic

balance simulations using the BSIM 4.0 model over a wide range of simulation

parameters including transistor width, number of cascaded stages, and load

impedance. In addition, the model presented accurately predicted the performance of

an RF energy scavenging circuit fabricated in the IBM 130 nm CMOS process.

While this work utilized the diode connected MOSFET as the rectification structure

in the voltage doubler, any diode structure including PN junctions and Schottky

diodes could be modeled and applied to the analytical method presented.

118

Furthermore, the analytical model was used to explore the effect of circuit parasitics

on system performance. This analysis indicates that under low power conditions (<

mW), threshold voltage is the performance limiting parasitic when the load resistance

on the DC output is low (< 10 kΩ). However, when the output load resistance is high

(>10 kΩ), as is the case under trickle charge conditions, the gate parasitics of the

diode connected MOSFETs are the performance limiting parasitics.

Lastly, the analytical model presented was used to determine the most efficient RF

energy scavenging circuit design for generating 1 V across a 1 MΩ load at the

minimal RF input energy. The optimization was limited to solutions that presented an

input impedance which can be matched using L circuits realizable in the typical

CMOS processes. The analytical model developed in this work predicted an optimal

design with six stacked stages and transistors 62.4 um wide resulting in an efficiency

of 25% at an input RF energy of -25 dBm. This is in agreement with the 25% RF to

DC conversion efficiency at -25 dBm input RF energy predicted by a harmonic

balance simulation using the BSIM 4.0 model of the predicted optimal design.

119

Chapter 4: Improved RF Energy Harvesting Circuit

Introduction

The ability to harvest energy from the environment could greatly extend the

operational lifetime of wireless sensor networks and reduce their size. The small

scale of Smartdust sensor nodes (cubic centimeter) necessitates the integration of RF

energy scavenging systems directly onto CMOS. However, parasitic sources and

physical effects inherent to on chip CMOS integration pose performance limitations

and present significant challenges in the design of efficient RF energy scavenging

circuits.

Efficient RF scavenging technologies reported in the literature make use of very low

loss, high quality surface mount passives and stub tuning networks for external

matching to the rectification circuitry [70][92]. However, the aggressive form factor

of Smartdust systems makes the use of external impedance matching techniques

difficult, facilitating the need for on-chip impedance matching. Given the lossy

nature of CMOS passives, on chip integration of the complete RF energy scavenging

network poses unique challenges and opportunities for improvement in the design of

such systems.

Fig. 57

This work presents a modified power matched Villard voltage doubler circuit (

57) compatible with modern CMOS processes that demonstrates an inherent

resistance to the parasitics and performance degrading effects that plague the

traditional CMOS implementation of the RF e

modifications presented in this work can be implemented in a typical CMOS

fabrication process without any additional mask layers or feature sets. Given the

economies of scale in the mass deployment of Smartdust sensor networ

to rely only on features standard to an analog CMOS process would result in

significant cost savings.

Design Methodology

The design goal is to generate sufficient voltage

sensor node from RF energy levels

120

Fig. 57 Improved RF power harvesting circuit

This work presents a modified power matched Villard voltage doubler circuit (

) compatible with modern CMOS processes that demonstrates an inherent

resistance to the parasitics and performance degrading effects that plague the

traditional CMOS implementation of the RF energy scavenging circuit. The

modifications presented in this work can be implemented in a typical CMOS

fabrication process without any additional mask layers or feature sets. Given the

economies of scale in the mass deployment of Smartdust sensor networks, the ability

to rely only on features standard to an analog CMOS process would result in

The design goal is to generate sufficient voltage and power to operate a wireless

sensor node from RF energy levels measured in the environment (66 uW)

This work presents a modified power matched Villard voltage doubler circuit (Fig.

) compatible with modern CMOS processes that demonstrates an inherent

resistance to the parasitics and performance degrading effects that plague the

nergy scavenging circuit. The

modifications presented in this work can be implemented in a typical CMOS

fabrication process without any additional mask layers or feature sets. Given the

ks, the ability

to rely only on features standard to an analog CMOS process would result in

to operate a wireless

(66 uW) in a form

121

factor compatible with Smartdust systems. To meet this requirement, the complete RF

scavenging network including matching will be placed on chip. Design consideration

will be necessary for the increased parasitics inherent in on-chip inductor and

capacitor structures.

Several low power transceiver architectures are available that operate from a supply

rail at or below 1 V [15][30][32][33][34][94][95]. Therefore, DC power must be

efficiently coupled to a load at 1 V from a source RF energy level as low as 66 uW

received due to ambient sources (GSM, FM, ISM, UHF TV bands). The RF to DC

conversion design goal was defined as >20% efficiency. At this point, sufficient RF

energy is delivered to the out load that a 1 mW transceiver architecture could be

operated with a 1% duty cycle. Thus, the RF energy harvesting design could

facilitate sustained operations of a Smartdust sensor node near a cell tower, UHF TV

source, or dedicated RF power source over an indefinite period of time.

To prevent the RF energy source form interfering with ISM band electronics during

testing, 2.2 GHz was chosen as the initial design frequency for the RF energy

harvesting circuits. This frequency is also compatible with related research works in

Smartdust technology. Parasitics at this frequency are greater than those experienced

at 900 MHz and 1.8 GHz, and are comparable to those at 2.4 GHz ISM band. Once

RF energy harvesting from ambient RF energy levels is demonstrated, the designs can

easily be re-tuned to UHF TV, cellular or ISM bands.

122

To accomplish this goal, power matched Villard voltage doubler circuits are

employed utilizing diode connected MOSFETs [69][92]. Three circuit modifications

compatible with CMOS technology are presented for improving the efficiency of the

Villard voltage doubler and meeting the required 1 V output voltage at 20%

conversion efficiency from 66 uW of received RF energy.

Design Improvements to RF Power Harvesting Circuit

The modified power matched Villard voltage doubler demonstrates a resistance to

several key problems that plague the traditional implementation of the Villard voltage

doubler. The primary means by which the circuit improves upon the traditional

design is through the implementation of a matching network resistant to parasitic

losses, through a form of self-biasing to reduce the threshold voltage inherent in diode

connected CMOS, and by floating the body of a PMOS to reduce body effect losses.

PMOS with Floating Body to Reduce Body Affect

The traditional implementation of the Villard voltage doubler is implemented with

diode connected NMOS (Fig. 58).

123

Fig. 58 Conventional RF power harvesting circuit.

Under normal operation, the source of the output diode connected NMOS will float at

a voltage higher than the bulk potential. This gives rise to an increase in the threshold

voltage of the diode connected MOSFET due to the body effect that is expressed in

Eqn. 46 where Vth0 is the 0 VSB threshold voltage, γ is the body effect parameter, VSB

is the potential difference between the source and body, and φ is the surface potential

of the bulk substrate.

( )φφγ ⋅−⋅++= 220 SBthth VVV

Eqn. 46. Threshold voltage of a diode connected MOSFET resulting from the body effect.

Therefore, for a conventional Villard voltage doubler implemented in CMOS, higher

output voltages cannot be achieved without increasing parasitic losses.

124

Fig. 59 Power harvesting circuit with NMOS 2 replaced by a PMOS with floating body.

To minimize the body effect, NMOS 2 can be replaced with a diode connected PMOS

(Fig. 59). The PMOS has the body, gate, and drain node connected to Vout and the

source node connected to the voltage at the drain of the diode connected NMOS. The

body effect of NMOS 1 is already minimized and is treated exactly as in the previous

circuit. The PMOS only conducts when the gate is below the source. Since the gate

has been connected to Vout, this occurs when the AC voltage at the input is positive

with respect to ground. Since both the body and the source of the PMOS are

connected to Vout there is no increase in the threshold voltage due to the body effect.

125

Channel Current (Ids) as Body Effect Increases (Vsb) for Competing MOSFET Diode Structures

Fig. 60 Improvement to drain current (Ids) for a given Vds (.3V) as Vbs is varied for a diode connected

PMOS (27.2 um/.25 um) and diode connected NMOS 2 (13.6um / .25um) as depicted in Fig. 58 and

Fig. 59.

Fig. 60 illustrates that when the body effect is minimal (Vsb < .08 V), the diode

connected NMOS (13.6 um / .25 um) demonstrates superior Ids (stronger turn on) for

a given Vds (.3 V). However, as the body effect is increased (Vsb > .08V), the diode

connected PMOS (27.2 um / .25 um) demonstrates superior Ids (turn on current) for a

given Vds (.3V). Vsb is the potential difference between the source of the MOSFET

and the bulk silicon substrate. In the case of the diode connected NMOS, the bulk is

also the body of the device.

In order for this design to work, it is critical that there is sufficient isolation that the

body of the PMOS can be connected to Vout without any current flowing from the

126

PMOS body to the bulk substrate. The body of a diode connected PMOS can be

connected to Vout due to the fact that PMOS FETs are placed in an n-type doped well

inside of the p-type substrate.

Fig. 61 Layout of NMOS and PMOS device with appropriate connections for RF power harvesting circuit indicated. The voltage across the PN junction is labeled to show how diode is reverse biased

and current will not flow under operating conditions since Vout is always greater than the circuit ground.

As seen in Fig. 61, PMOS is built in an N well. Since the junction from the N well to

p substrate acts as a diode, if the voltage potential in the N well is higher than the

voltage potential in the P substrate, current will not flow. Generally, proper biasing

of the n type well is achieved by connecting to a positive externally applied supply

voltage. Such a source does not exist in this application. However, for the proposed

Villard voltage doubler, Vout is at an inherently greater potential than the substrate

voltage since the output voltage is a result of the positive rectification of the incident

AC signal and as a result satisfies the biasing requirements of the n type well. The

junction capacitance between the n type well and the substrate is parallel to and is

127

several orders of magnitude lower than output capacitance (C2) of the Villard voltage

doubler. Therefore, it has no significant effect on the circuit performance.

Parasitic Resistant Matching Network.

Power matching is an important step in maximizing the conversion efficiency of an

RF energy harvesting circuit.

Fig. 62 Villard voltage doubler power matched to RF source.

Fig. 63 Villard voltage doubler not power matched to RF source.

128

To illustrate, the output voltage resulting from the power matched Villard voltage

doubler presented in Fig. 62 is derived in Eqn. 47 and the output voltage resulting

from an unmatched Villard voltage doubler as presented in Fig. 63 is derived in Eqn.

48.

( ) thsource

insourceoutput V

R

ZVV ⋅−

⋅= 2

cosφ

Eqn. 47. Output voltage of the Villard voltage doubler resulting from the RF power source depicted in Fig. 62 (Derivation Appendix A).

thsourceoutput VVV ⋅−⋅= 22

Eqn. 48. Output voltage of the Villard voltage doubler unmatched to the RF power source depicted in Fig. 63.

Eqn. 48 assumes |Zin| >> Rsource which is true when the diode connected MOSFETs in

a Villard voltage doubler circuit are not strongly forward biased. This is common

under low incident power conditions (sub milliwatt). From Eqn. 47 and Eqn. 48,

relationship Eqn. 49 can be derived, indicating under what conditions the output

voltage will be greater when power matching is applied.

( )2

cos>

⋅ φsource

in

R

Z

Eqn. 49. Conditions under which the power matched Villard voltage doubler will outperform a non power matched Villard voltage doubler (Derivation Appendix A).

129

This relationship demonstrates the necessity of impedance matching to the RF power

source (generally an antenna) as |Zin| increases and φ, the phase difference between

the real and imaginary components of the input impedance, approaches 90 degrees.

The input impedance of a Villard voltage doubler (Zin) operating at RF frequencies

with a low incident power represents a large and reactive impedance that is orders of

magnitude larger than the source impedance of a typical power source such as an

antenna. Thus, power matching is a critical element in the design of an RF energy

harvesting circuit.

Given the importance of power matching to maximize RF to DC conversion

efficiency, care must be applied in the design of the power matching circuit to

minimize parasitic losses. Fig. 64 illustrates a typical impedance matching design and

the resulting parasitics.

Fig. 64 Step-by-step simplification of equivalent effective circuit impedance of conventional matching circuit.

130

In the presence of the parasitics inherent in CMOS design, a significant performance

enhancement can be achieved by moving the impedance matching inductor into the

Villard voltage doubler as illustrated in Fig. 65. While theoretically these two

schematics are equivalent, it becomes apparent after examination of the parasitics

incurred during layout that the schematic in Fig. 65 is inherently less sensitive to the

parasitics associated with the capacitor C1.

Fig. 65 Step-by-step simplification of equivelent effective circuit impedance of parasitic resistant matching circuit.

131

The impedance of the voltage doubler at point C in Fig. 64a is dominated by the

junction capacitance of the diode and is highly reactive. C1 is orders of magnitude

higher than the junction capacitance, therefore, it appears as a short at the RF

frequency. The impedance at point B is also large and reactive. The parasitic

resistance and capacitance of C1 results in a complex impedance parallel to the input

impedance at point B (Fig. 64b). Both the parasitic complex impedance of C1 (Rspara,

Cspara) and the complex impedance of the voltage doubler (Rsdoub, Csdoub) presented at

point B can be converted to the equivalent parallel resistive and capacitive

components as is done in Fig. 64c. The parallel resistance of the Villard voltage

doubler (Rpdoub) is comprised primarily of the effective source to drain resistance of

the diode connected MOSFETs. Under low power conditions, the diode connected

MOSFETs are only weakly forward biased and the channel resistance which

comprises Rpdoub is greater than the equivalent parallel impedance of the parasitic

resistance (Rppara). Thus, significant current flows across the parasitic resistance

representing a power loss and results in a reduction in RF to DC conversion

efficiency.

Alternatively, this work proposes a parasitic resistant matching network by

implementing the DC block capacitor, the source of the parasitic losses, prior to the

power matching circuitry as indicated in Fig. 65a. Compatibility with gate tie down

requirements and antenna rules are preserved through the application of a PMOS with

a floating body.

132

For the parasitic resistant matching network proposed in Fig. 65a, it can be seen that

the reactive part of the impedance at points C and D has been tuned out, putting the

series resistance (Rsdoub) presented by the voltage doubler in parallel with the parasitic

impedance (Rppara,Cppara) of capacitor C1 (Fig. 65d). The relationship between Rsdoub

and Rpdoub can be derived as a function of the series capacitance of the Villard voltage

doubler (Eqn. 50).

⋅⋅+⋅=

21

1doubdoub

doubdoub CsRsRsRp

ω

Eqn. 50. Effective parallel resistance of the Villard voltage doubler.

At RF frequencies (> 100 MHz), typical values for the real (Rsdoub) and capacitive

impedance (Csdoub) of the voltage doubler result in Rpdoub >> Rsdoub. As a result, even

under low power conditions where the diode connected MOSFETs are not strongly

forward biased, Rsdoub is orders of magnitude smaller than Rppara. Thus, very little

power is lost to current flow across Rppara and the parasitic resistant matching network

proposed in Fig. 65 shows superior performance to the conventional power matched

Villard voltage doubler in Fig. 64.

It should also be noted that modern CMOS fabrication processes require that a certain

ratio of gate tie downs to metal area be maintained. Connecting the inductor directly

to the gate of an NMOS in a Villard voltage doubler would require an unrealistic

number of tie down contacts. Therefore, this technique is only suitable for designs

133

that use a PMOS with gate and body tied to the output as opposed to a NMOS which

would result in the inductor tied directly to the gate.

Sacrificial Biasing

In the typical implementation of the Villard voltage doubler, the gate threshold

voltage of the diode connected MOSFET limits the conversion efficiency of the RF

power harvesting circuit. Work by Mandal and Sarpeshkar utilizes floating gates to

reduce the threshold voltage of diode connected MOSFETs [92]. This technique

relies on the availability of a second polysilicon layer which is not a feature

commonly found in CMOS processes, and when available, incurs additional cost.

Thus, this approach is not economical for wireless sensor networks consisting of a

large number of nodes in which the cost of individual nodes must be kept to a

minimum.

In addition, previous works have attempted to improve RF power harvesting

efficiency by using special MOSFETS with reduced gate threshold voltages [69],[74].

However, as is the case with a second polysilicon layer, low threshold voltage

MOSFETs are a feature available only at additional cost during fabrication.

The solution proposed by this work achieves the performance gains of threshold

reduction techniques without the additional expense of costly fabrication options. To

achieve this, the work presented reduces gate threshold voltage through the sacrifice

134

of minimal amounts of output current to generate a bias at the gates of the diode

connected MOSFETs. This technique is immune to the reliability concerns and

requirement for a second polysilicon layer that plague biasing implementations

utilizing floating gates [92].

Fig. 66 Plot illustrating the reduction in turn on voltage for diode connected MOSFET with gate biasing versus a standard diode connected MOSFET.

135

Fig. 67 Biasing the gate of diode connected MOSFETs to reduce the threshold voltage.

Fig. 66 illustrates the concept by plotting current through the diode connected

MOSFET when the diode structure is forward biased as Vinc falls below the circuit

ground. By applying a DC bias to the gates of both diode connected MOSFETs (Fig.

67), the turn on threshold voltage can be reduced. Since a PMOS with floating body

has been implemented, both gates are connected to DC nodes. The gates act as an

open load at DC and no power is lost to the parasitics of the gate.

This approach does increase the leakage current while the diode connected MOSFET

is reverse biased, but this current is orders of magnitude lower than the forward

biased current. Therefore, the MOSFET that is forward biased dominates the current

flow.

136

Fig. 68 Circuit design illustrating the use of sacrificial current biasing to reduce the threshold voltage of diode connected MOSFETs.

Although possible, in practice it is not suitable to hang voltage sources off of the

gates of the diode connected MOSFETs in the RF power harvesting circuit. A more

practical approach is to use the desired output voltage to create the bias voltages

through a voltage divider network (Fig. 68). This technique sacrifices some current

to create an overall improvement to system efficiency. Again, it is necessary to

replace one of the diode connected NMOS with a floating body PMOS for two

reasons. The first is that the threshold voltage of the output diode connected

MOSFET must be below Vout to be obtainable through a voltage divider network.

The second reason is so that the gate is connected to a DC node in the circuit.

Sufficiently larger resistors are used in the divider network to reduce power dissipated

due to the bias current. This power dissipated can be designed to be orders of

magnitude below the increase in output power due to the application of a bias voltage.

Practical limitations are placed on the size of the resistors used in the divider network

due to an increase in the time necessary to achieve steady state. This is a direct result

137

of the RC time constant of the voltage divider network and gate capacitance. This

approach does increase the leakage current while the diode connected MOSFET is

reverse biased, but the bias point is chosen to keep the power lost to leakage currents

less than the power gained through a reduction in threshold losses.

Fig. 69 Ideal diode response vs diode connected MOSFET with regular FETs and diode connected MOSFET using low threshold voltage FETs.

Previous work in the literature has concluded that the use of low threshold voltage

MOSFETs provides the best performance for RF power harvesting [69]. This work

challenges that assertion by demonstrating that the proposed technique enables

traditional MOSFETs to outperform low threshold voltage MOSFETs. This is

because the ability of sacrificial current biasing to reduce the threshold voltage of a

MOSFET is limited due to the finite slope of the I-V curve resulting from the non-

138

ideal transition of the diode connected MOSFET from an open to a closed circuit.

This is illustrated in Fig. 69. Regular MOSFETs have a sharper transition than low

threshold voltage MOSFETs, resulting in a faster turn on when transitioning to the

open state, and therefore, show better RF conversion efficiency since propoer biasing

can effectively remove most of the threshold voltage.

Design and Simulation

RF power harvesting circuits were designed and simulated using the IBM 130 nm

CMOS process. The circuit was designed to be capable of powering a low power

transceiver indicative of that found in a Smartdust system [33][94][95]. Given this

goal, the systems were designed to generate 1 V across a 70 kΩ load from less than 66

uW of input RF power at 2.2 GHz. Due to the presence of minimal RF energy from

consumer electronics, 2.2 GHz was chosen so that the amount of RF energy received

could easily be controlled. This is important for testing due to the flood of RF energy

in the environment at 900 MHz, 1.8 GHz and 2.4 GHz from wireless electronics.

139

Fig. 70 Image of test chip layout with RF power harvesting circuits comprised of various combinations of the design improvements discussed in this work. Design was implemented in a 130

nm IBM process.

Four RF power-harvesting circuits were designed, simulated, and laid out for

comparison. The reference design utilized a vertical natural capacitor at the input of

the voltage doubler to meet layout requirements and prevent forward biasing of the tie

down diodes that are required for Metal-Insulator-Metal (MIM) capacitors. MIM

Caps were used for all other designs since forward biasing of the required tie down

diodes would not occur for these designs. Low threshold voltage MOSFETs were

utilized unless otherwise noted. The largest design utilizing all three design

improvements took up only 600 um by 300 um of total chip space.

140

RF Energy Harvesting Circuits Tested:

1. Reference design with no improvements.

2. Design utilizing a PMOS with floating body and the parasitic resistant

matching network.

3. Design utilizing all three improvements with low threshold voltage MOSFETs

4. Design utilizing all three improvements with normal threshold voltage

MOSFETs

All designs utilized an on chip impedance matching network to match to the

imaginary and real components of the voltage doubler impedance. The predicted

results from simulation are given in TABLE III. A combined improvement of 113%

was predicted over the reference design of a conventional RF power harvesting

circuit.

TABLE III OUTPUT VOLTAGE AND EFFICIENCY OF PROPOSED RF POWER HARVESTING CIRCUITS.

Improvement

Matched Impedance (ohms) Vout Pin (uW) Pout (uW) Efficiency

Percent Increase Over Reference

Reference 72 0.707 66 7.14 10.8% PMOS+ Matching 94 0.943 66 12.7 19.24% 80% PMOS + Match + Bias 110 1.007 66 14.49 21.95% 103% PMOS + Match + Bias + Regular Vth FET 104 1.03 66 15.16 22.97% 113%

141

Measurements

These circuits were taped out and fabricated in an IBM 130nm run utilizing the 3-2

DM metal stack (Fig. 71).

Fig. 71 Image of test chip with RF power harvesting circuits comprised of various combinations of the design improvements discussed in this paper. Design was fabricated in a 130 nm IBM process.

This process provides for higher performance inductors and metal-insulator-metal

capacitors. Careful attention was paid towards meeting metal fill requirements

without adding unnecessary parasitics in the presence of the inductors. Gate tie down

142

requirements were met at DC nodes to prevent losses due to parasitic capacitive

losses from the tie down diodes.

TABLE IV COMPARISON OF MEASURED AND SIMULATED RESULTS OF RF POWER HARVESTING CIRCUIT TESTING.

Improvement

Unmatched Pin (uW)

Sim. Vout

Measured Vout

Simulated Efficiency

Measured Efficiency

Percent Increase Over Measured Reference

Reference 61.6 .672 0.658 10.5% 10.0% PMOS+ Matching 56.2 .844 0.82 18.1% 17.1% 71% PMOS + Match + Bias 54 .888 .889 20.9% 20.9% 109% PMOS + Match + Bias + Regular Vth FET 55.6 .930 .938 22.2% 22.6% 126%

TABLE IV shows that at 2.2 GHz, the output voltage and RF to DC power

conversion efficiency show excellent agreement between simulation and measured

results. The measurements verified that the input impedances were within 3 Ωs of the

impedance predicted by simulation. The input power ranged from 54 uW to 61.6 uW

and was a function of the RF source power (66 uW) minus the cable loss and

impedance mismatch loss between the RF energy scavenging network and the 50 Ω

power source.

143

Conversion Efficiency vs. Output Voltage for Biased and Unbiased RF Scavenging Circuit

Fig. 72 Comparison of measured RF to DC conversion efficiency vs output voltage across a 200 kΩ load for both an RF energy harvesting circuit with biasing and without biasing.

It’s worth noting that unlike the improvements to reduce the body effect and

matching circuit parasitics, sacrificial current biasing is optimized for a given output

voltage. As increased input RF energy results in an output voltage higher than the

optimal output voltage, the diode connected MOSFET’s leakage current increases.

144

This is a consequence of larger output voltages resulting in larger bias voltages on the

gate preventing the diode connected MOSFET’s from ever fully turning off. Fig. 72

shows that efficiency is at a peak at the optimal output voltage of 1 V. The optimal

output voltage is the output voltage that the biasing network was designed to operate

at.

Output Voltage Generated by the Power Matched Villard Voltage Doubler vs. Input Power for 70 kΩ

Load

Fig. 73 Measurement of Vout vs input power for the RF energy harvesting circuit utilizing all design

improvements with a 70 kΩ load.

The design goal was to generate 1 V

input RF energy. As indicated in

generated from a 66 uW source

Comparison of This Work to Recent Works Commercial and Academic Works Operating at

Comparable RF Power Levels and Output Loads

Fig. 74 Comparison of this work to recent works commercial and academic works operating at comparable

As demonstrated by Fig. 74

the academic and commercial communities designed to operate at comparable RF

energy levels and output loads. This work demonstrates two to three times the RF to

DC conversion effieincy of the RF energy scavenging system by the commercial RF

wireless IC design company, Broadcom

the academic work reported by Umeda et al

145

The design goal was to generate 1 V across a 70 kΩ load from 66 uW (-11.8 dBm)

As indicated in Fig. 73, that design goal was met

generated from a 66 uW source resulting in 22.5% RF to DC conversion efficiency.

Comparison of This Work to Recent Works Commercial and Academic Works Operating at

Comparable RF Power Levels and Output Loads

Comparison of this work to recent works commercial and academic works operating at comparable RF power levels and output loads

Fig. 74, this work compares well with other recent works both in

the academic and commercial communities designed to operate at comparable RF

nergy levels and output loads. This work demonstrates two to three times the RF to

DC conversion effieincy of the RF energy scavenging system by the commercial RF

wireless IC design company, Broadcom [96] and about ten times the performance of

the academic work reported by Umeda et al [97].

11.8 dBm) of

with 1.02 V

% RF to DC conversion efficiency.

Comparison of this work to recent works commercial and academic works operating at

compares well with other recent works both in

the academic and commercial communities designed to operate at comparable RF

nergy levels and output loads. This work demonstrates two to three times the RF to

DC conversion effieincy of the RF energy scavenging system by the commercial RF

and about ten times the performance of

146

Comparison of This Work to Recent Academic Works in the Literature

Fig. 75 Comparison of this work to recent works tested under similar output loads and input power conditions.

Comparisons to prior work in the field can be difficult since performance is often

measured at different input power and output load conditions. However, despite the

fact that this work was optimized for operation at about -12 dBm input RF power, and

operates at over twice the RF frequency (2.2 GHz vs 900 MHz) which results in more

parasitic loss, this work compares well with prior recent academic works that were

optimized for very low input RF power levels (Fig. 75).

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

-31 -26 -21 -16

DC

Vo

lta

ge

(V

)

Input Power (dBm)

This Work (5 MΩ, 1 stage)

Umeda 2006 [97](>10 MΩ load, 1 stage)

Le 2008 [98](5.6 MΩ load, 36 stages)

Mandal 2007 [99](>5 MΩ load, 2 stage)

147

Conclusions

This work successfully demonstrates that despite restrictions inherent in the

aggressively small form factor of Smartdust systems, the voltage and power levels

necessary to operate Smartdust sensor nodes can be generated from RF energy

scavenging. Several improvements to the standard power matched Villard voltage

doubler enable 1 V to be generated with greater than 22% efficiency from RF energy

levels as low as -12 dBm while utilizing all on chip components. This is twice the

efficiency of the reference power matched Villard voltage doubler RF energy

harvesting circuit. The system consumes only .18 mm2 of chip space while

integrating all necessary impedance matching circuitry directly onto the CMOS chip.

Furthermore, the improvements presented in this paper can be implemented with the

features standard in any CMOS process, reducing the cost of large scale deployments

of RF energy scavenging technology.

This research demonstrates significant increases in the performance of RF power

harvesting integrated completely onto CMOS. With these performance increases, a

Smartdust system could potentially operate off of the ambient RF energy in the

environment due to cellular/television networks and wireless consumer electronics.

With recent advancements in on-chip antenna design [100][101], coupling this RF

energy harvesting system to a novel 1 V battery chemistry [102] would enable a

Smartdust node to self recharge from received RF emissions and provide continuous,

sustained operations for an indefinite period of time while occupying less than a cubic

centimeter of space.

148

149

Chapter 5: Improved Low Power Receiver Architecture

Introduction

Smartdust networks are characterized by the ad-hoc distribution in an area of many

dust size sensor devices. Ad-hoc distribution results in the non-optimal orientations

and placements of wireless nodes. Therefore, the physical layer implementation of

the transceiver must have a link margin sufficient to bridge air gaps even when 1/r3

path loss is encountered [16]-[20]. Given the 10 m transmission distance

characteristic of sensor networks [30], this results in up to 90 dB of path loss for

transmission in the ISM bands. Despite efficient power amplifier designs (>30%)

[32],[103], the limited power delivery capability of miniature battery technology

places an upper boundary on the output power of the transmitter to a few mW [34].

Furthermore, the random orientation of the transceiver necessitates a monopole

antenna design, limiting antenna gain. Thus, the ability to meet a 90 dB link margin

to overcome 1/r3 path loss over ten meters is largely a function of the receiver

sensitivity.

Because these networks must often operate in areas without any pre existing

infrastructure, they are typically required to operate for extended periods of time on

single battery charge. Unlike existing wireless networks, wireless sensor networks

have minimal bit rate requirements. These requirements are typically on the order of

bits per day [1]. Therefore, wireless sensor nodes spend the majority of time ready to

receive data as opposed to actively transmitting data [34]. Such low channel

150

utilization results in a transceiver dominated by the average power consumption of

the receiver architecture.

Given that average transceiver power consumption and link margin is largely

dominated by the performance of the receiver, careful design and optimization of the

receive architecture will have the most impact on the performance of a wireless

sensor network. For this reason, this work identifies the performance limiting

features of the non-coherent OOK receiver, proposes a receiver architecture to reduce

these performance limitations, and presents a methodology for optimizing the

multistage LNA of the receiver to meet a sensitivity requirement with minimal total

power consumption.

Design Methodology and System Architecture

Fig. 76 Proposed low power receiver architecture implementing RF energy scavenging circuit for

demodulation and an optimized multi-stage LNA.

151

To meet sensitivity requirements at the lowest possible power consumption, the non-

coherent on-off keying (OOK) receiver architecture in Fig. 76 is proposed. OOK is

less spectrally efficient than the more common phase-shift keying (PSK). However,

OOK can be implemented in a non-coherent architecture. Therefore, it provides

opportunities to reduce power consumption [94].

To provide reliable communications over 10 m distances in the presence of 1/r3 path

loss, the receiver must meet a -90 dBm sensitivity at 1 Mbps. A BER of 10-3

necessitates a peak SNR of better than 17 dB for a non coherent OOK receiver, and

thus, a receiver noise figure (NF) of 7 dB is necessary to meet the performance goal

(Eqn. 51).

dBNFreceiverN

SBWdBmySensitivitNFreceiverdB

dBdBm

7176017490

174

=−−+−=

−−+=

Eqn. 51. Required NF of the reciever to meet the -90 dBm sensitivity requirement for OOK receiver operating with a 10-3 BER. 1 MHz receiver bandwidth is assumed.

The receiver was implemented at a carrier frequency of 2.2 GHz to maintain

compatibility with several Smartdust related research works [101][104][105], but

could easily be implemented at the 2.4 GHz ISM band. To enable operation from

ultra small batteries and minimize power consumption, the receiver was designed to

operate from a 1 V supply rail. In addition, to meet the mm3 scale dimensions

required for Smartdust systems, no external passives were used.

152

Eqn. 52 applies the Friis formula to determine the noise figure of the receiver for the

proposed non-coherent OOK receiver architecture.

LNADEMOD

BBLNAreceiver GG

NFNFNF

⋅+=

Eqn. 52. Noise figure (NF) of the non-coherent OOK receiver depicted in Fig. 76 (Derivation Appendix A).

Given that the power loss of a conventional voltage rectifier used for non-coherent

demodulation results in a gain of approximately -50 dB for a weak input signal, the

receiver NF is dominated by the second term of Eqn. 52.

There are two primary means by which the receiver noise figure can be improved.

The first option is to reduce the loss incurred form the rectifying demodulator. The

second option is to increase the gain of the LNA stage without significant degradation

to the LNA noise figure. Since, the proposed application is for power limited

Smartdust systems, the improvement to gain must be accomplished at minimal

additional power consumption.

Power Matched Voltage Doubler for Demodulation

As stated previously, the sensitivity of an OOK receiver is degraded significantly due

to the lossy nature of the rectifying demodulator proposed in Fig. 76. To reduce

signal power loss and improve S/N ratio, a power matched Villard voltage doubler

implemented utilizing diode connected CMOS is proposed as the non-coherent

153

rectifying element in the receiver architecture (Fig. 77). Improvements to the lossy

nature of the rectifying demodulator directly results in less RF loss and, hence, less

supply power required to meet the receiver sensitivity requirement.

Fig. 77 Villard voltage doubler power matched to RF source.

Fig. 78 Conventional envelope detector connected to RF power source.

The Villard voltage doubler rectifies the full wave to deliver twice the voltage to the

base band circuitry than the more common half wave rectifier (Fig. 78). In addition,

power matching increases the voltage incident to the rectification circuitry, which

more strongly forward biases the diode connected MOSFETs. Stronger forward

biasing results in less power lost to the channel resistance of the diode connected

MOSFETs. Eqn. 53 presents an analytically derived expression for the gain of a

154

power matched Villard voltage doubler over a traditional half wave voltage rectifier

in terms of the input impedance, source resistance, phase angle between the real and

imaginary components of the input impedance, and loss from the power matching

circuit.

( ) matchingsource

indB Loss

R

ZGainPower −

⋅⋅=

φcoslog10

Eqn. 53. Power gain of RF energy harvesting circuit over conventional envelope detector.

The input impedance of the Villard voltage doubler (Zin) with a low incident RF

signal power represents a large and reactive impedance that is orders of magnitude

larger than the source impedance at the output of an LNA. Typical values of Zin,

Rsource, Lossmatching and φ represent a 17.6 dB gain over the traditional envelope

detector.

Fig. 79 BSIM 4.0 simulation of power gain of Villard voltage doubler over a conventional envelope detector.

0.0E+00

1.0E-03

2.0E-03

-55 -50 -45 -40 -35 -30 -25

Ou

tpu

t Vo

ltag

e (V

)

Incident Input Power (dBm)

Output Voltage vs Incident Input Power

Villard

Traditional

16 dB Gain

155

Fig. 79 presents a BSIM 4.0 simulation of the output voltage generated from a given

input power level for a power matched Villard voltage doubler and for a traditional

half wave envelope detection circuit. By identifying the input power levels points at

which each circuit achieves a given output voltage, the gain can be calculated. In this

case, by choosing 1 mV as the target output voltage, the simulations result in a gain of

approximately 16 dB. This compares well with the 17.6 dB theoretical predicted gain

and validates the analysis represented by Eqn. 53. As previously demonstrated from

Eqn. 52, a 16 dB reduction in the loss factor of the envelope detector corresponds

directly to 16 dB less gain required by the power hungry LNA section of the OOK

receiver to meet the desired sensitivity.

The use of an RF power harvesting circuit for demodulation also provides for

additional benefits beyond demodulation gain. RF power harvesting circuits have the

interesting property of attenuating large signals while allowing small signals to pass

unaffected. This effect is illustrated in Fig. 80 and Fig. 81.

156

Fig. 80 Normalized transient response of the Villard voltage doubler to a strong input signal (-13 dBm) and weak input signal (-43 dBm) modulated at 1 MHz.

Normalized demodulation response of Villard voltage doubler to a strong input RF signal and

weak input RF signal

Fig. 81 Normalized transient response of the Villard voltage doubler to a strong input signal (-13

dBm) and weak input signal (-43 dBm) modulated at 1 MHz.

0.0001

0.001

0.01

0.1

1

-50 -40 -30 -20 -10 0Dem

od

Vo

ltag

e A

mp

litu

de

(V)

RF Pin (dBm)

Output Voltage of Demodulator vs RF input Power

1 MHz Data Signal

DC Maximum Demodulated Voltage

157

As expected, strong signals show a faster charge time as the junction resistance of the

diode decreases. However, as the incident RF energy increases, the discharge time

increases. The longer discharge time corresponds to a larger RC time constant and

thus dominates the frequency response of the circuit resulting in a lower bandwidth.

By decreasing gain as signal strength increases, this effect can be used as a form of

automatic gain control and thus, increase the dynamic range of the system.

This effect can better by understood by examination of the equivalent circuit

modeling the demodulator and load at time t=0 after removal of the incident RF

power (Fig. 82).

(a)

(b)

Fig. 82 Power matched Villard voltage doubler acting as demodulator of on-off keyed RF sigal (a) and equivalent impedance presented to the demodulated signal after the RF signal has been

removed(b).

158

In the absence of an RF signal, NMOS1 and NMOS2 result in a leakage current as

demonstrated by the equation for the drain current of a MOSFET when VGS=0:

−−

⋅

−⋅⋅=

T

ds

T

thvth

eff

effds V

tV

Vn

VI

L

WtI

)(exp1exp)(

Eqn. 54. Leakage current of diode connected MOSFET when no RF signal is present

By approximating the resistance due to the leakage current as:

)0(

)0(~

=

=

tI

tVR

ds

dsleak

Eqn. 55. Approximation of MOSFET resistance due to leakage current and amplitude of demodulated signal.

And Expressing Rload as a multiple of Rleak:

leakload RnR ⋅=

Eqn. 56. Representation of load resistance as a multiple of the leakage resistance from the diode connected MOSFETs.

The output voltage as a function of time at point X can be derived as:

trtr eKeKX−+

⋅+⋅= 21

Eqn. 57. General solution to transient response of discharging voltage on Capacitor C1 (Derivation Appendix A).

Where:

159

2

41

14

11

2

122

1

2

2212

⋅

⋅−

+++

++−

=+

leakR

CCn

C

n

CC

n

C

r

Eqn. 58. First root of the auxiliary equation to the differential equation describing the circuit presented in Fig. 82b (Derivation Appendix A).

2

41

14

11

2

122

1

2

2212

⋅

⋅−

++−

++−

=−

leakR

CCn

C

n

CC

n

C

r

Eqn. 59. Second root of the auxiliary equation to the differential equation describing the circuit presented in Fig. 82b (Derivation Appendix A).

And

( )−+

+

−+⋅⋅

−⋅

⋅

++⋅⋅

−=rrCR

VVn

rCR

VKleak

leak

1

211

11

11

Eqn. 60. First constant to Eqn. 57 derived from the boundary conditions (Derivation Appendix A).

( )−+

+

−+⋅⋅

−⋅

⋅

++⋅⋅

=rrCR

VVn

rCR

Kleak

leak

1

211

2

11

Eqn. 61. Second constant to Eqn. 57 derived from the boundary conditions (Derivation Appendix A).

160

A quick plot of the discharge after time t at point X for a starting output voltage of 1V

and .001 V in Fig. 83 corresponds well with the discharge rate of the BSIM model in

Fig. 81.

Comparison of Discharge Curves of a Weak and Strong Voltage at the Output of Villard Voltage Doubler in the Absence of an Input RF Signal

Fig. 83 Normalized discharge curve of strong and weak demodulated signal from the Villard voltage doubler.

In addition, given that r+ (Eqn. 59) represents the largest RC time constant of the

demodulator, the bandwidth of an AC signal applied at node X from the demodulated

signal can be derived as:

161

2

41

14

11

2

122

1

2

2212

⋅

⋅−

++−

++

=leakR

CCn

C

n

CCn

C

BW

Eqn. 62. Demodulation bandwidth of the Villard voltage doubler (Derivation Appendix A).

As expected, the bandwidth (BW) of the demodulator is a function of the

demodulated voltage.

Demodulation Bandwidth of Villard Voltage Doubler vs. Demodulated Signal Strength

Fig. 84 Demodulation bandwidth of the Villard voltage doubler as a function of demodulated signal amplitude.

162

For typical values of n, C1, C2 and MOSFET parameters, sufficient bandwidth is

present to pass a weak demodulated signal at 1 MHZ while the limited bandwidth of

the demodulator passing a strong 1 MHz signal will result in significant attenuation

(Fig. 84).

Another advantage of the RF power harvesting circuit over the traditional voltage

rectifier utilized as an envelope detector is the frequency selectivity of the RF power

harvesting circuit. This frequency selectivity, illustrated in Fig. 86, can be compared

to the frequency response of a traditional envelope detector in Fig. 85.

Frequency Response of RF Power Harvesting Circuit

Fig. 85 Normalized output voltage vs frequency for an RF power harvesting circuit with 3dB

bandwidth points indicated by arrows.

163

Frequency Response of Conventional Envelope Detector

Fig. 86 Normalized output voltage vs frequency for an unmatched rectifier circuit.

An approximation to the 3 dB bandwidth of the RF power scavenging circuit

implemented in Fig. 77 can be derived by assuming the RF scavenger acts as a square

law detector when demodulating the RF signal:

( ) scavengerparasscavengersourcedB CfRRRBW ⋅⋅⋅++⋅−= 203 12 π

Eqn. 63. 3 dB bandwidth of the power matched Villard voltage doubler (Derivation Appendix A).

Where

scavengerscavengerin C

jRZ

⋅−=ω

164

Eqn. 64. Input impedance of the Villard voltage doubler depicted in Fig. 77 as a function of its real and capacitive elements.

0f is the frequency at which the RF power scavenger has been power matched to RF

source and Rparas represents the resistive losses resulting from the finite Q of the

matching inductor .

Typical values for the sum of Rsource, Rscavenger, and Rparas are 100 Ω, and Cscavenger is

about .2 pF resulting in a bandwidth of 390 MHz. This is consistent with the 3 dB

points indicated on Fig. 85 where the voltage is 1/√2 of the peak value.

This bandwidth reduction serves to help filter the received signal from interference

sources, reducing the need for additional RF filtering. Given that power loss must be

minimized in the circuit, Rscavenger must be approximately equal to Rsource, and Rparas

must be very small compared to Rscavenger and Rsource. Therefore, inspection of Eqn. 63

reveals that to minimize bandwidth and thus interference rejection while preserving

the sensitivity of the demodulator, it is important to minimize the capacitive

component of the RF power scavenger impedance and the parasitic resistances in the

network.

This reduction in bandwidth reduces the maximum system data rate, but given that

high-speed communication is not important for wireless sensor networks, the

reduction in bandwidth is less important than the improved performance in the

presence of interference.

165

Optimization of a Multi-Stage LNA

A reduction in the lossy nature of the non-coherent rectification circuitry alone is not

enough to meet the sensitivity requirement to reliably communicate over 10 m in a

high loss environment. As shown previously in Eqn. 52, a strong LNA gain can

affectively negate the increase in noise figure due to the lossy nature of the

rectification circuitry. The challenge is to realize a large RF gain in the multi-stage

LNA while consuming the minimal DC supply power.

Work by Meindl and Hudson studies how gain and power scale as a function of the

number of stages in various multi-stage amplifier designs with emphasis on bipolar

technologies [106]. In continuation of that work, Daly and Chandrakasan build upon

this approach through the efficiency metric:

( )LNA

LNA

P

GEfficiency

log=

Eqn. 65. Efficiency metric utilized by Daly and Chandrakasan.

This metric defines efficiency as a function of gain and power consumption of an

LNA and is used by Daly and Chandrakasan to optimize an untuned RF amplifier

topology (Eqn. 66). The contribution of NF and number of amplification stages on

the efficiency of a multistage is neglected [94].

166

( )LNA

LNA

X P

Glog0

∂∂

= (4)

Eqn. 66. Optimization of efficiency metric for variable X.

The methodology presented in this work expands upon these previous works by

recognizing that in addition to the gain and power consumption of each LNA stage,

the efficiency of an LNA design for a receiver is dependent upon the noise figure and

the number of RF amplification stages cascaded together in the receiver. Under these

constraints, an analytical methodology for meeting receiver noise figure requirements

at the minimum total power consumption of a multi-stage power constrained common

source LNA design is derived.

Through application of the Friis formula (Eqn. 67), the total NF of a receiver can be

divided into an equation defining the NF of a multi-stage LNA as a function of the

gain and noise figure of the individual LNA stages (Eqn. 68) and an equation defining

the NF of the receiver in terms of the NF from the baseband circuitry, NF of the multi

stage LNA, and gain of each LNA stages (Eqn. 69).

Κ321

4

21

3

1

21

111

GGG

NF

GG

NF

G

NFNFNF

⋅⋅

−+

⋅

−+

−+=

Eqn. 67. Friis formula. Determines total NF or a receiver as a function of each stage’s noise figure and gain.

∑=

− +−

=n

ii

LNA

LNAstagesLNAn

G

NFNF

11__ 11

Eqn. 68. NF of multi-stage LNA.

167

nLNA

DEMODBBstagesLNAnreceiver

G

NFNFNF

1&__

−+=

Eqn. 69. NF of the receiver depicted in Fig. 76 comprised of multi-stage LNA, demodulator, and baseband circuitry.

The summation in Eqn. 68 can be recognized as a geometric series and simplified to:

[ ]∞∈+

−⋅

−

−= ,111

1

111

__ nG

G

NFNF

nLNA

LNA

LNAstagesLNAn

Eqn. 70. Simplification of Eqn. 68 as a geometric sequence.

Eqn. 69 and Eqn. 70 can be combined to determine the required number of stages as a

function of the NF of the non LNA stages, desired NF for the receiver, and

performance parameters (NF and gain) of the individual stages of the multi-stage

LNA (Eqn. 71).

−

−+−

−

−+−

=

LNA

LNA

LNABB

LNA

LNA

G

G

NFNF

G

NFNFreq

n1log

111

1

11

11

log

Eqn. 71. Minimum number of LNA stages to meet receiver noise figure requirement.

By assuming power consumed by the baseband stage is very small compared to the

power required by the RF amplifier stages, the total power consumed by the receiver

is approximately equal to the sum total of the power consumed in each LNA stage.

168

LNAreceiver PnP ⋅=

Eqn. 72. Power consumption of optimized multi-stage LNA.

By performing an optimization of the total power draw of the multi-stage LNA as the

NFLNA goes to zero, this analysis converges to the less accurate power and gain

analysis of previous works in the field represented by Eqn. 65 and Eqn. 66. This

result demonstrates this work to be a more complete and comprehensive analysis than

the analysis of prior works.

( )LNA

LNA

LNA

LNALNA

LNA

resttotaldraw

LNA

LNA

LNA

LNArest

LNA

LNA

NFLNAtotaldraw

G

PC

G

PCP

G

NF

NFreq

P

P

G

G

NFNF

G

NFNFreq

PnPLNA

log1log1log

1

1log

1log

111

1

111

1

log

_

0_ lim

⋅−=

⋅=⋅

−−

=

⋅

−

−+−

−

−+−

=⋅=→

Eqn. 73. Convergence of the optimization methodology proposed by this work to the inverse of

the metric utilized by Daly and Chandrakasan as NF of the LNA converges to zero.

( )( )

( )LNA

LNA

X

LNA

LNA

XLNA

LNA

XX

P

G

P

G

G

PCtotalPdraw

log0

log

log_0

∂∂

=

∂∂

=∂∂

⋅−=∂∂

=

Eqn. 74. Equivalency of an optimization performed on the methodology proposed by this work to

an optimization of the metric utilized by Daly and Chandrakasan as NF of the LNA converges to zero.

169

We now have the total power consumption of the receiver as a function of the gain,

NF, and power consumption of a single stage of the multistage LNA; noise figure of

the baseband of the receiver; and required receiver noise figure (Eqn. 71 and Eqn.

72).

Up to this point, the treatment presented is a generalization that applies to a receiver

utilizing a multi-stage LNA comprised of any RF amplifier topology. In this work,

the power restricted common source cascode LNA depicted in Fig. 87 was

implemented due to its good noise performance and narrow band operation.

Fig. 87 Common source cascode low noise amplifier implemeted in the multi-stage LNA design of this work

170

For the common source LNA, all three performance parameters (supply power, gain,

and noise figure) are determined by the level of channel inversion of the MOSFET,

M1, in Fig. 87. Proper optimization between weak and strong inversion is necessary

to optimize between the superior gm of sub-threshold operation and the larger ft of a

MOSFET operating in strong inversion. The level of inversion is a function of the

bias voltage (Vbias) indicated in Fig. 87. Therefore, Vbias is the variable over which

the gain, noise figure and supply current must be optimized over.

There are several methods for determining the performance parameters of the LNA as

a function of Vbias including the application of a spice based simulator or direct

measurement through fabrication. The method chosen in this work is to analytically

model the power supply consumption, gain, and noise figure of the LNA as a function

of the performance limitations of the common source cascode LNA topology

implemented in CMOS. This methodology will be validated against both simulated

and measured data.

Power consumption for the common source LNA can be defined as the supply

voltage times the channel current of the MOSFET.

SupplydsLNA VIP ⋅=

Eqn. 75. Power supply consumption of a single common source cascode LNA stage.

171

Where Ids is modeled as an exponential function (Eqn. 76) for sub-threshold operation

and quadratic function (Eqn. 77) when operating in strong inversion [87].

( ) ( )( )thbiasoxn

plythbiasoxnstrong

VVRsxL

WCu

VVV

L

WCuI

−⋅⋅⋅⋅+

⋅+⋅−⋅⋅

⋅=

1

1

2sup

2 λ

Eqn. 76. Supply current of LNA biased in strong inversion.

−−

⋅

−=

t

ply

t

thbiastweak V

V

Vn

VVI

L

WI supexp1exp

Eqn. 77. Supply current of LNA biased in weak inversion.

Where transistor gate length is the minimum supported by the process and optimal

transistor width can be approximated for a power restricted common source LNA

operating at 2.2 GHz as 114 um [107].

GHzopt freq

GHzumW

⋅=

250

Eqn. 78. Optimal transistor width for power restricted common source cascode LNA.

The transition between these two modes of operation is modeled as a weighted

average.

)1( MIMII strongweakds −⋅+⋅=

Eqn. 79. Supply current of common source cascode LNA as a weighted average of the drain current modeled by weak and strong inversion.

172

Where the weight factor, M, is defined as:

( ) ( )

( )tthbias

tthbiastht

thbias

thbias

VnVVM

VnVVVVn

VVM

VVM

⋅⋅+≥=

⋅⋅+<<

⋅⋅−−

=

≤=

20

22

1

1

Eqn. 80. Weight factor used to properly model the drain current of a common source cascode LNA.

Assuming the LNA has been power matched at both input and output, circuit analysis

of a cascode LNA implemented in CMOS and associated parasitic sources reveals an

analytical expression for the gain of the LNA as:

⋅⋅⋅⋅= source

loadmingain R

RgQdBP

2log10)(

2

Eqn. 81. Power gain common source cascode LNA (Derivation Appendix A).

Where Rsource is the impedance of the RF source driving the LNA and Rload is the

output resistance at the output of the LNA. Qin is the voltage gain due to the input

matching circuit and is expressed as:

( )gatesourcegatein RRCf

Q+⋅⋅⋅⋅

=π2

1

Eqn. 82. Voltage gain of input power matching circuit for common source cascode LNA.

Where Cgate is derived from the gate dimensions and the oxide capacitance:

173

effeffoxgate LWCC ⋅⋅⋅=3

2

Eqn. 83. Parasitic gate capacitance of common source cascode LNA.

And the work by Jin et al. provides an analytical model for the gate resistance [89].

⋅⋅⋅⋅⋅++

⋅

⋅⋅=

toxneff

effs

efff

effresgate VCuWn

LR

Ln

WRR

12

1

12

12

Eqn. 84. Parasitic gate resistance of common source cascode LNA.

Finally, by recognizing that the input matching inductor is resonantly matched to the

gate capacitance of M1, the noise figure can be modeled from the analysis in [108].

source

d

T

gatesource

source

gateLNA R

g

f

RRf

R

RNF 0

221 ⋅

+++= λ

Eqn. 85. Noise figure (NF) of common source cascode LNA.

Where the parameter gd0 represents gds evaluated when Vds is equal to 0 V, and λ is a

fitting parameter.

We have now developed completely analytical expressions to predict the performance

parameters of an individual LNA stage. To validate the model, the power restricted

common source cascode LNA was fabricated in a 130 nm process. Fig. 89 through

Fig. 91 illustrate the strong agreement between the analytical models and measured

performance of the common source cascode LNA as a function of bias voltage.

174

Fig. 88 Image of fabricated common source cascode LNA.

Power Gain vs. Bias Voltage for Common Source Cascode LNA

Fig. 89 Comparison of measured and analytically modeled power gain of common source cascode

LNA as a function of bias voltage.

0.34 0.36 0.38 0.4 0.42 0.44 0.465

10

15

20

Bias Voltage (V)

Po

we

r G

ain

(d

B)

ModelMeasured

175

Power Consumption vs. Bias Voltage for Common Source Cascode LNA

Fig. 90 Comparison of measured and analytically modeled DC supply power consumption of

common source cascode LNA as a function of bias voltage.

Noise Figure vs. Bias Voltage for Common source Cascode LNA

Fig. 91 Comparison of measured and analytically modeled noise figure of common source cascode LNA as a function of bias voltage.

0.34 0.36 0.38 0.4 0.42 0.44 0.460

0.2

0.4

0.6

0.8

1

1.2

1.4

Bias Voltage (V)

Sin

gle

LNA

Sta

ge P

ower

Con

sum

ptio

n (m

W)

ModelMeasured

0.34 0.36 0.38 0.4 0.42 0.44 0.462.5

3

3.5

4

4.5

5

Bias Voltage (V)

Noi

se F

igu

re (

dB

)

MeasuredModel

176

As stated, the design goal was to achieve a sensitivity of -90 dBm at a data rate of 1

Mbps. Thus, a receiver NF of 7 dB is necessary to meet the performance goal. Given

the LNA performance metrics provided by Eqn. 75, Eqn. 81 and Eqn. 85, in addition

to the baseband NF, the required number of stages and total power consumption can

be plotted as a function of Vbias from Eqn. 71 and Eqn. 72.

Total Power Consumption vs. Bias Voltage for the Optimal Multi-Stage LNA Design

Fig. 92 Comparison of measured and analytically modeled total power consumption of optimized

multi-stage LNA as a function of bias voltage.

0.34 0.36 0.38 0.4 0.42 0.44 0.461

1.5

2

2.5

3

3.5

Bias Voltage (V)

To

tal P

ow

er C

on

sum

ptio

n (m

W)

ModelMeasured

177

Number of Stages vs. Bias Voltage for the Optimal Multi-Stage LNA Design

Fig. 93 Comparison of measured and analytically modeled number of LNA stages necessary to meet

receiver noise figure requirement as a function of bias voltage.

As shown in Fig. 92, the analytical model and the measured data predict that the

required receiver noise figure of 7 dB can be met with only 1.32 mW of total supply

power by electing a bias voltage of .38 V. This result requires four stages of

amplification to meet the –90 dBm sensitivity (Fig. 93).

Receiver design is often a series of trade offs and optimization between design

parameters. Chip die area is an important design parameter. Four stages of RF

amplification consumed a prohibitive amount of die space. For this reason,

0.34 0.36 0.38 0.4 0.42 0.44 0.462

3

4

5

6

7

8

9

10

Bias Voltage (V)

Nu

mb

er o

f Sta

ge

s

ModelMeasured

minimizing the number of amplification stages is an important design goal. Towards

that goal, through an exam

the number of RF amplification stages can be realized through minor increases in

supply power draw. Therefore, the bias point was set at .41 V, requiring only three

stages of RF amplification and 1.6 mW of total power draw as predicted from

measured performance par

power gain and a noise figure of 2.85 dB.

Lastly, to complete the characterization of the individual LNA stages, the third o

intermodulation product and 1 dB compression point were determined.

Output Power vsand 3rd Order Tone (2.2 GHz,

Fig. 94 Output power vs. input pts). The intersection of these two lines determines the third order intermodulation point (IIP3 and

178

minimizing the number of amplification stages is an important design goal. Towards

that goal, through an examination of Fig. 92 and Fig. 93, we can see that reductions in

of RF amplification stages can be realized through minor increases in

supply power draw. Therefore, the bias point was set at .41 V, requiring only three

stages of RF amplification and 1.6 mW of total power draw as predicted from

measured performance parameters. This results in a multi-stage LNA with 46 dB of

power gain and a noise figure of 2.85 dB.

Lastly, to complete the characterization of the individual LNA stages, the third o

intermodulation product and 1 dB compression point were determined.

Output Power vs. Input Power for Fundamental and 3rd Order Tone (2.2 GHz, .41 V bias)

nput power for fundamental (blue data pts) and 3rd order of these two lines determines the third order intermodulation point (IIP3 and

OIP3).

minimizing the number of amplification stages is an important design goal. Towards

, we can see that reductions in

of RF amplification stages can be realized through minor increases in

supply power draw. Therefore, the bias point was set at .41 V, requiring only three

stages of RF amplification and 1.6 mW of total power draw as predicted from

stage LNA with 46 dB of

Lastly, to complete the characterization of the individual LNA stages, the third order

rder tone (red data of these two lines determines the third order intermodulation point (IIP3 and

Because the LNA is a narrowband device the two tone test was used. This test

requires two closely spaced balanced tones to be injected into the LNA at the

operational frequency. By plotting the intersection of the output power level of the

fundamental tones with the third order tones versus the input power, we can

determine the third order intermodulation point (IIP3). This measurement and the

resulting IIM3 for the LN

The resulting IIP3 and output third order intercept point (OIP3) are

3.5 dBm, respectively.

Output Power vs Input Power for Fundamental

Fig. 95 Output power vs input

179

Because the LNA is a narrowband device the two tone test was used. This test

requires two closely spaced balanced tones to be injected into the LNA at the

requency. By plotting the intersection of the output power level of the

fundamental tones with the third order tones versus the input power, we can

determine the third order intermodulation point (IIP3). This measurement and the

resulting IIM3 for the LNA operating at a .41 V bias voltage are plotted in

The resulting IIP3 and output third order intercept point (OIP3) are -18.5 dBm and

Output Power vs Input Power for Fundamental Tone (2.2GHz, .41V bias)

nput power for fundamental tone (2.2GHz, .41V bias). This plot is used to determine the 1 dB compression point.

Because the LNA is a narrowband device the two tone test was used. This test

requires two closely spaced balanced tones to be injected into the LNA at the

requency. By plotting the intersection of the output power level of the

fundamental tones with the third order tones versus the input power, we can

determine the third order intermodulation point (IIP3). This measurement and the

A operating at a .41 V bias voltage are plotted in Fig. 94.

18.5 dBm and -

. This plot is used to

180

By plotting the output power level of the fundamental tone versus the input power,

we can determine the 1 dB compression point. The point where the measured gain is

1 dB less than the expected linear interpolation of the gain at lower input RF power

levels, is the 1 dB compression point. This measurement and the resulting 1 dB

compression point for the LNA operating at a .41 V bias voltage are plotted in Fig.

95. The resulting input 1 dB compression point and output 1 dB compression point

are -23 dBm and -9 dBm, respectively.

Baseband

The base band consists of a sequence of four differential amplifiers followed by an

op-amp comparator to provide digital output levels. To reject supply rail and

substrate noise generated by the RF amplification stages and any digital electronics

incorporated on-chip, a differential design was adopted for the base band

amplification circuitry (Fig. 96).

Fig. 96 Single stage of multi-stage baseband differential amplification circuit.

181

Although differential base band circuitry draws approximately 3 dB more power than

the common mode counterpart, given the low power consumption relative to the RF

amplification stages, differential amplification does not significantly increase total

receiver power draw.

Fig. 97 Cumulative voltage gain after each stage of baseband amplification versus frequency.

In addition, to reject the DC offset introduced by transistor mismatch and minimize

noise to improve the S/N ratio, band pass filtering is provided utilizing capacitors C1,

C2 and C3 (Fig. 97).

182

Fig. 98 Comparator design implementing Miller capacitor to increase stability.

The comparator was designed as an op-amp depicted in Fig. 98 utilizing the Miller

effect (CMiller) to increase phase margin and prevent ringing [109]. Each stage of

baseband amplification draws less than 8 uA, while the comparator draws less than 20

uA for a total base band current draw of approximately 52 uA.

Given the AC coupled nature of the base band circuitry, an encoding scheme that

minimizes the DC component of the base band signal is required. A popular option is

Manchester encoding.

183

Measurements

An experimental prototype of the receiver was fabricated utilizing an IBM 130 nm

CMOS process (Fig. 99). The design was realized on a die measuring 2 mm by 2 mm

while the space consumed by the receiver measured approximately 1.0 mm2.

Particular attention was paid towards minimizing parasitic capacitance between the

RF lines and the substrate.

Fig. 99 Image of fabricated low power receiver

Validating the analytical model, a BER of 10-3 was measured at the predicted .41 V

multi-stage LNA biasing voltage. The total power consumption is only 1.6 mW from

the 1 V supply rail. In addition, the receiver shows good performance up to the

measured input RF power level of –20 dBm providing good dynamic range. TABLE

V summarizes the measured performance metrics.

184

TABLE V PERFORMANCE METRICS OF LOW POWER RECEIVER AND SUBCOMPONENTS

Specifications

Receiver Performance Implementation

Sensitivity (BER=10-3) -90 dBm Transmission Frequency 2.2 GHz

Power Consumption 1.6 mW Technology .13 um CMOS

Energy per Bit 1.6 nJ/bit Die Area Used 1 mm2

Data Rate 1 Mbps Supply Voltage 1 V

Single-Stage LNA Performance Multi-Stage LNA Performance

Gain 15.5 dB Gain 46 dB

Power Consumption .5 mW Power Consumption 1.6 mW

Noise Figure 2.8 dB Noise Figure 2.85 dB

IIP3 -18.5 dBm

Output 1 dB Comp. Pt. -9 dBm

RF Scavenging Demodulator

Gain vs Voltage Rectifier 17.6 dB

Power Consumption 0 mW

Baseband

Voltage Gain 30 dB

Filter Bandwidth (3dB) 1 MHz

Power Consumption .05 mW

Conclusions

An ultra low power OOK receiver with a link margin suitable for challenging

transmission environments has been presented. Among the notable design attributes

are a completely analytical methodology for optimizing a multi-stage LNA and use of

a RF power harvesting circuit for passive demodulation. To meet the -90 dBm

desired receiver sensitivity, application of the optimization methodology presented

185

results in an LNA design with 46 dB of gain and a 2.85 dB noise figure that consumes

only 1.6 mW of total power.

Fig. 100 Comparison of the energy effiency of the low power receiver design resulting from this work

to other low power receiver designs in the literature.

Good agreement has been demonstrated between predicted performance and

measured receiver performance. The 2.2 GHz OOK receiver meets the design

requirement of –90 dBm sensitivity at 1 Mbps while drawing only 1.6 mW of power

from a 1 V supply rail. In addition, the receiver architecture consumes just 1 mm2 of

die space and requires no external passives, thus preserving the cm3 scale form factor

necessary for Smartdust sensor networks. These results compare favorably with prior

work in the field (Fig. 100) and demonstrate that significant improvements in

sensitivity can be achieved with minimal additional power consumption.

1.E-10

1.E-09

1.E-08

1.E-07

1.E-06

-100-90-80-70-60-50-40-30-20-100

En

erg

y p

er B

it (J

/bit)

Sensitivity (dBm)

Comparison of Low Power Receiver Designs

Daly [30]

Porret [15]

This work

Molnar [110]

186

187

Chapter 6: Conclusions

Smartdust is the realization of wireless sensor networks in a sub-cubic centimeter

form factor. Through the random distribution of Smartdust nodes, sensor networks

can quickly be established to remotely monitor large regions of area. To minimize

deployment costs, individual nodes will be fabricated in CMOS taking advantage of

economies of scale. The advantages of sensor networks to assist in disaster relief, the

military, health care, and business activities have resulted in their being the subject of

significant research in recent years.

The development of Smartdust sensor networks is not without considerable research

and design challenges. The aggressive form factor of Smartdust sensor networks

limits the ability of on system energy storage to meet system life time requirements

that can measure in months to years. As demonstrated in Chapter 1, various research

efforts are under way to extend the operation life time of Smartdust sensor networks

through energy scavenging from energy sources commonly available in the

environment. In addition, previous works have demonstrated that Smartdust sensor

networks transmit little data and thus life time is dominated by power consumption of

the receiver. Works in the literature have proposed various approaches to lowering

receiver power consumption. However, to extend system life time, it is desirable that

the energy required to receive a bit of data be minimized. Towards this goal, 1 nJ of

energy consumption per bit represents the state of the art for low power receiver

188

design. However, the random distribution of Smartdust sensor networks results in a

difficult transmission environment that can be characterized by 1/r3 path loss. As a

result, work in the literature that achieves the 1 nJ energy consumed per bit of data

received, are not sensitive enough to provide sufficient link margin to provide

communication over 10 meter distances, and receivers that demonstrate sufficient link

margin to communicate over 10 meters, reduce system life time by at least an order of

magnitude.

This work is resolving some of the issues associated with Smartdust networks by

addressing the challenges resulting from such a small form factor, limited power

supply and difficult transmission environment.

As demonstrated through a comprehensive RF energy survey reported in Chapter 2,

this work confirms that sufficient RF energy levels are available in the environment

from the cellular and UHF TV communications infrastructure to supply power to a

Smartdust sensor node. Thus, this work demonstrates the exciting potential of the

cellular and UHF TV wireless networks deployed throughout the country to provide a

cheap and abundant source of energy for Smartdust sensor networks.

To assist in achieving the RF to DC power conversion efficiencies necessary to power

Smartdust nodes from RF energies found in the environment, a parasitic aware

analytical model of the power matched Villard voltage doubler implemented in

CMOS was derived and validated against simulated and measured data. This model

189

represents the most comprehensive and accurate analytically derived model of a

power matched Villard voltage doubler integrated onto CMOS to date. Through the

study of this model, under incident power level conditions representative of RF power

levels present in the environment, the dominate sources of parasitic loss were

identified as the threshold voltage loss of the diode connected MOSFETs and the

parasitic gate losses at the input to the Villard voltage doubler. The need to lower

threshold voltages is a well known mechanism for improving power harvesting

performance, however, the need to lower parasitic gate losses is a result newly

reported in this work. In addition, this model was used to characterize the effect of

stacking multiple Villard voltage doubler stages on RF to DC conversion efficiency.

Finally, this model is used as a rapid optimization tool for predicting optimal design

parameters in a power matched Villard Voltage doubler.

Modifications of the power matched Villard voltage doublers to reduce parasitic

losses are developed in Chapter 4. To reduce losses incurred from parasitic losses at

the input of the Villard voltage doubler, a parasitic resistant matching network is

presented and analyzed. Subsequent fabrication and measurement demonstrate a 70

percent improvement over the conventional design of a power matched Villard

voltage doubler. In addition, threshold voltage losses are minimized through the

novel modification of the Villard voltage doubler through a PMOS with floating body

to enable sacrificial current biasing resulting in an additional 50 percent RF to DC

conversion efficiency. The cumulative effect of these design improvements is a more

than doubling (126% improvement) in RF to DC power conversion efficiency. A

190

newly reported result of this work identified that when implementing techniques to

remove threshold voltage, the slope of the diode connected MOSFET’s I-V curve

limits RF scavenging performance. In the IBM 130 nm process utilized in this work,

the standard MOSFET displays a larger slope to the I-V curve than MOSFET options

that implement doping techniques to lower the threshold voltage. Thus, the

conclusion of prior work in the literature that low threshold voltage MOSFETs are

preferable is not correct. The design improvements presented in this work result in an

RF energy scavenging system that demonstrates superior performance to current

commercial products.

To further enhance the operational lifetime of Smartdust sensor nodes, in Chapter 5

this work presents a Smartdust receiver topology compatible with voltage levels

produced by the RF energy scavenging work in chapter 4 (1 V), that lowers power

consumption through the novel use of an RF power harvesting circuit to improve

sensitivity. This technique is demonstrated to improve sensitivity by over 17 dB at no

additional power consumption. In addition, the novel ability of this technique to

reduce bandwidth and thereby improve rejection of interfering signals, as well as

improve dynamic range, is studied and validated. Given the poor propagation

environment of Smartdust sensor networks, to meet the sensitivity requirement

necessary to transmit data over 10 meters, RF gain is necessary in the LNA of the

non-coherent OOK receiver architecture presented in this work. To achieve sufficient

gain to meet the required receiver sensitivity, this work presents a novel methodology

to optimize a multi-stage low noise amplifier to meet receiver NF requirements at

191

minimal supply power consumption. Through the application of this methodology, an

LNA generating 46 dB of gain with a NF of 2.85 dB while consuming just 1.6 mW of

power has been fabricated and measured. Utilizing these design improvements, a full

RF to digital level non-coherent OOK receiver has been fabricated and tested that

demonstrates a -90 dBm sensitivity while consuming just 1.6 nJ/bit received. This

represents a 30 dB increase in sensitivity over receiver designs of comparable energy

draw and an order of magnitude decrease in power consumption versus receiver

designs of comparable sensitivity.

The realization of Smartdust sensor networks is a project of considerable ambition

and challenge. The success achieved by this work in RF energy scavenging and ultra-

low power received design, represent major contributions towards the completion of a

Smartdust sensor node. Given a modest duty cycle of ~1%, the research presented by

this work could enable the design of a sensor node unconstrained by operational life

time limitations. The work presented by this research is implemented completely in

CMOS with very modest die space requirements, therefore the cost of implementation

of a Smartdust node can be measured in pennies per node resulting from economies

of scale in CMOS fabrication. Such a system would have advantages in cost,

flexibility, rapid deployment and robustness that could lead to the application of

Smartdust sensor networks in all aspects of life.

192

193

Appendix A – Derivation of Select Results

This appendix presents derivations of equations novel to this work that have not been

previously derived in the main text.

Output voltage of the Villard voltage doubler resulting from the RF power

source depicted in Fig. 62 (Derivation Appendix A). (Eqn. 47 p. 128)

The real power transferred to a Villard voltage doubler as represented by the load Zin

in Fig. 62 can be expressed as:

⋅=⋅=

*

* ReRein

ininininin Z

VVIVP (1)

=

*2 1

Rein

inin ZVP (2)

=2

2Re

in

ininin

Z

ZVP (3)

=in

in

in

inin Z

Z

Z

VP Re

2

(4)

( )ϕcos2

in

inin Z

VP = (5)

Where ϕ is the phase angle between the real and imaginary components of the

voltage doubler impedance. In addition for a power matched source of impedance

Rsource, the real power transferred must equal:

194

source

source

in R

V

P

2

2

= (6)

These two expressions for Pin can be equated and solved for Vin:

( )φcos2 ⋅=

source

insourcein R

ZVV (7)

Given that a Villard voltage doubler doubles the voltage incident at its input minus a

threshold voltage, the output voltage can be expressed as:

thinout VVV ⋅−⋅= 22 (7)

Insertion of Vin above into the equation for Vout results in the final equation:

( ) thsource

insourceoutput V

R

ZVV ⋅−

⋅= 2

cosφ (9)

195

Conditions under which the power matched Villard voltage doubler

will outperform a non power matched Villard voltage doubler

(Derivation Appendix A). (Eqn. 49 p. 128)

Power matching improves the power output of a Villard voltage doubler when:

unmatchedmatched PoutPout > (1)

Which can be simplified to:

out

unmatched

out

matched

R

Vout

R

Vout 22

> (2)

And, finally:

unmatchedmatched VoutVout > (3)

The previously derived Eqn. 47 presents an expression for Voutmatched:

( ) thsource

insourcematched V

R

ZVVout ⋅−

⋅= 2

cosφ (4)

Furthermore, for an unmatched RF power harvesting circuit as depicted in Fig. 63, at

RF frequencies the capacitive element of the RF power harvesting circuit results in a

highly reactive load where:

insource ZR << (5)

Thus, Vinunmatched can be expressed as:

sourcematched VVin = (6)

And the voltage doubling nature of the Villard voltage doubler results in a

Voutunmatched of:

196

thsourcematched VVVin ⋅−⋅= 22 (7)

The expressions for Voutmatched and Voutunmatched can now be applied to (6) resulting

in:

( ) thsourcethsource

insource VVV

R

ZV ⋅−⋅>⋅−

⋅222

cosφ (8)

And simplifies to:

( ) sourcesource

insource V

R

ZV ⋅>

⋅2

cosφ (9)

( )2

cos>

⋅ φsource

in

R

Z (10)

Thus, deriving the inequality of Eqn. 49 for the condition under which power

matching out performs a non power matched system.

197

Noise figure (NF) of the non-coherent OOK receiver depicted in Fig.

76 (Derivation Appendix A). (Eqn. 52 p. 152)

The Friis formula states that for a receiver of n stages:

...111

321

4

21

3

1

21 +

⋅⋅−

+⋅

−+

−+=

GGG

NF

GG

NF

G

NFNFNFtotal (1)

Thus application of the Friis formula to the non-coherent OOK receiver depicted in

Fig. 76 yields:

LNAstagenDEMOD

BB

LNAstagen

DEMODLNAstagenreceiver GG

NF

G

NFNFNF

______

11

⋅−

+−

+= (2)

For a passive demodulator that attenuates the signal as is the case with any type of

envelope detector or RF energy scavenger then the noise figure of the demodulator is

equivalent to the signal attenuation. Signal attenuation is defines as the inverse of

gain. Thus:

DEMODDEMOD G

NF1

= (3)

Which allows the expression for the noise figure of the receiver to be simplified to:

LNAstagenDEMOD

BB

LNAstagen

DEMODLNAstagenreceiver GG

NF

G

GNFNF

______

11

1

⋅−

+

−

+= (4)

( )LNAstagen

BBDEMOD

LNAstagen

DEMODLNAstagenreceiver G

NFNF

G

NFNFNF

______

11 −⋅+

−+= (5)

LNAstagen

DEMODBBDEMODDEMODLNAstagenreceiver G

NFNFNFNFNFNF

____

1 −⋅+−+= (6)

198

LNAstagen

BBDEMODLNAstagenreceiver G

NFNFNFNF

____

1−⋅+= (7)

The noise figure of the demodulator is highly lossy and as a result NFDEMOD >> 1

simplifying the expression for the noise figure to:

LNAstagen

BBDEMODLNAstagenreceiver G

NFNFNFNF

____

⋅+= (8)

And finally given the relationship between the noise figure and gain of a non coherent

envelope detector or RF energy harvesting circuit, the noise figure of the receiver can

be expressed as:

LNAstagenDEMOD

BBLNAstagenreceiver GG

NFNFNF

____ ⋅

+= (9)

199

Demodulation Response of a Villard Voltage Doubler to an AC signal

(Eqn. 57-Eqn. 62 p. 158-161)

Equations (1) and (2) can be derived through the application of Kirchhoff’s current

law at the nodes corresponding to voltage levels X and Y in Fig. 82.

YCR

Y

R

YXdtd

leakleak2+=

− (1)

leakleakdtd

Rn

X

R

YXXC

⋅+

−=− 1 (2)

Through algebraic manipulation and differentiation (2) becomes

+⋅+⋅=n

XXCRY dtd

leak

111 (3)

+⋅+⋅=n

XXCRY dtd

dtd

leakdtd 1

12

2

1 (4)

By plugging (3) and (4) into (1)

+⋅+⋅+

+⋅+⋅

=

+⋅−⋅−

nXXCRC

R

nXXCR

R

nXXCRX

dtd

dtd

leakleak

dtd

leak

leak

dtd

leak 11

11

11

2

2

12

11 (5)

+⋅+⋅=

+⋅⋅−⋅⋅−

nXXCRC

R

nXXCRX

dtd

dtd

leakleak

dtd

leak 11

1122

2

2

12

1

(6)

+⋅+⋅=⋅⋅−

+⋅−

nXXCRC

R

XCRn

X

dtd

dtd

leakleak

dtd

leak 11

22

1

2

2

12

1

(7)

+⋅⋅+⋅⋅=⋅−

+⋅−

nXCXCRCXC

R

nX

dtd

dtd

leakdtd

leak

112

21

2121 2

2

(8)

200

leakdtd

dtd

leak R

nX

Xn

CCXCRC

+⋅+

+⋅+⋅+⋅⋅=

21

1120 2112 2

2

(9)

1212

212

11

12

0 2

2

CRCRn

X

XCRC

nCC

Xleakleak

dtd

leakdtd

⋅⋅⋅

+⋅+

⋅⋅

+⋅+⋅

+= (10)

And to simplify (10) we define the constants A, B and C resulting in (12):

1=A 12

21

112

CRC

nCC

Bleak ⋅⋅

+⋅+⋅

= 1

22

21

CRC

nC

leak ⋅⋅

+= (11)

XCXBXA dtd

dtd ⋅+⋅+⋅= 2

2

0 (12)

(12) is a second order differential equation and results in the auxiliary equation:

CrBrA +⋅+⋅= 20 (13)

Using the quadratic formula we get:

A

CABBr

⋅⋅⋅−±−

=2

42

(14)

And by plugging (11) into (14), we get:

2

21

4

112

112

12

2

12

21

12

21

CRCR

n

CRC

nCC

CRC

nCC

r

leakleakleakleak ⋅⋅⋅

+⋅−

⋅⋅

+⋅+⋅

±⋅⋅

+⋅+⋅

−

= (15)

Which simplifies to:

201

2

21

4

112

112

12

2

12

21

12

21

⋅

⋅

+⋅−

⋅

+⋅+⋅

±⋅

+⋅+⋅

−

=leakR

CC

n

CC

nCC

CC

nCC

r (16)

2

21

4

11

21

12

12

2

1212

⋅

⋅

+⋅−

++±

++−

=leakR

CC

n

C

n

CC

n

C

r (17)

2

21

4

114

11

41

12

12122

1

2

2212

⋅

⋅

+⋅−

⋅

++

++±

++−

=leakR

CC

n

CC

n

C

n

CC

n

C

r (18)

2

41

14

11

2

122

1

2

2212

⋅

⋅−

++±

++−

=leakR

CCn

C

n

CC

n

C

r (19)

We explicitly define each solution of r:

2

41

14

11

2

122

1

2

2212

⋅

⋅−

+++

++−

=+

leakR

CCn

C

n

CC

n

C

r (20)

2

41

14

11

2

122

1

2

2212

⋅

⋅−

++−

++−

=−

leakR

CCn

C

n

CC

n

C

r (21)

202

Given that (20 and (21) must always be positive, the auxiliary equation in (13) has a

general solution of the form:

trtr eKeKX−+

⋅+⋅= 21 (22)

Boundary condition that the voltage equals V1 at t = 0 give us:

121 VKK =+ (23)

A second boundary condition is obtained by plugging (22) into (2):

( )leak

trtr

trtrdtd

R

YeKn

eKn

eKeKC

−⋅⋅

++⋅⋅

+=⋅+⋅−

−+

−+21

211

11

11

(24)

Which simplifies to:

( ) YeKn

eKn

erKerKCR trtrtrtr −⋅⋅

++⋅⋅

+=⋅⋅+⋅⋅⋅⋅−−+−+ −+

21211

11

11 (25)

And has a boundary condition of Y=V2 at t=0, resulting in:

( ) 221211

11

11 VK

nK

nrKrKCRleak −⋅

++⋅

+=⋅+⋅⋅⋅− −+ (26)

And simplifies to:

2221111

11

11 VK

nrKCRK

nrKCR leakleak =

⋅

++⋅⋅⋅+

⋅

++⋅⋅⋅ −+ (27)

22111

11

11 VK

nrCRK

nrCR leakleak =⋅

++⋅⋅+⋅

++⋅⋅ −+ (28)

Solving (23) for K1, we get:

211 KVK −= (29)

And can plug (29) into (28) resulting in:

( ) 221211

11

11 VK

nrCRKV

nrCR leakleak =⋅

++⋅⋅+−⋅

++⋅⋅ −+ (30)

203

Which can be solved for K2:

1122121

11

11

11 V

nrCRVK

nrCRK

nrCR leakleakleak ⋅

++⋅⋅−=⋅

++⋅⋅+⋅

++⋅⋅− +−+ (31)

( ) 112211

11 V

nrCRVKrCRrCR leakleakleak ⋅

⋅

++⋅⋅−=⋅⋅⋅+⋅⋅− +−+ (32)

( ) 11221

11 V

nrCRVKrrCR leakleak ⋅

++⋅⋅−=⋅+−⋅⋅ +−+ (33)

( )−+

+

−+⋅⋅

−⋅

++⋅⋅=

rrCR

VVn

rCR

Kleak

leak

1

211

2

11

(34)

And then (34) can be plugged into (29) to get K1:

( )−+

+

−+⋅⋅

−⋅

++⋅⋅−=

rrCR

VVn

rCR

VKleak

leak

1

211

11

11

(35)

So to Summarize, the Voltage at location X as a function of time is:

trtr eKeKX−+

⋅+⋅= 21 (36)

Where:

2

41

14

11

2

122

1

2

2212

⋅

⋅−

+++

++−

=+

leakR

CCn

C

n

CC

n

C

r (37)

2

41

14

11

2

122

1

2

2212

⋅

⋅−

++−

++−

=−

leakR

CCn

C

n

CC

n

C

r (38)

and

204

( )−+

+

−+⋅⋅

−⋅

++⋅⋅−=

rrCR

VVn

rCR

VKleak

leak

1

211

11

11

(39)

( )−+

+

−+⋅⋅

−⋅

++⋅⋅=

rrCR

VVn

rCR

Kleak

leak

1

211

2

11

(40)

r+ and r- result in two RC time constants of:

12

41

14

11

2

2

21

2

2212

1

CCn

C

n

CC

n

C

RRC leak

⋅−

++−

++

⋅= (41)

12

41

14

11

2

2

21

2

2212

2

CCn

C

n

CC

n

C

RRC leak

⋅−

+++

++

⋅= (42)

The bandwidth of the demodulator will be limited by the larger of the two RC time

constants which corresponds to RC1 resulting in a bandwidth of:

2

41

14

11

2

12

21

2

2212

⋅

⋅−

++−

++

=leakR

CCn

C

n

CCn

C

BW (44)

205

3 dB bandwidth of the power matched Villard voltage doubler (Derivation

Appendix A). (Eqn. 63 p. 163)

The resonant matching circuit of a power matched Villard voltage doubler can be

modeled as:

Where

scavengerscavengerL

matchingparassources

C

jRZ

LjRRZ

⋅−=

⋅⋅++=

ω

ω

The time averaged power dissipated across ZL is:

*Re2

1LLL IVP ⋅⋅= (1)

Where

Ls

LsL ZZ

ZVV

+⋅= (2)

Ls

sL ZZ

VI

+= (3)

Thus

( )2

2

2

*

2

1

Re2

1

⋅−⋅⋅+++

⋅⋅=

+⋅

+⋅⋅=

scavengermatchingscavengerparassource

scavengers

Ls

s

Ls

LsL

C

jLjRRR

RV

ZZ

V

ZZ

ZVP

ωω

(4)

206

We know from the theory of maximum power transfer that maximum power is

transferred when

scavengermatching C

jLj

⋅=⋅⋅ω

ω (5)

Resulting in

( )22

2

1

scavengerparassource

scavengersMAX

RRR

RVP

++

⋅⋅= (6)

Given that the Villard voltage doubler acts as a square law detector, the 3db

bandwidth can be derived from:

MAX

L

P

P=

2

1 (7)

And solving for ωwe get

( )

( )22

2

2

2

2

1

2

1

2

1

scavengerparassource

scavengers

scavengermatchingscavengerparassource

scavengers

RRR

RV

C

jLjRRR

RV

++

⋅⋅

⋅−⋅⋅+++

⋅⋅

=ω

ω

(8)

( )

( )2

2

2

2

1

⋅−⋅⋅+++

++=

scavengermatchingscavengerparassource

scavengerparassource

C

jLjRRR

RRR

ωω

(9)

( )scavengerparassourcescavenger

matching RRRC

jLj ++−±=

⋅−⋅⋅ 12ω

ω (10)

( )scavenger

scavengerparassourcematching CRRRL

1120 2 −⋅++−±⋅= ωω (11)

Application of the quadratic formula yields two positive roots:

207

( ) ( ) ( )

matching

scavenger

matchingscavengerparassource

matching

scavengerparassource

L

C

LRRR

L

RRR

⋅

⋅+++⋅−

⋅

++⋅−±=

2

412

2

122

µω (12)

Finally the bandwidth is equal to:

( )matching

scavengerparassource

dB L

RRRBW

++⋅−=−= −+

123 ωω (13)

And given that in a resonant network

scavenger

matchingC

L⋅

=2

0

1

ω (14)

BW3dB can also be expressed as:

( ) scavengerscavengerparassourcedB CfRRRBW ⋅⋅⋅⋅++⋅−= 203 212 π (15)

208

Power gain common source cascode LNA (Derivation Appendix A).

(Eqn. 81 p. 172)

The gain from a power matched Common source cascode LNA can be derived as a

function of the input voltage gain, the transconductance of M1 and M2, and the load

resistance.

The Voltage gain is derived through recognition that the voltage at the gate of M1 is

the result of a series resonant circuit as depicted below.

209

The voltage gain (Vgate/V in) for a series resonant circuit is:

( )gatesourcegatein RRCf

Q+⋅⋅⋅⋅

=π2

1 (1)

The total transconductance from M1 and M2 is dominated by the transconductance of

M1 [Gray]. Thus, the transconductance in strong inversion is:

thGS

dsm VV

Ig

−

⋅=

2 (2)

And in weak inversion the transconductance is:

t

dsm Vn

Ig

⋅= (3)

The load resistance including parasitics can be depicted as:

These parasitics can be simplified as a parallel RLC circuit of:

210

Where

0

2

0

2

tan

1

1

RR

LR

RR

LR

R

paras

outparas

paras

outparas

k

+

⋅+⋅

⋅

⋅+⋅

=ω

ω

(4)

And

ω

ωk

paras

out

p

RR

L

L

tan⋅

⋅

= (5)

Assuming the load has been impedance matched to the output impedance of the

LNA, the real power transferred to the load can be derived as in (8). A proof that

power matching to the output load, improves power transfer is presented in the next

derivation.

( )2tan2 k

gatemload

RVgP ⋅⋅= (6)

( ) 22

1 tan

2

kin

gatesourcegatemload

RV

RRCfgP ⋅

⋅

+⋅⋅⋅⋅⋅=

π (7)

The total power gain is the ratio of input power to power applied to the load:

211

( )

source

in

kin

gatesourcegatem

power

R

V

RV

RRCfg

G2

tan

2

22

1⋅

⋅

+⋅⋅⋅⋅⋅

=π

(8)

( ) sourcek

inmgain RR

QgP ⋅⋅⋅=2tan2 (9)

( )

⋅⋅⋅⋅= source

kinmgain R

RQgdBP

2log10)( tan2 (10)

Thus, the power gain of the common source cascode LNA has been derived.

212

Proof that impedance matching the output impedance of an LNA

maximizes power transfer to the load (p. 172)

The decision to power match to the output of the LNA can be justified by modeling

the output circuit, MOSFET current source, and output load that power is delivered

to:

The circuit can be modified such that the output impedance Rout and Cout can be

converted to the equivalent parallel elements Rload and Cload.

By applying Kirchhoff’s current law, we can equate the currents at point A:

load

A

k

A

load

A

gd

A

p

AAC R

V

R

V

X

V

X

V

X

VI ++++=

tan

(1)

213

++++⋅=

loadloadkgdpAAC RXRXX

VI11111

tan

(2)

+

⋅−+

⋅−

⋅⋅⋅=

load

load

k

gd

pAAC Rj

C

Rj

C

LjVI

111

tan

ωω

ω (3)

( )

++

+⋅−

⋅⋅⋅=

loadk

loadgd

pAAC RRj

CC

LjVI

111

tan

ω

ω (4)

( )

⋅

++

+⋅−

⋅⋅=

loadk

loadkloadgd

pAAC RR

RRCC

LjVI

tan

tan11ω

ω (5)

Now, by solving for the voltage at point A we get:

( )

+⋅−

⋅−

⋅

+=

loadgdploadk

loadk

ACA

CCL

jRR

RR

IV

ωω

1

tan

tan

(6)

The power across Rload represents the output power and is expressed as:

( )

load

loadgdploadk

loadk

AC

out R

CCL

jRR

RR

I

P

2

tan

tan 1

+⋅−

⋅−

⋅

+

=

ωω

(7)

It’s clear upon inspection of (7) that Pout is maximal when

( )loadgdp

CCL

+⋅−⋅

= ωω

10 (8)

Allowing the simplification of (7) to:

+⋅

+

⋅⋅=

+

⋅⋅

=kload

k

loadk

loadkAC

load

loadk

loadkAC

out RR

R

RR

RRI

R

RR

RRI

Ptan

tan

tan

tan2

2

tan

tan

(9)

214

The quantity Pout is maximal by setting Rtank as high as circuit parasitics will allow

and then by power matching Rload to Rtank. Therefore maximal power transfer to a

load is obtained by impedance matching the output resistance Rload to the highest

realizable Rtank and setting the reactance resulting from Lp, Cgd, and Cload such that

they sum to zero.

215

Appendix B – Source Code

This appendix presents MATLAB code that implements novel algorithms and models

developed from the research presented in this work.

Chapter 2 Code

RFsurvey_TIME.M: Code to acquire temporal survey data of RF energy present in the environment.

tic RADIUS=.0005; MAX_SAMPLES=30000; VARS2STORE=6; x=zeros(1,6); y=zeros(1,6); %%%% DETERMINE FILENAME FOR DATA SAVE%%%%%%%%%%%%%% [filename,path]=uiputfile('*.kml','Save KML data','default.kml'); if(filename==0) break; end; BACKUP_NAME=strread(filename,'%s','delimiter','.'); BACKUP_DATA=zeros(MAX_SAMPLES,(2+2*VARS2STORE+1)); %%%%%%%%%%%%%%%% INIT HARDWARE%%%%%%%%%%%%%%% s1=INIT_GPS(); S2=INIT_Scope(); j=1; query_Scope(S2,'*IDN?') write_Scope(S2,':FREQ:SPAN 2900000000'); write_Scope(S2,':FREQ:CENTER 1500000000'); write_Scope(S2,':CALCulate:MARKer:ALL'); write_Scope(S2,':AVER:TRACe1:STAT ON'); write_Scope(S2,':AVER:TRACe1:COUNT 2'); %%%%%%%%%%%%%%%% ACQUIRE GPS DATA %%%%%%%%%%%%% DATA=read_GPS(s1); LOCy=DATA(2); LOCx=DATA(4); %%% CONVERT NMEA GPS DATA TO LATTITUDE/LONGITUDE%%%%%%%%

216

LOCx=floor(LOCx/100)+((mod(LOCx,100))/60); LOCy=floor(LOCy/100)+((mod(LOCy,100))/60); if(char(DATA(5))=='W') LOCx=LOCx*-1; end if(char(DATA(3))=='S') LOCy=LOCy*-1; end %%%%%%%%%%%%% REPEATE UNTIL KEYSTROKE %%%%%%%%%%%% while j<(MAX_SAMPLES)+1 %%%%%%%%%%% ACQUIRE RF SURVEY DATA %%%%%%%%%%%%%%% write_Scope(S2,':CALCulate:MARKer:ALL') x(1)=str2num(query_Scope(S2,':CALCulate:MARK1:X?')); y(1)=str2num(query_Scope(S2,':CALCulate:MARK1:Y?')); x(2)=str2num(query_Scope(S2,':CALCulate:MARK2:X?')); y(2)=str2num(query_Scope(S2,':CALCulate:MARK2:Y?')); x(3)=str2num(query_Scope(S2,':CALCulate:MARK3:X?')); y(3)=str2num(query_Scope(S2,':CALCulate:MARK3:Y?')); x(4)=str2num(query_Scope(S2,':CALCulate:MARK4:X?')); y(4)=str2num(query_Scope(S2,':CALCulate:MARK4:Y?')); x(5)=str2num(query_Scope(S2,':CALCulate:MARK5:X?')); y(5)=str2num(query_Scope(S2,':CALCulate:MARK5:Y?')); x(6)=str2num(query_Scope(S2,':CALCulate:MARK6:X?')); y(6)=str2num(query_Scope(S2,':CALCulate:MARK6:Y?')); biggest=1; big_val=y(1) for p=2:6 if (y(p)>big_val) biggest=p; big_val=y(p) end end %%%% STORE RAW DATA IN ARRAY FOR LATER FILE SAVE %%%% time_store=toc format long BACKUP_DATA(j,1)=LOCx; BACKUP_DATA(j,2)=LOCy; BACKUP_DATA(j,3)=x(1); BACKUP_DATA(j,4)=y(1); BACKUP_DATA(j,5)=x(2); BACKUP_DATA(j,6)=y(2); BACKUP_DATA(j,7)=x(3); BACKUP_DATA(j,8)=y(3); BACKUP_DATA(j,9)=x(4); BACKUP_DATA(j,10)=y(4);

217

BACKUP_DATA(j,11)=x(5); BACKUP_DATA(j,12)=y(5); BACKUP_DATA(j,13)=x(6); BACKUP_DATA(j,14)=y(6); BACKUP_DATA(j,15)=time_store; %%%%% PAUSE AND END DATA SURVEY ON KEY STROKE %%%%%%%% j=j+1; if(getkeywait(60) ~= -1) j=MAX_SAMPLES+1; end end %%%%%%%%%%%% SAVE RAW ASCII DATA %%%%%%%%%%%%%%% save( [path [char(BACKUP_NAME(1)) '.txt']], 'BACKUP_DATA','-ASCII', '-DOUBLE'); fclose(s1); fclose(S2);

RFsurvey_SPATIAL.M: Code to acquire spatial survey data of RF energy

present in the environment.

RADIUS=.0005; MAX_SAMPLES=10000; COLORS='red','orange','yellow','green','blue','purple'; VARS2STORE=6; x=zeros(1,6); y=zeros(1,6); %%%% DETERMINE FILENAME FOR DATA SAVE%%%%%%%%%%%%%% [filename,path]=uiputfile('*.kml','Save KML data','default.kml'); if(filename==0) break; end; GPS_fid=fopen([path,filename],'w'); BACKUP_NAME=strread(filename,'%s','delimiter','.'); BACKUP_DATA=zeros(MAX_SAMPLES,(2+2*VARS2STORE)); %%%% KML HEADER AND COLORS %%%%%%%%%%%%%%%%%%%%% LINE='<?xml version="1.0" encoding="UTF-8"?>'; fprintf(GPS_fid,'%s\n',LINE); LINE='<kml xmlns="http://earth.google.com/kml/2.2">'; fprintf(GPS_fid,'%s\n',LINE); LINE='<Document>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <name>My Places.kml</name>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_blue">'; fprintf(GPS_fid,'%s\n',LINE);

218

LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7fff0055</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_green">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00aa00</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_red">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE);

219

LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_red</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_red</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_purple">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f7f00aa</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_purple">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_purple</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>';

220

fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_purple</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_red">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f0000ff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_blue">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_blue</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_blue</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_green">'; fprintf(GPS_fid,'%s\n',LINE);

221

LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_green</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_green</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_blue">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7fff0055</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_yellow">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE);

222

LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00ffff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_green">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00aa00</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_orange">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_orange</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>';

223

fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_orange</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <StyleMap id="msn_yellow">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>normal</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sn_yellow</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <key>highlight</key>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <styleUrl>#sh_yellow</styleUrl>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Pair>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </StyleMap>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_orange">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00aaff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_red">'; fprintf(GPS_fid,'%s\n',LINE);

224

LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f0000ff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sn_orange">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.1</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00aaff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_purple">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE);

225

LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f7f00aa</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Style id="sh_yellow">'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <scale>1.3</scale>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<href>http://maps.google.com/mapfiles/kml/pushpin/ylw-pushpin.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Icon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <hotSpot x="20" y="2" xunits="pixels" yunits="pixels"/>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </IconStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <color>7f00ffff</color>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outline>0</outline>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </PolyStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Folder>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <name>My Places</name>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <open>1</open>'; fprintf(GPS_fid,'%s\n',LINE);

226

LINE=' <Style>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <ListStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <listItemType>check</listItemType>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <ItemIcon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <state>open</state>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <href>C:/Program Files/Google/Google

Earth/res/mysavedplaces_open.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </ItemIcon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <ItemIcon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <state>closed</state>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <href>C:/Program Files/Google/Google

Earth/res/mysavedplaces_closed.png</href>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </ItemIcon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <bgColor>00ffffff</bgColor>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </ListStyle>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Style>'; fprintf(GPS_fid,'%s\n',LINE); %%%%%%%%%%%%%%%% INIT HARDWARE%%%%%%%%%%%%%%% s1=INIT_GPS(); S2=INIT_Scope(); j=1; query_Scope(S2,'*IDN?'); write_Scope(S2,':FREQ:SPAN 500000000'); write_Scope(S2,':FREQ:CENTER 720000000'); write_Scope(S2,':CALCulate:MARKer:ALL'); write_Scope(S2,':AVER:TRACe1:STAT ON'); write_Scope(S2,':AVER:TRACe1:COUNT 2'); %%%%%%%%%%%%% REPEATE UNTIL KEYSTROKE %%%%%%%%%%% while j<(MAX_SAMPLES)+1 %%%%%%%%%%%%%%%% ACQUIRE DATA%%%%%%%%%%%%%%%% DATA=read_GPS(s1); LOCy=DATA(2) LOCx=DATA(4) write_Scope(S2,':CALCulate:MARKer:ALL') x(1)=str2num(query_Scope(S2,':CALCulate:MARK1:X?')); y(1)=str2num(query_Scope(S2,':CALCulate:MARK1:Y?')); x(2)=str2num(query_Scope(S2,':CALCulate:MARK2:X?')); y(2)=str2num(query_Scope(S2,':CALCulate:MARK2:Y?'));

227

x(3)=str2num(query_Scope(S2,':CALCulate:MARK3:X?')); y(3)=str2num(query_Scope(S2,':CALCulate:MARK3:Y?')); x(4)=str2num(query_Scope(S2,':CALCulate:MARK4:X?')); y(4)=str2num(query_Scope(S2,':CALCulate:MARK4:Y?')); x(5)=str2num(query_Scope(S2,':CALCulate:MARK5:X?')); y(5)=str2num(query_Scope(S2,':CALCulate:MARK5:Y?')); x(6)=str2num(query_Scope(S2,':CALCulate:MARK6:X?')); y(6)=str2num(query_Scope(S2,':CALCulate:MARK6:Y?')); % DETERMINE KML COLOR CODING FOR MEASURED RF SIGNAL STRENGHT biggest=1; big_val=y(1); for p=2:6 if (y(p)>big_val) biggest=p big_val=y(p) end end color_choice=6 if (big_val>-50) color_choice=5 end if (big_val>-40) color_choice=4 end if (big_val>-30) color_choice=3 end if (big_val>-25) color_choice=2 end if (big_val>-20) color_choice=1 end %%% CONVERT NMEA GPS DATA TO LATTITUDE/LONGITUDE%%%%%%%% LOCx=floor(LOCx/100)+((mod(LOCx,100))/60); LOCy=floor(LOCy/100)+((mod(LOCy,100))/60); if(char(DATA(5))=='W') LOCx=LOCx*-1; end if(char(DATA(3))=='S') LOCy=LOCy*-1; end %%%% STORE RAW DATA IN ARRAY FOR LATER FILE SAVE %%%% format long BACKUP_DATA(j,1)=LOCx; BACKUP_DATA(j,2)=LOCy; BACKUP_DATA(j,3)=x(1); BACKUP_DATA(j,4)=y(1);

228

BACKUP_DATA(j,5)=x(2); BACKUP_DATA(j,6)=y(2); BACKUP_DATA(j,7)=x(3); BACKUP_DATA(j,8)=y(3); BACKUP_DATA(j,9)=x(4); BACKUP_DATA(j,10)=y(4); BACKUP_DATA(j,11)=x(5); BACKUP_DATA(j,12)=y(5); BACKUP_DATA(j,13)=x(6); BACKUP_DATA(j,14)=y(6); %%%%%% CREATE COLORED POLYGON FOR KML FILE%%%%%% Ax=LOCx+RADIUS; Ay=LOCy; Bx=LOCx+(2.2/5)*RADIUS; By=LOCy+(1.15/2)*RADIUS; Cx=LOCx-(2.2/5)*RADIUS; Cy=LOCy+(1.15/2)*RADIUS; Dx=LOCx-RADIUS; Dy=LOCy; Ex=LOCx-(2.2/5)*RADIUS; Ey=LOCy-(1.15/2)*RADIUS; Fx=LOCx+(2.2/5)*RADIUS; Fy=LOCy-(1.15/2)*RADIUS; LINE=' <Placemark>'; fprintf(GPS_fid,'%s\n',LINE); LINE=[' <name>'

char(COLORS(color_choice)) '</name>']; fprintf(GPS_fid,'%s\n',LINE); LINE=[' <styleUrl>#msn_'

char(COLORS(color_choice)) '</styleUrl>']; fprintf(GPS_fid,'%s\n',LINE); LINE=' <Polygon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <tessellate>1</tessellate>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <outerBoundaryIs>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' <LinearRing>'; fprintf(GPS_fid,'%s\n',LINE); LINE='

<coordinates>'; fprintf(GPS_fid,'%s\n',LINE); %LINE=[' ',num2str(Ax,'%f'), ',', num2str(Ay,'%f'), ',', '0

',num2str(Bx,'%f'), ',', num2str(By,'%f'), ',', '0 ', num2str(Cx,'%f'), ',', num2str(Cy,'%f'), ',', '0 ', num2str(Dx,'%f'), ',' ,num2str(Dy,'%f'), ',' ,'0 ' ,num2str(Ax,'%f'), ',' ,num2str(Ay,'%f'), ',' ,'0 </coordinates>'];

LINE=[' ',num2str(Ax,'%f'), ',', num2str(Ay,'%f'), ',', '0 ',num2str(Bx,'%f'), ',', num2str(By,'%f'), ',', '0 ', num2str(Cx,'%f'), ',', num2str(Cy,'%f'), ',', '0 ', num2str(Dx,'%f'), ',' ,num2str(Dy,'%f'), ',' ,'0 ' ,num2str(Ex,'%f'), ',' ,num2str(Ey,'%f'), ',','0 ' ,num2str(Fx,'%f'), ',' ,num2str(Fy,'%f'), ',','0 ' ,num2str(Ax,'%f'), ',' ,num2str(Ay,'%f'), ',' ,'0 </coordinates>'];

fprintf(GPS_fid,'%s\n',LINE); LINE=' </LinearRing>';

229

fprintf(GPS_fid,'%s\n',LINE); LINE=' </outerBoundaryIs>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Polygon>'; fprintf(GPS_fid,'%s\n',LINE); LINE=' </Placemark>'; fprintf(GPS_fid,'%s\n',LINE); %%%%% PAUSE AND END DATA SURVEY ON KEY STROKE %%%%%%%%% j=j+1; if(getkeywait(6) ~= -1) j=MAX_SAMPLES+1; end end %%%%%%%%% SAVE KML DATA AND RAW ASCII DATA %%%%%%%%%%% LINE=' </Folder>'; fprintf(GPS_fid,'%s\n',LINE); LINE='</Document>'; fprintf(GPS_fid,'%s\n',LINE); LINE='</kml>'; fprintf(GPS_fid,'%s\n',LINE); save( [path [char(BACKUP_NAME(1)) '.txt']], 'BACKUP_DATA','-ASCII', '-DOUBLE'); fclose(GPS_fid); fclose(s1); fclose(S2);

230

Chapter 3 Code

RFharv_MODEL.M: Code to Model Power Matched Villard Voltage Doubler Integrated onto CMOS

warning off all clear % Variables to solve over a range Vth=.179; Vth_length=length(Vth); Vinc=.1:.1:1.3; H=length(Vinc); ns=8 % Results Storage Variables VGS_final=zeros(Vth_length,H); Vout=zeros(Vth_length,H); Zload=zeros(Vth_length,H); PinDB=zeros(Vth_length,H); Efficiency=zeros(Vth_length,H); RjAC_final=zeros(Vth_length,H); RjDC_final=zeros(Vth_length,H); ratio=zeros(Vth_length,H); ratio_true=zeros(Vth_length,H); % Circuit/Sim Variables f=900e6; Rout=1e7; NOPARARISITICS=0; FFTandI=1; FC=.5; M=.55; %Layout/Process Variables L=.25; % um W=41.6; % um n=1.1; Vt=.026; Eox=3.9*8.85e-14*1e-4; Tox=3.03e-9*1e6; Rresistivity=7; nf=20; %number of fingers Ivth=300e-9; Rs_sub=30; %metal impedance and substrate Rs_source_back=200; CjArea=1.05e-15; CjPer=.05e-15; CjPerPoly=.38e-15; gamma=.05; un=500*.01*.01;

231

Rsx=20; Y=.6; %Dependant Variables Weff=W-0; Leff=L-.028; Cox=Eox/Tox; Cj=Cox*Weff*Leff*(.6); Area=(.44+2*.028)*W; Per=(.44+2*.028)*2*nf; PerPoly=W; ID0=(Weff/Leff)*Ivth; K=(un*Cox*(1e6*1e6)*Weff/Leff)/2; Rs_g=((1/12)*((Weff/nf)/Leff)*Rresistivity)/nf+Rs_sub; Rs_channel=Leff/(n*W*un*Cox*(1e6*1e6)*Vt) Rs_gate=(Rs_g+(1/12)*Rs_channel) for vthl=1:Vth_length vthl % progress counter for UI=1:H VGS=[1e-99 mean([1e-99 Vinc(UI)]) Vinc(UI)]; k=3; RjDC=zeros(1,k); Rj_DC2=zeros(1,k); I_DC_half=zeros(1,k); for temp=1:30 for t=1:k period=1/f; oversample=800; time=0:(period/oversample):period; Vgs_points=VGS(t)*sin(2*pi*f*time); Itot1A=ID0.*exp((Vgs_points-Vth(vthl))./(n.*Vt)).*(1-exp(-Vgs_points./Vt)); Itot1B=K.*((Vgs_points-

Vth(vthl)).^2).*(1+gamma*Vgs_points)./(1+2*K*Rsx*(Vgs_points-Vth(vthl))); Itot1 =

Itot1A.*(Vgs_points<Vth(vthl)).*(Itot1A>0)+Itot1B.*(Vgs_points>Vth(vthl)).*(Itot1B>0); PDC=Vgs_points.*Itot1; PDC=mean(PDC); I_DC_half(t)=PDC/VGS(t); RjDC(t)=VGS(t)/I_DC_half(t); Rj_DC2(t)=VGS(t)*Rout/(ns*(2*Vinc(UI)-2*VGS(t))); end %%% new faster solver if ((Rj_DC2(2)-RjDC(2))*(Rj_DC2(3)-RjDC(3))>0) VGS=[VGS(1) mean([VGS(1) VGS(2)]) VGS(2)]; else VGS=[VGS(2) mean([VGS(2) VGS(3)]) VGS(3)]; end

232

end Itot2=1*(Itot1-circshift(Itot1,[0 (oversample/2)])); Vinc_points=Vinc(UI)*sin(2*pi*f*time); Pin=Vinc_points.*Itot2; PinRMStrueAC=mean(Pin); IACtrue=2*PinRMStrueAC/Vinc(UI); Rj_AC=Vinc(UI)./IACtrue; index=2; ratio(vthl,UI)=IACtrue/I_DC_half(t); %calculate additional results for this run VGS_final(vthl,UI)=VGS(index); Vout(vthl,UI)=ns*(2*Vinc(UI)-2*VGS(index)); j=sqrt(-1); %Gate Cap Xj1=Rs_gate(1)-j/(2*pi*(Cj)*f); ZloadA=(Rj_AC.*Xj1./(Rj_AC+Xj1)) %Cap from pn junction Vd=-(Vinc(UI)*sin(2*pi*f*time)+Vinc(UI)-VGS(index)); Cj_AVGA=(CjArea*Area+CjPer*Per+CjPerPoly*PerPoly)./((1-Vd/Y).^(M)); Cj_AVGB=((CjArea*Area+CjPer*Per+CjPerPoly*PerPoly)./((1-

FC).^(M))).*(1+(M./(Y.*(1-FC))).*(Vd-FC*Y)); Cjd1=Cj_AVGA.*(Vd<=(FC*Y))+Cj_AVGB.*(Vd>(FC*Y)); figure(6) plot(Cjd1) % Instantaneous Capacitance across PN junction Xj3=mean(-j./(2*pi*(Cjd1)*f)) %Leakage Current Vtemp=2*Vinc(UI)-2*VGS(index) Rleak=((Vtemp)./(ID0*(exp(-Vth./(n*Vt))).*(1-exp(-Vtemp./Vt)))) Xj2=Rleak; % Store Results for each run ZloadB=(ZloadA.*Xj3)./(ZloadA+Xj3); ZloadB=(ZloadB.*Xj3)./(ZloadB+Xj3); Zload(vthl,UI)=((ZloadB.*Xj2)./(ZloadB+Xj2))/ns; if (NOPARARISITICS) Rj_AC Zload(vthl,UI)=Rj_AC/ns; end PinTOTAL=real((Vinc(UI)^2)./Zload(vthl,UI))/2; ratio_true(vthl,UI)=(2*PinTOTAL/Vinc(UI))/I_DC_half(t); PinDB(vthl,UI)=10*log10(PinTOTAL/.001); Pout(vthl,UI)=Vout(vthl,UI).*Vout(vthl,UI)./Rout; Efficiency(vthl,UI)=Pout(vthl,UI)./PinTOTAL; RjAC_final(vthl,UI)=Rj_AC; RjDC_final(vthl,UI)=RjDC(index); end end %Display results VGS_final'

233

Vin=(Vout'+ns*2*VGS_final')./(ns*2) Vout' 2*ns*Vin abs(Zload') real(Zload') PinDB' Efficiency' 2*ns*RjDC_final if(length(Vinc) ~= 1 && length(Vth) ~= 1) figure(1) mesh(PinDB',ones(H,1)*Vth,Efficiency') figure(2) mesh(PinDB',ones(H,1)*Vth,Vout') figure(6) mesh(PinDB',ones(H,1)*Vth,RjAC_final'/Rout) figure(7) mesh(PinDB',ones(H,1)*Vth,RjDC_final'/Rout) figure(8) mesh(PinDB',ones(H,1)*Vth,RjAC_final'./RjDC_final') figure(9) mesh(PinDB',ones(H,1)*Vth,ratio_true') end

234

Chapter 5 Code

LNA_OPT.m: Code Implementing Optimization Methodology of Multi-stage LNA

warning off all clear i=sqrt(-1); Vb=.35:.01:.45; Vbias=Vb-.01; % Model ground bounce Weakweight=zeros(1,length(Vbias)); % Circuit/Sim Variables Vds=1; f=2200e6; w=2*pi*f; Rs=50; Rs_gate=30; Rout=50/2; NF_REST=100000; required_NF=10^(7/10) %Layout/Process Variables Vth=.355; L=.12; % um W=107.38; % um n=1.2; Vt=.026; Eox=(3.9)*8.85e-14*1e-4; Tox=3.03e-9*1e6; Rresistivity=7; nf=59; %number of fingers Ivth=300e-9; gamma=.05; un=500*.01*.01; Rsx=20 %Dependant Variables Weff=W-0; Leff=L-.028; Cox=Eox/Tox; Cg=1*Cox*Weff*Leff*(.66) ID0=(Weff/L)*Ivth; K=(un*Cox*(1e6*1e6)*Weff/Leff)/2; %Modelling inversion point

235

ItotWEAK=ID0.*exp((Vbias-Vth)./(n.*Vt)).*(1-exp(-Vds./Vt)) ItotSTRONG=K.*((Vbias-Vth).^2).*(1+gamma*Vbias)./(1+2*K*Rsx*(Vbias-Vth)) for t=1:length(Vbias) if Vbias(t)>Vth if Vbias(t)<(Vth+2*n*Vt) WeakWeight(t)=(1-(Vbias(t)-Vth)/(2*n*Vt)).^1.2; else WeakWeight(t)=0; end end if Vbias(t)<=Vth WeakWeight(t)=1; end end gms=ItotSTRONG.*(2.0./(Vbias-Vth)); gmw=ItotWEAK./(n*Vt); gm=gmw.*(WeakWeight).^1.2+gms.*(1-WeakWeight).^1.2 Itot=ItotWEAK.*WeakWeight+ItotSTRONG.*(1-WeakWeight) % Supply Current PDC=1.*Itot; Vbias2=.35:.02:.45; measSupply=[0.184 0.275 0.397 0.567 0.76 1.23]*.001 figure(8) plot(Vb,PDC) hold on plot(Vbias2,measSupply) hold off %Power Gain Qinalt=(1)./(2*pi*f*Cg*(Rs+Rs_gate)) Vgain_in=Qinalt Vgain=sqrt(Rs_gate.*(gm.*Rout.*Qinalt).^2./Rout) Pgain=20*log10(Vgain) measGain=([6.05 10 12.5 15.5 16.3 17.7]); figure(9) plot(Vb,Pgain) hold on plot(Vbias2,measGain) hold off % Noise figure ft=gm./(Cg*(2*pi)); Ym=6; R1=Rs_gate; gd0=gm*9; NF=1+R1./Rs+(Ym*(f.^2).*((Rs+R1).^2)./(ft.^2)).*(gd0./Rs) NFdb=10*log10(NF)

236

figure(10) measNF=[4.30E+00 3.55E+00 2.98095 2.78474 2.684 2.55705]; plot(Vbias2,measNF) hold on plot(Vb,NFdb) hold off % Methodology utilizing analytical approximations of performance parameters number_stages_required=zeros(1,length(Vbias)); Gain=10.^(Pgain/10); Supply=PDC n_eqn=zeros(1,length(Vbias)); for t=1:length(Vbias) NFrec=NF_REST; number_stages_required(t)=0; if NF(t) < required_NF while NFrec > required_NF && number_stages_required(t)<21 NFrec=NF(t)+(NFrec-1)/Gain(t); number_stages_required(t)=number_stages_required(t)+1; n=number_stages_required(t); NFLNAeqn=((NF(t)-1)/((1/Gain(t))-1))*((1/Gain(t))^n-1)+1; eqn_NFrec=NFLNAeqn+(NF_REST-1)/(Gain(t)^n); end PowerDRAW=number_stages_required.*(Supply); n_eqn(t)=log((required_NF-1+(NF(t)-1)/(1/Gain(t)-1))/(NF_REST-1+((NF(t)-

1)/(1/Gain(t)-1))))/log(1/Gain(t)); end end % Methodology utilizing measured performance parameters n_eqn_real=zeros(1,length(Vbias2)); NF=10.^(measNF/10) Gain=10.^(measGain/10) for t=1:length(Vbias2) NFrec=NF_REST; if (10.^(measNF(t)/10)) < required_NF n_eqn_real(t)=log((required_NF-1+(NF(t)-1)/(1/Gain(t)-1))/(NF_REST-1+((NF(t)-

1)/(1/Gain(t)-1))))/log(1/Gain(t)); end end % Optimal Supply Consumption for analytical approx and meas. performance data P_eqn=n_eqn.*PDC; P_eqn_meas=n_eqn_real.*measSupply; % Plot Optimization based on Analytical and Measured LNA performance Data figure(1) plot(Vb,P_eqn) hold on plot(Vbias2,P_eqn_meas) hold off figure(2) plot(Vb,n_eqn) hold on

237

plot(Vbias2,n_eqn_real) hold off

238

239

Bibliography

[1] Edgar H. Callaway Jr., Wireless Sensor Networks: Architecture and Protocols, Boca Raton, FL: CRC Press, 2004.

[2] N. Abramson, Computer Networks, Englewood, NJ: Prentice-Hall, 1973, pp. 501-518.

[3] C. Chong and S. P. Kumar, "Sensor networks: Evolution, opportunities, and challenges," Proc of the IEEE, vol. 91, no. 8, pp. 1247-1256, August 2003.

[4] G. J. Pottie and W. J. Kaiser, “Wireless Integrated Network Sensors,” Commun. ACM, vol. 43, no. 5, pp. 551-58, May 2000.

[5] J. M. Rabaey et al., “PicoRadio Supports Ad Hoc Ultra-Low Power Wireless Networking,” IEEE Computer Magazine, vol. 33, no.7, pp. 42–48, July 2000.

[6] B. H. Calhoun et al., "Design Considerations for Ultra-low Energy Wireless Microsensor Nodes," IEEE Transactions on Computers. pp. 727-749. June 2005.

[7] J. Kahn et al., “Next Century Challenges: Mobile Networking for Smart-Dust,” in Proc. ACM MobiCom 1999, Seattle, Washington USA, August 1999, pp. 271–278.

[8] A. Ricadela, “Sensors Everywhere,” Information Week, January 24, 2005. [9] ON World Inc. (11/2007). “Wireless Sensor Networking Energizes the

Utility Market.” The Earth Times. Available: www.earthtimes.org/articles/show/news_press_release,217708.shtml.

[10] D. Estrin et al. “Next Century Challenges: Scalable Coordination in Sensor Networks,” in Proc. ACM MobiCom ’99, Seattle, Washington USA, pp. 263–270, August 1999.

[11] N. Priyantha et al., “The Cricket Location-Support System,” in Proc. of MobiCom 2000, Boston, Massachusetts USA, pp. 32–43, August 2000.

[12] I. F. Akyildiz et al., “A Survey on Sensor Networks.” IEEE Communications Magazine, vol. 40, no. 8, pp 102-114, August 2002.

[13] F. Zhao and L. Guibas, Wireless Sensor Networks: An Information Processing Approach. San Francisco, CA: Morgan Kaufmann Publishers, 2004.

[14] D. Estrin et al., “Connecting the Physical World with Pervasive Networks.” IEEE Pervasive Computing. vol. 1, no. 1, pp. 59-69, January 2002.

[15] A. S. Porret et al., “An ultralow-power UHF transceiver integrated in a standard digital CMOS process: Architecture and receiver,” IEEE J. Solid-State Circuits, vol. 36, pp. 451–465, Mar. 2001.

[16] “Antenna Performance and Design Considerations for Optimum Coverage in Wireless Communication Systems,” Cushcraft Co., Manchester, NH.

[17] A. M. Alevy, “In-Building Propagation Measurements at 2.4 GHz,” Cushcraft Co., Manchester, NH.

240

[18] Sputnick, Inc., “White Paper RF Propagation Basics” April 2004 [19] K. J. Saldanha, “Performance Evaluation Of Dect In Different Radio

Environments,” Master’s Thesis, Virginia Tech, Blacksburg, VA 1996. [20] K. Sohrab et al., “Near-Ground Wideband Channel Measurements,” IEEE

Proc. Vehicular Technology Conference (VTC), Houston, TX USA, May 1999, pp. 571-574.

[21] A. Y. Wang et al., “Energy Efficient Modulation and MAC for Asymmetric RF Microsensor Systems” Proc. International Symposium on Low Power Electronics and Design (ISLPED) 2001, Huntington Beach, CA USA, August 2001, pp 106-111.

[22] E. Shih et al., “Physical Layer Driven Protocol and Algorithm Design for Energy-Efficient Wireless Sensor Networks,” Proc. ACM MobiCom ’01, Rome, Italy, July 2001, pp. 272–86.

[23] A. Chandrakasan et al. “Design considerations for distributed microsensor systems.” Custom Integrated Circuits Conference (CICC) 1999, San Diego, CA USA, May 1999, pp. 279-286.

[24] C. Chein et al., “Low-Power Direct-Sequence Spread-Spectrum Modem Architecture For Distributed Wireless Sensor Networks.” International Symposium on Low Power Electronics and Design (ISLPED) 2001, Huntington Beach, CA USA, August 2001, pp. 251-254.

[25] S. Zhou et al., “Digital multi-carrier spread spectrum versus direct sequence spread spectrum for resistance to jamming and multipath.” IEEE Transactions on Communications, vol. 50, no. 4, pp. 643-655, April 2002.

[26] M. Perrott et al. “27 mW CMOS fractional-N synthesizer/modulator IC.” ISSCC Digest of Technical Papers, pages 366-367, February 1997.

[27] J. D. Oetting, “A Comparison of Modulation Techniques for Digital Radio.” IEEE Transactions on Communications, vol. 27, no. 12, pp. 1752-1761, Dec. 1979.

[28] P. Z. Peebles, Jr., Digital Communications Systems, Englewood Cliffs, New Jersey: Prentice-Hall, Inc., 1987.

[29] J. Anthes, “OOK, ASK, and FSK Modulation in the Presence of an Interfering Signal”. White Paper, RF Monolithics, Dallas, TX USA.

[30] D. C. Daly and A. P. Chandrakasan, “An Energy Efficient OOK Transceiver for Wireless Sensor Networks,” IEEE Journal of Solid-State Circuits. vol. 42, no. 5, pp. 1003-1011, May 2007.

[31] C. C. Enz et al., “An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications,” Analog Integrated Circuits and Signal Processing, vol. 8, no. 1, pp. 83-114, July 1995.

[32] A. S. Porret et al., “An ultralow-power UHF transceiver integrated in a standard digital CMOS process: Transmitter,” IEEE J. Solid-State Circuits, vol. 36, pp. 467–472, Mar. 2001.

[33] A. S. Porret et al., “A 1V, 1 mW 434 MHz FSK Receiver fully integrated in a Standard Digital CMOS Process,” IEEE Custom Integrated Circuits Conference. Orlando, FL, May 2000, pp 171-174.

241

[34] A. S. Porret et al., “A Low-Power Low-Voltage Transciever Archetecture Suitable for Wireless Distributed Sensors Network,” IEEE International Symposium on Circuits and Systems. Geneva, Switzerland, May 2000, pp 56-59.

[35] S. Gregori, et al., “2.45 GHz Power and Data Transmission for a Low-Power Autonomous Sensors Platform.” ISLPED ’04, Newport Beach, CA, USA, August 2004

[36] A. Facen and A. Boni, “A CMOS Analog Frontend for a Passive UHF RFID Tag.” IEEE ISLPED ’06, Tegernsee, Germany, Oct. 2006.

[37] S. Roundy et al., Energy Scavenging for Wireless Sensor Networks: with Special Focus on Vibrations. Norwell, MA: Kluwer Academic Publishers, 2004.

[38] C. Shearwood and R. B. Yates, “Development of an electromagnetic micro-generator.” Electronics Letters, vol. 33, no. 22, pp. 1883-1884, Oct. 1997.

[39] C. B. Williams et al., “Development of an electromagnetic micro-generator”, IEEE Proceedings Circuits Devices Systems, vol. 148, no. 6, pp. 48-53, December 2001.

[40] S. Meninger et al., “Vibration-to-Electric Energy Conversion.” Proc. International Symposium on Low Power Electronics and Design, San Diego, CA, Aug.1999, pp. 48-53.

[41] S. Meninger et al., “Vibration-to-Electric Energy Conversion.” IEEE Transactions on Very Large Scale Integration Systems, vol. 9, no. 1, pp. 64-76, Feb. 2001.

[42] H. Kulah and K. Najafi, “An Electromagnetic Micro Power Generator for Low-Frequency Environmental Vibrations.” Proceedings of the 17th IEEE International Conference on Micro Electro Mechanical Systems (MEMS), Maastricht, Netherlands, January 2004, pp. 237–240.

[43] R. Amirtharajah and A. P. Chandrakasan, “Self-Powered Signal Processing Using Vibration-Based Power Generation.” IEEE journal of Solid State Circuits, vol. 33, no. 5, pp. 687-695, May 1998.

[44] N. Penglin et al., “Evaluation of Motions and Actuation Methods for Biomechanical Energy Harvesting.” 35th Annual Power Electronics Specialists Conference (PESC), vol. 3, Aachen, Germany, June 2004, pp. 2100-2106.

[45] R. A. Sinton et al., “Photovoltaic concentrator technology project,” Proc. of the 14th Project Integration Meeting, Albuquerque, New Mexico, June 1986.

[46] M. A. Green et al., “25-Percent efficient low-resistivity silicon concentrator solar cells.” IEEE Electron Device Letters, vol. 7, no. 10, pp. 583-585, Oct. 1986.

[47] A. Gotzberger et al., “Solar Cells: past, present, future.” Solar Energy Materials and Solar Cells, vol. 74, no. 1, pp. 1-11, October 2002.

[48] B. Warneke et al., “Smart-Dust: Communicating with a cubic milli-meter computer.” Computer, vol. 34, no. 1, pp. 44-51, January 2001.

242

[49] B. Atwood et al., “Preliminary Circuits for Smart-Dust.” Proceedings Southwest Symposium on Mixed Signal Design, San Diego, CA, Feb. 2000, pp. 87-92.

[50] A. Srinivasa et al., “Entropy, Efficiency, Thermodynamics for First-year Engineering Students.” 36th ASEE/IEEE Frontiers in Education Conference, San Diego, CA USA, Oct. 2006, pp. 15-20.

[51] D. Pescovitz, “The Power of Small Tech,” Small Times. vol. 2, no. 1, 2002.

[52] I. Stark, “Invited Talk: Thermal Energy Harvesting with Thermo Life.” International Workshop on Body Sensor Networks (BSN) 2006, Aachen, Germany, April 2006, pp.19 – 22.

[53] M. Stordeur and I. Stark, “Low Power Thermoelectric Generator – self-sufficient energy supplies for micro systems.” 16th International Conference on Thermoelectrics (ICT). Dresden, Germany, Aug. 1997, pp. 575-577.

[54] M. Strasser et al., “Micromachined CMOS Thermoelectric Generators as On-Chip Power Supply.” 12th International Conference on Solid State Sensors, Actuators and Microsystems. Boston, MA USA, June 2003, pp. 45-48.

[55] Y. Ono et al., “Fabrication and Performance of an Oxide Thermoelectric Power Generator.” Twenty-First International Conference on Thermoelectrics (ICT). Long Beach, CA USA, Aug. 2002, pp. 454-457.

[56] J. P. Fleurial e al., “Solid-State Power Generation and Cooling Micro/Nanodevices for Distributed System Architectures.” Twenty-First International Conference on Thermoelectrics (ICT). Beijing, China, June 2001, pp. 24-29.

[57] J. Nurnus et al., “Thin film based thermoelectric energy conversion systems.” Twenty-First International Conference on Thermoelectrics (ICT). Long Beach, CA USA, Aug. 2002, pp. 523-527.

[58] M. Nedelcu et al., “Thermoelectric generators with electric pulsed output.” Twenty-First International Conference on Thermoelectrics (ICT). Long Beach, CA USA, Aug. 2002, pp. 439-441.

[59] M. Rahman and R. Shuttleworth, “Thermoelectric Power Generation for Battery Charging.” International Conference on Energy Management and Power Delivery (EMPD 95). vol. 1, Nov. 1995, pp. 186-191.

[60] J. P. Fleurial, “Thick-Film Thermoelectric Microdevices.” Eighteenth International Conference on Thermoelectrics. Baltimore, MD USA, August 1999, pp. 294-300.

[61] S. Hasebe et al., “Design and Fabrication of flexible thermopile for power generation.” Proceedings of 2003 International Symposium on Micromechatronics and Human Science (MHS) 2003. Oct. 2003, pp. 287-291.

[62] A. Jacquot et al., “Fabrication and modeling of an in-plane thermoelectric micro-generator.” 21st International Conference on Thermoelectrics. Long Beach, CA USA, Aug. 2002, pp 561-564.

243

[63] L. I. Anatychuk and P. D. Mikityuk, “Thermal Generators Using Heat Flows in Soil.” 22nd International Conference on Thermoelectrics. La Grande Motte, France, Aug. 2003, pp 598-601.

[64] J. B. Burch, et al. “Radio Frequency Nonionizing Radiation in a Community Exposed to Radio and Television Broadcasting.” Environmental Health Prospectives, vol. 114, no. 2, February 2006.

[65] M. S. Khalaf. Field Studies of RF & EMF in Bahrain. General Directorate of Environment & Wildlife Protection. Kingdom of Bahrain.

[66] M. Fields, Deputy Secretary. Wireless Communications Facilities, Position Paper. Washington State Department of Health.

[67] D. W. Harrist. “Wireless Battery Charging System Using Radio Frequency Energy Harvesting.” Master's Thesis, University of Pittsburgh, Pittsburgh, PA 2001.

[68] J. Joe et al., “Voltage, Efficiency Calculation and Measurement of Low Power Rectenna Rectifying Circuit.” Proc. Antennas and Propagation Society International Symposium. vol. 4, Atlanta, GA USA, June 1998, pp. 1854-1857.

[69] Y. Yao et al. “A Novell Low-Power Input-Independent MOS AC/DC Charge Pump,” IEEE International Symposium on Circuits and Systems 2005 (ISCAS 2005), vol. 1, May 2005, pp. 380-383.

[70] H. Yan et al. “An Integration Scheme for RF Power Harvesting,” Proc. STW Annual Workshop on Semiconductor Advances for Future Electronics and Sensors (SAFE 2005), Nov. 2005, pp. 64-66.

[71] M. Mi et al. “RF Energy Harvesting with Multiple Antennas in the Same Space,” Antennas and Propagation Magazine, vol. 47, no. 5, pp. 100-106, Oct. 2005.

[72] J. Heikkinen et al., “Planar Rectennas for 2.45 GHz Wireless Power Transfer.” In Proceedings of Radio and Wireless Conference 2000 (RAWCON), Denver, Colorado, USA, September 2000, pp 63-66.

[73] C. Sauer et al., “Power Harvesting and Telemetry in CMOS for Implanted Devices.” IEEE Trans. Circuits Syst. I, vol. 52, pp. 2605-2613, Dec. 2005.

[74] Richard K. Williams and Robert Blattner, “Pseudo-Schottky diode”, U.S. Patent 6,476,442, Nov. 5, 2002.

[75] Television in the United States. (09 Jul. 2008). Available: en.wikipedia.org/wiki/Television_in_the_United_States

[76] "city." (09 Jul. 2008). American Heritage Dictionary. Available: http://education.yahoo.com/reference/dictionary/entry/city

[77] "suburb." (09 Jul. 2008). Available: www.answers.com/topic/suburb [78] "highway." (09 Jul. 2008). Encyclopedia Britannica. Available:

www.britannica.com/EBchecked/topic/1354202/highway#tab=active~checked%2Citems~checked&title=highway%20--%20Britannica%20Online%20Encyclopedia

[79] City of Alameda, CA Municipal Code Section 30-4.9A C-C, Community Commercial Zone. (09 Jul. 2008). Available: www.ci.alameda.ca.us/code/_DATA/TITLE30/30_4_DISTRICT_USES_

244

AND_REGULATIONS/30_4_9A_C_C__Community_Commerc.html [80] City of Alameda, CA Municipal Code Section 30-4.1 through 4.3. (09 Jul.

2008). Available: http://www.ci.alameda.ca.us/code/_DATA/TITLE30/30_4_DISTRICT_USES_AND_REGULATIONS/

[81] "campus." (09 Jul. 2008). Encyclopedia Britannica. Available: www.britannica.com/EBchecked/topic/91441/campus#tab=active~checked%2Citems~checked&title=campus%20--%20Britannica%20Online%20Encyclopedia

[82] HDTV And WSB-TV. (09 Jul. 2008). Available: http://www.wsbtv.com/station/1868872/detail.html

[83] S. R. Best. “Antenna Performance and Design Considerations for Optimum Coverage in Wireless Communication Systems.” white paper, Cushcraft Corporation, Manchester, NH, USA.

[84] J. Kraus and R. Marhefka. Antennas for All Applications. New York, NY: McGraw Hill Eduction, Inc., 2002.

[85] Douyere, et al. “Broadband Modelling of a High Efficiency Rectenna for Batteryless RFID Systems,” 13th IEEE International Conference on Electronics, Circuits and Systems, 2006 (ICECS '06), December 2006, pp. 672-675.

[86] T. Rappaport. Wireless Communications: Principles and Practice, 2nd Edition. Upper Saddle River, NJ: Prentice Hall, Inc., 2002.

[87] P. Gray et al. Analysis and Design of Analog Integrated Circuits. New York, NY: John Wiley and Sons, Inc., 2001.

[88] E. S. Sinencio, “Bulk Driven Transistors”, ELN-607 Course notes, Texas A&M University, 2003. Available: http://www.eecg.toronto.edu/ ~kphang/papers/2003/gordon_bulkdrivencirc.pdf

[89] X. Jin, et al. “An effective Gate Resistance Model for CMOS RF and Noise Modeling,” Digest of Technical Papers International Electron Devices Meeting (IEDM-98), December 1998, pp. 961-9694.

[90] “Modeling a Diode,” white paper, Agilent Technologies, Dept. of EDA, Munich, Germany.

[91] “Designing the Virtual Battery,” Application Note 1088, Avago Technologies. April 2007.

[92] S. Mandal, and R. Sarpeshkar,” Low-Power CMOS Rectifier Design for RFID Applications,” Circuits and Systems I: Regular Papers. vol. 54, no. 6, pp. 1177-1188, June 2007.

[93] V. P. Trivedi et al. "Physics-based compact modeling for nonclassical CMOS," International Conference on Computer Aided Design (ICCAD'05), November 2005, pp. 211-216.

[94] D. C. Daly and A. P. Chandrakasan, “An Energy Efficient OOK Transceiver for Wireless Sensor Networks,” Radio Frequency Integrated Circuit Symposium. San Francisco, CA, June 2006.

[95] T. S. Salter et al., "Low power receiver design utilizing weak inversion and RF energy harvesting for demodulation," Semiconductor Device Research Symposium, 2007 International, Dec. 12-14 2007, pp. 1 – 2.

245

[96] Rofougaran, A., “RFIC Workshop: Fully Integrated UHF RFID Systems for Near Field and Far Field Application.” Presented at Radio and Wireless Conference 2009 (RAWCON 2009), Broadcom, Inc., San Diego, CA, USA, Jan. 2009.

[97] Umeda, T., Yoshida, H., Sekine, S., Fuita, Y., Suziki, T., and Otaka, S., “A 950-MHz Rectifier Circuit for Sensor Network Tags With 10-m Distance,” IEEE Journal of Solid-State Circuits, 2006, Vol. 41, no. 1, pp. 35-41.

[98] Le, T., Mayaram,. K., and Fiez, T., “Efficient Far-Field Radio Frequency Energy Harvesting for Passively Powered Sensor Networks,” IEEE Journal of Solid-State Circuits, 2008, Vol. 43, no. 5, pp. 1287-1302.

[99] Mandal, S., and Sarpeshkar, R., “Low-Power CMOS Rectifier Design for RFID Applications,” IEEE Transactions on Circuits and Systems—I: Regular Papers, 2007, Vol. 54, no. 6, pp. 1177-1188.

[100] N. Behdada et. al, ”A 0.3mm2 Miniaturized X-Band On-Chip Slot Antenna in 0.13µm CMOS” Radio Frequency Integrated Circuits (RFIC) Symposium, Honolulu, HI, June 2007, pp. 441-444.

[101] B. Yang et al., "Integration of small antennas for ultra small nodes in wireless sensor networks," Semiconductor Device Research Symposium, 2007 International, Dec. 12-14 2007, pp. 1 – 2.

[102] Y. Ngu et. al, “An Electrochemical Cell with Capacitance-Enhanced Double Layer” in Proceedings of Electrochemical Chemical Society, vol. 3, no. 36, 2006, pp. 77-85.

[103] Y. J. E. Chan et. al “RF Power Amplifier Integration in CMOS Technology,” Microwave Symposium Digest, vol. 1, Boston, MA, June 2000, pp. 545-548.

[104] T. S. Salter et al., "Improved RF power harvesting circuit design," in Semiconductor Device Research Symposium, 2007 International, College Park, MD, Dec. 12-14 2007, pp. 1-2.

[105] Y. Zhai et al., "Using device characteristics to obtain a low-power temperature-insensitive oscillator for smart dust networks," in Semiconductor Device Research Symposium, 2007 International, College Park, MD, Dec. 12-14 2007, pp. 1-2.

[106] J. D. Meindl and P. H. Hudson, “Low power linear circuits,” IEEE J. Solid-State Circuits, vol. 1, Dec. 1966, pp. 100–111.

[107] T. H. Lee., The Design of CMOS Radio-Frequency Integrated Circuits. 2nd Ed., New York, NY: Cambridge University Press, 2004.

[108] T. H. Lee. “The Design Narrowband CMOS RF Low-Noise Amplifiers.” in Proceedings of Workshop on Advances in Analog Circuit Design (AACD), Copenhagen, Denmark, April 1998, pp 13.1 - 13.14.

[109] MOSFET Operational Amplifier Introduction. Available: www.rfic.co.uk [110] A. Molnar, et al., "An ultra-low power 900 MHz RF transceiver for

wireless sensor networks," Custom Integrated Circuits Conference (CICC), October 2004.

246