A Novel High-Frequency Transformer-Linked Soft …fbakan/AGK/agk_odev/11.pdf · Soft-Switching Half-Bridge DC–DC Converter With Constant-Frequency Asymmetrical PWM Scheme Tomokazu

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009 2961

A Novel High-Frequency Transformer-LinkedSoft-Switching Half-Bridge DC–DC Converter With

Constant-Frequency Asymmetrical PWM SchemeTomokazu Mishima, Member, IEEE, and Mutsuo Nakaoka, Member, IEEE

Abstract—This paper presents a novel soft-switching half-bridge dc–dc converter with high-frequency link. The newly pro-posed soft-switching dc–dc converter consists of a single-endedhalf-bridge inverter controlled by an asymmetrical pulsewidth-modulation scheme and a center-tapped diode rectifier. In orderto attain the wide range of soft commutation under constantswitching frequency, the single active edge-resonant snubber cellcomposed of a lossless inductor and a switched capacitor is em-ployed for the half-bridge inverter leg, providing and assistingzero-current-switching operations in the switching power devices.The practical effectiveness of the proposed soft-switching dc–dcconverter is demonstrated by the experimental results from an800 W–55 kHz prototype. In addition, the feasibility of the dc–dcconverter topology is proved from the viewpoints of the highefficiency and high power density.

Index Terms—Asymmetrical half-bridge (AHB) dc–dc con-verter, constant-frequency pulsewidth modulation (PWM), high-frequency (HF) link, soft commutation, zero-current switching(ZCS).

I. INTRODUCTION

THE ADVANCEMENT of the asymmetrical half-bridge(AHB) dc–dc converter and its related technology has

been propelling the development of power supply system witha large-voltage step-down function in a variety of applica-tions such as plasma display panel, HID lamp, LED back-light driving, mobile and telecommunication equipment, andcontact-less battery chargers [1], [2]. In particular, most ofpulsewidth-modulation (PWM) dc–dc converters with a center-tapped or a current doubler rectifier are widely recognized tobe one of the most promising circuit topologies suitable for thistype of power conversion in terms of a high power density, lowprofile, and its easy-to-implement control scheme [3], [4].

As a soft-switching AHB dc–dc converter, a series resonantasymmetrical dc–dc converter with pulse switching frequencymodulation (PFM) scheme has been one of the most practical

Manuscript received August 13, 2008; revised January 7, 2009. First pub-lished February 6, 2009; current version published July 24, 2009.

T. Mishima is with the Department of Electrical Engineering and InformationScience, Kure National College of Technology, Hiroshima 737-8506, Japan(e-mail: [email protected]).

M. Nakaoka is with the Graduate School of Science and Engineering,Yamaguchi University, Yamaguchi 753-8511, Japan, and also with the ElectricEnergy Saving Research Center, Kyungnam University, Masan 631-701, Korea.

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2009.2013692

solutions due to the wide range of soft-switching performance[2], [5]. The PFM-controlled dc–dc converter, however, hasa shortcoming of severe audible noise generation in the low-output-power setting as well as the difficulty for design andoptimization of the passive filter parameter. As a result, thosedrawbacks of PFM make PWM dc–dc converter more attractiveto the industrial electric power processing.

In the soft-switching PWM dc–dc converters, zero-voltageswitching (ZVS) has been popular, owing to the less additionalpassive components [6], [7]. However, the ZVS commutationbased on the edge resonance with lossless capacitors in parallelwith switching power devices significantly depends on the loadcurrent. This property causes severe limitation of the soft-switching operation range under light-load regions. On top ofthat, the ZVS scheme is generally not suitable for insulated-gatebipolar transistor (IGBT) with MOS gate-controlled bipolarmode characteristics because of the tail current transition at itsturn-off commutation [8], [9].

As a solution to overcome the problems, the zero-current-switching (ZCS) PWM soft-switching AHB dc–dc convertertopology was newly proposed by the authors in [10]. In thispaper, the performance and feasibility of the new active edge-resonant snubber (AERS)-assisted ZCS-PWM AHB dc–dc con-verter are evaluated and intensively reported with experimentalanalysis performed by the prototype circuit. In particular, theconverter characteristics on the actual conversion efficiency, aswell as the ZCS operation range achieved by the asymmetri-cal PWM duty-cycle control scheme, are discussed in moredetails.

This paper is organized as follows. The circuit configurationof the proposed dc–dc converter is described with its distinctivemerits. In the next section, operating mode transitions and theprinciple, as well as the power regulation scheme, are described.In addition, the practical circuit design strategy for the soft-switching dc–dc converter is introduced in line with describingthe specification of an 800 W–55 kHz prototype. Furthermore,the circuit operations and static characteristics are demonstratedby the experimental data obtained from the prototype, andfinally, the feasibility of the ZCS-PWM AHB dc–dc convertertopology is discussed from the practical point of view.

II. CIRCUIT DESCRIPTION

Fig. 1 shows the proposed dc–dc converter configuration.Here, Ed represents the input supply dc voltage. This circuit

0278-0046/$26.00 © 2009 IEEE

2962 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009

Fig. 1. Proposed AERS-assisted ZCS-PWM half-bridge dc–dc converter withcenter-tapped rectifier.

topology is based on an LLC resonant PFM half-bridge dc–dcconverter and is derived from the single-ended push–pull in-verter introduced in [11] and [12].

Aside from the main switch Q1(S1/D1), the high side partof the half-bridge leg comprises the ZCS-assisted inductor Lr1

and the resonant lossless capacitor Cr actively switched bythe auxiliary switch Q3(S3/D3), all of which operate as anactive snubber for Q1. In the low side part of the leg, the otherZCS-assisted inductor Lr2 is inserted in series with the othermain switch Q2(S2/D2). The resonant and power factor-correcting capacitor Cs, which is effective for blocking the dccomponent of the half-bridge inverter current and inhibits thesaturation of the high-frequency (HF) transformer, is inserted inseries with Ls that includes the equivalent leakage inductanceLk of the HF transformer. By utilizing the transformer-parasiticparameter (Lk, Lm)-based series resonance with Ls and Cs,ZCS operation can be performed in Q2 alike.

The AERS-assisted ZCS-PWM dc–dc converter proposedhere has some remarkable advantageous points over the conven-tional soft-switching schemes such as LLC resonant ZCS-PFMand ZVS-PWM approach:

1) constant HF switching PWM operation;2) wide zero-current soft-switching region;3) optimized HF transformer and output filter;4) current overlapping mode soft commutation between the

high-and low-side switching power devices due to theZCS-assisted inductors Lr1 and Lr2.

III. OPERATION PRINCIPLE

A. Switching Mode Operation

The key waveforms of the proposed dc–dc converter areshown in Fig. 2. In addition, its switching mode transitionsand equivalent circuits during switching one cycle are shownin Fig. 3 under the condition of Lm � Ls.

The operation circuit modes are divided into 11 steps duringswitching one cycle. While D2 of Q2 is conducting after turn-off commutation of D2, S1 of Q1 is turned on (Mode 1). Then,the switch current iQ1 softly increases with the aid of Lr1;thereby, the ZCS turn-on of S1 can be achieved. Edge resonancewith Lr1 and Cr begins at t1, and D3 of the auxiliary switch Q3

delivers the resonant current circulating in the active snubber(Mode 2). The edge resonance terminates at t3 when the currentthrough Q3 reverses its direction (Mode 3).

Fig. 2. Voltage and current waveforms of ZCS-PWM dc–dc converter duringswitching one cycle with 45% duty cycle.

Prior to the turn-off of S1, S3 of the auxiliary switch Q3 inthe AERS cell is turned on (Mode 4). Then, the current iQ3

through Q3 softly increases with edge resonance by Lr1 andCr; thereby, soft-commutation turn-on in Q3 can be performedunder the ZCS mode. Commutation of iQ1 from S1 to D1 isnaturally completed, with the edge resonance continuing fromthe previous operation mode (Mode 5). During this interval,S1 is turned off, and zero-current and zero-voltage switching(ZCZVS) turn-off can be completely achieved in Q1 (Mode 6).Commutation of iQ3 from S3 to D3 can be attained, owing tothe series resonance due to Cr, Cs, and Ls. The gate signalto S3 is removed during this interval, and ZCZVS turn-offcan be achieved in Q3 (Mode 7). Furthermore, the transformersecondary current reverses its direction; consequently, softcommutation from Do1 to Do2 is completed in the secondary-side rectifier during Mode 7 due to the leakage inductance ofthe HF transformer.

S2 of Q2 is turned on at t7. Then, the current iQ2 throughQ2 softly increases with the aid of Ls and Lr2; thereby, ZCSturn-on can be achieved in Q2 (Mode 8). In this mode, thecurrent commutation from Q3 to Q2 is completed. The seriesresonance due to Cs, Lr2, and Ls with the transformer parasiticparameters takes place (Mode 9). Then, the transformer pri-mary current ip decreases gradually with the series resonancesustaining from the previous mode. As a result, Do1 begins tobe forward biased, so that the secondary winding of the HFtransformer is shorted (Mode 10). Commutation of iQ2 fromS2 to D2 is naturally completed in Mode 11. The gate signalto S2 is removed during this interval; thereby, ZCZVS turn-offcan be achieved in Q2.

The transformer secondary current reverses its direction, andthe rectifier diode Do2 is reversely biased and cut off. At t11, S1

is turned on by ZCS as well as at t0, and the converter operation

MISHIMA AND NAKAOKA: NOVEL HF TRANSFORMER-LINKED SOFT-SWITCHING HALF-BRIDGE DC–DC CONVERTER 2963

Fig. 3. Switching mode transitions and equivalent circuits during switchingone cycle under Lm � Ls.

returns to Mode 1. Note herein that soft commutation betweenQ1 and Q2 can be performed by the current overlapping modedue to Lr1 and Lr2 and that no severe diode recovery appearsin Q1 and Q2.

B. Gate Pulse Pattern by Asymmetrical PWM-BasedDuty Cycle

The gate pulse timing sequences for all the switches and thecircuit diagram of the pulse generator are shown in Fig. 4(a)and (b), respectively, [12], [13]. Here, the duty cycle D(=Ton/Ts) is adjusted for output voltage control or output powerregulation.

In order to achieve the ZCS operation properly, the control-lable range of the asymmetrical duty cycle D is determined by

π√

Lr1Cr

Ts< D < Dmax (1)

Fig. 4. Asymmetrical PWM duty-cycle control scheme: (a) Gate pulse patternand (b) circuit diagram of gate pulse generator.

where Dmax denotes the maximum duty cycle, and it should besmaller than 0.5.

The on-period Ton3 of S3 can be fixed in a constant value.In this interval, the overlapped on-period Ta of S1 and S3 canbe estimated from the resonance period during Mode 4 andMode 5 as follows:

Ta ≈ π√

Lr1Cr

2. (2)

Furthermore, the remaining time interval Tb, utilized for theZCZVS turn-off commutation of S3, can be specified by

Tb ≈ π

√Ls ·

CrCs

Cr + Cs. (3)

IV. CONVERTER DESIGN CONSIDERATION

A. Circuit Parameters of AERS Cell

In order to ensure the ZCZVS mode turn-off commutationof the main switch Q1 in the AERS cell, the peak valueof the edge-resonant current through Q1 during its turn-oncommutation should be larger than the transformer primary


Fig. 5. Converter characteristics on output/input voltage gain versus converterswitching frequency.

current ip prior to its turn-off commutation. From Fig. 2, thiscondition can be expressed by

vcr(t3)√Lr1/Cr

> ip(t3) ≈ Ipp (4)

where Ipp denotes the peak value of ip. Then, the resonantcharacteristic impedance Zq1 of the AERS cell is designed by

Zq1 =√

Lr1

Cr<

vcr(t3)Ipp

(5)

and Ipp is simply estimated from the HF transformer current atD = Dmax. Accordingly, Cr can be determined by

Cr >Lr1I

2pp

vcr(t3)2. (6)

The steady-state resonant capacitor voltage vcr(t3) is smallerthan the input voltage Ed due to the existence of the capacitorvoltage across Cs. In addition, circulating current within theactive snubber network increases, while the HF transformercurrent decreases. Therefore, vcr(t3) increases in accordancewith reduction of the duty cycle. Thus, the required capacitanceof the resonant snubbing capacitor Cr can be determined in (6)by setting the minimum voltage of vcr < Ed.

The peak current Ipp can be determined under condition ofLm � Ls by

Ipp ≈ Ed

2

√Cs

Ls− NT Vo

√Cs

Ls+

πNT fs

2NT fo(7)

where fs and fo denote the switching frequency and the seriesresonant frequency of the HF-link half-bridge dc–dc converter,respectively.

B. Resonant and Switching Frequency

In Fig. 5, the voltage gain–switching frequency characteris-tics of the ZCS–PWM dc–dc converter are depicted under a

TABLE IDESIGN SPECIFICATIONS AND CIRCUIT PARAMETERS

OF EXPERIMENTAL PROTOTYPE CIRCUIT

quality factor Q determined by the series resonant parameters.The output/input voltage gain G(= Vo/Ed) of the AHB dc–dcconverter can be defined from the switching frequency fs andthe Ls − Cs series resonant frequency fo by using a fundamen-tal element simplification method [5]

G =1

2NT· 1√[

1 + 1k

(1 − f2

o

f2s

)]2

+[(

fs

fo− fo

fs

)Q

]2(8)

Q =√

Ls

Cs· π2

8N2T Ro

(9)

where k(= Lm/Ls) is the ratio of parallel-to-series induc-tance and NT (= Np/Ns) is the winding turn ratio of theHF transformer.

While resonant frequency fa in the AERS cell is definedby 1/(2π

√Lr1Cr), the series resonant frequency fo is deter-

mined by

fo =1

2π√

(Lr + Ls + N2T Lo) · Cs

(10)

where Lr = Lr1 � Lr2.In the ZCS-PWM scheme treated here, the switching fre-

quency fs is fixed to a value in the region which is smallerthan fo

fs < fo � fa. (11)

Moreover, owing to the active snubber-assisted soft com-mutations with the asymmetrical PWM scheme, the switchingfrequency of the PWM-based dc–dc converter can be set higherthan that of the PFM-applied counterpart [10].

V. DESIGN AND SPECIFICATIONS OF PROTOTYPE CIRCUIT

The prototype of the ZCS-PWM half-bridge dc–dc converterhas been built in order to evaluate the operation characteristics


Fig. 6. Simulation current waveforms in AERS cell: (a) Cr = 30 nF, (b) Cr = 55 nF, (c) Cr = 70 nF, and (d) Cr = 100 nF.

of the proposed soft-switching circuit topology and controlschemes. The prototype design specifications and the experi-mental setup are summarized in Table I.

The input voltage of the prototype dc–dc converter is set in200 V, and the dc output voltage rating is designed to 15 V inconsideration that the dc–dc converter is suitable as a point-of-load (POL) power converter for the advanced automotiveelectric power-train architectures [14]. As a consequence, thepower rating is selected to 800 W, and the winding turn ratioNT = Np/Ns of the secondary-side center-tapped HF trans-former is designed to 5/1.

As one of the examples, the series resonant frequency fo in(10) and the quality factor Q in (9) are selected to be 80 kHzand 5, respectively. Accordingly, the series resonant capacitorCs and the series inductance Ls with the leakage inductanceLk of the HF transformer are turned in 260 nF and 16.7 μH,respectively.

The switching frequency fs is fixed to 55 kHz, taking intoaccount the electric performance of the IGBT gate driver usingPhotocoupler TLP250 under condition of (11). Provided thatthe edge-resonant period defined by 1/fa is around 10% of theswitching one-cycle time 1/fs, the edge-resonant frequency fa

can be given as 480 kHz.The resonant capacitor is required to have a capacitance

large enough for reversing and decaying the current throughthe main switch Q1 in the active snubber prior to its turn-offcommutation as mentioned earlier. Now, we have the ZCS-assisted inductor Lr1 of 1.6 μH. Prior to the determination

of Cs, the peak current Ipp can be approximately calculatedby (7) [5]

Ipp ≈ Ed

2

√Cs

Ls− NT Vo

√Cs

Ls+

πNT fo

2NT fs= 13 A. (12)

Therefore, when Lr1 is decided to be 1.6 μH, Cr is givenfrom (10) by

Cr >Lr1I

2pp

vcr(t3)2= 27 nF (13)

where vcr is selected to be half a dc input voltage (100 V).Based on the calculated value as a minimum capacitance, the

resonant snubber capacitor Cr is designed in accordance withthe converter soft-switching performance demonstrated by thesimulation results in Fig. 6. Thus, in order to ensure the ZCScommutation in Q1 without significant power dissipation dueto the circulating current in the active snubber, Cr is selected tobe 70 nF in the prototype circuit.

In accordance with (1), the controlled range of the dutycycle D is designed by

0.25 < D < 0.45 (14)

where the maximum value Dmax is set to 0.45.


Fig. 7. Steady-state operating waveforms in AERS cell at D = 0.43:(a) Measured waveforms (vcr : 250 V/div; iQ1, iQ2, iQ3 : 20 A/div; time :4.0 μs/div) and (b) simulation waveforms.

VI. EXPERIMENTAL RESULTS AND EVALUATION

A. Converter Steady-State Operation

The steady-state operating waveforms of the active snub-ber operation under the duty cycle D = 0.43 and D = 0.3are shown in Figs. 7 and 8, respectively, compared with thesimulated waveforms. From the measured waveforms, the ZCScommutation between the main and auxiliary switches can beconfirmed as well as the snubbing operation of the resonantsnubber capacitor Cr. In accordance with reduction of the dutycycle D, the peak currents in the main switch Q1 and the aux-iliary switch Q3 get to be more outstanding. However, the edgeresonant periods related to the peak currents are relatively short,particularly in the large duty cycle. Thus, the conduction lossdue to the peak current is not so significant, and no profoundreduction of converter efficiency due to the power dissipationarises.

B. ZCS Commutations in Switching Power Devices

Switching voltage and current waveforms and their V –Itraces of Q1–Q3 under the duty cycle D = 0.4 are shown inFigs. 9, 10, and 11, respectively. The complete ZCS turn-on andthe ZCZVS turn-off commutation of each switch are observedin the respective result. Thus, the feasibility of the proposeddc–dc converter topology and the soft-switching scheme can beproven.

Fig. 8. Steady-state operating waveforms in AERS cell at D = 0.3:(a) Measured waveforms (vcr : 250 V/div; iQ1, iQ2, iQ3 : 20 A/div; time :4.0 μs/div) and (b) simulation waveforms.

Fig. 12 shows the voltage and current waveforms of thesecondary-side diodes Do1 and Do2. The measured waveformsdepict that the ZCS soft commutation between the two diodescan be attained in the current overlapping mode due to theleakage inductances of the secondary-side windings in the HFtransformer. Incidentally, the voltage ringings can be reducedby employing lossless passive snubbers.

C. Output Power Control Characteristics

The converter performance on output power regulation in theZCS-PWM AHB dc–dc converter is investigated under both theopen- and closed-loop control schemes.

Fig. 13(a)–(c) shows the converter characteristics for theopen-loop control scheme, the parameters wherein are theresistance value of the electric load (KIKUSUI PLZ 1004). Inthose results, it can be confirmed that a wide range of outputpower regulation can be achieved by a constant-frequencyasymmetrical PWM strategy. The complete ZCS operationscan be attained in the output range of 400–800 W. In theregion under Po = 400 W, the turn-off commutation in Q2

becomes the semi-ZCS mode as shown in Fig. 14. However,since the voltage and current transitions softly overlap, thereare no significant surges as compared to a hard switching modecommutation.


Fig. 9. ZCS commutations in Q1: (a) Voltage and current waveforms and (b) V –I trace (vCE(Q1) : 250 V/div; iQ1 : 20 A/div; time : 2.0 μs/div).



Fig. 12. Voltage and current waveforms in Do1 and Do2 (vAK : 100 V/div;i : 50 A/div; time : 4.0 μs/div).

The converter characteristics for the closed-loop controlscheme are shown in Fig. 15, where the output voltage Vo

is regulated to 15 V. The experimental results indicate thata wide range of output power regulation can be achieved bythe constant-frequency asymmetrical PWM. The complete ZCSoperations are attained in Po = 410 W − 810 W, and the semi-ZCS operations mentioned earlier are also confirmed in theregion under Po = 410 W.

The actual conversion efficiency is shown in Fig. 16. Theefficiency drop with the load change is due to the increaseof conduction loss in the active snubber rather than the othercircuit components, since the current stress in the active snubberdue to the edge resonance becomes outstanding in the light-load region. However, in the heavy-load region where switching


Fig. 13. Open-loop-controlled characteristics: (a) Output power–duty cycle, (b) load current–duty cycle, and (c) output voltage–duty cycle.

Fig. 14. Semi-ZCS turn-off commutation in Q2 (vCE(Q2) : 100 V/div; iQ2 :5 A/div; time : 1 μs/div).

Fig. 15. Closed-loop-controlled characteristics.

losses account for the large part of the total power loss, thehigh efficiency of 96.2% at maximum can be attained underthe constant output voltage condition in the proposed soft-switching dc–dc converter.

D. Switching Frequency Evaluation

The switching frequency of the ZCS-PWM scheme is com-pared with that of ZCS-PFM in Fig. 17 for the same outputpower setting. This result depicts that the switching frequency

Fig. 16. Actual efficiency in proposed ZCS-PWM AHB dc–dc converter(measured by digital power meter YOKOGAWA WT1030).

Fig. 17. Comparison on switching frequencies between PWM and PFMschemes.

can be increased effectively by employing the asymmetricalPWM scheme more than the PFM one. Thus, the proposedZCS-PWM dc–dc converter and its control scheme are effectivefor improvement of the converter power density as well as sizereduction of the passive components.

A discussion on the comparison on the converter efficienciesbetween the PWM and PFM schemes is given in the originalconference paper [10].


VII. CONCLUSION

In this paper, the practical effectiveness of the HF-linkAHB soft-switching dc–dc converter with the single AERS cellfor zero-current commutations under the constant-frequencyasymmetrical PWM scheme has been newly presented, and itsperformance on high efficiency power conversion has beenevaluated by in-depth experimental data using its 800 W–55 kHz prototype. The ZCS operations of the dc–dc converterare confirmed, and the static characteristics are demonstratedin order to clarify its feasibility as a high-performance dc–dcconverter. From the results, it has been proven that the ZCS-PWM dc–dc converter topology is effective particularly forthe large output current type of power conversion with a largevoltage step-down ratio such as POL power converters. More-over, the design guideline for the circuit parameters is indicated,and its validity is also demonstrated by the relevant simulationand experimental results.

The next challenges include the introduction and evaluationof PWM and PFM dual-mode schemes in order to achieve ahigher conversion efficiency for the entire output power settingand further improvement of the power density of the dc–dcconverter.

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Tomokazu Mishima (S’00–M’04) was born inTokushima, Japan, in 1975. He received the B.S.,M.S., and Ph.D. degrees in electrical engineer-ing from the University of Tokushima, Tokushima,Japan, in 1999, 2001, and 2004, respectively.

Since 2003, he has been with the Departmentof Electrical Engineering and Information Science,Kure National College of Technology, Hiroshima,Japan, where is currently an Assistant Professor andengages in the education and research on powerelectronics. His main research interests include soft-

switching dc–dc converters, high-frequency inverters, automotive power elec-tronics, and renewable energy technologies.

Dr. Mishima is a member of the Institute of Electrical Engineering of Japanand Japan Institute of Power Electronics.

Mutsuo Nakaoka (M’83) received the Ph.D. de-gree in electrical engineering from Osaka University,Osaka, Japan, in 1981.

From 1981 to 1995, he was a Professor in theDepartment of Electrical and Electronics Engineer-ing, Graduate School of Engineering, Kobe Uni-versity, Kobe, Japan. From 1995 to 2004, he wasa Professor with the Department of Electrical andElectronics Engineering, Graduate School of Scienceand Engineering, Yamaguchi University, Yamaguchi,Japan. He is also currently a Visiting Professor with

Kyungnam University, Masan, Korea, and Industrial College of Technology,Hyogo, Japan. His research interests include application developments of powerelectronics circuits and systems.

Prof. Nakaoka is a member of IEEJ, JIPE, KIPE, EPE, and other institutionsrelated to power electronics. He served as a Chairman of the IEEE IndustrialElectronics Society Japan Chapter in 2001. He received many distinguishedpaper awards on power electronics such as the 2001 Premium Prize PaperAward from IEE-U.K., the 2001/2003 IEEE-IECON Best Paper Award, theThird Paper Award in 2000 IEEE-PEDS, the 2003 IEEE-IAS James MelcherPrize Paper Award, and the Best Paper Award of IATC’06.

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A Novel High-Frequency Transformer-Linked Soft …fbakan/AGK/agk_odev/11.pdf · Soft-Switching Half-Bridge DC–DC Converter With Constant-Frequency Asymmetrical PWM Scheme Tomokazu