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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 58, NO. 6, JUNE 2011 1277
A Low-Cost VLSI Architecture for Robust
Distributed Estimation in Wireless Sensor NetworksLi-Yuan Chang, Pei-Yin Chen , Member, IEEE , Tsang-Yi Wang , Member, IEEE , and Ching-Sung Chen
Abstract— A robust distributed estimation scheme for fusion
center in the presence of sensor faults via collaborative sensorfault detection (CSFD) was proposed in our previous research.The scheme can identify the faulty nodes ef ficiently and improvethe accuracy of the estimates significantly. It achieves very good
performance at the expense of such extensive computations aslogarithm and division in the detecting process. In many real-time
WSN applications, the fusion center might be implemented withthe ASIC and included in a standalone device. Therefore, a simpleand ef ficient distributed estimation scheme requiring lower hard-ware cost and power consumption is extremely desired for fusion
center. In this paper, we propose the ef ficient collaborative sensorfault detection (ECSFD) scheme and its VLSI architecture. Given
the low circuit complexity, it is suitable for hardware implemen-tation. The circuit of ECSFD contains 22589 gates and requires a
core size of 571 559 m by using TSMC 0.18 m cell library.Simulation results indicate the accuracy of the estimates obtained
from the ECSFD is better than that obtained from a conventionalapproach.
Index Terms— Distributed estimation, fusion, sensor fault detec-tion, VLSI architecture, wireless sensor networks.
I. I NTRODUCTION
A S WIRELESS communications technology and micro-
electromechanical systems (MEMS) techniques have
matured in recent years, wireless sensor networks (WSN) have
emerged as a promising solution for a variety of remote sensingapplications, including battlefield surveillance, environmental
monitoring, intruder detection systems, weather forecasting,
health care, agricultural technology, and so on. Irrespective of
their purpose, all WSN are characterized by the requirement
for energy ef ficiency, scalability, and fault tolerance [1]. These
requirements are particularly crucial in sensor networks de-
signed to perform an estimation function. The fusion center
makes the distributed estimation based upon the information
received from the local nodes. In such networks, the estimation
performance is critically dependent upon the availability and
reliability of the local information, and substantial errors are
Manuscript received August 17, 2010; revised October 29, 2010; accepted November 07, 2010. Date of publication January 06, 2011; date of currentversion May 27, 2011. This work was supported in part by the NationalScience Council, Taiwan, under Grant NSC 99-2220-E-006-026 and Grant NSC 99-2220-E-006-024, and in part by the Applied Information ServicesDevelopment & Integration Project, Phase II, Institute for Information Industry,subsidized by the Ministry of Economy Affairs of the Republic of China. This paper was recommended by Associate Editor V. Gaudet.
L.-Y Chang, P.-Y. Chen, and C.-S Chen are with the Digital IC Design Labo-ratory, Department of Computer Scienceand Information Engineering, NationalCheng Kung University, Tainan 701, Taiwan (e-mail: [email protected]; [email protected]; [email protected]).
T.-Y. Wang is with the Institute of Communications Engineering at NationalSun Yat-sen University, Kaosiung 80424, Taiwan (e-mail: [email protected]).
Digital Object Identifier 10.1109/TCSI.2010.2096117
induced if the nodes become unavailable (e.g., as a result of
consuming all their energy) or unreliable (e.g., as a result
of intermittent malfunctions). Hence, the design of a robust
distributed estimation for fusion center in WSN is essential.
The problem of distributed estimation systems have attracted
significant interest in recent years [2]–[5]. The research focuses
principally on the problem of developing ener gy-ef ficient and
bandwidth-constrained designs. By contrast, the problem of en-
hancing the fault tolerance capability of decentralized estimation
systems has attracted relatively little attention. In practical net-
works, fault tolerance is a critical concern since the sensor nodes
are invariably battery-powered and randomly deployed, and aretherefore not easily recharged or r eplaced. Furthermore, the sen-
sors aregenerally deployed in outdoor or similarly harsh environ-
ments, and thus the occurrence of sensor failures or malfunctions
isalmostinevitable.Tosolvetheproblem,wehaveproposedacol-
laborative fault detection (CSFD) scheme [6] to detect the faulty
nodes within the network such that their quantized messages can
be excluded from the parameter estimation process.
Some related works about var iants of enhancing the fault tol-
erant capability of decentralized estimation systems have been
considered in the following literature. I. Rapoport et al. [7] ad-
dressed the problem of sensor fault detection and estimation in
dynamic systems using an a priori sensor-fault model. Mean-while, Delouille et al . [8] used an embedded subgraphs algo-
rithm to design a robust distributed estimation scheme for sensor
networks in which the sensors observe different physical phe-
nomena. The scheme considers only temporary communication
faults such as failing links and sleeping nodes, whereas the ro-
bust CSFD estimation scheme proposed considers all manner of
possible sensor failures. Ishwar et al. [9] utilized a packet-era-
sure model to examine various aspects of distributed estimation
in WSN, including its robustness toward sensor unreliability, its
power-cycling characteristics, and the effects of uncertainties in
the wireless transmissions. However, the estimation problem as-
sumes that the fusion center requires the ability to discriminate
between the local messages received from normally operating
nodes and those messages received from faulty nodes.
In [6], CSFD takes the concept of collaborative signal pro-
cessing to perform robust distributed estimation. Specifically,
this work employs the homogeneity test [10] to implement
CSFD scheme to detect the faulty nodes within the network
such that their quantized messages can be excluded from the
parameter estimation process. Utilizing the proposed CSFD
mechanism, the fusion center identifies the faulty nodes with
the WS N and then excludes theirs information when estimating
the parameter of interest. With the aid of CSFD scheme, dif-
ferent sensor faults can be tolerated to improve the performance
of estimating the parameter of interest. As predicted, CSFD
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performs better than the conventional approach in estimating
theta in terms of different sensor faulty types and faulty number.
In the detecting process, CSFD requires such extensive com-
putations as logarithm and division though it achieves very good
performance. In many real-time WSN applications, the fusion
center might be implemented with the ASIC and included in
a standalone device, so a simple and good distributed estima-
tion scheme of lower computational complexity is extremely de-
sired. This motivation makes us modify CSFD and propose an
ef ficient collaborative sensor fault detection (ECSFD) scheme
and its VLSI architecture in this paper. Compared with CSFD,
ECSFD performs slightly better and requires only about 55% of
computations. Therefore, it does qualify as a good candidate for
hardware implementation.
In the recent years, some VLSI circuits for transmitter, re-
ceiver, demodulator, sensor node, and specific detector in WSN
have been presented. In [11], an on-off LC oscillator-based ul-
trawideband (UWB) impulse radio transmitter for long-range
application is presented. Verhelst et al. proposed a quadrature
analog correlation receiver for UWB [12]. In [13], a demodu-lator architecture capable of dealing with most of the previous
limitations in an ASK-utilized medical implant, especially in
want of being powered through wireless delivering, is proposed.
In [14], Alippi et al. proposed a low-power maximum power
point tracker (MPPT) circuit, which conveys solar energy into
rechargeable batteries for wireless sensor nodes. Furthermore,
Aguilar-Ponce et al.. proposed a VLSI architecture for Wron-
skian Change Detector [15] and Goldberg et al. proposed a low-
power VLSI wake-up detector for the use in an acoustic surveil-
lance sensor network [16]. To our knowledge, ECSFD circuit is
the first ASIC implementation for fault-tolerance fusion center
for distributed estimation and no related state-of-the-art ASICdesign exists in the literature.
The remainder of the paper is organized as follows. Section II
presents the system model, sensor fault models and the overview
of CSFD scheme. The details of ECSFD are described in
Section III. Section IV shows the VLSI architecture of ECSFD.
Section V presents the performance and implementation result
of ECSFD. Conclusions are finally drawn in Section VI.
II. OVERVIEW OF CSFD
Fig. 1 illustrates the basic structure of the distributed esti-
mation network considered in the present study. The Bayesian
formulation is considered here. Let be afi
-nite set corresponding to the sensor nodes observing sensor
measurement sequences generated from a common status of
phenomenon , the parameter under estimation. It is as-
sumed thatthe distributionof isknownand isdenoted by .
The observation sequences taken by sensor are denoted by
, where is the node index and is the time index.
Every sensor node quantizes its own observations to output
and send it to the fusion center. The local messages are
mapped to a binary signal vector where
is the number of bits used to represent the local
message and is the number of partition levels at the local
sensors.
In the distributed estimation network shown in Fig. 1, two
types of errors may affect the received quantized messages at
Fig. 1. System model for distributed estimation fusion scheme.
the fusion center. The first error is caused by the faulty node.
The considered WSN herein is very possible to contain faulty
nodes because of random deployment in a harsh environment.
The second error is the channel transmission error due to inter-
ference or noise. In this situation, the received at the fusioncenter may not be equal to and we denote by
for all and .
Consider the case where the fusion center estimates at
some arbitrary time . Note that in performing this estimation
process, all the messages received from the local nodes up to
time , i.e., are available
at the fusion center. If sensor faults exist within the network,
the estimated value of is liable to deviate significantly from
the true value. To solve the problem, CSFD adopts the con-
cept of collaborative signal processing to identify the faulty
nodes , where is the set of faulty nodes at time
. Then, the fusion center can eliminates the local messageassociated with these nodes , and makes the final
estimate at time , based only on the censored messages,
, where denotes and
.
In CSFD, the following sensor fault models are considered
in order to include different misbehavior. Given partition
levels for the quantizer, then we denote
when node operates in a fault-free manner.
In one fault model, the output of local quantizers is independent
of the parameter . For example, a stuck-at fault may occur in
which the output of the affected node is frozen at a fixed quanti-
zation level. Alternately, a random fault may arise in which thedistribution of the output of a faulty node is different from the
normal situation and equals a particular value regardless of the
true parameter. By contrast, some nodes may exhibit a -depen-
dent error in which a sensor offset bias transforms the sensor
measurement uniformly to a certain value and therefore alters
the value of .
The process of CSFD can be divided into three stages. The
first stage is to measure the faulty weights of all nodes. Then,
the faulty nodes are determined. Thefinal distributed estimate is
generated in the last stage. The detail of each stage is described
as follows.
Measuring Faulty Weight: This stage consists of two steps
and its aim is to decide the faulty weight of each node. The
faulty weight is used to measure the deviation of a node. In the
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first step, we compute the number of received from sensor
and denote it as .
(1)
where is the indicator function.
As mentioned in [17], the Kullback–Leibler (K-L) distance between distributions can be used to measure sensor-fault
deviation. In CSFD, we use K-L distance to estimate the
faulty weights of all sensors. According to the local decisions
, the K-L distance for node is em-
ployed to measure the distribution distance from average sensor
weight to faulty sensor weight , and is
defined as
(2)
where
(3)
Determining Faulty Nodes: The aim of this stage is to
decide which sensor nodes are faulty, based on the faulty
weights computed in the previous stage. First, all sensor
nodes are sorted in descending order based on their mag-
nitude of to get the faulty-weight-oriented se-
quence, . After is determined,
we can obtain the candidate set of faulty sensors, denoted as
where is the possible number of
faulty nodes, and let represent the empty set . In order
to determine the value of , the following homogeneity testing problem can be formulated to test for the existence of a set of
sensor nodes at time .
(4)
Then, the following statistics are utilized for homogeneity
testing to determine whether or not a candidate set is :
(5)
where
Utilizing the statistic , the binary hypothesis testing
problem given in (4) can be set as follows:
(6)
where is a threshold indicating the crit-
ical value of the chi-square distribution with
degrees of freedom at a significance level .
Fig. 2. Algorithm of CSFD.
In CSFD, the maximum value of is constrained to the
sensor faults search policy, i.e., , where is the
maximum number of possible faulty nodes. The step of deter-mining faulty nodes of CSFD scheme can be summarized as
follows:
CSFD-1: Set and assign the required significance
level . In addition, choose suitable value of in ac-
cordance with the network requirements and/or any prior
information regarding the failure characteristic of the net-
work.
CSFD-2: Perform (6) for the candidate set . If is
accepted, terminate the CSFD process and determine the
final decision . If is rejected, increase the
value of by 1.
CSFD-3: If , terminate the CSFD process anddetermine . If , accept hypothesis
and decide . Otherwise, rerun to Step
CSFD-2 and repeat Steps CSFD-2 to CSFD-3 iteratively
until is determined
Making Distributed Estimation: Once the set of faulty nodes
is determined, the fusion center removes the quantized
messages of the faulty nodes and performs the parameter esti-
mation. Then, the estimate obtained by minimum mean square
error (MSE) criterion is adopted and is given by
(7)
Fig. 2 shows the CSFD algorithm in the C language style. Moredetails of CSFD can be found in [6].
III. EFFICIENT CSFD
CSFD performs better than the conventional approach with
regard to fault tolerance. However, there are three dif ficulties
to be overcome for implementing CSFD with a VLSI circuit.
The first one is that it requires some extensive and complex
computations, such as logarithm and division in the detecting
process (see (2)–(6)). The second dif ficulty is that the integra-
tion required for the estimate of in (7) is quite complex. The
last dif ficulty is that the calculation of numerical integration
needs many bits. In order to overcome these dif ficulties, we
modify CSFD and propose an ef ficient collaborative sensor
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fault detection (ECSFD) scheme in this paper. ECSFD is
simple and requires lower computational complexity, thus
lower hardware cost and power consumption can be achieved.
Furthermore, ECSFD achieves almost the same performance
as CSFD. The details of ECSFD are described in the following.
A. Avoid the Logarithm and Division Operations
To avoid the logarithm and division operations required
in (2), a simple and ef ficient sensor faulty weight estimate
method is provided. We take advantage of collaborative signal
processing to estimate the sensor faulty weight. More con-
cretely, without knowing the true distribution of , most nodes
in the networks can be reasonably assumed to normally report
their decisions inferring the true distribution of to the fusion
center. If the sensor behavior deviates from the average
sensor behavior more obviously, the sensor
has larger faulty sensor weight. Hence, the faulty weight of
the sensor nodes can be estimated by the sum of the absolute
differences between and
(8)
Besides, the final purpose of this stage is to calculate the
for obtaining the faulty-weight-oriented sequence . By multi-
plying all with a constant simultaneously, we can
further reduce the computational complexity of without
affecting the decided . Finally, the can be estimated
with less computational complexity and is given as
(9)
In the stage of determining the faulty nodes, we must calculate
first. The computation of suffers from the
problem of massive division which needs large computational
complexity. In order to overcome the problem, the hypothesis
testing can be rewritten in the following formation by multi-
plying (6) with a constant:
(10)
Substituting (5) to (10) gives
TABLE IMSE OF CSFD AND ECSFD FOR DIFFERENT TYPES OF FAULTY NODES
TABLE IICOMPUTING TIME OF ECSFD FOR TWO PROCESSORS
(11)
where and .
The required division operation in (5) is replaced with multi-
plication and the corresponding computational complexity cost
can be reduced. Using (9) and (11), we can choose the ac-
cording to the step of determining faulty nodes of CSFD scheme
listed in Section II.
After deciding , ECSFD using the same operation in (7)
to obtain the . By implementing (9), (11), and (7), ECSFD re-
quires less computation than CSFD, and can achieve quite good
performance with regard to fault tolerance. We show the per-
formance comparison of CSFD and ECSFD for different types
of faulty nodes in Table I. Obviously, the distributed estimation
performance of ECSFD is a little better than CSFD.
To verify the computational complexity, both CSFD and
ECSFD ((9), (11), and (17)) are implemented in C language on
the 2.8 GHz Pentium 4 processor with 512 MB memory and
the 520 MHz INTEL XScale PXA270 with 64 MB memory,
respectively. Table II shows the computing time for the two
processors. ECSFD requires about 55% of CSFD’s computingtime on Pentium 4 processor.
B. Simplify the Integration
However, minimum MSE in (7) needs integral operation
which is dif ficult for hardware implementation. Therefore, the
numerical integration is used in the stage of making distributed
estimation. (7) can be written in the following form:
(12)
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where
(13)
In the issue of wireless communication, the additional noise
model can be reasonable assumed as a Gaussian function
. Therefore, can be given as
(14)
where denotes the quantized range of .
Let and denote the number of
received from in the fusion center. Then can be
calculated by the following equation:
(15)
Using the numerical integration, can be approximated byintegrating from to with an interval
(16)
In addition, the value of , and are decided according to the
prior distribution of .
C. Transform the Numerical Integration
However, the bit width required for the numerical repre-
sentations of the numerator and the denominator in (16) are
quite large when is large enough. With the aid of loga-
rithm property, we transform and
to
and , which need smaller bit
width, respectively. Hence, (16) can be rewritten as
(17)
(18)
Then, all the items of the numerators and denominators are
sorted to find the one with the maximum exponent denoted as
. According to the found value, all the other items which
satisfy or are selected to
calculate the value of approximated . (The selected items
are times larger than the ignored ones.) With the aid of the
logarithm and the sorting process, the can be calculated
ef ficiently.
By implementing (9), (11), and (17), ECSFD is suitable for
hardware implementation and can achieve quite acceptable
performance with regard to fault tolerance as demonstrated in
Section V.
IV. CHIP ARCHITECTURE FOR ECSFD
Observing the required operations in ECSFD, we develop a
low-cost VLSIarchitecture for ECSFD where and isset
as 8 and 3, respectively, in the current implementation. This set-
ting, as mentioned in [6], is suitable for general applications in
WSN. Furthermore, the word length of signals is decided based
on the following two considerations:
a) The performance of ECSFD circuit must be comparable
to that of CSFD.
b) The hardware cost of ECSFD circuit must be minimized.
After careful analysis and software simulation, we have
chosen the 11-bit widths for representing different signals
in the ECSFD circuit to meet the precision requirement and
maintain the acceptable performance.
TheVLSI architecture of ECSFDconsists of a logarithm unit,
antilogarithm unit, sort unit, register file, 11 11multiplier unit,
comparator unit, and adder/subtractor unit connected to a shared
bus. A top-level FSM coordinates the operations among these
functional units. In the following subsections, the implementa-
tions of four important operations, multiplication, logarithm/an-
tilogarithm, and sorting, are described in detail.
A. Multiplication
Since the largest width of the signals in ECSFD is 11-bit, a
basic 11 11 multiplier is developed where the multiplier is de-
noted as , the multiplicand is denoted as , and the product
is denoted as . Many multiplication operations are required
in ECSFD. Since the width of most signals is 11-bit, we need
the 11 11 multiplier. These multiplication operations are per-
formed sequentially at different time instant, so we can apply the
concept of hardware resource sharing and design special-pur-
pose multipliers (11 22, 22 22, and 22 33) to implement
them. Hence, we utilized the 11 11 multiplier to realize the
four different multiplications where the multiplier, multiplicand
and product are all realized with different bit widths of integer and fractional parts for respective precisions.
Let mean that the bit widths of the integer and frac-
tional parts of multiplier are bits and bits respectively.
The input/output precisions of four modes based on our 11 22,
22 22, and 22 33 multipliers are defined in Table III respec-
tively. For most WSN applications, the cost issue is more im-
portant than timing performance in the design of fusion center.
Hence, the 11 22, 22 22, and 22 33 multipliers are real-
ized with a normal 11 11 multiplier circuit (multiplying two
11-bit operands to produce a 22-bit product) and a dedicated
control circuit under multicycle implementation to reduce the
hardware cost. With the help of the control circuit, the 11 11multiplier can implement all the required multiplication opera-
tions for different modes with multiple clock cycles.
The full-precision 11 22 multiplier is realized with a
11 11 multiplier under multicycle implementation. Let ,
and represent the 11-bit data, and is multiplied
by through the 11 22 multiplier to get the product
result . The strategy of synthesizing the 11 22
multiplier with a 11 11 multiplier is shown in Fig. 3.
The full-precision 22 22 and 22 33 multipliers are de-
signed in the same way as the 11 22 multiplier. The strategies
of synthesizing the 22 22 multiplier with a 11 11 multiplier
for mode 2 and 3 are shown in Fig. 4(a) and (b) respectively.
Furthermore, the strategy of synthesizing the 22 33 multiplier
with a 11 11 multiplier is shown in Fig. 5. Specially, some bits
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TABLE IIII NPUT/OUTPUT PRECISIONS OF THE 11 22, 22 22, AND 22 33
MULTIPLIERS
Fig. 3. The strategy forsynthesizing the 11 22 multiplierwith a 11 11mul-tiplier.
Fig. 4. The strategy for synthesizing the 22 22 multiplier for different modeswith a 11 11 multiplier. (a) Mode 2. (b) Mode 3.
of the output product is ignored to save the required registers
since they have very little influence on the calculated results.
This multimode multiplier realized with multicycle implemen-
tation can meet the required precision of ECSFD and achievethe goal of low cost design.
B. Logarithm and Antilogarithm
As shown in (17), some logarithm and antilogarithm conver-
sion operations are required in ECSFD. Let and represent
the input and output, thus the logarithm conversion can be de-
noted as where is the 22-bit input and is the
converted 11-bit output. The reason of using is to match
the binary representation. Using a proper lookup table, we can
implement the logarithm conversion with a dedicated control
circuit. In our implementation, the prior distribution of is a
Gaussian function (0, 0.5), the range of the integration is from
to 3, the integral interval, is set as 0.05, and .
Fig. 5. The strategy forsynthesizing the 22 33 multiplier with a 11 11mul-tiplier.
Fig. 6. Flow chart of the antilogarithm conversion.
Hence, the lookup ROM table is constructed with 121 6 en-
tries ( , and ).
The antilogarithm conversion operations are also performed
based on a lookup table. Let and represent the input and
output, thus the antilogarithm conversion can be denoted as
, where is the 10-bit input and is the converted 22-bit
output. The exponents of the selected items in (18)
are normalized (subtracted by a common constant) to the range
from 0.00 to 10.00 without affecting the approximated .
Fig. 6 shows flow chart of antilogarithm computation in our
design. We use 10-bit to represent . The
lookup table is constructed with 10 entries and each stores the
17-bit value of , where is an integer to represent the
position number and . At every clock cycle, if , we find by looking u pthe ROM with the current
, multiply it by . Otherwise, remains the same value. The
22 22 multiplier (mode 3) is accessed 0 to 9 times to get the
result of 22-bit . After getting the values of numerators and
denominators in (18) through the antilogarithm module,
can be calculated by a divider. Finally, the division required in
(18) is replaced by repeated subtractions to reduce the hardware
cost.
C. Sorting
In ECSFD, the faulty weights of sensors are represented as
and is 3 in the current implementa-
tion, so we need to find the three biggest values from these eight
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Fig. 10. Performance comparison of CSFD, ECSFD circuit, and the conven-tional approach in a fault-free WSN.
Fig. 11. Performance comparison of CSFD, ECSFD circuit, and the conven-tional approach in a WSN with two sensors with stuck-at faults, i.e.,
.
For verification, the architecture was also implemented on the
Altera Stratix II EP2S60F1020C5 FPGA platform. The imple-
mentation result shows that our circuit generates correct output
under the operating clock frequency of 87.31 MHz with 2013
logic elements and 1435 registers.
Furthermore, we investigate the performance of ECSFD cir-
cuit in the presence of different sensor faults. The evaluation
is performed in various faulty scenarios where the fault typesand the number of faulty nodes are not known in advance. This
simulation results obtained for the MSEs of both estimation
schemes are also compared with those obtained using a con-
ventional distributed Bayesian estimation system in which the
unreliable local messages are included within the parameter es-
timation. The sensor measurements are processed using an ad-
ditive noise model, and the sensor observations are given by
(19)
where is drawn from a Gaussian distribution with zero-mean
and a variance , and , i.e., the additive noise at node
at time , also has a Gaussian distribution with zero-mean and
a variance . It is assumed that all the local nodes apply
Fig. 12. Performance comparison of CSFD, ECSFD circuit, and the conven-tional approach in a WSN with two sensors with random faults, i.e.,
.
Fig. 13. Performance comparison of CSFD, ECSFD circuit, and the conven-tional approach in a WSN with two faulty sensors characterized by
and .
the Lloyd–Max quantizer [18] with . The corresponding
partitions are given by
(20)
The communication channels between the local sensors and the
fusion center are assumed to be binary symmetric channels with
a crossover probability of . A value of is
specified in all the simulations.
Fig. 10 compares the estimation performance of CSFD,
ECSFD, and the conventional scheme for the case in which all
of the sensors within the network are fault-free. It is evident
that the MSE values of CSFD and ECSFD are virtually iden-
tical to those of the conventional scheme, implying that CSFD
and ECSFD have exceedingly small possibility to remove the
normally operating nodes.
Fig. 11 compares the estimation performance of the three
schemes when two of the nodes within the WSN experience
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CHANG et al.: A LOW-COST VLSI ARCHITECTURE FOR ROBUST DISTRIBUTED ESTIMATION IN WIRELESS SENSOR NET WORKS 1285
stuck-at-zero faults, i.e., . Note
that the two faulty nodes are drawn uniformly from the eight
nodes within the network. The results confirm that both ro-
bust estimation schemes result in a significantly lower MSE
than that obtained using the conventional approach. Moreover,
ECSFD performs slight better than CSFD. Fig. 12 illustrates
the performance of the three estimation schemes for the case
in which two of the eight sensors in the WSN experience a
random fault, i.e., . Again, the
results confirm that both CSFD and ECSFD schemes yield a far
better estimation performance than the conventional approach.
The scenario with two different sensor-fault types is simulated
in Fig. 13. This figure compares the performance of the three
schemes for the case in which the network has two faulty sen-
sors characterized by and
, respectively. The objective
of this evaluation is to investigate the ability of the proposed es-
timation schemes to cope with most sensor-fault types without
any a priori knowledge of the sensor-fault models. Once again,
the results confirm that both CSFD and ECSFD schemes rapidlyconverge to far lower values of the MSE than that obtained
using the conventional method, even when the network is in the
presence of the combined sensor-faults. Furthermore, it is ob-
served that the MSE results obtained using the ECSFD scheme
are slightly lower than those obtained from the original CSFD
scheme. Through the above performance evaluation, we con-
clude that ECSFD is more fault-tolerant than the conventional
approach with a very close level performance as that of CSFD.
VI. CONCLUSION
The ECSFD is designed in order to reduce the computationalcomplexity required for CSFD in this paper. Based on ECSFD,
a low cost VLSI architecture is proposed for fault-tolerant fu-
sion center in WSN. With the multicycle structure, the proposed
VLSI architecture can work fast enough to provide the real-time
operation but only needs a low hardware cost. According to the
performance evaluation, the VLSI architecture for ECSFD can
work better than the conventional approach and its performance
is close to that of CSFD.
R EFERENCES
[1] I. F. Akyildiz, W. Su, Y. Sankarasubramaniam, and E. Cayirci, “A
survey on sensor networks,” IEEE Commun. Mag., vol. 40, no. 8, pp.102–114, Aug. 2002.
[2] Y. Zhu, E. Song, J. Zhou, and Z. You, “Optimal dimensionality re-duction of sensor data in multisensor estimation fusion,” IEEE Trans.Signal Process., vol. 53, no. 5, pp. 1631–1639, May 2005.
[3] R. Niu and P. K. Varshney, “Target location estimation in sensor net-works with quantized data,” IEEE Trans. Signal Process., vol. 54, no.12, pp. 4519–4528, Dec. 2006.
[4] A. Ribeiro and G. B. Giannakis, “Bandwidth-constrained distributedestimation for wireless sensor networks—Part I: Gaussian case,” IEEE Trans. Signal Process., vol. 54, no. 7, pp. 2784–2796, Jul. 2006.
[5] A. Ribeiro and G. B. Giannakis, “Bandwidth-constrained distributedestimation for wireless sensor networks—Part II: Unknown proba- bility density function,” IEEE Trans. Signal Process., vol. 54, no. 7, pp. 2784–2796, Jul. 2006.
[6] T.-Y. Wang, L.-Y. Chang, and P.-Y. Chen, “A collaborative sensor-
fault detection scheme for robust distributed estimation in sensor net-works,” IEEE Trans. Commun.., vol. 57, no. 10, pp. 3045–3058, Oct.2009.
[7] I. Rapoport and Y. Oshman, “A new estimation error lower bound for interruption indicators in systems with uncertain measurements,” IEEE Trans. Inf. Theory, vol. 50, no. 12, pp. 3375–3384, Dec. 2004.
[8] V. Delouille, R. N. Neelamani, and R. G. Baraniuk, “Robust dis-tributed estimation using the embedded subgraphs algorithm,” IEEE Trans. Signal Process., vol. 54, no. 8, pp. 2998–3010, Aug. 2006.
[9] P. Ishwar, R. Puri, K. Ramchandran, and S. S. Pradhan, “On ratecon-strained distributed estimation in unreliable sensor networks,” IEEE J.Sel. Areas Commun., vol. 23, no. 4, pp. 765–775, Apr. 2005.
[10] R. C. Elandt-Johnson , Probability Models and Statistical Methods inGenetics. New York: Wiley, 1971.
[11] S. Diao, Y. Zheng, and C.-H. Heng, “A CMOS ultra low-power andhighly ef ficient UWB-IR transmitter for WPAN applications,” IEEE.Trans. Circuits Syst. II, Exp. Briefs, vol. 56, no. 3, pp. 200–204, 2009.
[12] M. Verhelst and W. Dehaene, “Analysis of the QAC IR-UWB receiver for low energy, low data-rate communications,” IEEE. Trans. CircuitsSyst. I, Reg. Papers, vol. 55, no. 8, pp. 2423–2432, 2008.
[13] C.-S. A. Gong, M.-T. Shiue, K.-W. Yao, T.-Y. Chen, Y. Chang, andC.-H. Su,“A truly low-cost high-ef ficiencyASK demodulator based onself-sampling scheme for bioimplantable applications,” IEEE. Trans.Circuits Syst. I, Reg. Papers, vol. 55, no. 6, pp. 1464–1477, 2008.
[14] C.Alippi andC. Galperti,“An adaptive systemfor optimal solar energyharvesting in wireless sensor network nodes,” IEEE. Trans. CircuitsSyst. I, Reg. Papers, vol. 55, no. 6, pp. 1742–1750, 2008.
[15] R. Aguilar-Ponce, J. Tessier, A. Baker, C. Emmela, J. Das, J. L. Tec-
panecatl-Xihuitl, A. Kumar, and M. Bayoumi, “VLSI architecture for an object change detector for visual sensors,” in IEEE Workshop Signal Process. Syst. Design Implementation, 2005, pp. 290–295.
[16] D. H. Goldberg, A. G. Andreou, P. Julian, P. O. Pouliquen, L. Riddle,andR. Rosasco, “A wakeup detectorfor an acoustic surveillance sensor network: Algorithm and VLSI implementation,” in Proc. IPSN’04, pp.134–141.
[17] T.M. Coverand J.A. Thomas , Elements of Information Theory. NewYork: Wiley, 1991.
[18] S. P. Lloyd, “Least squares quantization in PCM,” IEEE Trans. Inf.Theory, vol. IT-28, pp. 129–136, Mar. 1982.
Li-Yuan Chang received the B.S. and M.S. degreesin computer science and information engineeringfrom National Chi Nan University, Nantou Hsien,Taiwan, in 2004 and 2006, respectively. He is cur-
rently working toward the Ph.D. degree in computer science and information engineering at NationalCheng Kung University, Tainan, Taiwan.
His research interests include wireless sensor net-works, distributed detection, and embedded systems.
Pei-Yin Chen (M’08) received the B.S. and Ph.D.degrees in electrical engineering from NationalCheng Kung University, Tainan, Taiwan, in 1986and 1999, respectively, and the M.S. degree inelectrical engineering from Pennsylvania StateUniversity, State College, in 1990.
He is currently a Professor in the Department of
Computer Science and Information Engineering, Na-tional Cheng Kung University. His research interestsinclude VLSI chip design, video compression, fuzzylogic control, and gray prediction.
Tsang-Yi Wang (S’01-M’04) received the B.S. andM.S. degrees from the National Sun Yat-sen Univer-sity, Kaohsiung, Taiwan, in 1994 and 1996, respec-tively, and the Ph.D. degree in electrical engineeringfromthe Syracuse University, Syracuse, NY, in 2003.
From 2004 to 2006, he was an Assistant Pro-fessor in the Graduate Institute of CommunicationEngineering, National Chi Nan University, Nantou,Taiwan. In February 2006, he joined the faculty of
the Institute of Communications Engineering, Na-tional Sun Yatsen University, Kaohsiung, Taiwan, as
an Assistant Professor, and in August 2008 he became an Associate Professor.
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He is currently a Reviewer Editor of the Journal of Wireless Communicationsand Mobile Computing . His research mainly focuses on distributed detectionand estimation with applications in wireless communications and wirelesssensor networks.
Dr. Wang received the 2008 Best Paper Award for Young Scholars awardedfrom IEEE Information Society Taipei Chapter and IEEE Communications So-ciety Taipei/Tainan Chapter.
Ching-Sung Chen received the B.S. degree incomputer science and engineering from Yuan ZeUniversity, Taoyuan County, Taiwan, in 2008, andthe M.S. degree in computer science and informationengineering from National Cheng Kung University,Tainan County, Taiwan in 2010.
His research interests include VLSI chip designand embedded systems.