1- Rev 2.2 -

VWA 5000049 AADATA SHEET

8.5 to 11GHz X-Band Core-Chip

• Operating frequency range: 8.5 to 11GHz• Receive and Transmit mode operation• Receive linear typical gain: 20dB• Transmit linear typical gain: 24dB• 20dBm Tx P1dBc• 5.2dB Rx Noise figure• 6 bits phase shifter: 0-360° (step 5.625°)• 5 bits attenuator: 0-27.9 dB (step 0.9dB)• Parallel data input control logic• Chip size: 5.0 x 4.0 x 0.1 (mm)

Symbol Pad N°Tx/Rx 1Tx Out 8Rx Out 28

The VWA5000049AA integrates:- Transmit and receive switches- LNA, MPA, inter-stage amplifiers- 6-bit phase shifter- 5-bit attenuator- Digital control logic The digital control logic allows for parallel data input, so phase shifter and attenuator may be changed instantaneously.

• RZ Pulsed shape driver• 10GBps Communication systems.

FeaturesGeneral Description

Applications

• Active Antenna.• Telecom Clock Management

Pins Assignement & Functional Block Diagram

1

28

8

1011121314151617181920

24232221

2625

LNA

MPA

Att.

LNALNALNALNALNA

��

Con

trol I

nte

rface

/ B

ias

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 2

Symbol DC Features Min Typ Max Unit Note

VD1, VD2, VD3, VD4 Drain bias voltage 4.0 4.5 VID Drain current : Tx mode 280 mAmA 11

VS1, VS2, VS3, Gate bias voltage -5.0 V 1IG Gate current 35 mA

Hight levelControl voltage : Va & Vp

2.0 3.3 5.0 VLow level 0 0.8 V

VI Load pull 2.0 3.3 5.0 VIl Load pull current 9.5 mA

Note 1: The parameters value are controlled on standard production wafer measurement for four frequencies 9GHz, 9.5GHz, 10GHz, 10.5GHz.

Electrical Specifications

• Tamb.= +25°C

RF Spécifications Conditions Min Typ Max Unit

Frequency range 8.5 11 GHzInput return loss Rx/Tx mode -9.5 dBdBOutput return loss Rx/Tx mode -12 dBPhase shifter range : 6 bits 0 360 °

RMS phase error 1.5 3.5 °

Attenuator range 0 27.9 dBRMS amplitude error 0.3 0.6 dB

Receive mode (reference state, all phase & attenuation bits at 0)Small signal gain 18 20 dBOutput power (1dB compression point) 17 18 dBmNoise figure 5.2 dB

Transmit mode (reference state, all phase & attenuation bits at 0)Small signal gain 21 24 dBOutput power (1dB compression point) 20 22 dBm

Test conditions unless otherwise noted:

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 3

RF Spécifications Conditions Min Typ Max Unit Note

Frequency range 9 10.5 GHzInput return loss Rx/Tx mode -11 dBdBOutput return loss Rx/Tx mode -14 dBPhase shifter range : 6 bits 0 360 °

RMS phase error 1.5 2.5 °

Attenuator range 0 27.9 dBRMS amplitude error 0.3 0.6 dB

Receive mode (reference state, all phase & attenuation bits at 0)Small signal gain 19 20 dB 1Output power (1dB compression point) 17 18 dBmNoise figure 5.2 dB

Transmit mode (reference state, all phase & attenuation bits at 0)Small signal gain 23 24 dB 1Output power (1dB compression point) 21 22 dBm

Absolute Maximum Ratings

Symbol Parameters Min Typ Max Unit

VD1, VD2, VD3, VD4 Drain bias voltage +6.0 VVS1, VS2, VS3 Gate bias voltage -4.0 VV

VI Logic voltage -6.0 +5.5 VID Drain current 350 mA

Input power : Rx mode +15 dBmInput power : Tx mode +15 dBm

Tst Storage temperature -65 +165 °CTop Operating temperature (back of the die) -55 MTTF(*) °C

Note 1: The parameters value are controlled on standard production wafer measurement for four frequencies 9GHz, 9.5GHz, 10GHz, 10.5GHz.

(*) : Channel temperature affects the device’s MTTF. see MTTF graphs

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 4

Input & Output Return LossesOutput Power vs Input Power for

various Frequency

Small Signal GainDrain Current vs Input Power vs for

various Frequency

Typical Performance (Test Under Probes)

• Tamb.= +25°C

8.5GHz

9GHz 10GHz

9.5GHz10.5GHz

11GHz

200

225

250

275

300

325

350

-22 -18 -14 -10 -6 -2 2 6 10

I D(m

A)

Pin (dBm)

P1dB

10

11

12

13

14

15

16

17

18

19

20

8 8.5 9 9.5 10 10.5 11 11.5

OP1d

B (d

Bm)

Frequency (Ghz)

PSAT

10

11

12

13

14

15

16

17

18

19

20

8 8.5 9 9.5 10 10.5 11 11.5

P SAT

(dBm

)

Frequency (Ghz)

8.5 GHz9 GHz

9.5 GHz10 GHz

10.5 GHz11 GHz

0

2

4

6

8

10

12

14

16

18

20

22

24

-20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 2 4

Pout

(dBm

)

Pin (dBm)

S11

S22

-30

-25

-20

-15

-10

-5

0

8 8.5 9 9.5 10 10.5 11 11.5 12

Sij (

dB)

Frequency (GHz)

S21

15

16

17

18

19

20

21

22

23

24

25

8 8.5 9 9.5 10 10.5 11 11.5 12

S21

(dB)

Frequency (GHz)

Output P1dB Saturated Output Power

Test conditions unless otherwise noted:

Rx Mode

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 5

Input & Output Return LossesOutput Power vs Input Power for

various Frequency

Small Signal GainDrain Current vs Input Power vs for

various Frequency

Typical Performance (Test Under Probes)

• Tamb.= +25°C

Output P1dB Saturated Output Power

8.5GHz

9GHz

9.5GHz

10GHz

10.5GHz 11GHz

250

275

300

325

350

375

400

425

450

-22 -18 -14 -10 -6 -2 2 6 10

I D(m

A)

Pin (dBm)

P1dB

15

16

17

18

19

20

21

22

23

24

25

8 8.5 9 9.5 10 10.5 11 11.5

OP1d

B (d

Bm)

Frequency (Ghz)

PSAT

15

16

17

18

19

20

21

22

23

24

25

8 8.5 9 9.5 10 10.5 11 11.5

P SAT

(dBm

)

Frequency (Ghz)

8.5 GHz9 GHz

9.5 GHz10 GHz

10.5 GHz11 GHz

0

2

4

6

8

10

12

14

16

18

20

22

24

-20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 2 4

Pout

(dBm

)

Pin (dBm)

S11

S22

-30

-25

-20

-15

-10

-5

0

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

Sij (

dB)

Frequency (GHz)

S21

20

21

22

23

24

25

26

27

28

29

30

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

S21

(dB)

Frequency (GHz)

Test conditions unless otherwise noted:

Tx Mode

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 6

Phase Shifter Accuracy

Digit 1

0

2

4

6

8

10

12

14

16

18

20

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Digit 2

0

2

4

6

8

10

12

14

16

18

20

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Digit 3

10

12

14

16

18

20

22

24

26

28

30

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Digit 4

40

42

44

46

48

50

52

54

56

58

60

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Digit 5

80

82

84

86

88

90

92

94

96

98

100

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Digit 6

170

172

174

176

178

180

182

184

186

188

190

8.00 8.50 9.00 9.50 10.00 10.50 11.00 11.50 12.00

DDFF(°)

Frequency (GHz)

Phase Shift (°) : Digit 1 Phase Shift (°) : Digit 2

Phase Shift (°) : Digit 3 Phase Shift (°) : Digit 4

Phase Shift (°) : Digit 5 Phase Shift (°) : Digit 6

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 7

Attenuator Accuracy

Attenuation (°) : Digit 1

Digit 1

0

0.5

1

1.5

2

8 8.5 9 9.5 10 10.5 11 11.5 12

Att.

(dB)

Frequency (GHz)

Digit 2

0

0.5

1

1.5

2

2.5

3

3.5

4

8 8.5 9 9.5 10 10.5 11 11.5 12

Att.

(dB)

Frequency (GHz)

Digit 3

2

2.5

3

3.5

4

4.5

5

5.5

6

8 8.5 9 9.5 10 10.5 11 11.5 12

Att.

(dB)

Frequency (GHz)

Digit 4

5

5.5

6

6.5

7

7.5

8

8.5

9

9.5

10

8 8.5 9 9.5 10 10.5 11 11.5 12

Att.

(dB)

Frequency (GHz)

Digit 5

12

12.5

13

13.5

14

14.5

15

15.5

16

8 8.5 9 9.5 10 10.5 11 11.5 12

Att.

(dB)

Frequency (GHz)

Attenuation (°) : Digit 3

Attenuation (°) : Digit 5

Attenuation (°) : Digit 4

Attenuation (°) : Digit 2

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 8

Using Informations

• Decoupling and Assembly recommendationsBond wires need to be as short as possible : inductance < 0.13nH for RF accesses.VD1, VD2 & VD3 : on each, a 100pF single layer capacitor as close as possible to the die.

• BiasingNegative gate -5V bias (VS1, VS2 & VS3) must be applied before positive voltages (VD1, VD2, VD3 & VD4).

Attenuator

Level A1 A2 A3 A4 A5

0 dB 0 0 0 0 00.9 dB 1 0 0 0 001.8 dB 0 1 0 0 03.6 dB 0 0 1 0 07.2 dB 0 0 0 1 0

14.4 dB 0 0 0 0 127.9 dB 1 1 1 1 1

Phase Shifter

Phase P1 P2 P3 P4 P5 P6

0° 0 0 0 0 0 05.625° 1 0 0 0 00 0011.25° 0 1 0 0 0 022.5° 0 0 1 0 0 045° 0 0 0 1 0 090° 0 0 0 0 1 0180° 0 0 0 0 0 1

354.375° 1 1 1 1 1 1

• Logic truth table

In Tx mode :- Rx_S (pad 14) to logic high: +3.3V: command of the Tx/Rx switch.- VD2 &VD4 to +4V: common amplifiers.- VD3 to +4V: MPA- VD1 to 0V: switch off of the LNA.

In Rx mode :- Rx_S (pad 14) to logic low :0V: command of the Tx/Rx switch.- VD2 &VD4 to +4V: common amplifiers.- VD1 to +4V: LNA- VD3 to 0V: switch off of the MPA.

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 9

Die Layout

1

5

4

3

2

6

7

8 9 10 20

191817161514131211 272625232221 24 28

29

31

30

32

X = 0µmY = 0µm

X = 5000µmY = 4000µm

The following graphs give the information based on accelerated life test and thermal model analysis received from the foundry.

MTTF graphs

Die thickness = 100µmDie bottom must be connected to ground (RF and DC)

DATA SHEET VWA 5000049 AA

- Rev 2.2 - 10

Die Pin Out

Pad X (µm) Y (µm) Size (µm x µm) Function

1 2500 110 100x100 Tx/Rx RF Tx in & Rx out2 110 1680 100x100 VD2 +4V Common amplifiers bias3 110 1830 100x100 VS1 -5V Gate bias4 110 1980 100x100 GND5 110 2130 100x100 Rx Qnot 0(Rx) RF switch monitor6 110 3013 100x100 VD3 0/+4V RF switch monitor7 110 3663 100x100 GND8 387 3890 100x100 Tx RF Tx out9 949 3890 100x100 GND10 1300 3890 100x100 A0 0/+3.3V Atten. Bit 1 : 0.9 dB11 1450 3890 100x100 A3 0/+3.3V Atten. Bit 4 : 7.2 dB12 1600 3890 100x100 A4 0/+3.3V Atten. Bit 5 : 14.4 dB13 1750 3890 100x100 A2 0/+3.3V Atten. Bit 3 : 3.6 dB14 1900 3890 100x100 A1 0/+3.3V Atten. Bit 2 : 1.8 dB15 2050 3890 100x100 Rx S 0/+3.3V Rx/Tx switch16 2200 3890 100x100 GND Digital ground17 2350 3890 100x100 P5 0/+3.3V Phase shift Bit 6 : 180°18 2500 3890 100x100 P2 0/+3.3V Phase shift Bit 3 : 22.5°19 2650 3890 100x100 P4 0/+3.3V Phase shift Bit 5 : 90°20 2800 3890 100x100 P3 0/+3.3V Phase shift Bit 4 : 45°21 2950 3890 100x100 P1 0/+3.3V Phase shift Bit 2 : 11.25°22 3100 3890 100x100 P0 0/+3.3V Phase shift Bit 1 : 5.625°23 3250 3890 100x100 Qnot P0 0V Ref state. Voltage monitor24 3400 3890 100x100 Q P0 -3.4V Ref state. Voltage monitor25 3550 3890 100x100 VS2 -5V Gate bias26 3700 3890 100x100 V3 +3.3V Pull-up (1)

27 3994 3890 100x100 GND Decoupling ground28 4500 3890 100x100 Rx RF Rx in29 4890 3654 100x100 VS3 -5V Gate bias30 4890 3296 100x100 VD4 +4V Gate bias (>0)31 4890 3146 100x100 GND Decoupling ground32 4890 2846 100x100 VD1 0/+4V LNA Bias

Pinout and Bonding Pad Coordinates

(1) : V3= 3,3V => Attenuation Maximum & Phase shift Maximum.V3= 0V => Attenuation= 0dB & Phase shift= 0°.V3 not connected Ports Ai & Pi operating.

DATA SHEET VWA 5000049 AA

Informations contained in this document, are considered to be accurate and reliable. However, no responsibility is assumed by Vectrawave for the consequence of its use, nor for any infringement of patents or other rights of third parties that may result from this use. Products are not authorized for use in life support devices without prior written approval from Vectrawave.Specifications are subject to changewithout notice

Product Code Definition

VWA 5000049 AA 8.5 to 11GHz / X-band Core Chip

Ordering Information

Associated Material

Material Status

Packaged die Contact factoryDie Evaluation Board (die EVB) Contact factoryPackaged die Evaluation Board (packaged die EVB) Contact factoryMechanical files (DXF) Contact factoryMeasurents files (S2P) Contact factory

Product Compliance Information

RoHS-Compliance :This part is compliant with EU 2011/65/EU RoHS directive (Restrictions on the Use of Cer-tain Hazardous Substances in Electrical and Electronic Equipment).This product also has the following attributes:• Lead Free• Halogen Free (Chlorine, Bromine)• Antimony Free• TBBP-A (C15H12Br402) Free• PFOS Free• SVHC Free

Solderability : Use only AuSn (80/20) solder and limit expo-sure to temperature above 300 °C TO 3 - 4 minutes, maximum

ESD Sensitivy Rating :

Test : Human Body Model (HBM)Standard : JEDEC Standard JESD22-A114

CAUTION ! ESD-Sensitive device

Contact Information

For the latest specifications, additional product information, worldwide sales and distribution loca-tions, and information about Vectrawave:

Represented by

Vectrawave SA www.vectrawave.com5, rue Louis de Broglie Email sales: contact_sales@vectrawave.com22 300 Lannion Tel sales:+33 (0)2 57 63 00 20France