80mW, DirectDrive, Stereo Headphone Amplifier with …1 0.1 0.01 0.001 0 40 10020 12060 80 total harmonic distortion plus noise vs. output power max4409 toc10 output power (w) thd+n

General DescriptionThe MAX4409 stereo headphone amplifier combinesMaxim’s DirectDrive® architecture and a common-mode sense input, which allows the amplifier to rejectcommon-mode noise. Conventional headphone ampli-fiers require a bulky DC-blocking capacitor betweenthe headphone and the amplifier. DirectDrive producesa ground-referenced output from a single supply, elimi-nating the need for large DC-blocking capacitors,which saves cost, board space, and component height.The common-mode voltage sensing corrects for anydifference between SGND of the amplifier and theheadphone return. This feature minimizes ground-loopnoise when the HP socket is used as a line out connec-tion to other grounded equipment, for example, a PCconnected to a home hi-fi system.

The MAX4409 draws only 5mA of supply current, deliv-ers up to 80mW per channel into a 16Ω load, and has alow 0.002% THD+N. A high 86dB power-supply rejec-tion ratio allows this device to operate from noisy digitalsupplies without additional power-supply conditioning.The MAX4409 includes ±8kV ESD protection on theheadphone outputs. Comprehensive click-and-pop cir-cuitry eliminates audible clicks and pops on startupand shutdown. A low-power shutdown mode reducessupply current draw to only 6µA.

The MAX4409 operates from a single 1.8V to 3.6V sup-ply, has short-circuit and thermal overload protection,and is specified over the extended -40°C to +85°C tem-perature range. The MAX4409 is available in a tiny 20-pin thin QFN (4mm x 4mm x 0.8mm) package.

Applications

Features♦ No Bulky DC-Blocking Capacitors Required♦ Ground-Referenced Outputs Eliminate DC-Bias

Voltages on Headphone Ground Pin♦ Common-Mode Voltage Sensing Eliminates

Ground-Loop Noise♦ 96dB CMRR♦ No Degradation of Low-Frequency Response Due

to Output Capacitors♦ 80mW per Channel into 16Ω♦ Low 0.002% THD+N♦ High 86dB PSRR♦ Integrated Click-and-Pop Suppression♦ 1.8V to 3.6V Single-Supply Operation♦ Low Quiescent Current♦ Low-Power Shutdown Mode♦ Short-Circuit and Thermal-Overload Protection♦ ±8kV ESD-Protected Amplifier Outputs♦ Available in a Space-Saving Package

20-Pin Thin QFN (4mm x 4mm x 0.8mm)

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80mW, DirectDrive, Stereo HeadphoneAmplifier with Common-Mode Sense

________________________________________________________________ Maxim Integrated Products 1

LEFTAUDIOINPUT

RIGHTAUDIOINPUT

SHDN

COM

MAX4409

DirectDrive OUTPUTS ELIMINATE DC-BLOCKING CAPACITORS

COMMON-MODE SENSE INPUT ELIMINATES GROUND-LOOP NOISE

Functional Diagram

Ordering Information

19-2842; Rev 3; 6/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at www.maxim-ic.com

PART TEMP RANGE PIN-PACKAGE

MAX4409ETP -40°C to +85°C 20 Thin QFN-EP*

Notebooks

Desktop PCs

Cellular Phones

PDAs

MP3 Players

Tablet PCs

Portable Audio Equipment

Pin Configurations and Typical Application Circuit appearat end of data sheet.

*EP = Exposed pad.

DirectDrive is a registered trademark of Maxim IntegratedProducts, Inc.

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2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS(VPVDD = VSVDD = 3V, VPGND = VSGND = 0, SHDN = SVDD, C1 = C2 = 2.2µF, RIN = RF = R1 = R2 = 10kΩ, RL = ∞, TA = TMIN toTMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

PGND to SGND .....................................................-0.3V to +0.3VPVDD to SVDD .................................................................-0.3V to +0.3VPVSS to SVSS .........................................................-0.3V to +0.3VPVDD and SVDD to PGND or SGND .........................-0.3V to +4VPVSS and SVSS to PGND or SGND ..........................-4V to +0.3VIN_ and COM to SGND.................................SVSS to (SVDD - 1V)IN_ to COM .....................................(COM + 2V) to (COM - 0.3V)SHDN_ to SGND........................(SGND - 0.3V) to (SVDD + 0.3V)OUT_ to SGND ............................(SVSS - 0.3V) to (SVDD + 0.3V)C1P to PGND.............................(PGND - 0.3V) to (PVDD + 0.3V)C1N to PGND .............................(PVSS - 0.3V) to (PGND + 0.3V)

Output Short Circuit to GND or VDD...........................ContinuousThermal Limits (Note 1)Continuous Power Dissipation (TA = +70°C)

20-Pin Thin QFN Multilayer (derate 25.6mW/°C above +70°C)..........................................................2051mW

θJA................................................................................39°C/WθJC...............................................................................5.7°C/W

Junction Temperature ......................................................+150°COperating Temperature Range ...........................-40°C to +85°CStorage Temperature Range .............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage Range VDD Guaranteed by PSRR test 1.8 3.6 V

Quiescent Supply Current IDD 5 8.4 mA

Shutdown Supply Current I SHDN SHDN = GND 6 10 µA

VIH0.7 xSVDD

SHDN Thresholds

VIL0.3 xSVDD

V

SHDN Input Leakage Current -1 +1 µA

SHDN to Full Operation tSON 175 µs

CHARGE PUMP

Oscillator Frequency fOSC 272 320 368 kHz

AMPLIFIERS

Input Offset Voltage VOS RL = 32Ω 0.5 2.4 mV

Input Bias Current IBIAS -700 -100 0 nA

COM Bias Current ICOM -1400 -200 0 nA

Equivalent Input Offset Current IOS IOS = (IBIAS(INR) + IBIAS(INL) - ICOM) / 2 ±2 nA

COM Input Range VCOM Inferred from CMRR test -500 +500 mV

Common-Mode Rejection Ratio CMRR -500mV ≤ VCOM ≤ +500mV, RSOURCE ≤ 10Ω 75 96 dB

1.8V ≤ VDD ≤ 3.6V DC (Note 3) 75 86

fRIPPLE = 1kHz 76Power-Supply Rejection Ratio PSRR VDD = 3.0V,200mVP-P ripple (Note 4) fRIPPLE = 20kHz 48

dB

RL = 32Ω 65Output Power POUT THD+N = 1%, TA = +25°C

RL = 16Ω 55 80mW

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layerboard. For detailed information on package thermal considerations see www.maxim-ic.com/thermal-tutorial.

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_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)(VPVDD = VSVDD = 3V, VPGND = VSGND = 0, SHDN = SVDD, C1 = C2 = 2.2µF, RIN = RF = R1 = R2 = 10kΩ, RL = ∞, TA = TMIN toTMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)

Note 2: All specifications are 100% tested at TA = +25°C; temperature limits are guaranteed by design.Note 3: Inputs are connected to ground and COM.Note 4: Inputs are AC-coupled to ground. COM is connected to ground.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RL = 32Ω,POUT = 50mW

0.002Total Harmonic DistortionPlus Noise

THD+N fIN = 1kHzRL = 16Ω,POUT = 60mW

0.005

%

Signal-to-Noise Ratio (Note 4) SNR RL = 32Ω, POUT = 20mW, fIN = 1kHz 95 dB

Slew Rate SR 0.8 V/µs

Maximum Capacitive Load CL No sustained oscillations 150 pF

Crosstalk RL = 16Ω, POUT = 1.6mW, fIN = 10kHz 55 dB

Thermal Shutdown Threshold 140 °C

Thermal Shutdown Hysteresis 15 °C

ESD Protection Human Body Model (OUTR, OUTL) ±8 kV

Typical Operating Characteristics(C1 = C2 = 2.2µF, RIN = RF = R1 = R2 = 10kΩ, THD+N measurement bandwidth = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)

10 100 10k1k 100k

TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY

MAX

4409

toc0

1

FREQUENCY (Hz)

THD+

N (%

)

1

0.1

0.001

0.01

VDD = 3VRL = 16Ω

POUT = 10mW

POUT = 60mW

1

0.001

TOTAL HARMONIC DISTORTION PLUSNOISE vs. FREQUENCY

0.01

0.1

MAX

4409

toc0

2

THD+

N (%

)

10 100 10k1k 100kFREQUENCY (Hz)

VDD = 3VRL = 32Ω

POUT = 50mW

POUT = 10mW

TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY

MAX

4409

toc0

3

THD+

N (%

)

1

0.1

0.001

0.01

VDD = 1.8VRL = 16Ω

POUT = 5mW

POUT = 15mW


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4 _______________________________________________________________________________________

Typical Operating Characteristics (continued)(C1 = C2 = 2.2µF, RIN = RF = R1 = R2 = 10kΩ, THD+N measurement bandwidth = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)

1

TOTAL HARMONIC DISTORTION PLUSNOISE vs. FREQUENCY

0.001

0.01

0.1

MAX

4409

toc0

4VDD = 1.8VRL = 32Ω

THD+

N (%

)

POUT = 15mWPOUT = 5mW


100

10

1

0.1

0.01

0.0010 90 120 15030 60 180

TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER

MAX

4409

toc0

5

OUTPUT POWER (W)

THD+

N (%

)

VDD = 3Vf = 20HzRL = 16Ω

OUTPUTSOUT OFPHASE

OUTPUTS IN PHASE

100

10

1

0.1

0.01

0.0010 90 120 15030 60 180


MAX

4409

toc0

6

OUTPUT POWER (W)

THD+

N (%

)

VDD = 3Vf = 1kHzRL = 16Ω

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 9060 120 15030 180


MAX

4409

toc0

7

OUTPUT POWER (W)

THD+

N (%

)


OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.001

0.00010 40 60 8020 120100


MAX

4409

toc0

8

OUTPUT POWER (W)

THD+

N (%

)

VDD = 3Vf = 20HzRL = 32Ω

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 40 10060 8020 120


MAX

4409

toc0

9

OUTPUT POWER (W)

THD+

N (%

)VDD = 3Vf = 1kHzRL = 32Ω

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 40 100806020 120


MAX

4409

toc1

0

OUTPUT POWER (W)

THD+

N (%

)


OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4409

toc1

1

OUTPUT POWER (W)

THD+

N (%

)

VDD = 1.8Vf = 20HzRL = 16Ω

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4409

toc1

2

OUTPUT POWER (W)

VDD = 1.8Vf = 1kHzRL = 16Ω

THD+

N (%

)

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

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_______________________________________________________________________________________ 5

100

10

1

0.1

0.01

0.0010 20 40 503010 60


MAX

4409

toc1

3

OUTPUT POWER (W)


THD+

N (%

)

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 30 402010


MAX

4409

toc1

4

OUTPUT POWER (W)

THD+

N (%

)

VDD = 1.8Vf = 20HzRL = 32Ω

OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 20 403010


MAX

4409

toc1

5

OUTPUT POWER (W)

THD+

N (%

)


OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

100

10

1

0.1

0.01

0.0010 20 30 4010


MAX

4409

toc1

6

OUTPUT POWER (W)

THD+

N (%

)


OUTPUTS INPHASE

OUTPUTSOUT OFPHASE

10 100 10k1k 100k

POWER-SUPPLY REJECTION RATIO vs. FREQUENCY

MAX

4409

toc1

7

FREQUENCY (Hz)

PSRR

(dB)

0

-30

-40

-20

-10

-90

-70

-80

-50

-60

VDD = 3VVIN = 200mVP-PRL = 16Ω

10 100 10k1k 100k


MAX

4410

toc1

8

FREQUENCY (Hz)

PSRR

(dB)

0

-40

-10

-20

-30

-90

-70

-80

-50

-60

VDD = 3VVIN = 200mVP-PRL = 16Ω

10 100 10k1k 100k


MAX

4410

toc1

9

FREQUENCY (Hz)

PSRR

(dB)

0

-40

-10

-20

-30

-90

-70

-80

-50

-60

VDD = 1.8VVIN = 200mVP-PRL = 16Ω

10 100 10k1k 100k


MAX

4410

toc2

0

FREQUENCY (Hz)

PSRR

(dB)

0

-40

-10

-20

-30

-90

-70

-80

-60

-50

VDD = 1.8VVIN = 200mVP-PRL = 32Ω

CROSSTALK vs. FREQUENCYM

AX44

10 to

c21

FREQUENCY (Hz)

CROS

STAL

K (d

B)

10k1k100

-80

-60

-70

-40

-50

-10

-20

-30

0

-9010 100k

LEFT TO RIGHT

RIGHT TO LEFT

VIN = 200mVP-P


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6 _______________________________________________________________________________________


COMMON-MODE REJECTION RATIOvs. FREQUENCY

MAX

4409

toc2

2

FREQUENCY (Hz)

CMRR

(dB)

10k1k100

-90

-70

-80

-40

-50

-60

-10

-20

-30

0

-10010 100k

VIN = 500mVP-P

OUTPUT POWER vs. SUPPLY VOLTAGE

MAX

4409

toc2

3

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

20

40

60

80

100

120

140

160

180

200

01.8 3.6

fIN = 1kHzRL = 16ΩTHD+N = 1%

INPUTSIN PHASE

INPUTS 180°OUT OF PHASE


MAX

4409

toc2

4

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

50

100

150

200

250

300

01.8 3.6


INPUTSIN PHASE



MAX

4409

toc2

5

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

20

40

60

80

100

120

140

01.8 3.6

fIN = 1kHzRL = 32Ω THD+N = 1% INPUTS 180°

OUT OF PHASE

INPUTSIN PHASE


MAX

4409

toc2

6

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(mW

)

3.33.02.72.42.1

40

20

60

80

100

120

140

160

180

01.8 3.6


INPUTSIN PHASE


OUTPUT POWER vs. LOAD RESISTANCE

MAX

4409

toc2

7

LOAD RESISTANCE (Ω)

OUTP

UT P

OWER

(mW

)

10k1k100

40

20

60

80

100

120

140

160

010 100k

VDD = 3VfIN = 1kHz

THD+N = 1%


INPUTSIN PHASE


MAX

4409

toc2

8


OUTP

UT P

OWER

(mW

)

10k1k100

50

100

150

200

250

010 100k

INPUTSIN PHASE


VDD = 3VfIN = 1kHz

THD+N = 10%


MAX

4409

toc2

9


OUTP

UT P

OWER

(mW

)

10k1k100

5

10

15

20

25

30

35

40

45

010 100k


INPUTS INPHASE

VDD = 1.8VfIN = 1kHz

THD+N = 1%

OUTPUT POWER vs. LOAD RESISTANCEM

AX44

09 to

c30


OUTP

UT P

OWER

(mW

)

10k1k100

10

20

30

40

50

60

70

010 100k


INPUTS INPHASE

VDD = 1.8VfIN = 1kHz

THD+N = 10%

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_______________________________________________________________________________________ 7

POWER DISSIPATIONvs. OUTPUT POWER

MAX

4409

toc3

1

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

16012040 80

50

100

150

200

250

300

350

400

00 200


fIN = 1kHzRL = 16ΩVDD = 3VPOUT = POUTL + POUTR

INPUTSIN PHASE


MAX

4409

toc3

2

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

16012040 80

20

40

60

80

120

100

140

160

180

00 200


fIN = 1kHzRL = 32ΩVDD = 3VPOUT = POUTL + POUTR

INPUTSIN PHASE


MAX

4409

toc3

3

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

50403010 20

20

40

60

80

100

120

140

00 60


fIN = 1kHzRL = 16ΩVDD = 1.8VPOUT = POUTL + POUTR

INPUTSIN PHASE


MAX

4409

toc3

4

OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON (m

W)

50403010 20

10

20

30

40

50

60

70

00 60


fIN = 1kHzRL = 32ΩVDD = 1.8VPOUT = POUTL + POUTR

INPUTSIN PHASE

806040

100 10k 100k 1M 10M

200

-20-40-60-80

-100

-180

-120-140-160

GAIN AND PHASE vs. FREQUENCYM

AX44

09 to

c35

FREQUENCY (Hz)

GAIN

/PHA

SE (d

B/DE

GREE

S)

VDD = 3VAV = 1000V/VRL = 16Ω

1k

GAIN

PHASE

10

10 1k 10k 1M100k 10M

0

-10

-20

-30

-50

-40

GAIN FLATNESS vs. FREQUENCY

MAX

4410

toc3

6

FREQUENCY (Hz)

GAIN

(dB)

VDD = 3VAV = -1V/VRL = 16Ω

100

CHARGE-PUMP OUTPUT RESISTANCEvs. SUPPLY VOLTAGE

MAX

4409

toc3

7

SUPPLY VOLTAGE (V)

OUTP

UT R

ESIS

TANC

E (Ω

)

3.33.02.72.42.1

2

4

6

8

10

01.8 3.6

VIN_ = GNDIPVSS = 10mANO LOAD

OUTPUT POWER vs. CHARGE-PUMP CAPACITANCE AND LOAD RESISTANCE

MAX

4409

toc3

8


OUTP

UT P

OWER

(mW

)

403020

20

10

30

40

50

60

70

80

90

010 50

fIN = 1kHzTHD+N = 1%

INPUTS IN PHASE

C1 = C2 = 1μF

C1 = C2 = 0.47μF

C1 = C2 = 0.68μF

C1 = C2 = 2.2μF

FREQUENCY (Hz)10k1k100 100k

OUTPUT SPECTRUM vs. FREQUENCYM

AX44

09 to

c39

OUTP

UT S

PECT

RUM

(dB)

-100

-80

-60

-40

-20

0

-120

VIN = 1VP-PfIN = 1kHzRL = 32ΩAV = -1V/V


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8 _______________________________________________________________________________________

Pin Description

PIN NAME FUNCTION

18 COM Common-Mode Voltage Sense Input

19 PVDD Charge-Pump Power Supply. Powers charge-pump inverter, charge-pump logic, and oscillator.

1 C1P Flying Capacitor Positive Terminal

2 PGND Power Ground. Connect to SGND.

3 C1N Flying Capacitor Negative Terminal

5 PVSS Charge-Pump Output

7 SVSS Amplifier Negative Power Supply. Connect to PVSS.

9 OUTL Left-Channel Output

10 SVDD Amplifier Positive Power Supply. Connect to PVDD.

13 INL Left-Channel Audio Input

11 OUTR Right-Channel Output

14 SHDN Active-Low Shutdown. Connect to VDD for normal operation.

15 INR Right-Channel Audio Input

17 SGND Signal Ground. Connect to PGND.

4, 6, 8, 12,16, 20

N.C. No Connection. Not internally connected.

— EP Exposed Pad. Leave unconnected. Do not connect to VDD or GND.


SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

4409

toc4

0

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

2.71.80.9

2

4

6

8

10

00 3.6

SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

4409

toc4

1

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (μ

A)

2.71.80.9

2

4

6

8

10

00 3.6

SHDN = GND

POWER-UP/DOWN WAVEFORMMAX4409 toc42

OUT_

OUT_FFT

VDD

3V

20dB/div

10mV/div

0V

200ms/divFFT: 25Hz/div

-100dB

RL = 32Ω, VIN_ = GND

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_______________________________________________________________________________________ 9

Detailed DescriptionThe MAX4409 stereo headphone driver features Maxim’spatented DirectDrive architecture, eliminating the largeoutput-coupling capacitors required by traditional single-supply headphone drivers. The device consists of two80mW Class AB headphone drivers, undervoltage lock-out (UVLO)/shutdown control, charge-pump, and com-prehensive click-and-pop suppression circuitry (seeTypical Application Circuit). The charge pump inverts thepositive supply (PVDD), creating a negative supply(PVSS). The headphone drivers operate from these bipo-lar supplies with their outputs biased about GND (Figure1). The drivers have almost twice the supply range com-pared to other 3V single-supply drivers, increasing theavailable output power. The benefit of this GND bias isthat the driver outputs do not have a DC component typi-cally VDD/2. Thus, the large DC-blocking capacitors areunnecessary, improving frequency response while con-serving board space and system cost.

The MAX4409 also features a common-mode voltagesense input that corrects for mismatch between theSGND of the device and the potential at the headphonejack return. A low-power shutdown mode reduces sup-ply current to 6µA. The device features an undervoltagelockout that prevents operation from an insufficientpower supply and click-and-pop suppression that elim-inates audible transients on startup and shutdown.Additionally, the MAX4409 features thermal overloadand short-circuit protection and can withstand ±8kVESD strikes on the output pins.

Common-Mode SenseWhen the headphone jack is used as a line out to inter-face between other equipment (notebooks, desktops,and stereo receivers), potential differences betweenthe equipment grounds can create ground loops andexcessive ground current flow. The MAX4409 COMinput senses and corrects for the difference betweenthe headphone return and device ground. ConnectCOM through a resistive voltage-divider between theheadphone jack return and SGND of the device (seeTypical Application Circuit). For optimum common-mode rejection, use the same value resistors for R2 andRIN, and R1 and RF. Improve DC CMRR by adding acapacitor in between with SGND and R2 (see TypicalApplication Circuit). If ground sensing is not required,connect COM directly to SGND through a 5kΩ resistor.

DirectDriveTraditional single-supply headphone drivers have theiroutputs biased about a nominal DC voltage (typicallyhalf the supply) for maximum dynamic range. Largecoupling capacitors are needed to block this DC bias

from the headphone. Without these capacitors, a signif-icant amount of DC current flows to the headphone,resulting in unnecessary power dissipation and possi-ble damage to both headphone and headphone driver.

Maxim’s patented DirectDrive architecture uses acharge pump to create an internal negative supply volt-age. This allows the outputs of the MAX4409 to bebiased about GND, almost doubling dynamic rangewhile operating from a single supply. With no DC com-ponent, there is no need for the large DC-blockingcapacitors. Instead of two large (220µF, typ) tantalumcapacitors, the MAX4409 charge pump requires twosmall ceramic capacitors, thereby conserving boardspace, reducing cost, and improving the frequencyresponse of the headphone driver. See the OutputPower vs. Charge-Pump Capacitance and LoadResistance graph in the Typical Operating Char-acteristics for details of the possible capacitor sizes.There is a low DC voltage on the driver outputs due toamplifier offset. However, the offset of the MAX4409 is

+VDD

-VDD

GNDVOUT

CONVENTIONAL DRIVER-BIASING SCHEME

DirectDrive BIASING SCHEME

VDD/2

VDD

GND

VOUT

Figure 1. Traditional Driver Output Waveform vs. MAX4409Output Waveform

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10 ______________________________________________________________________________________

typically 0.5mV, which, when combined with a 32Ωload, results in less than 16µA of DC current flow to theheadphones.

Previous attempts to eliminate the output-coupling capac-itors involved biasing the headphone return (sleeve) tothe DC-bias voltage of the headphone amplifiers. Thismethod raises some issues:

• When combining a microphone and headphone ona single connector, the microphone bias schemetypically requires a 0V reference.

• The sleeve is typically grounded to the chassis.Using this biasing approach, the sleeve must beisolated from system ground, complicating productdesign.

• During an ESD strike, the driver’s ESD structuresare the only path to system ground. Thus, the drivermust be able to withstand the full ESD strike.

• When using the headphone jack as a line out to otherequipment, the bias voltage on the sleeve may con-flict with the ground potential from other equipment,resulting in possible damage to the drivers.

Low-Frequency ResponseIn addition to the cost and size disadvantages of the DC-blocking capacitors required by conventional head-phone amplifiers, these capacitors limit the amplifier’slow-frequency response and can distort the audio signal:

• The impedance of the headphone load and the DC-blocking capacitor form a highpass filter with the -3dB point set by:

where RL is the headphone impedance and COUT isthe DC-blocking capacitor value. The highpass filteris required by conventional single-ended, singlepower-supply headphone drivers to block the midrailDC bias component of the audio signal from theheadphones. The drawback to the filter is that it canattenuate low-frequency signals. Larger values ofCOUT reduce this effect but result in physically larg-er, more expensive capacitors. Figure 2 shows therelationship between the size of COUT and the result-ing low-frequency attenuation. Note that the -3dBpoint for a 16Ω headphone with a 100µF blockingcapacitor is 100Hz, well within the normal audioband, resulting in low-frequency attenuation of thereproduced signal.

• The voltage coefficient of the DC-blocking capacitorcontributes distortion to the reproduced audio signalas the capacitance value varies as a function of thevoltage change across the capacitor. At low fre-quencies, the reactance of the capacitor dominatesat frequencies below the -3dB point and the voltagecoefficient appears as frequency-dependent distor-tion. Figure 3 shows the THD+N introduced by twodifferent capacitor dielectric types. Note that below100Hz, THD+N increases rapidly.

The combination of low-frequency attenuation and fre-quency-dependent distortion compromises audioreproduction in portable audio equipment that empha-sizes low-frequency effects such as multimedia lap-

fR CdB

L OUT- 23

1=π

LF ROLL OFF (16Ω LOAD)

MAX

4409

fig0

2

FREQUENCY (Hz)

ATTE

NUAT

ION

(dB)

100

-30

-25

-20

-10-3dB CORNER FOR100μF IS 100Hz

-15

-5-3

0

-3510 1k

33μF

330μF

220μF

100μF

Figure 2. Low-Frequency Attenuation for Common DC-BlockingCapacitor Values

ADDITIONAL THD+N DUE TO DC-BLOCKING CAPACITORS

MAX

4409

fig0

3

FREQUENCY (Hz)

THD+

N (%

)

10k1k100

0.001

0.01

0.1

1

10

0.000110 100k

TANTALUM

ALUM/ELEC

Figure 3. Distortion Contributed by DC-Blocking Capacitors

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______________________________________________________________________________________ 11

tops, as well as MP3, CD, and DVD players. By elimi-nating the DC-blocking capacitors through DirectDrivetechnology, these capacitor-related deficiencies areeliminated.

Charge PumpThe MAX4409 features a low-noise charge pump. The320kHz switching frequency is well beyond the audiorange, and thus does not interfere with the audio sig-nals. The switch drivers feature a controlled switchingspeed that minimizes noise generated by turn-on andturn-off transients. By limiting the switching speed of theswitches, the di/dt noise caused by the parasitic bondwire and trace inductance is minimized. Although nottypically required, additional high-frequency noise atten-uation can be achieved by increasing the size of C2(see Typical Application Circuit).

ShutdownThe MAX4409 features an active-low SHDN control.Driving SHDN low disables the charge pump andamplifiers, sets the amplifier output impedance toapproximately 1kΩ, and reduces supply current drawto less than 6µA.

Click-and-Pop SuppressionIn traditional single-supply audio drivers, the output-coupling capacitor is a major contributor of audibleclicks and pops. Upon startup, the driver charges thecoupling capacitor to its bias voltage, typically half thesupply. Likewise, on shutdown the capacitor is dis-charged to GND. This results in a DC shift across thecapacitor, which in turn, appears as an audible transientat the speaker. Since the MAX4409 does not requireoutput-coupling capacitors, this does not arise.

Additionally, the MAX4409 features extensive click-and-pop suppression that eliminates any audible transientsources internal to the device. The Power-Up/DownWaveform in the Typical Operating Characteristicsshows that there are minimal spectral components in theaudible range at the output upon startup or shutdown.

In most applications, the output of the preamplifier dri-ving the MAX4409 has a DC bias of typically half thesupply. At startup, the input-coupling capacitor ischarged to the preamplifier’s DC-bias voltage throughthe RF of the MAX4409, resulting in a DC shift acrossthe capacitor and an audible click/pop. Delaying therise of the SHDN_ signals 4 to 5 time constants (40msto 50ms) based on RIN and CIN relative to the start ofthe preamplifier eliminates this click/pop caused by theinput filter.

Applications InformationPower Dissipation

Under normal operating conditions, linear power ampli-fiers can dissipate a significant amount of power. Themaximum power dissipation for each package is givenin the Absolute Maximum Ratings section underContinuous Power Dissipation or can be calculated bythe following equation:

where TJ(MAX) is +150°C, TA is the ambient temperature,and θJA is the reciprocal of the derating factor in °C/W asspecified in the Absolute Maximum Ratings section. Forexample, θJA of the TQFN package is +39°C/W.

The MAX4409 has two sources of power dissipation,the charge pump and two drivers. If the power dissipa-tion for a given application exceeds the maximumallowed for a given package, either reduce VDD,increase load impedance, decrease the ambient tem-perature, or add heat sinking to the device. Large out-put, supply, and ground traces improve the maximumpower dissipation in the package.

Thermal overload protection limits total power dissipa-tion in the MAX4409. When the junction temperatureexceeds +140°C, the thermal-protection circuitry dis-ables the amplifier output stage. The amplifiers areenabled once the junction temperature cools by 15°C.This results in a pulsing output under continuous ther-mal-overload conditions.

Output PowerThe device has been specified for the worst-case sce-nario—when both inputs are in phase. Under this con-dition, the drivers simultaneously draw current from thecharge pump, leading to a slight loss in headroom ofVSS. In typical stereo audio applications, the left andright signals have differences in both magnitude andphase, subsequently leading to an increase in the max-imum attainable output power. Figure 4 shows the twoextreme cases for in and out of phase. In reality, theavailable power lies between these extremes.

Powering Other Circuits from a Negative Supply

An additional benefit of the MAX4409 is the internallygenerated, negative supply voltage (PVSS). This volt-age is used by the MAX4409 to provide the ground-ref-erenced output level. It can, however, also be used topower other devices within a design. Current draw fromthis negative supply (PVSS) should be limited to 5mA;exceeding this affects the operation of the headphone

PT T

DISSPKG MAXJ MAX A

JA( )

( )=−

θ

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12 ______________________________________________________________________________________

driver. The negative supply voltage appears on thePVSS pin. A typical application is a negative supply toadjust the contrast of LCD modules.

When considering the use of PVSS in this manner, notethat the charge-pump voltage at PVSS is roughly pro-portional to -VDD and is not a regulated voltage. Thecharge-pump output impedance plot appears in theTypical Operating Characteristics.

Component SelectionGain-Setting Resistors

External feedback components set the gain of theMAX4409. Resistors RF and RIN (see Typical ApplicationCircuit) set the gain of each amplifier as follows:

Choose feedback resistor values of 10kΩ. Values otherthan 10kΩ increase VOS due to the input bias current,which in turn increases the amount of DC current flowto the load. Resistors RIN, R2, RF, and R1 must be ofequal value for best results. Use high-tolerance resis-tors for best matching and CMRR. For example, theworst-case CMRR attributed to a 1% resistor mismatchis -34dB. This is the worst case, and typical resistors donot affect CMRR as drastically. The effect of resistormismatch is shown in Figure 5. If all resistors matchexactly, then any voltage applied to node A should beduplicated on OUT so no net differential voltageappears between node A (normally the HP jack socketGND) and OUT. For resistors with a tolerance of n%,the worst mismatch is found when RIN and R1 are at+n%, and RF and R2 are at -n%. If all four resistors arenominally the same value, then 2n% of the voltage at Aappears between A and OUT.

Packaged resistor arrays can provide well-matchedcomponents for this type of application. Although theirabsolute tolerance is not well controlled, the internalmatching of resistors can be very good. At higher fre-quencies, the rejection is usually limited by PC boardlayout; care should be taken to make sure any straycapacitance due to PC board traces on node N1 match-es those on node N2. Ultimately, CMRR performance islimited by the amplifier itself (see ElectricalCharacteristics).

Compensation CapacitorThe stability of the MAX4409 is affected by the value ofthe feedback resistor (RF). The combination of RF andthe input and parasitic trace capacitance introduces anadditional pole. Adding a capacitor in parallel with RFcompensates for this pole. Under typical conditionswith proper layout, the device is stable without the

additional capacitor.

Input FilteringThe input capacitor (CIN), in conjunction with RIN, forms ahighpass filter that removes the DC bias from an incom-ing signal (see Typical Application Circuit). The AC-cou-pling capacitor allows the amplifier to bias the signal toan optimum DC level. Assuming zero-source impedance,the -3dB point of the highpass filter is given by:

fR CdB

IN IN- 23

1=π

AV = −⎛⎝⎜

⎞⎠⎟

RR

F

IN

MAX4409

R1N2

N1

R2

RIN

RF

A

OUT

Figure 5. Common-Mode Sense Equivalent Circuit

100

10

1

0.1

0.01

0.0010 100 15050 200


MAX

4409

fig0

4

OUTPUT POWER (mW)

VDD = 3VAV = -1V/VRL = 16ΩfIN = 10kHz

THD+

N (%

)

OUTPUTS INPHASE

ONECHANNEL

OUTPUTS180° OUT OFPHASE

Figure 4. Output Power vs. THD+N with Inputs In/Out of Phase

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______________________________________________________________________________________ 13

Choose RIN according to the Gain-Setting Resistors sec-tion. Choose the CIN such that f-3dB is well below thelowest frequency of interest. Setting f-3dB too highaffects the low-frequency response of the amplifier. Usecapacitors whose dielectrics have low-voltage coeffi-cients, such as tantalum or aluminum electrolytic.Capacitors with high-voltage coefficients, such asceramics, may result in increased distortion at low fre-quencies.

Charge-Pump Capacitor SelectionUse capacitors with an ESR less than 100mΩ for opti-mum performance. Low-ESR ceramic capacitors mini-mize the output resistance of the charge pump. Forbest performance over the extended temperaturerange, select capacitors with an X7R dielectric. Table 1lists suggested manufacturers.

Flying Capacitor (C1)The value of the flying capacitor (C1) affects the loadregulation and output resistance of the charge pump. AC1 value that is too small degrades the device’s abilityto provide sufficient current drive, which leads to a lossof output voltage. Increasing the value of C1 improvesload regulation and reduces the charge-pump outputresistance to an extent. See the Output Power vs.Charge-Pump Capacitance and Load Resistancegraph in the Typical Operating Characteristics. Above2.2µF, the on-resistance of the switches and the ESR ofC1 and C2 dominate.

Output Capacitor (C2)The output capacitor value and ESR directly affect theripple at PVSS. Increasing the value of C2 reduces out-put ripple. Likewise, decreasing the ESR of C2 reducesboth ripple and output resistance. Lower capacitancevalues can be used in systems with low maximum out-put power levels. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in theTypical Operating Characteristics.

Power-Supply Bypass CapacitorThe power-supply bypass capacitor (C3) lowers the out-put impedance of the power supply, and reduces theimpact of the MAX4409’s charge-pump switching tran-sients. Bypass PVDD with C3, the same value as C1, andplace it physically close to the PVDD and PGND pins.

Common-Mode Noise RejectionFigure 6 shows a theoretical connection between twodevices, for example, a notebook computer (transmit-ter, on the left) and an amplifier (receiver, on the right).The application includes the headphone socket usedas a line output to a home hi-fi system, for example. Inthe upper diagram, any difference between the twoGND references (represented by VNOISE) causes cur-rent to flow through the screen of cable between thetwo devices. This can cause noise pickup at the receiv-er due to the potential divider action of the audioscreen cable impedance and the GND wiring of theamplifier.

Introducing impedance between the jack socket andGND of the notebook helps (as shown in the lower dia-gram). This has the following effect:

• Current flow (from GND potential differences) in thecable screen is reduced, which is a safety issue.

• It allows the MAX4409 differential sensing to reducethe GND noise seen by the receiver (amplifier).

The other side effect is the differential HP jack sensingcorrects the headphone crosstalk (from introducing theresistance on the jack GND return). Only one channelis depicted in Figure 6.

Figure 6 has some example numbers for resistance,but the audio designer has control over only one seriesresistance applied to the headphone jack return. Notethat this resistance can be bypassed for ESD purposesat frequencies much higher than audio if required. Theupper limit for this added resistance is the amount ofoutput swing the headphone amplifier tolerates whendriving low-impedance loads. Any headphone returncurrent appears as a voltage across this resistor.

Layout and GroundingProper layout and grounding are essential for optimumperformance. Connect PGND and SGND together at asingle point on the PC board. Connect all componentsassociated with the charge pump (C2 and C3) to thePGND plane. Connect PVDD and SVDD together at thedevice. Connect PVSS and SVSS together at thedevice. Bypassing of both supplies is accomplished bycharge-pump capacitors C2 and C3 (see Typical

Table 1. Suggested Capacitor ManufacturersSUPPLIER PHONE FAX WEBSITE

Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com

TDK 847-803-6100 847-390-4405 www.component.tdk.com

Note: Please indicate you are using the MAX4409 when contacting these component suppliers.

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9 Application Circuit). Place capacitors C2 and C3 asclose to the device as possible. Route PGND and alltraces that carry switching transients away from SGNDand the traces and components in the audio signalpath.

Ensure that the COM traces have the same trace lengthand width as the amplifier input and feedback traces.Route COM traces away from noisy signal paths. Thethin QFN package features an exposed paddle that

improves thermal efficiency of the package. However,the MAX4409 does not require additional heatsinking.Ensure that the exposed paddle is isolated from GNDor VDD. Do not connect the exposed paddle to GNDor VDD.


14 ______________________________________________________________________________________

VNOISE

VNOISE

0.1Ω

0.1Ω

0.1Ω

0.1ΩVREF_IN = (VNOISE x 0.99)

VIN = VAUDIO + (VNOISE x 0.98)

RESISTOR IS INSERTED BETWEEN THEJACK SLEEVE AND GND = 9.8Ω

VAUDIO

VAUDIO

GND NOISE COMPONENT INOUTPUT = VNOISE/100

EXAMPLE CONNECTION:

IMPROVEMENT FROMADDING MAX4409 WITHSERIES RESISTANCE

•

•••

9.8Ω RESISTOR ADDS TO HP CROSSTALK, BUT DIFFERENTIALSENSING AT THE JACK SLEEVE CORRECTS FOR THIS (ONE CHANNELONLY SHOWN).CURRENT FLOW (IN SIGNAL CABLE SCREEN) DUE TO VNOISEIS GREATLY REDUCED.NOISE COMPONENT IN THE RECEIVER OUTPUT IS REDUCED BY 34dBOVER THE PREVIOUS EXAMPLE WITH THE VALUES SHOWN.

•

•

9.8Ω

0.10Ω RESISTANCE FROM CABLE SCREEN0.10Ω RESISTANCE DUE TO GND CABLING AT RECEIVERVNOISE REPRESENTS THE POTENTIAL DIFFERENCE BETWEEN THE TWO GNDS

VREF_IN = VNOISE/2

VIN = VAUDIO

GND NOISE COMPONENT INOUTPUT = VNOISE/2

MAX4409

Figure 6. Common-Mode Noise Rejection

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______________________________________________________________________________________ 15

Typical Application Circuit

CHARGEPUMP

CLICK-AND-POPSUPPRESSION

C1N

C1P

PVSS SVSS PGND SGND

PVDD SVDD SHDN

SVSS

SVDD

INL

INR

OUTR

LEFTCHANNELAUDIO IN

RIGHTCHANNELAUDIO IN

HEADPHONEJACK

1419

1

2

3

5 7

9

10 13

11

COM 18

17

MAX4409

C11μF

C21μF

1.8V to 3.6V

C31μF

CIN1μF

RIN10kΩ

RF10kΩ

SVSS

SVDD

OUTL

CIN1μF

RIN10kΩ

RF10kΩ

15

R110kΩR2

10kΩ

UVLO/SHUTDOWNCONTROL

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16 ______________________________________________________________________________________

System Diagram

MAX9710

MAX961

OUTR+

OUTR-

OUTL-

OUTL+

INR

INL

BIAS

PVDD

VDD

SHDN

15kΩ

15kΩ

100kΩ100kΩ

VCC

15kΩ

15kΩ

VDD

0.1μF

0.1μF

0.1μF

1μF

MAX4060

MAX4409

Q

Q

IN+

0.1μF

OUTL

OUTR

C1P CIN

COM

SHDN

1μF

1μF

1μF

INL

INR

PVSS

SVSS

AUX_IN

BIAS

IN+

IN-

2.2kΩ0.1μF

0.1μF

0.1μF

CODEC

OUT

10kΩ

10kΩ

10kΩ10kΩ

10kΩ

1μF

10kΩ

1μF

VCC

1μF

PVDDSVDD

VCC

10kΩ

10kΩ

VCC

IN-

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______________________________________________________________________________________ 17

20 19 18 17

12

13

14

15

N.C.

INL

SHDN

INR

4

3

2

1

N.C.

CIN

PGND

C1P

11 OUTR5PVSS

MAX4409N.

C.

PVDD

COM

SGND

N.C.

SVSS

N.C.

OUTL

16

6 7 8 9 10N.

C.SV

DDTHIN QFN

TOP VIEW

Pin Configuration

Chip InformationTRANSISTOR COUNT: 4295

PROCESS: BiCMOS

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18 ______________________________________________________________________________________

24L

QFN

TH

IN.E

PS

Package InformationFor the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in thepackage code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to thepackage regardless of RoHS status.

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

20 TQFN T2044-3 21-0139

http://pdfserv.maxim-ic.com/package_dwgs/21-0139.PDF

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______________________________________________________________________________________ 19

Package Information (continued)For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in thepackage code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to thepackage regardless of RoHS status.

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Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision History

REVISIONNUMBER

REVISIONDATE

DESCRIPTIONPAGES

CHANGED

0 4/03 Initial release —

1 6/04Replaced 5mm x 5mm TQFN package information with 4mm x 4mm TQFNpackage information

1, 18

2 11/07Replaced Continuous Power Dissipation in Absolute Maximum Ratingssection, changed EC table notes, updated Pin Description and PackageOutlines

1, 2, 3, 8, 9, 18, 19

3 6/09 Removed TSSOP package 1, 2, 8, 11, 15, 16, 17

Documents

80mW, DirectDrive, Stereo Headphone Amplifier with …1 0.1 0.01 0.001 0 40 10020 12060 80 total harmonic distortion plus noise vs. output power max4409 toc10 output power (w) thd+n