87

4. 8 -

4.1 8080

8 - . 8080 8085 , , , , . ( 8085) .

88

4.1.1 8080

8080 8- 8- , 8- ( W, Z, AL TR ).

:

8- - 16- , (/

)

, , . , , . 64- .

RAM ( ). , , .

- . 8- , TR AL 5- .

(DBIN, WR , INTE, HOLD ACK, HOLD, WAIT, READY, SYNC, RESET ).

+12 V, +5V, -5V 1 2. 1 5 . 3 5 .

89

4.1.2 - 8080

4.1 8080

:

0 15

3 64 KB - ( 0-7 ) 256

256 .

D0 D7 , ,

- .

SYNC , .

DBIN .

READY , .

WAIT .

90

, .. -

.

HOLD

,

.

HLDA

HOLD, .

INTE

, -

- EI - Enabled Interrupt , DI Disabled Interrupt

.

INT , .. .

RESET

, ( )

0000 .

1, 2 .

91

4.1.3 8080

4.1.4 , ,

, .. 1 ( 4.2 ).

4.2

92

3 5 . - .

. 1 5 . .

4 17 , . ,

. 9 :

1.

2. ;

3. ;

4. ;

5. ;

6. ;

7. ;

8. ;

9. .

4.1.5 8080

8080 :

;

PC; ; PS; ; I/O (256

256 ).

93

Intel 8080 :

a .

, 3 , .

:

STA b2b3 -

, b2 b3;

LDA b2b3 -

b2 b3;

16- HL. H 8- , L 8- .

:

ADD M -

HL;

INR M -

HL .

6800.

:

ADI b2 - b2;

LXI D b2b3 - E b2, D b3.

16- . : .

:

PUSH B - B

1,

94

C

SP 2.

POP D - SP

,

SP 1

D.

4.1.6

. . :

; ; ;

.

.

4.1.6.1 8080

STA A $0100 - 0100;LDA A $01A0 - 010;MOV M,r1 - r1 H L;LHLD 302H - H L 302H 303H ( 302H L, 303H H );

95

SHLD 402H - H L 402H 403H ( L 402H, H 403H );IN 0 - 0;OUT 6 - 6.

TAB - , ;TBA - , ;TAP - 6 CCR;TPA - CCR , 1;TXS TSX - ;MOV A,E - ;MOV H,L - L H;

ADD ADI - ;SUB SUI - ;DAA - ;ADC - ;RAL - ;RAR - ;ANA - ;ORA - ;XRA - ;CMA - .

:- JMP PCHL;

96

:

JMP DATA - PC ( ) DATA;PCHL - H L ( HL- ).

- ;

JZ - Z ( Z=1 ), , ;JNZ - Z=0 , ;JPE - P=1 ( 1 )JPO - P=0 ( 1 ).

- , ;

POP rp - , ;PUSH rp - , ;INX SP - ;DCX SP - ;HLT - ; HALT ;EI - ;DI - .

97

4.2 8085

, . 200 . 500 , 8085, Z-80. 8085 , PIC 16f84, . 8085 , , .

4.2.1 8085

4.3 8085, . 8085 , 1 . 8 MHz, . 64KB, 16 (216 =64K). , . e . , . , . . . , , . , , .

98

INTERRUPTCONTROL

Serial I/OCTRL (USB)

8bit

(8)

ALU

B (8) C (8)

D (8) E (8)

H (8) L (8)

E

SID SODTRAP RST INTR INTA

CLKGEN

RESETX1X2

CLK RD WR ALE S0 S1 HOLD HLDA Res inRes out

Addressbuffer

A/Dbuffer

A15 A8 AD7 AD0

IO/M

4.3 8085

. , , B, C, D, E, H, L. 8 . 3 4.1.

111

B 000

C 001

D 010

E 011

H 100

L 001

4.1. 8085

99

16- . : BC, DE, HL. B, D H ( ) , C, E L ( ) . . , . , . , , . , . . , . aj - . -, , -. - . . . . . . , , ( ) . - (stck pointer), 16- . 8- . 8 256 , 256 . , . . . 8 256 . . . , , , . , ( ). .- ,

100

- . - , . , , , , . , , - , , . - -. , (flags). - . : C ( carry ) - . , . , . Z ( zero ) - , , Z . S ( sign ) - . , , . P ( parity ) - . , , . x - .

1: ( ) 11101011(2) 00010101(2) ?:

, Z Ax.

111111111110101100010101

100000000zero

carry

Ax

101

1

RESETOUT

12111098765432

2019181716151413

222324252627

302928

21

40393837363534333231

VCC

S1IO/MREADYRESETIN

CLOKOUT

HOLDHLDA

RDWR

A14A15S0ALE

A12A11A10A9A8

A13

X1

AD6AD5AD4AD3AD2AD1AD0INTAINTR

RST5.5RST6.5RST7.5

TRAP

SOD

X2

GNDAD7

8085

X1X2

HOLD

READY

INTRRST5.5RST6.5RST7.5

TRAP

SOD

SIDCLOKOUT

HLDA

INTA

S0

WRRD

IO/M

ALE

A8A15

RESETOUTRESETIN

S1

AD7AD0

4.2.2 - 8085

4.4 8085. , ( ).

4.4. 8085

, . . , . , .

102

15-8 16- . HOLD RESET.

AD0-7

/ 8 , .

ALEAddress Latch Enable- AD ALE=1 - . ALE=0 .

S0,S1,

IO/

- . -. . .

. , .

(Read)

. .

(Write)

.

READY

, . A , READY .

IO/ S1 S0

0 0 1 0 1 0

1 0 1 1 1 0

0 1 1 1 1 1

103

HOLD

( ) (Direct Memory Access). , . , .

, , , IO/ .

HLDA

Hold Acknowledge- Hol , .

INTR

(Intrrupt Request ) . . . INTR . , . .

(Intrrupt Acknowledge) . 8259 .

TRAP

, . TRAP , . trap , . , , . TRAP ( ) 160 . , .

RST 5.5

RST 6.5

RST 7.5

(Restart ) , , . TRAP RESET.RST 6.5 RST 5.5 . SIM (set interrupt mask) RIM(read interrupt mask). RST 6.5 RST 5.5 .

104

, HLDA - . - .

RESET OUT

.

CLK

( ) . 1 2.

1,2

1 2 ( , ) .

SID (Serial Input Data)

SOD (Serial Otput Data)

4.2.3 8085

. 8085 8- . , , . 4.5. - . . 8085 - . , :IO/ =0 - ( )S1=1 - ( )S0=1 ( , )

105

8085 16- - . . (PCH - Program Counter High) 8-15 . (PCL - Program Counter Low) Do-AD7 . , , D0-AD7 . ALE - . ALE (Adress Latch Enable) 8212. , , .

T1 T2 T3 T4 T5 T6 T1

M1M1 (OF)

CLK

S1, S0IO/M = 0, S1 = 1, S0 = 1

IO/M

A8-A15

AD0-AD7

PCH

PCL D0-D7 (DCX)OUT IN

ALE

RD

4.5.

- - . . T3, 8085 D . .

106

4.2.4 8085

, 8085 4 : , , . . . . . , .

2: 4.6. MOV H, L . L H. .

07 6 5 4 3 2 1

00 1 0 0 1 1 01B

4.6. MOV H,L

. MOV 01 . , . , L . 4.1. . . . . , . , .. .

3: 4.7 MVI A, 9EH. 9=10011110 .

107

07 6 5 4 3 2 1

00 0 1 1 1 1 11B

07 6 5 4 3 2 1

01 0 0 1 1 1 12B

4.7. MVI A,9EH

, . MVI. 10001110=9Kaj , . , . . . , 16- . RAM . 16 - .

4: 4.8. STA 8FFFH. 8FFFFH. 32=00110010 STA. 11111111=FFH 7-0. 8FH=10001111B 15-8.

4.8. STA 8FFFH

07 6 5 4 3 2 1

00 0 1 1 0 0 11B

07 6 5 4 3 2 1

11 1 1 1 1 1 12B07 6 5 4 3 2 1

11 0 0 0 1 1 13B

108

4.9. STA 8FFFH.

7-0

15-8

RAM RAM RAMRAM CPU CPUCPUCPU

4.9. STA 8FFFH

( ) . . 0 7 ( ) . (address latch). 8 15 ( ). . L . MOV A, M, HL .

109

4.2.5

8085 246 , 40 . : , , . , , - . :

( 4 ).

. . .

4.2.5.1

, , , . .

VI r,

r

00DDD110

2

D . , - DDD 4.1.

5:8200 3E MVI A ,9EH 9 8201 9

110

MOV r2, r1

r1 r2

01DDDSSS (D-destination , S-source)

1

6:8150 26 MVI H, 00H H .8151 00 8152 6C MOV L, H H L.

LDA adr

adr

00111010

3

7:8200 3 LDA 81C0H 81C016 .8201 C0 7-08202 81 15-88203 6F MOV L,A L.

STA adr

adr

00110010

3

8:8200 3 VI A,55H 55H.8201 55 8202 32 STA 8330 8330. 8203 30 7-08204 83 15-8

111

IN adr

adr

11011011

2

9:8000 DB IN 01 01 .8001 01 8002 67 MOV H,A ; H.

OUT adr

adr

11010011

2

10:8200 3 VI A,55 55H .8201 55 8202 D3 OUT 02 02.8203 02

4.2.5.2

: . , . , , .

112

ADD r

r

10000SSS

1

Zero, carry

11:8200 7C MOV A,H H .8201 85 ADD L L .8202 67 MOV H, A H.SUB r

r

10010SSS

1

Zero, carry

INR r DCR r

/

000DDD0100/00DDD101

1v

o

12:8000 3A LDA 81D8H 81D8 .8001 D8 7-08002 81 15-88003 3C INR .8004 32 STA 81D8 81D8.8005 D8 7-08006 81 15-8

113

4.2.5.3

ANA r ( AND ACCUMULATOR)

r

10100SSS

1

ORA r (OR ACCUMULATOR)

r

10110SSS

1

CMA (Complement accumulator)

00101111

1

13:8000 3A LDA 8250 8250 .8001 50 7-08002 82 15-88003 6F MOV L,A L.

8004 3A LDA 8251 8251 . 8005 51 7-08006 82 15-88007 A5 ANA L L.8008 32 STA 8252 8252.800A 52 7-0800B 82 15-8

114

, 8250 8251 8252.

4.2.5.4 - (Jump-)

. , . , , ( , ).

JMP adr

11000011

3

14:8100 3E MVI A, 01 0116=000000012.8101 01 8102 D3 OUT 02 .8103 02 8104 07 RL .8105 3 JMP 8102 81202 ( ).8106 02 7-08107 81 15-8

8 .

115

JZ adr (JUMP if ZERO- - )

1.

1.

11001010

3

15:8200 7C MOV A, H H . 8201 95 SUB L L .8202 CA JZ 8266 , 8266. 8203 66 7-0 8204 82 15-8 8205 XX

, .

JNZ adr (jump if not zero)

11000010

3

16:8300 26 MVI H,47 H 4716 8301 47 ().8302 25 DCR H .8303 C2 JNZ 8302 , 8302.8304 02 7-08305 83 15-8

, , , .

116

4.2.6 8085

, . (LDA, STA, ADD, SUB, ANA, ORA, CMA, ROL, RRC), (INC r, DCR r , MOV r1,r2 MVI r,data). .

17: =76 =D4H. : AND B CMA DCR B: = 01110110 , =11010100 .

011101101101010001010100

AB A

AND B

: A=01010100B, B=11010100B ( B )

A=01010100B.

: = 10101011 ,=11010100

B=11010100B

: =100101011, =11010011

CMA 01010100=10101011 =A

11010100

11010011

B

DCR B- 1

117

18: ! MVI A,A3H MVI E,9EH SUB E: . MVI . MVI A, A3H MVI E,9EH =3=10100011, =9=10011110

.

: =00000101, =10011110 ( )

101000111001111000000101

AE A

SUB E

19: . 8000. MVI A,65H MVI B,D8H ORA B STA 1234H

: . , . , , , .

8000H MVI A,65H .

. 8000+2=8002

8002H MVI B,D8H 8002+2=8004

118

8004H ORA B

. . 8004+1=8005

8005H

8008H

STA 1234H . . 8005+3=8008

, 8008.

4.2.7 8085

8085. , . . ( ) . .. IN. , . , OUT ( OUT 100 ms ). .- 8085 8212. , .. ( ).

119

4.10. 8212

strobe

INT

DS2DS1

DO7-0DI7-0

8212

8085

INTA

Vcc

1

1

4

32

5

8212 . 8212 .

- 8255 . PC e. 8- : , , .

8255

D7-D0

RDWRA0A1

RESET

CS

PA7-PA0

PB7-PB0

PC7-PC0

4.11. 8255

8255 8- PA, PB PC 8255 . , , . B , , . C .

120

4.3 8-