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ECO NO: DATE:APPROVED:
REVISION RECORD
LTR
A
D
C
6
A
B
C
D
5 4 3 2 1
B
RELEASED:
QUALITY CONTROL:
CHECKED:
DRAWN: DATED:
DATED:
DATED:
DATED:
COMPANY:
TITLE:
CODE: SZE:
SCALE: SHEET: OF
DRAWING NO: REV:
00
0
00
0
0
00
0
0
1
1
11
11
11
1
1
1
11
11
100 0 0
11000
RX1 UGSM/EGSM
RX2 DCS
RX3 PCS
RX4 TD_1.9G/2G_RX
TX LB GSM
TX HB GSM
TX LB EDGE
TX HB EDGE
VRAMP TXEN Ctrl_2 Ctrl_1 Ctrl_0
0
0
RAMP
RAMP
0
0
1
1
0
1
0
0
X
X
TD-SCDMA-1.9G/2G LPM
TD-SCDMA-1.9G/2G HPM
Impedance be 50ohmImpedance be 50ohm
PA MODULE
ramp network
RF ANTRF TRANSCEIVER
1000pF
NF
C149
26MHz DCXO or TCXO
TCXO
DCXO
VALUE R118R116 R115 R117 C148
0ohm 0ohmNF NF 0ohm
100pF 0.1uF0ohm 0ohm NF
DCXO,TCXO selection
L1
04
DN
P
L1
05
DN
P
A1LB2_RX+
A2LB1_RX-
A3LB1_RX+
A4
VD
D_R
X
A5
LB
1H
B1
_TX
A6
LB
2H
B2
_TX
A7
HB
3_T
X
A8
HB
4U
HB
1_T
X
A9
UH
B2
_TX
B1LB2_RX-
B2
GN
D
B3
GN
D
B4
VD
D_R
XL
O
B5
GN
D
B6
GN
D
B7
GN
D
B8
GN
D
B9
PD
ET
C1HB1_RX+
C2
GN
D
C8
PD
ET
_GN
D
C9
VD
D_T
X
D1HB1_RX-
D2
GN
D
D4
GN
D
D5REF3_EN
D6
GN
D
D8
VD
D_T
XL
O
D9SPI1_DATA
E1HB2_RX+
E2
GN
D
E4SPI2_CLK
E5SPI2_DATA
E6REF3_OUT
E8SPI1_LE
E9SPI1_CLK
F1HB2_RX-
F2
GN
D
F4
GN
D
F5SPI2_LE
F6
GN
D
F8VDD_DIG
F9VDD_DCXO
G1UHB1_RX+
G2
GN
D
G8REF2_OUT
G9REF1_OUT
H1UHB1_RX-
H2
GN
D
H3
VD
D_S
YN
TH
H4
TR
X1
_I+
H5
TR
X1
_Q+
H6
TR
X2
_I+
H7
TR
X2
_Q+
H8REF2_EN
H9REF1_EN
J1UHB2_RX+
J2UHB2_RX-
J3V
DD
_BB
J4T
RX
1_I
-
J5T
RX
1_Q
-
J6T
RX
2_I
-
J7T
RX
2_Q
-
J8REF_IN-
J9REF_IN+
U101
7101369M001
C118 47pF
L1
10
DN
P
L1
09
DN
P
L1
08
27
nH
1GND
2RFIN_HB
3GND
4RFIN_LB
5GND
6GND
7V
RA
MP
8T
X_E
N
9G
PC
TR
L0
10
GP
CT
RL
1
11
VB
AT
T
12
GP
CT
RL
2
13GPCTRL3
14TD_EN
15ANTENNA
16RX4
17
RX
3
18
RX
2
19
RX
1
20
GN
D
21
GN
D
22
GN
D
23
GN
D
U102
7101408M001
4GND
3GND
2GND
1UNBALANCE
6BALANCE_2017.5M
7BALANCE_2017.5M
8BALANCE_1900M
9BALANCE_1900M
5G
ND
10
GN
D
U1057300240M001
C1
02
10
uF
R109
0
R110 0
R102
0
R101
0L
10
1
5.1
nH
L1
02
DN
P
1
2
3
4
5
U1037300094M001
C1
45
10
0p
F
C138 1000pF
C127 1.5pF
C128 1.5pF
C129 1.5pF
C130 1.5pF
L1
13
5.6
nH
L1
15
5.6
nH
L1
16
5.6
nH
L1
12
27
nH
C116 47pF
C1
04
47
pF
C111
3.3pF
C112
3.3pF
C113
3.3pF
C114
3.3pF
L106
2.4nH
C1
03
0.1
uF
C1
44
1u
F
R103 1.5K
C115470pF
L120
5.6nH
C109 22pF
C1
05
47
pF
C1
06
47
pF
C1
07
47
pF
C1
08
47
pF
C121 1.2pF
C122 1.2pF
C123 2.2pF
C124 2.2pF
C1
36
1u
F
C1
32
1u
F
OUT IN
12
34
CN1024700023M001
L117
10nH
C1421uF
R111 0
C143 1000pF
41960MHZ
3GND
2GND
11842.5MHZ
6BALANCE
7GND
8GND
9BALANCE
5G
ND
10
GN
D
U104
7300278M001
C150 22pF
C117 22pF
L1
18
DN
P
C101 47pF
R1
04
10
M
L2
DN
P
ANT101
1900008M001
ANT102
1900008M001
ANT103
1900008M001
1
3
2 4
Y101
26MHz
C120 56pF
ANT_CON[1]
RFCTRL15_CTRL2[4]
APCOUT [2]
RFCTRL12_CTRL0[4]
RFCTRL10_PA_TXEN[4]
VBAT
UGSM/EGSM_IN [1]
ANT_CON[1]
RFCTRL14_CTRL1[4]
EGSM/GSM_RX[1]
PCS_RX[1]
TD_RX[1]
DCS/PCS/TD_IN [1]
MCLK_26M [2]
PCS_RX[1]
TD_RX[1]
EGSM/GSM_RX[1]
RF_SPI_DATA [4]
VDDRF0
RF_SPI_CLK [4]
RF_SPI_LE [4]
REF_IN+ [1]
VDDRF0
VDDRF0
VDDRF0
GS
M_Q
N[2
]
GS
M_Q
P[2
]
GS
M_I
N[2
]
GS
M_I
P[2
]
TD
_IP
[2]
TD
_IN
[2]
TD
_QP
[2]
TD
_QN
[2]
DC
S/P
CS
/TD
_IN
[1]
UG
SM
/EG
SM
_IN
[1]
VDDRF VDDRF0
VDDRF0
BT/WIFI_26M [7]
VDDRF0
DCS_RX[1]
DCS_RX[1]
REF_IN- [1]
REF_IN- [1]
REF_IN+[1]
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
Option
DCDC MEM OUTPUT SELECT DDR2 application (1.2V) DDR1 application (1.8V)
DCDC MEM OPTION OUTPUT Internal DCDC External DCDC
DCDC ARM OPTION OUTPUT Internal DCDC External DCDC
NEW POWER ON RST OPTION OUTPUT
LDO POWER ON OPTION OUTPUT LDO POWER ON BY SEQ LDO POWER ON TOGETHER
Function
External DCDCInternal DCDCDCDC CORE OPTION OUTPUT
HL
Option4
Option3
Option2
Option1
Option5
Option0
NEW POWER ON RST SCHEME(DIGITAL POR) OLD POWER ON RST SCHEME(ANALOG POR)
ON
ON
ON
ON
OFF
OFF
ON
ON
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
ON
Default
VDDLDO1.8/1.9/2.0/2.1
2.2/2.3/2.4/2.5800mA 2.2V
800mA1.0/1.1/1.2/1.3
0.65/0.7/0.8/0.9
1100mA0.65/0.7/0.8/0.9
1.0/1.1/1.2/1.3
1.2V(DDR2)1.1/1.2/1.3/1.4
1.7/1.8/1.9/2.0
1.9/2.1/2.3/2.5AUXMICBIAS 2.1V
0.5mA
VBATBK 2.6/2.8/3.0/3.2
VDDRTC 1.5/1.6/1.7/1.8 1.8V
2.8V
2.9/3.1/3.2/3.3
3.4/3.5/3.6/3.8
3.4/3.5/3.6/3.8
AVDDAO 100mA 3.3V
1.2/1.3/1.5/1.8
1.2/1.3/1.5/1.8
VDDCAMMOT 1.8/2.8/3.0/3.3 150mA 2.8V
VDDSD3 1.2/1.3/1.5/1.8 100mA 1.8V
1.2V
1.1V
VDDARM
VDDCORE
3.3V60mA3.1/3.2/3.3/3.4VDDUSB
3.3V20mA2.9/3.1/3.2/3.3
3.0V60mA2.8/2.9/3.0/3.1
100mA 2.8V
1.8V200mA
1.8/2.5/2.8/3.0
1.5V200mA
1.8V
2.8V
100mA
150mA
1.2/1.3/1.5/1.8
1.8/2.5/2.8/3.0
2.1V1.9/2.1/2.3/2.5
80mA 1.8V1.8
800mA 1.8V(DDR1)
3.0V200mA1.8/2.5/2.8/3.0
2.85V250mA1.8/2.5/2.85/2.95
1.2V
1.8V
1.8/3.0V
2.8V
2.5V
1.8V
Used Voltage
1.2/1.3/1.5/1.8 200mA
250mA1.2/1.3/1.5/1.8
1.8/2.9/3.0/3.1 80mA
80mA1.8/2.9/3.0/3.1
250mA
250mA
110mA
Output Current
1.8/2.65/2.8/3.0
2.5/2.75/2.9/3.0
1.2/1.3/1.5/1.8
VDD2V8
Output Voltage (V)
MICBIAS
VDDSD0
VDDSD1
VDDCAMCORE
VDDCAMIO
VDDCAMA
AVDDBB
AVDDVB
VDD3V
VDDMEM
VDD_A
VDDCMMB1V2
VDDRF
VDDCMMB1V8
VDDSIM1
VDDSIM0
VDD2V5
VDD1V8
Power
1.8/3.0V
ABB_ANALOG
OPTIONS
If use TCXO for RF, C201 must be mounted.
BKBTRTC
ABB_POWER
These ground pins must be separate.
And the circumfluence must be via DC-DC Power input's ground individually.
All capacitors must be close to ABB.
LDO ouput
DDR2_BUFOUT must be protected.
L204
SPH252012H2R2MT
IQA
UD
IOS
YS
TE
M
WHTLEDT.P.ADCI
A d
ie T
o D
die
CLK
Option RF ContrlRTC
B1
6A
DC
I0
B1
2A
DC
I1
B1
5A
DC
I2
B1
3A
DC
I3
K2ADI_SCLK
K3ADI_SYNC
K4ADI_D
J12HEAD_P_L
J14AORN
J15AORP
K12HEAD_P_R
L17VCOM
M13PA_OUTP
M14PA_OUTP
P14PA_OUTN
P15PA_OUTN
K17MICBIAS
J16MICP
K16MICN
L16AUXMICBIAS
H17AUXMICP
H16AUXMICN
G17HEADMIC_IN
G16HEADMICP
G15HEADMICN
H15AIL1
H14AIR1
L14EARN
M15EARP
D2AUD_SCLK
E1AUD_ADD0
F1AUD_DASYNC
F2AUD_DAD1
G3AUD_DAD0
H3AUD_ADSYNC
B7
RE
F2
6M
C7
MC
LK
I
E2CLK_32K
E3CLK_26M
H9
CL
K_S
INE
A8TRXQP
A9TRXQN
A11TRXIP
B9
TX
RE
F
B10TRXIN
E1
5O
PT
ION
5
E1
6O
PT
ION
4
E1
7O
PT
ION
3
F1
4O
PT
ION
1
F1
5O
PT
ION
0
F1
6O
PT
ION
2
A1
3A
PC
OU
T
A1
5A
FC
OU
T
A1
6A
FC
RE
F
D1
7O
SC
32
KI
D1
6O
SC
32
KO
F1
2V
BA
TB
K
E1
4V
DD
RT
C
J1GSM_RXPD
N3COM_RX_DQ[0]
N4COM_RX_SCLK
R3COM_RX_DQ[1]
T2COM_RX_SYNC
U1COM_RX_DI[1]
U2COM_RX_DI[0]
B2EXT_RST_B
B14EXTRSTN
C3ANA_INT
C14EDCDCARM_EN
C15EDCDCEN
C16EDCDCMEM_EN
D3CHIP_SLEEP
G5PRODT
H5TESTRSTN
E4PBINT
F4PTEST
J10PBINT2
N1ANA_INT2
B6
TD
TX
RE
F
B8
TD
RX
RE
F
C8TDQN
E8TDQP
E9TDIP
F9TDIN
H2TD_TXPD
J3TD_RXPD
K1TD_RX_CLK
K8
TP
_XL
L9
TP
_XR
K9
TP
_YD
J9T
P_Y
U
J2GSM_TXPD
L3COM_TX_DI[1]
L4COM_TX_DQ[1]
M2COM_TX_SYNC
N2COM_TX_SCLK
P1COM_TX_APCD
P2COM_TX_DI[0]
P3COM_TX_DQ[0]
B1XTL_BUF_EN
T1
7W
HT
LE
D_R
SE
T
U1
5W
HT
LE
D_I
B6
V1
6W
HT
LE
D_I
B9
W1
6W
HT
LE
D_I
B8
Y1
6W
HT
LE
D_I
B7
U1
4W
HT
LE
D_I
B5
U1
6W
HT
LE
D_I
B4
W1
7W
HT
LE
D_I
B3
V1
7W
HT
LE
D_I
B2
T1
6W
HT
LE
D_I
B1
T1
4W
HT
LE
D_I
B0
U201-A
7101496M001
R2
17
0
C2
13
33
pF
PO
WE
R
DC
2D
C M
EM
DC
2D
C A
RM
DC
2D
C C
OR
ED
C2
DC
LD
OC
HA
RG
E
GNDCURRENT
SINK
VBAT
NC
PO
WE
RIN
PU
TO
UT
PU
T
N1
3A
VS
SP
A
N1
4A
VS
SP
A
B1
1A
GN
DA
FC
R14VCHG
R17VBAT_SENSE
R16ISENSE
R15VDRV
R5VDCDC_LDOIN
U4VDCDC_LDOIN
V5VFB_ARM
V6LX_LDO
V7VBATDRV_LDO
V8VBATDRV_CORE
V9VBATDRV_CORE
V11VBATDRV_ARM
V12VBATDRV_MEM
W5VFB_MEM
W6LX_LDO
W7VBATDRV_LDO
W8VBATDRV_CORE
W9LX_CORE
W10LX_ARM
W11VBATDRV_ARM
W12LX_MEM
W13VBATDRV_MEM
W14VBATDRV_MEM
Y5VFB_CORE
Y4VFB_LDO
Y6LX_LDO
Y7VBATDRV_LDO
Y8LX_CORE
Y9LX_CORE
Y10LX_ARM
Y11LX_ARM
Y12VBATDRV_ARM
Y13LX_MEM
Y14LX_MEM
P9
VS
SD
RV
_CO
RE
P1
0V
SS
DR
V_A
RM
R8
VS
SD
RV
_LD
O
R9
VS
SD
RV
_CO
RE
R1
0V
SS
DR
V_A
RM
R1
1V
SS
DR
V_M
EM
R1
2V
SS
DR
V_M
EM
T7
VS
SD
RV
_LD
O
T8
VS
SD
RV
_LD
O
T9
VS
SD
RV
_CO
RE
T1
0V
SS
DR
V_A
RM
T1
1V
SS
DR
V_M
EM
C1
3V
SS
E7
VS
S
E1
2V
SS
F8
VS
S
G1
2V
SS
H1
0V
SS
L1
2V
SS
M8
VS
S
N7
VS
S
V1
3V
SS
A1NC
A17NC
Y1NC
Y17NC
A3VDDCAMMOT
A5VDD3V
A6VDD_A
B3VDDSD0
B4VDDSIM1
B5VDDSIM0
B17VDDRF
C5VDD2V8
D1
1A
VD
D3
6
D12AVDDBB
D14VDDCAMA
F5VDD2V8D
E11AVDDBB
F11AVDDBB
G7VDD2V5
G8VDDEFUSE
H8VDD2V5
J11
AV
DD
36
K1
1A
VD
D3
6
M9VIO_0
M16AVDDVB
N9VDDCMMB1V2
N10VDDCMMB1V8
N17AVDDAO
P16AVDDPA
V1VDDCAMIO
V2VDDCAMCORE
W2VDDSD1
W3VDD1V8
Y2VDDSD3
V15VIBR
W15KPLED
P1
1V
BA
T_B
UC
K
D7
VB
AT
D
F7
VB
AT
D
P7
VB
AT
D
L1
1V
BA
TP
A
N1
1V
BA
TP
A
A2VDDUSB
H1
2V
SS
E5
VB
AT
D
L8
VS
S
V4DDR2_BUFOUT
U201-B
7101496M001
C2
01
DN
P
C2
03
0.1
uF
C2
04
47
0p
F
C2
02
47
0p
F
C2
06
0.1
uF
C2
05
2.2
uF
R201 1K
C209 10uF
C210 0.1uF
R2
05
DN
P
R206 DNP
R2
08
10
K
R2
07
DN
PR
21
01
0K
R2
11
DN
P
R2
18
0
C2
31
4.7
uF
C2
30
0.1
uF
C2
33
4.7
uF
C2
32
0.1
uF
C2
35
4.7
uF
C2
34
0.1
uF
C2
36
4.7
uF
C2370.01uF
C2
39
0.1
uF
C2
38
1u
F
C2
28
0.1
uF
C229
22uF
L203
SPH252012H2R2MT
C2
24
0.1
uFC225
22uF
C227 4.7uF
C226 DNP
C223 4.7uF
C222 DNP
L202
SPH252012H2R2MT
C2
20
0.1
uFC221
22uF
C219 4.7uF
C218 DNP
L201
SPH252012H2R2MT
C2
17
0.1
uFC216
22uF
C215 4.7uF
C214 DNP
C2
63
0.1
uF
C2
65
0.1
uF
C2
44
0.1
uF
C2
48
2.2
uF
C2
47
2.2
uF
C2
45
2.2
uF
C2
42
2.2
uF
C2
41
2.2
uF
C2
40
2.2
uF
C2
49
2.2
uF
C2
50
2.2
uF
C2
52
2.2
uF
C2
55
2.2
uF
C2
60
2.2
uF
C2
59
2.2
uF
C2
58
2.2
uF
C2
64
1u
F
C2
62
1u
F
C2
61
1u
F
C2
54
1u
F
C2
51
1u
F
C2
46
DN
P
C2
43
10
uF
R203
10K
C2
11
22
pF
C2
12
22
pF
R2
16
22
0K
R2
15
10
M
BA
T2
01
DN
P
C25622uF
C2660.01uF
R2
02
51
0
Y201
32.768kHZ
VDDRTC
OPTION1[2]
OPTION2[2]
ADI_SCLK[4]
ADI_SYNC[4]
ADI_D[4]
AUD_SCLK[4]
AUD_ADSYNC[4]
AUD_ADD0[4]
AUD_DASYNC[4]
COM_TX_DI0[4]
COM_TX_DI1[4]
COM_TX_DQ0[4]
COM_TX_DQ1[4]
COM_TX_SCLK[4]
COM_TX_SYNC[4]
COM_TX_APCD[4]
COM_RX_DQ0[4]
COM_RX_DQ1[4]
COM_RX_SCLK[4]
COM_RX_SYNC[4]
XTL_BUF_EN[4]
EXT_RST_B[4]
ANA_INT[4]
ANA_INT2[4]
CHIP_SLEEP[4]
TD_TXPD[4]
TD_RXPD[4]
GSM_TXPD[4]
GSM_RXPD[4]
TD_RX_CLK[4]
CLK_32K[4]
CLK_26M[4]
AUD_DAD1[4]
AUD_DAD0[4]
COM_RX_DI0[4]
COM_RX_DI1[4]
PTEST[4]
MC
LK
_26
M[1
]
CL
K_S
INE
[4]
PBINT [8]
MICBIAS
MICP [6]
MICN [6]
PA_OUTP_BB [6]
PA_OUTN_BB [6]
EARN [6]
EARP [6]
HEAD_P_R[6]
HEAD_P_L[6]
FM_AIL [7]
FM_AIR [7]
HEADMIC_IN [6]
HEADMICP [6]
HEADMICN [6]
GSM_IP [1]
GSM_IN[1]
GSM_QP[1]
GSM_QN[1]
TD_QN[1]
TD_QP[1]
TD_IP [1]
TD_IN [1]
OP
TIO
N2
[2]
OP
TIO
N1
[2]
AP
CO
UT[1
]
AF
CO
UT
OS
C3
2K
I[2
]
OS
C3
2K
O [2
]
VB
AT
BK
VD
DR
TC
BA
T_T
EM
P_A
DC
[8]
VBATBK
VDD3V
VDDRF
VDD_A
VDD1V8
VDD2V8
VDDEFUSE
VDD2V5
DDR2_BUFOUT
AVDDBB
AVDDVB
AVDDPA
AVDDA0
VDDLDO
VDDCAMCORE
VDDCAMA
VDDCAMIO
VDDSD0
VDDSD1
VDDSD3
VDDSIM0
VDDSIM1
VDDUSB
VIB_CTRL [8]
KPLED_CTRL [8]
VBAT VBAT VBATVBAT
VDRV[8]
VCHG
VDDCORE
VDDMEM
VDDLDO
VDDARM
VBAT
VBAT
VBAT
VBAT
AVDDPA
VDDUSB
VDD2V8
VDDSD3
VDD3V
VDDSD1
VDDCAMCORE
VDDEFUSEAVDDA0
VDD_A
VDD2V8
VDDSIM1VDDSIM0VDDSD0
VDD2V8VDD2V5 VDD1V8
VDDCAMIOVDDCAMA
AVDDVBAVDDBB
VDDRF
DDR2_BUFOUT
LC
D_I
D[9
]
VDDRF
VBAT_SENSE[8]
VBAT_ISENSE[8]
OSC32KI[2]
OSC32KO[2] VDDRTC
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
All capacitors must be close to DBB.
DBB_POWER
DBB_MEMORY
240 1%
POWER
GND
H2
9M
DS
I_A
GN
D
J4V
SS
Q
J23
MD
SI_
AG
ND
J25
MD
SI_
AG
ND
J28
MD
SI_
AG
ND
K6
VS
SQ
K2
5M
DS
I_A
GN
D
L6
VS
SQ
L2
4M
DS
I_A
GN
D
L2
7M
DS
I_A
GN
D
M12VSS
M13VSS
M14VSS
M15VSS
M16VSS
M17VSS
M18VSS
M19VSS
M2
5M
DS
I_A
GN
D
N4
VS
SQ
N5
VS
SQ
N7
VS
SQ
N12VSS
N13VSS
N14VSS
N15VSS
N16VSS
N17VSS
N18VSS
N19VSS
N2
4M
DS
I_A
GN
D
P6
VS
SQ
P12VSS
P13VSS
P14VSS
P15VSS
P16VSS
P17VSS
P18VSS
P19VSS
P2
4V
SS
US
B
P2
5M
DS
I_A
GN
D
R12VSS
R13VSS
R14VSS
R15VSS
R16VSS
R17VSS
R18VSS
R19VSS
R2
3A
VS
S_P
LL
T5
VS
SQ
T18VSS
T13VSS
T14VSS
T15VSS
T16VSS
T17VSS
U6
VS
SQ
U12VSS
U13VSS
U14VSS
U15VSS
U16VSS
U17VSS
U18VSS
U19VSS
V6
VS
SQ
V12VSS
V13VSS
V17VSS
V18VSS
V19VSS
W12VSS
W13VSS
W14VSS
W16VSS
W17VSS
W18VSS
W19VSS
Y20VSS
Y4
VS
SQ
Y6
VS
SQ
AA12VSS
AB
6V
SS
Q
AD
4V
SS
Q
AF
3V
SS
Q
AF
4V
SS
Q
AF
5V
SS
Q
AF
20
MC
SI_
AG
ND
AF
21
MC
SI_
AG
ND
AF
23
MC
SI_
AG
ND
AF
25
MC
SI_
AG
ND
AG
22
MC
SI_
AG
ND
AH
20
MC
SI_
AG
ND
AH
24
MC
SI_
AG
ND
AH
25
MC
SI_
AG
ND
AJ1
VS
SQ
AK
1V
SS
Q
AK
2V
SS
Q
A1
VS
SQ
A2
VS
SQ
A29NC
A30NC
B1
VS
SQ
B30NC
AJ30NC
AK29NC
AK30NC
E4
VD
DS
D3
E5
VD
DS
D3
E1
5V
DD
IIC
F6
VD
DS
D1
K2
4M
DS
I_A
VD
D
L1
0V
DD
LC
M
L1
1V
DD
LC
M
L12VDDCORE
L13VDDCORE
L14VDDCORE
L15VDDCORE
L16VDDCORE
L17VDDCORE
L18VDDCORE
L1
9V
DD
IO2
L2
0V
DD
IO2
M10VDDMEM
M11VDDCORE
M20VDDCORE
M2
4M
DS
I_A
VD
D
N10VDDMEM
N11VDDCORE
N20VDDCORE
P10VDDMEM
P11VDDCORE
P20VDDCORE
P2
9V
DD
EF
U
R10VDDMEM
R11VDDCORE
R20VDDCORE
R3
0A
VD
D_P
LL
T10VDDMEM
T11VDDCORE
T12VDDCORE
T19VDDCORE
T20VDDCORE
T2
4V
DD
SIM
0
U10VDDMEM
U11VDDCORE
U20VDDCORE
U2
4V
DD
SIM
1
V10VDDMEM
V11VDDCORE
V14VDDARM
V15VDDARM
V16VDDARM
V20VDDCORE
V2
4V
DD
SD
0
W10VDDMEM
W11VDDCORE
W15VDDARM
Y10VDDMEM
Y11VDDCORE
Y13VDDARM
Y14VDDARM
Y15VDDARM
Y16VDDARM
Y17VDDARM
Y18VDDARM
Y1
9V
DD
CA
MIO
AA
20
VD
DIO
0
AA
10
VD
DN
F
AA11VDDCORE
Y1
2V
DD
IO1
AA13VDDARM
AA14VDDARM
AA15VDDARM
AA16VDDARM
AA17VDDARM
AA18VDDARM
AA
19
VD
DC
AM
IO
W20VDDCORE
AF
22
MC
SI_
AV
DD
AF
24
MC
SI_
AV
DD
M4VREF
U301-C
7101497M001 (VDDNF)(VDDMEM)
NANDMEM DDR2
LA
NE
-0L
AN
E-1
LA
NE
-2L
AN
E-3
R2EMA[0]
W2EMA[1]
W3EMA[2]
Y1EMA[3]
R1EMA[4]
T4EMA[5]
T3EMA[6]
T2EMA[7]
V3EMA[8]
T1EMA[9]
AA3EMA[10]
W4EMA[11]
W1EMA[12]
V2EMA[13]
V4EMA[14]
U5CLKDPMEM
U4CLKDMMEM
N1EMCKE[0]
N3EMCKE[1]
P4EMCS_N[0]
P3EMCS_N[1]
R4EMBA[0]
R3EMBA[1]
Y2EMBA[2]
AB2EMRAS_N
P2EMCAS_N
Y3EMWE_N
AA4EMZQ
AF1EMD[0]
AF2EMD[1]
AD3EMD[2]
AE3EMD[3]
AD2EMD[4]
AD1EMD[5]
AC1EMD[6]
AC2EMD[7]
AB1EMDQM[0]
AC3EMDQS[0]
AC4EMDQS_N[0]
K1EMD[8]
M1EMD[9]
M2EMD[10]
J3EMD[11]
K4EMD[12]
L1EMD[13]
L4EMD[14]
H1EMD[15]
J2EMDQM[1]
L2EMDQS[1]
L3EMDQS_N[1]
AH4EMD[16]
AJ2EMD[17]
AK4EMD[18]
AG3EMD[19]
AH1EMD[20]
AK3EMD[21]
AJ4EMD[22]
AG2EMD[23]
AG1EMDQM[2]
AJ3EMDQS[2]
AH3EMDQS_N[2]
H3EMD[24]
G2EMD[25]
E3EMD[26]
H2EMD[27]
F2EMD[28]
D3EMD[29]
G1EMD[30]
D2EMD[31]
F3EMDQM[3]
E1EMDQS[3]
D1EMDQS_N[3]
AF9NFD[0]/GPIO67
AE9NFD[1]/GPIO68
AK8NFD[2]/GPIO69
AJ8NFD[3]/GPIO70
AG8NFD[4]/CLK_AUX1/GPIO71
AJ7NFD[5]/SD2_D7/GPIO72
AH7NFD[6]/SD2_D6/GPIO73
AF8NFD[7]/SD2_D5/GPIO74
AF7NFD[8]/SD2_D4/GPIO75
AK6NFD[9]/SD2_D3/GPIO76
AG7NFD[10]/SD2_D2/AUD_IIS_DAT_DA1/GPIO77
AH10NFRB/GPIO61
AG10NFCLE/AMTDI/GPIO62
AJ6NFD[11]/SD2_D1/AUD_IIS_LRO_DA1/GPIO78
AF6NFD[12]/SD2_D0/AUD_IIS_CLK_DA1/GPIO79
AE10NFALE/AMTCK/GPIO63
AG6NFD[13]/SD2_RST/AUD_IIS_DAT_AD1/GPIO80
AK9NFCEN/AMTDO/GPIO64
AJ9NFWEN/AMTMS/GPIO66
AH6NFD[14]/SD2_CMD/AUD_IIS_LRO_AD1/GPIO81
AF10NFREN/AMTRST_N/GPIO65
AJ5NFD[15]/SD2_CLK/AUD_IIS_CLK_AD1/GPIO82
AJ10NFWPN/GPIO60
U301-B
7101497M001
R301 0
R302 0 R304 0
C305 0.1uF
C3
06
0.0
1u
F
C304 1uF
C308 0.1uF
C3
09
0.0
1u
F
C307 1uF
C3
10
0.1
uF
C3
11
1u
F
C3120.1uF
C3130.1uF
C3140.1uF
C3150.1uF
C3160.1uF
C3170.1uF
C3180.1uF
C3190.1uF
C3200.1uF
C3210.1uF
C3220.1uF
C3230.1uF
C3240.1uF
C3
02
0.1
uF
C3030.01uF
C3
01
10
uF
C3
26
0.1
uF
C3270.01uF
C3
25
10
uF
C3
29
0.1
uF
C3300.01uF
C3
28
10
uF
C331
0.01uF
R306 240
C2
69
22
uF
C2
67
22
uF
C2
68
22
uF
C3
32
DN
P
C3
33
DN
P
C3
34
DN
P
C3
35
DN
P
C3
36
DN
P
C3
37
DN
PC
33
8D
NP
C3
39
DN
P
VDDCORE
VDDARM
VDDMEM
VDDNFVDDSIM1VDDSIM0VDDSD3VDDSD1VDDSD0VDD2V8VDD1V8VDDCAMIO
VDDIO12VDDIO12VDDIO0VDDEFUSE
VDD1V8 VDDIO0 VDD2V8
VDD2V5
VDD2V5
VREF
VDDNF VDDIO12
VDD2V5
EMD[00:31][3,5]
EMD00
EMD01
EMD02
EMD03
EMD04
EMD05
EMD06
EMD07
EMD15
EMD14
EMD13
EMD12
EMD11
EMD10
EMD09
EMD08
EMD[00:31][3,5]
EMD23
EMD22
EMD21
EMD20
EMD19
EMD18
EMD17
EMD16
EMD[00:31][3,5]
EMD31
EMD30
EMD29
EMD28
EMD27
EMD26
EMD25
EMD24
EMD[00:31][3,5]
EMA[00:09] [5]EMA00
EMA01
EMA02
EMA03
EMA04
EMA05
EMA06
EMA07
EMA08
EMA09
EMDQM0[5]
EMDQS0[5]
EMDQSN0[5]
EMDQSN1[5]
EMDQS1[5]
EMDQM1[5]
EMDQSN2[5]
EMDQS2[5]
EMDQM2[5]
EMDQSN3[5]
EMDQS3[5]
EMDQM3[5]
NFD[00:03] [5]NFD00
NFD01
NFD02
NFD03
EMCLKDP [5]
EMCLKDM [5]
EMCKE0 [5]
EMCKE1 [5]
EMCSN0 [5]
EMCSN1 [5]
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
DBB_DIGITALR401 NF: Crystal for RF 26M
R401 Mounted: TCXO for RF 26M
I2C0: CTP
I2C1: Camera, ATV
I2C2: G Sensor, M Sensor, L+P Sensor, Gyroscope, FM
I2C3: LCM, NFC, MHL
20
0 1
%
6.04k 1%
6.04k 1%
(VD
DIO
2)
MIP
I C
AM
MIP
I D
ISP
LA
Y
LCD TRACE DATA USB IIC
CC
IR
CLK
GP
IO
XTL_EN
D d
ie T
o A
die
IIS
JTA
GS
PI2
SP
I0S
IM1
SIM
0S
DIO
3S
DIO
1
SDIO0
UARTRF CTRLKEYPAD
(VD
DIO
0)
(VD
DC
AM
IO)
(VDDIO2)
(AVDD_PLL)
(VDDIO1)
(VDDIIC)
(VDDIO2)
(VDDIIC) (VDDIO2)
(VD
DIO
2)
(VDDIO1)
(VDDLCM)
(MC
SI_
AV
DD
)(M
DS
I_A
VD
D)
(VD
DS
D3
)
(VDDIO2)
(VDDSD0)
(VD
DS
D1
)(V
DD
SIM
0)
(VD
DS
IM1
)(V
DD
IO2
)(V
DD
LC
M)
(VDDIO2)
(VDDIO2)
(VDDIO2)
(LC
D_P
CL
K)
(LC
D_D
E)
(LC
D_H
S)
(LC
D_V
S)
AF29ADI_SCLK
AE28ADI_SYNC
AB24ADI_D
AB28AUD_SCLK
AD30AUD_ADSYNC
Y24AUD_ADD0
AC28AUD_DASYNC
AD29AUD_DAD0
AD28AUD_DAD1
AJ29COM_TX_DI[0]
AG28COM_TX_DI[1]
AJ28COM_TX_DQ[0]
AC24COM_TX_DQ[1]
AD24COM_TX_SCLK
AH28COM_TX_SYNC
AH29COM_TX_APCD
AJ26COM_RX_DI[0]
AK26COM_RX_DI[1]
AG27COM_RX_DQ[0]
AH27COM_RX_DQ[1]
AG26COM_RX_SCLK
AH26COM_RX_SYNC
Y29XTL_BUF_EN
Y30EXT_RST_B
AA30ANA_INT
AH30ANA_INT2
AA29CHIP_SLEEP
AA24TD_TXPD
AD27TD_RXPD
AC27GSM_TXPD
AE30GSM_RXPD
AE29TD_RX_CLK
AB29CLK_32K
W24CLK_26M
W28PTEST
AH19CCIRMCLK/GPIO30
AJ19CCIRCK/RFT_GPO8/GPIO27
AK18CCIRD[0]/GPIO31
AJ18CCIRD[1]/GPIO32
AG18CCIRD[2]/GPIO33
AH18CCIRD[3]/GPIO34
AK17CCIRD[4]/RFT_GPO0/GPIO35
AJ17CCIRD[5]/RFT_GPO1/GPIO36
AF17CCIRD[6]/RFT_GPO2/GPIO37
AJ16CCIRD[7]/RFT_GPO3/GPIO38
AG16CCIRD[8]/RFT_GPO4/GPIO39
AF16CCIRD[9]/RFT_GPO5/GPIO40
AG19CCIRHS/RFT_GPO9/GPIO28
AF19CCIRVS/RFT_GPO10/GPIO29
AE16CCIRRST/RFT_GPO6/GPIO41
AJ15CCIRPD0/GPIO43
AK15CCIRPD1/RFT_GPO7/GPIO42
AH15SCL1/GPIO44
AG15SDA1/GPIO45
F16CLK_AUX0/PROBE_CLK/GPIO151
R29CLK26M_SINE
AF14GPIO135/CCIRCK
AG14GPIO136/EIC1/PWMC
AJ13GPIO137/EIC2/PWMD
AF13GPIO138/CP_GPIO14
AE13GPIO139/CP_GPIO15
AK12GPIO140/CCIRCK
C15GPIO141/CLK_AUX1
D15GPIO142
H28GPIO143/PWMA
H26GPIO144/PWMB
A1
6S
CL
0/G
PIO
14
5
B1
5S
DA
0/G
PIO
14
6
B1
6S
CL
2/G
PIO
14
7
C1
6S
DA
2/G
PIO
14
8
D1
6S
CL
3/G
PIO
14
9
E1
6S
DA
3/G
PIO
15
0
A17IIS0DI/DTDI/GPIO152
E17IIS0DO/DTDO/GPIO153
B17IIS0CLK/DTCK/TTOUT0P/GPIO154
B18IIS0LRCK/DTMS/GPIO155
A19IIS0MCK/DRTCK/BTXLEN/GPIO214
B20MTDO/AMTDO/DTDO/GPIO160
D19MTDI/AMTDI/DTDI/GPIO161
E19MTCK/AMTCK/DTCK/GPIO162
C19MTMS/AMTMS/DTMS/GPIO163
C20MTRST_N/AMTRST_N/DRTCK/GPIO164
AF
12
KE
YIN
[0]/G
PIO
54
AE
12
KE
YIN
[1]/C
P_G
PIO
0/G
PIO
55
AK
11
KE
YIN
[2]/C
P_G
PIO
1/G
PIO
56
AJ1
1K
EY
IN[3
]/C
P_G
PIO
2/G
PIO
57
AH
11
KE
YIN
[4]/C
P_G
PIO
3/G
PIO
58
AG
11
KE
YIN
[5]/C
P_G
PIO
4/G
PIO
59
AE
11
KE
YIN
[6]/C
P_G
PIO
5/G
PIO
21
2
AF
11
KE
YIN
[7]/E
IC0
/CP
_GP
IO6
/GP
IO2
13
AE
15
KE
YO
UT
[0]/G
PIO
46
AF
15
KE
YO
UT
[1]/C
P_G
PIO
7/G
PIO
47
AK
14
KE
YO
UT
[2]/C
P_G
PIO
8/G
PIO
48
AJ1
4K
EY
OU
T[3
]/C
P_G
PIO
9/G
PIO
49
AH
14
KE
YO
UT
[4]/C
P_G
PIO
10
/GP
IO5
0
AE
14
KE
YO
UT
[5]/C
P_G
PIO
11
/GP
IO5
1
AJ1
2K
EY
OU
T[6
]/C
P_G
PIO
12
/GP
IO5
2
AG
12
KE
YO
UT
[7]/C
LK
_AU
X1
/CP
_GP
IO1
3/G
PIO
53
B8
LC
D_D
[0]/T
RA
CE
DA
T3
1/G
PIO
10
3
E8
LC
D_D
[1]/T
RA
CE
DA
T3
0/G
PIO
10
4
D8
LC
D_D
[2]/T
RA
CE
DA
T2
9/G
PIO
10
5
C8
LC
D_D
[3]/T
RA
CE
DA
T2
8/G
PIO
10
6
E9
LC
D_D
[4]/T
RA
CE
DA
T2
7/G
PIO
10
7
B9
LC
D_D
[5]/T
RA
CE
DA
T2
6/G
PIO
10
8
F9
LC
D_D
[6]/T
RA
CE
DA
T2
5/G
PIO
10
9
B1
0L
CD
_D[7
]/TR
AC
ED
AT
24
/GP
IO1
10
E1
0L
CD
_D[8
]/TR
AC
ED
AT
23
/GP
IO1
11
A1
1L
CD
_D[9
]/TR
AC
ED
AT
22
/GP
IO1
15
B1
1L
CD
_D[1
0]/T
RA
CE
DA
T2
1/G
PIO
11
6
C1
1L
CD
_D[1
1]/T
RA
CE
DA
T2
0/G
PIO
11
7
D1
1L
CD
_D[1
2]/T
RA
CE
DA
T1
9/G
PIO
11
8
F1
1L
CD
_D[1
3]/T
RA
CE
DA
T1
8/G
PIO
11
9
B1
2L
CD
_D[1
4]/T
RA
CE
DA
T1
7/G
PIO
12
0
E1
1L
CD
_D[1
5]/T
RA
CE
DA
T1
6/G
PIO
12
1
C1
2L
CD
_D[1
6]/T
RA
CE
DA
T1
5/G
PIO
12
2
F1
2L
CD
_D[1
7]/T
RA
CE
DA
T1
4/G
PIO
12
3
D1
2L
CD
_D[1
8]/T
RA
CE
DA
T1
3/G
PIO
12
4
E1
2L
CD
_D[1
9]/T
RA
CE
DA
T1
2/C
LK
_AU
X1
/GP
IO1
25
A1
3L
CD
_D[2
0]/T
RA
CE
DA
T1
1/C
LK
_AU
X1
/GP
IO1
26
B1
3L
CD
_D[2
1]/T
RA
CE
DA
T1
0/G
PIO
12
7
E1
3L
CD
_D[2
2]/T
RA
CE
DA
T9
/PW
MC
/GP
IO1
28
F1
3L
CD
_D[2
3]/T
RA
CE
DA
T8
/PW
MD
/GP
IO1
29
A7
LC
D_R
ST
N/G
PIO
10
1
F1
0L
CD
_CS
N0
/GP
IO1
14
B7
LC
D_C
SN
1/G
PIO
10
0
A8
LC
D_C
D/G
PIO
10
2
D1
0L
CD
_RD
N/G
PIO
11
3
A1
0L
CD
_WR
N/G
PIO
11
2
A1
4L
CD
_FM
AR
K/S
PI2
_C
D/G
PIO
13
0
AK25MCSI_DATAP0
AJ25MCSI_DATAN0
AJ24MCSI_DATAP1
AJ23MCSI_DATAN1
AJ22MCSI_DATAP2
AJ21MCSI_DATAN2
AJ20MCSI_DATAP3
AK20MCSI_DATAN3
AK22MCSI_CLKP
AK23MCSI_CLKN
AG24MCSI_REXT
M30MDSI_DATAP0
N30MDSI_DATAN0
M28MDSI_DATAP1
L28MDSI_DATAN1
K29MDSI_DATAP2
K30MDSI_DATAN2
J30MDSI_DATAP3
J29MDSI_DATAN3
L29MDSI_CLKP
M29MDSI_CLKN
N26MDSI_REXT
B5EMMC_RST/GPIO93
D3
0R
FC
TL
[0]/G
PIO
19
4
D2
9R
FC
TL
[1]/G
PIO
19
5
D2
8R
FC
TL
[2]/G
PIO
19
6
E2
6R
FC
TL
[3]/P
WM
A/G
PIO
19
7
D2
6R
FC
TL
[4]/P
WM
B/G
PIO
19
8
D2
7R
FC
TL
[5]/G
PIO
19
9
E3
0R
FC
TL
[6]/P
WM
C/G
PIO
20
0
E2
7R
FC
TL
[7]/G
PIO
20
1
F2
6R
FC
TL
[8]/G
PIO
20
2
F2
9R
FC
TL
[9]/P
WM
D/G
PIO
20
3
E2
8R
FC
TL
[10
]/G
PIO
20
4
E2
9R
FC
TL
[11
]/G
PIO
20
5
F2
7R
FC
TL
[12
]/G
PIO
20
6
G2
6R
FC
TL
[13
]/G
PIO
20
7
G2
9R
FC
TL
[14
]/G
PIO
20
8
G3
0R
FC
TL
[15
]/G
PIO
20
9
E2
5R
FS
CK
0/G
PIO
19
2
C2
8R
FS
DA
0/G
PIO
19
1
C2
7R
FS
EN
0/G
PIO
19
3
U30SD0_CLK/GPIO211
U27SD0_CMD/GPIO22
U29SD0_D[0]/GPIO23
V29SD0_D[1]/GPIO24
W30SD0_D[2]/GPIO25
W29SD0_D[3]/GPIO26
B6SD1_CLK/SPI1_CLK/GPIO94
E6SD1_CMD/SPI1_DI/GPIO95
C7SD1_D[0]/SPI1_DO/GPIO96
D6SD1_D[1]/SPI1_CSN/GPIO97
D7SD1_D[2]/GPIO98
E7SD1_D[3]/GPIO99
C1SD3_CLK/GPIO83
B2SD3_CMD/GPIO84
C2SD3_D[0]/GPIO85
B3SD3_D[1]/GPIO86
D4SD3_D[2]/GPIO87
C3SD3_D[3]/AMTDO/GPIO88
B4SD3_D[4]/AMTDI/GPIO89
C4SD3_D[5]/AMTCK/GPIO90
A4SD3_D[6]/AMTMS/GPIO91
A5SD3_D[7]/AMTRST_N/GPIO92
R26SIMCLK0/GPIO16
R27SIMDA0/GPIO17
T30SIMRST0/GPIO18
T26SIMCLK1/GPIO19
T28SIMDA1/GPIO20
T29SIMRST1/GPIO21
D18SPI0_DO/GPIO157
E18SPI0_DI/GPIO158
A20SPI0_CLK/GPIO159
B19SPI0_CSN/GPIO156
D14SPI2_DO/GPIO132
E14SPI2_DI/GPIO133
F14SPI2_CLK/GPIO134
B14SPI2_CSN/GPIO131
B27CLK_REQ1/GPIO189
C29CLK_REQ2/GPIO190
H27XTL_EN/GPIO210
A2
2T
RA
CE
DA
T[0
]/SP
I1_D
O/G
PIO
16
7
B2
1T
RA
CE
DA
T[1
]/SP
I1_C
SN
/GP
IO1
68
B2
2T
RA
CE
DA
T[2
]/GP
IO1
69
A2
3T
RA
CE
DA
T[3
]/IIS
1D
I/G
PIO
17
0
E2
1T
RA
CE
DA
T[4
]/IIS
1D
O/G
PIO
17
1
B2
3T
RA
CE
DA
T[5
]/IIS
1C
LK
/GP
IO1
72
B2
4T
RA
CE
DA
T[6
]/IIS
1L
RC
K/G
PIO
17
3
D2
2T
RA
CE
DA
T[7
]/IIS
1M
CK
/GP
IO1
74
D2
0T
RA
CE
CL
K/S
PI1
_D
I/G
PIO
16
5
E2
0T
RA
CE
CT
RL
/SP
I1_C
LK
/GP
IO1
66
A2
5U
0T
XD
/GP
IO1
75
E2
2U
0R
XD
/GP
IO1
76
F2
1U
0C
TS
/GP
IO1
77
C2
3U
0R
TS
/GP
IO1
78
B2
5U
1T
XD
/GP
IO1
79
C2
4U
1R
XD
/GP
IO1
80
D2
3U
2T
XD
/GP
IO1
81
E2
3U
2R
XD
/GP
IO1
82
A2
6U
2C
TS
/GP
IO1
83
A2
8U
2R
TS
/GP
IO1
84
B2
8U
3T
XD
/GP
IO1
85
B2
9U
3R
XD
/GP
IO1
86
E2
4U
3C
TS
/GP
IO1
87
D2
4U
3R
TS
/GP
IO1
88
P2
8V
DD
US
B
N2
9V
RE
S
N2
8D
P
N2
7D
M
U301-A
7101497M001
R4
08
20
0
R411 DNP
R412 DNP
R413 DNP
R414 DNP
R415 DNP
R416 DNP
R4
17
0
R4
01
DN
P
R402 22
R403 22
R404 22
R405
0
R406 6.04K
R407 6.04K
R4
20
DN
P
R4
22
10
K
R4
19
10
K
R4
21
DN
P
SD3_D7
SD3_D6
SD3_D5
SD3_D4
SD3_D3
SD3_D2
SD3_D1
SD3_D0
MCSI_CLKP[9]
MCSI_CLKN[9]
MDSI_DATAP0[9]
MDSI_DATAN0[9]
MDSI_DATAN1[9]
MDSI_DATAP1[9]
MDSI_CLKN[9]
MDSI_CLKP[9]
MCSI_DATAN0[9]
MCSI_DATAP0[9]
BT/WIFI_CLKREQ[7]
BT_PCM_SYNC[7]
BT_PCM_CLK[7]
BT_PCM_IN[7]
BT_PCM_OUT[7]
SIM0_RST[8]
SIM0_DA[8]
SIM0_CLK[8]
EMMC_RSTN[5]
SD3_CMD[5]
SD1_CMD[7]
SD1_D0[7]
SD1_D3[7]
SD1_D2[7]
SD1_D1[7]
SD0_D1[8]
SD0_D2[8]
SD0_D3[8]
SD0_D0[8]
SD0_CMD[8]
SD3_D[0:7][5]
VDD2V8
VDDIO12
LC
M_R
ST
N[9
]
LC
M_F
MA
RK
[9]
I2C
3_S
DA
I2C
3_S
CL
I2C
2_S
CL
[8]
I2C
2_S
DA
[8]
I2C
0_S
DA
[9]
I2C
0_S
CL
[9]
US
B_D
P[8
]
US
B_D
M[8
]VDDUSB
RF
_S
PI_
DA
TA
[1]
RF
_S
PI_
CL
K[1
]
RF
_S
PI_
LE
[1]
BB
_U
2C
TS
BB
_U2
RT
S
BB
_U2
TX
D
BB
_U2
RX
D
BB
_U1
TX
D/N
BO
OT
[8]
BB
_U
1R
XD
[8]
BB
_U0
TX
D[7
]
BB
_U0
RX
D[7
]
BB
_U0
RT
S[7
]
BB
_U
0C
TS [
7]
BT
_RS
T[7
]
RF
CT
RL
10
_P
A_T
XE
N[1
]
RF
CT
RL
14
_C
TR
L1
[1]
RF
CT
RL
15
_C
TR
L2[1
]
RF
CT
RL
12
_C
TR
L0[1
]
KE
YO
UT
0[8]
KE
YO
UT
1[8]
KE
YIN
0[8
]
VDDCAMIOI2C1_SDA [9]
I2C1_SCL [9]
CCIR_PWDN1 [9]
CCIR_RST [9]
CLK_SINE [2]
PTEST [2]
AUD_DAD1 [2]
AUD_DAD0 [2]
AUD_DASYNC[2]
AUD_ADD0 [2]
AUD_ADSYNC [2]
AUD_SCLK[2]
ADI_D [2]
ADI_SYNC[2]
ADI_SCLK[2]
CLK_26M [2]
CLK_32K [2]
TD_RX_CLK[2]
GSM_TXPD[2]
GSM_RXPD[2]
TD_RXPD[2]
TD_TXPD[2]
CHIP_SLEEP[2]
ANA_INT2 [2]
ANA_INT [2]
EXT_RST_B [2]
XTL_BUF_EN[2]
COM_RX_SYNC [2]
COM_RX_SCLK [2]
COM_RX_DQ1 [2]
COM_RX_DQ0 [2]
COM_RX_DI0 [2]
COM_RX_DI1 [2]
COM_TX_APCD[2]
COM_TX_SYNC[2]
COM_TX_SCLK [2]
COM_TX_DQ1[2]
COM_TX_DQ0[2]
COM_TX_DI1[2]
COM_TX_DI0[2]
PC
B_V
ER
1[4]
PCB_VER2 [4]
LCM_BL_EN [9]
HP_DET [6]
LED_R
LED_G
SD0_CLK[8]
SD1_CLK[7]
SD3_CLK[5]
WIFI_PWR_ON [7]
BT_PWR_ON [7]
SLEEP_CLK_32K [7]
CTP_RST [9]
LED_B
CTP_INT[9]
BT
_W
AK
EU
P[7
]
BT
_H
OS
T_W
AK
E [7
]
WIF
I_W
AK
EU
P[7
]
GP
S_P
WO
N
GP
S_R
ST
G_IN
T1
[8]
VDD1V8
PCB_VER1[4]
PCB_VER2[4]
CCIR_MCLK [9]
SIM1_CLK[8]
SIM1_DA[8]
SIM1_RST[8]
PR
OX
_IN
T[8
]
MCSI_DATAP1[9]
MCSI_DATAN1[9]
ECO NO: DATE:APPROVED:
REVISION RECORD
LTR
A
D
C
6
A
B
C
D
5 4 3 2 1
B
RELEASED:
QUALITY CONTROL:
CHECKED:
DRAWN: DATED:
DATED:
DATED:
DATED:
COMPANY:
TITLE:
CODE: SZE:
SCALE: SHEET: OF
DRAWING NO: REV:
MCP
DDR1 Voltage is 1.8V, DDR2 Voltage is 1.2V.
NFD00
NFD01
NFD02
NFD03
NAND:Large PageNAND:Small Page
0 1
USB1.1 Download
eMMC IO 1.2V
eMMCNAND
EMMC Voltage is 3V, IO is 1.8V.
eMMC:VDD3V=1.8V eMMC:VDD3V=3V
eMMC IO 1.8V
USB2.0 Download
Strapping Pin
VREF must be protected.
10
K 1
%1
0K
1
%
240 1%
240 1%
LA
N-3
LA
N-2
LA
N-1
LA
N-0
e-MMC
LPDDR2
e-MMC POWER LPDDR2 POWER
LPDDR2 GNDe-MMC GND
A1DNU
A2DNU
A3DAT0
A4DAT6
A5
VD
DI_
M
A6DAT5
A7DAT3
A8
VC
C_M
A9DNU
A10DNU
B1DNU
B2
VC
C_M
B3DAT1
B4DAT7
B5CLK_M
B6DAT4
B7DAT2
B8
VC
CQ
_M
B9
VS
S_M
B10DNU
C1RST_M
C2NC
C3
VS
SQ
_M
C4NC
C5CMD_M
C6NC
D1NC
D2NC
D3NC
D4NC
D5NC
D6NC
E1
VS
S_M
E2NC
E3NC
E5
VD
D2
_E
E6
VD
D1
_E
E7DQ31
E8DQ29
E9DQ26
E10DNU
F1
VD
D1
_EF
2V
SS
_E
F3NC
F5
VS
S_E
F6
VS
SQ
_E
F7
VD
DQ
_E
F8DQ25
F9
VS
SQ
_E
F1
0V
DD
Q_E
G1
VS
S_E
G2
VD
D2
_E
G3ZQ0
G5
VD
DQ
_E
G6DQ30
G7DQ27
G8DQS3
G9DQS3
G1
0V
SS
Q_E
H1
VS
SC
A_E
H2CA9
H3CA8
H5DQ28
H6DQ24
H7DM3
H8DQ15
H9
VD
DQ
_E
H1
0V
SS
Q_E
J1V
DD
CA
_E
J2CA6
J3CA7
J5
VS
SQ
_E
J6DQ11
J7DQ13
J8DQ14
J9DQ12
J10
VD
DQ
_E
K1
VD
D2
_E
K2CA5
K3VREF(CA)_E
K5DQS1
K6DQS1
K7DQ10
K8DQ9
K9DQ8
K1
0V
SS
Q_E
L1
VD
DC
A_E
L2
VS
S_E
L3CK_E
L5DM1
L6
VD
DQ
_E
M1
VS
SC
A_E
M2NC
M3CK_E
M5
VS
SQ
_E
M6
VD
DQ
_E
M7
VD
D2
_E
M8
VS
S_E
M9VREF(DQ)_E
N1CKE0_E
N2CKE1_E
N3NC
N5DM0
N6
VD
DQ
_E
P1CS0_E
P2CS1_E
P3NC
P5DQS0
P6DQS0
P7DQ5
P8DQ6
P9DQ7
P1
0V
SS
Q_E
R1CA4
R2CA3
R3CA2
R5
VS
SQ
_E
R6DQ4
R7DQ2
R8DQ1
R9DQ3
R1
0V
DD
Q_E
T1
VS
SC
A_E
T2
VD
DC
A_E
T3CA1
T5DQ19
T6DQ23
T7DM2
T8DQ0
T9
VD
DQ
_E
T1
0V
SS
Q_E
U1
VS
S_E
U2
VD
D2
_E
U3CA0
U5
VD
DQ
_E
U6DQ17
U7DQ20
U8DQS2
U9DQS2
U1
0V
SS
Q_E
V1
VD
D1
_E
V2
VS
S_E
V3NC
V5
VS
S_E
V6
VS
SQ
_E
V7
VD
DQ
_E
V8DQ22
V9
VS
SQ
_E
V1
0V
DD
Q_E
W1DNU
W2NC
W3NC
W5
VD
D2
_E
W6
VD
D1
_E
W7DQ16
W8DQ18
W9DQ21
W10DNU
Y1DNU
Y2DNU
Y9DNU
Y10DNU
U501
7101498M001
R5
06
0
R511 DNP
R513 DNP
R5
02
10
K
R5
01
51
K
TP14
TP5
C5
19
0.0
1u
F
R5
07
DN
PR
50
8D
NP
R505 240
TP
8
TP
17
C5
11
0.1
uF
C5
12
0.0
1u
F
C5
10
1u
F
C5
14
0.1
uF
C5
15
0.0
1u
F
C5
13
1u
F
C5
17
0.1
uF
C5
18
0.0
1u
F
C5
16
1u
F
C5
07
0.1
uF
C5
05
1u
F
C5
04
0.1
uF
C5
03
4.7
uF
C5
02
0.1
uF
C5
01
1u
F
C5
08
0.1
uF
C5
09
1u
F
R5
04
0
R5
03
DN
P
R510 240
NFD[00:03][3]
NFD00
NFD02
VDD3V VDDSD3 VDD1V8
VDDMEM
DDR2_BUFOUT VDDMEM
SD3_CLK[4]
SD3_CMD[4]
EMMC_RSTN[4]
VDDSD3
EMCLKDP[3]
EMCLKDM[3]
EMCKE0[3]
EMCKE1[3]
EMCSN0[3]
EMCSN1[3]
EMA00
EMA01
EMA02
EMA03
EMA04
EMA05
EMA06
EMA07
EMA08
EMA09
EMA[00:09][3]
EMD31
EMD30
EMD29
EMD28
EMD27
EMD26
EMD25
EMD24
EMDQS3 [3]
EMDQM3 [3]
EMD[00:31] [3,5]
EMDQSN3 [3]
EMD23
EMD22
EMD21
EMD20
EMD19
EMD18
EMD17
EMD16
EMDQS2 [3]
EMDQM2 [3]
EMD[00:31] [3,5]
EMDQSN2 [3]
EMD15
EMD14
EMD13
EMD12
EMD11
EMD10
EMD09
EMD08
EMDQS1 [3]
EMDQM1 [3]
EMD[00:31] [3,5]
EMDQSN1 [3]
EMD07
EMD06
EMD05
EMD04
EMD03
EMD02
EMD01
EMD00
EMDQS0 [3]
EMDQM0 [3]
EMD[00:31] [3,5]
EMDQSN0 [3]
SD3_D7
SD3_D6
SD3_D5
SD3_D4
SD3_D3
SD3_D2
SD3_D1
SD3_D0
SD3_D[0:7][4]
VREF
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
3.5mm Headphone Jack
HEAD MIC
HEAD EAR
RECEIVER CIRCUIT
Note: Mic and ground
HEADEST
Close to BBClose to MIC
Close to BB
Speaker
C622
47pF
C623
47pF
R6
12
2K
C626
47pF
C627
47pF
C628
DNP
B606 GZ1005D102TF
B605 GZ1005D102TF
B604 GZ1005D102TF
B603
68nH
C615
47pF
C616
47pF
1
REC1
TP_2X3.5
1
REC2
TP_2X3.5
R607
0
R608
0
C617
10uF
R613 33
R614 33
C619 0.022uF
C620 0.022uF
C618
0.1uF
C6
14
10
0p
F
C6
21
10
0p
F
R616
10K
R609
1K
R6
10
1K
R6
15
20
K
B607 GZ1005D102TF
TV
S6
05
RS
B6
.8C
ST
2R
TV
S6
06
RS
B6
.8C
ST
2R
TV
S6
07
RS
B6
.8C
ST
2R
TV
S6
08
RS
B6
.8C
ST
2R
TV
S6
09
RS
B6
.8C
ST
2R
TV
S6
10
RS
B6
.8C
ST
2R
C624 22uF
C625 22uF
D620
DNP
C632 0.022uF
C633 0.022uF
C634
47pF
C636
47pF
C635
100pF
R601 510
R604 510
C6072.2uF
R6
02
1.5
K
R6
03
1.5
K
C6
06
10
0p
F
C644
47pF
C646
47pF
C645
100pF
TV
S6
01
RS
B6
.8C
ST
2R
TV
S6
02
RS
B6
.8C
ST
2R
B609
B610
+21
MIC601
4400123M001
C610
1000pF
C611
1000pF
C629
100pF
B601
UPZ1005D121-1R3TF
B608
UPZ1005D121-1R3TF
B611
UPZ1005D121-1R3TF
B612
UPZ1005D121-1R3TF
12 T
VS
60
4
12
TV
S6
03C642
47pF
C643
47pF
1
SPK2+
TP_2.2X5
1
SPK2-
TP_2.2X5
1
4
6
5
3
2
CN601
4700310M001
HEADMIC_IN[2,6]
HP_R[6]
HP_L[6]
HP_DET[4]
VDDIO12
HP_L [6]
HP_R [6]
HEADMICP[2]
HEADMIC_IN [2,6]HEADMICN[2]
VDD2V8
FM_ANT[7]
EARP[2]
EARN[2]
HEAD_P_R[2]
HEAD_P_L[2]
MICN[2]
MICP[2]
MICBIAS
MIC_IN_N [6]
MIC_IN_P [6] MIC_IN_P[6]
MIC_IN_N[6]
PA_OUTP_BB[2]
PA_OUTN_BB[2]
PA_OUTP [6]
PA_OUTN [6]
PA_OUTP[6]
PA_OUTN[6]
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
RF_SW_CTRL[0:2]
BT_TX H L L
WL_TX
WL/BT_RX L L
L L
H
H
To CPU interrupt for BT wakeup CPU
A4 ,C3 two branch,C922 close to A4Pin£¬
To CPU interrupt for WLAN wakeup CPU
+/-1%
WLAN RF
WLAN SDIO Bus
Integrated LDOs
Integrated switching
Regulators
WLAN RF Control
JTAG interface
HSIC interface
Clocks
WLAN GPIOP
FM Transceiver
Bluetooth UART
Bluetooth Test Mode
Bluetooth
Bluetooth/FM I2S
Bluetooth PCM
Bluetooth GPIO
Miscellaneous
Bluetooth Suppliers
WLAN Supplies
FM transceiver
Suppliers
Miscellaneous
Suppliers
Ground
E3WRF_RES_EXT
B1WRF_RFIN_5G
A2WRF_RFOUT_5G
A7WRF_RFIN_2G
A6WRF_RFOUT_2G
D4WRF_A_TSSI_IN
K5RF_SW_CTRL0
J2RF_SW_CTRL_1
L4RF_SW_CTRL_2
M4RF_SW_CTRL_3
K4RF_SW_CTRL_7
J3RF_SW_CTRL_6
J4RF_SW_CTRL_5
K3RF_SW_CTRL_4
L10VOUT_INLDO1
M9VOUT_CLDO
E1WRF_VDD_VCOLDO_IN_1P8
F2WRF_VCOLDO_OUT_1P2
M10VIN_LDO
J11VOUT_3P1
J12VOUT_3P3
L12SR_VDDBAT1
K12SR_VDDBAT1
K11SR_VDDBAT2
M12SR_VLX
M7SDIO_CLK
L7SDIO_CMD
L8SDIO_DATA_3
M5SDIO_DATA_2
M8SDIO_DATA_1
M6SDIO_DATA_0
F5JTAG_SEL
M2HSIC_STROBE
L2HSIC_DATA
J1HSIC_RREF
G1WRF_XTAL_OP
H1WRF_XTAL_ON
G3WRF_TCXO_IN
J7LPO
E4WRF_GPIO_OUT
H4WL_GPIO_0
G5WL_GPIO_1
H5WL_GPIO_2
D8WL_GPIO_6
L6WL_GPIO_5
J8WL_GPIO_4
D5WL_GPIO_3
A12FM_AOUT1
B12FM_AOUT2
C12FM_TX
D11FM_RXP
D12FM_RXN
E6BT_UART_RXD
D6BT_UART_TXD
F6BT_UART_RTS_N
G6BT_UART_CTS_N
G11BT_TM0
A9BT_RF
D7BT_CLK_REQ_IN
E9BT_CLK_REQ_MODE
G12BT_CLK_REQ_OUT
H8BT_I2S_CLK
G7BT_I2S_DI
G8BT_I2S_WS
H7BT_I2S_DO
K6BT_PCM_SYNC
J5BT_PCM_OUT
J6BT_PCM_IN
H6BT_PCM_CLK
F9BT_GPIO_0
D9BT_GPIO_1
H10BT_GPIO_2
H9BT_GPIO_3
H12BT_GPIO_4
J9BT_GPIO_5
L9WL_REG_ON
K10BT_REG_ON
G10BT_RST_N
K9EXT_SMPS_REQ
J10EXT_PWM_REQ
B9BT_RFVDD1P2
A8BT_PAVDD3P3
A11BT_VCOVDD1P2
B8BT_IFVDD1P2
B11BT_PLLVDD1P2
K8BT_VDDC
E8BT_VDDC
A4WRF_VDDPA
C3WRF_PADRV_VDD
B7WRF_VDDLNA_1P2_2G
H3WRF_XTAL_VDD1P2
F3WRF_TCXO_VDD
D2WRF_LOGEN_A_VDD1P2
G4WRF_VDDAFE_1P2
D1WRF_VDDANA_1P2
E7WL_VDDC
K7WL_VDDC
K1WL_VDDC
E10FM_VDDPLL1P2
E12FM_RFVDD1P2
F12FM_VDD2P5
D10FM_VDDAUDIO
L1HSIC_AVDD12
L3VDDIO_RF
M3WL_VDDIO
F7BT_VDDIO
D3WRF_LOGEN_A_GND
B2WRF_PA_GND
B4WRF_PA_GND
B6WRF_PA_GND
C4WRF_PADRV_GND
C7WRF_GNDLNA_2G
C1WRF_ANA_GND
F1WRF_VCO_GND
F4WRF_AFE_GND
H2WRF_XTAL_GND
K2WL_VSS_0
L5WL_VSS_1
E5WL_VSS_2
C5WRF_GND
C8BT_IFVSS
C9BT_VSS
A10BT_FEVSS
B10BT_RFVSS
C10BT_PLLVSS
F8BT_VSSC
C11FM_VSSAUDIO
E11FM_RXVSS
F10FM_PLLVSS
F11FM_VSSVCO
L11PMU_AVSS
M1HSIC_AVSS
M11SR_PVSS
U701
7101374M001
L708 1.5pF
C707
DNP
C705 8pF
C706 10pF
L7
06
DN
P
R704 15K
C7
02
10
pF
C7
03
10
pF
C7
04
10
pF
C715 10pF
C701 8.2pF
L7
05
4.7
nH
B703
HZ1005U601TFB02
B704
HZ1005U601TFB02
B705
HZ1005U601TFB02
C7
19
4.7
uF
C7
20
4.7
uF
C7
22
4.7
uF
C7
25
10
uF
L707
SPH252012H2R2MT
C7
24
4.7
uF
B702
HZ1005U601TFB02
C7
26
4.7
uF
C7
27
0.2
2u
F
C7
30
10
pF
C7
28
0.2
2u
F
R710
0
C7
32
0.2
2u
F
B701
GZ1005D800TF
L701
DNP
R701
0
L702
DNP
C710 1000pF
C7
18
0.1
uF
C7
17
0.1
uF
C7
16
0.1
uF
C7290.1uF
C7310.1uF
C7
23
2.2
uF
C7
21
2.2
uF
4IN
1
2OUT
3
U7037300268M001
L703
DNP
4RF1
5RF2
3V1
6V2
7V3
8RF3
1RFC
9G
ND
2N
C
U702
7101470M001
R7
05
DN
P
R709
0
C709 1000pF
C713 1uF
C714 1uF
R708
100K
AN
T7
01
19
00
00
8M
00
1
AN
T7
02
19
00
00
8M
00
1
FM_ANT[6]
SLEEP_CLK_32K[4]
RF_SW_CTRL2[7]
RF_SW_CTRL1[7]
RF_SW_CTRL0[7]
BT_TX[7]
BT_TX [7]
RF_SW_CTRL0 [7]
RF_SW_CTRL1 [7]
RF_SW_CTRL2 [7]
VDD_LN
VDD_BT
VDD_FM
VDD_WRF
VDD_CORE
VOUT_2P5
VOUT_3P3
VIN_LDO
VBAT
VOUT_3P3
VDD_CORE
VDDSD1
VOUT_3P3
VDD_WRF
VDD_LN
VDD_XTAL VDD_WRF
VDD_BT
VOUT_2P5VDD_FM
WIFI_PWR_ON[4]
BT_PWR_ON[4]
SD1_D0[4] SD1_D1[4] SD1_D2[4] SD1_D3[4]
SD1_CLK[4]SD1_CMD[4]
BB_U0RXD[4]
BB_U0TXD[4]
BB_U0CTS[4]BB_U0RTS[4]
BT_PCM_SYNC[4]
BT_PCM_CLK[4]
BT_PCM_IN[4]
BT_PCM_OUT[4]
FM_AIL[2]
FM_AIR[2]
BT_WAKEUP[4]
BT_HOST_WAKE[4]
WIFI_WAKEUP[4]
BT/WIFI_26M[1]
BT/WIFI_CLKREQ[4]
VDDSD1
VBAT
BT_RST[4]
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
ONkey
Press KEYIN0+KEYOUT0 when power up
will make the phone boot from USB
SIM SOCKET
SIM0
CHARGE
should afford 1A current
should afford 1A current
All trace connectted to the MOSFET should be as wide as possible
Battery connector
USB Connector
ACCELEROMETER
1.7V to VDD
KXTIK-1004 I2C_address:0x0F
Vdd=1.71V to 3.6V,type 2.6V
22
0k
1%
LIS3DH : SA0=0: IIC ADDRRSS is 0x18H
MMA8452Q: SA0=0: IIC ADDRRSS is 0x1CH
SIM1
T-FLASH
USB BOOT CONTROL
NBOOT = 0 ----->USB BOOT
NBOOT = Float----->NAND BOOTwith Proximity SensorAmbient Light Sensor
should afford 130mA current
VIBRATOR
Keypad BL
Volume key
C9
11
0.1
uF
C9
12
1u
F
RV
90
4
RV
90
5
RV
90
6
RV
90
7
1 2R917
0.1
1A
2N
C
3D
8D
6C
5G
4S
7C
Q9
04
72
00
42
6M
00
1
RV
90
3C9
08
47
0p
F
C9
10
DN
P
TP
21
TP
22
C9010.1uF
TV
S9
01
TD
Z1
5
12
D904
ESD9L5.0ST5G
12
D903
ESD9L5.0ST5G
R916 0
R915 33
C9030.1uF
C9040.1uF
1IOVDD
2DNC
3DNC
4SCL
5GND
13GND
12GND
11INT
10RES
9RES
14
VD
D
15
NC
16
GN
D
8R
ES
7N
C
6S
DA
U902
7101417M001
R924 510
R9
25
12
0K
D8
06
ES
D9
X3
.3S
T5
G
R9
26
22
0K
C9200.1uF
C902
22uF
C9
29
DN
P
C9
28
DN
P
C9
27
DN
P
C9
25
0.1
uF
C9
30
DN
P
C9
33
0.1
uF
C9
34
1u
F
RV
91
2
RV
90
9
RV
91
0
RV
91
1
C9
32
DN
P
C9
31
DN
P
C9
36
DN
P
C9
35
DN
P
R9
19
DN
P
C9
13
1u
F
C9
15
18
pF
C9
17
18
pF
C9
18
18
pF
C9
16
18
pF
C9
19
18
pF
C9
14
18
pF
TP
18
RV
90
1
RV
90
2
R9021K
R9011K
TP
31
SW
ITC
H_G
ND
C9
06
1u
F
C9
07
1u
F
R914
15
8VDD
6GND
3L
DR
4L
ED
_K
1SDA
7SCL
2INT
5LED_A
U905
7101479M001
R912 15
C921
33pF
R913 15
C9
38
33
pF
C9
37
33
pF
C9
09
33
pF
1DAT2
2CD/DAT3
3CMD
4VDD
5CLK
6VSS
7DAT0
8DAT1
109
CN904
4700253M001
1
2
3
CN903
4700308M001
S902
R23314-00-02
S901
R23314-00-02
C922 47pF
C923 47pF
1MOT-
TP_1.2X2.0
1MOT+
TP_1.2X2.0
LED903 LED902
B9
02
B9
03
B9
04
B9
05
D9
08
D9
07
D9
09
D9
06
R920
1K
1 TP1
TP_1.2X2.0
1 TP2
TP_1.2X2.0
1 TP3
TP_1.2X2.0
R921 430
R922 430
R923 430
1
TP16
TP_1.2X2.0
1 TP25
TP_1.2X2.0
1
6GND234
7GND5
11GND
10GND
9GND
8GND
CN901
4700514M001
1VCC
2RST
3CLK
4
5GND
6VPP
7I/O
9VCC
10RST
11CLK
12
13GND
14VPP
15I/O
8 16
17
18
19
20
CON906
4700307M001
1SIM_CLK
2SIM_RST
3SIM_VCC
6SIM_I/O
5SIM_VCC
4CCGND
7 8 91
0
CN9054700243M001_DNP
SIM0_DA[4]
SIM0_RST[4]
SIM0_CLK[4]
VDDSIM0
VBAT
VCHG
VDRV[2]
VBAT
BAT_TEMP_ADC[2]
VCHG[2,8]
USB_DM[4]
USB_DP[4]
VBAT_ISENSE[2]
VBAT_SENSE[2]
G_INT1[4]
I2C2_SCL[4,8]
I2C2_SDA[4,8]
VDDIO12
VDD2V8
VDD1V8
SIM1_DA[4]
SIM1_RST [4]
SIM1_CLK [4]
VDDSIM1
SD0_D2[4]
SD0_D1[4]
SD0_CMD[4]
SD0_CLK[4]
SD0_D0[4]
SD0_D3[4]
VDDSD0
BB_U1TXD/NBOOT [4]
BB_U1RXD[4]
VDD2V8
PROX_INT [4]
I2C2_SCL [4,8]
I2C2_SDA [4,8]
VBAT
VIB_CTRL[2]
VBAT
KPLED_CTRL[2]
KEYIN0[4]
KEYOUT1[4]
KEYOUT0[4]
PBINT[2]
REV:DRAWING NO:
SHEET: OFSCALE:
SZE:CODE:
TITLE:
COMPANY:
DATED:
DATED:
DATED:
DATED:DRAWN:
CHECKED:
QUALITY CONTROL:
RELEASED:
B
12345
D
C
B
A
6
C
D
A
LTR
REVISION RECORD
APPROVED: DATE:ECO NO:
LCD BL driver
Vf: type 23.6V
If:20mA
LED: 8 in serial
Cap Touch panel
MCP
MCN
MD0P
MD0N
MD1P
MD1N
AVDD
SIOD
SIOC
PWDN
RSTN
DOVDD_1V8
DVDD_1V5
GND
GND
VDD_VCM_2V8
STROBE
GND
GND
GND
XCLK
GND
GND
GND
GND
CLKN
GND
NC
PWM
D0-
RST
LCMID
GND
D0+
D1+
CLKP
D1-GND
LED-LED+
VCI
TE
GND
IOVCC
GND
LCD
NC
NC
NC
NC
Touch Panel
C1002
1.0uF
C1001
4.7uF
R1
00
3
10
0K
R1
00
5
15
L1001
SWPA252012S100MT
1SW
2GND
3FB
6VIN
5OVP
4SHDN
U10097101443M001
R1004
100K
D1006
RB160VA-40
D1005
PESD5V0L4UW
R1007
DNP
C1
01
01
uF
D1
00
4
1
2
4
3
U1001
7300277M001
1
2
4
3
U1002
7300277M001
1
2
4
3
U1003
7300277M001
R1002
0
R1001 DNP
C1027
DNP
C1009
2.2uF
C1008
2.2uF
L1
00
24
7n
H
C1026
0.1uF
C1006
1uF
1
3
5
7
9
11
13
15
17
19
21
2324
22
20
18
16
14
12
10
8
6
4
2
CN1002
4700217M001BBR43-24KB533
1
2
4
3
U1007
7300277M001_DNP
1
2
4
3
U1010
7300277M001_DNP
R1006
0
C1028
18pF
BR1BREAKAWAY_2PAD_5.5
BR2BREAKAWAY_2PAD_5.5
BR3BREAKAWAY_2PAD_5.5
BR4BREAKAWAY_2PAD_5.5
BR5BREAKAWAY_2PAD_5.5
BR7BREAKAWAY_2PAD_3.8
BR8BREAKAWAY_2PAD_3.8
BR9BREAKAWAY_2PAD_5.5
FID3
FIDUCIAL
FID4
FIDUCIAL
C1
03
33
3p
F
R1011 15
R1012 15
C1
03
43
3p
F
C1
03
53
3p
F
C1
03
63
3p
F
R1013 15
R1014 15
C1
03
73
3p
F
C1
03
83
3p
F
C1
03
93
3p
F
RV1 DNP
RV2 DNP
RV3 DNP
RV4 DNP
RV5 DNP
RV6 DNP
RV11 0
RV12 0
RV13 0
RV14 0
FID9
FIDUCIAL
FID10
FIDUCIAL
D1
00
1
D1
00
2
C1
00
31
uF
C1
00
41
uF
D1
00
3
C1
00
53
3p
F
D1
00
7
12345678910111213141516171819202122232425
27
26
CN10014700119M001
C1
03
23
3p
F
C1
03
13
3p
F
D1
00
8
R1009 DNPR1008 430
D1009
DNP
D1010
DNP
1
2
3
4
5
10
9
8
7
6
14
13
12
11
CN1003
4700290M001
123456789
10111213141516
SH1
Y320_SHIELDING_BTWIFI
123456789
10111213141516171819202122232425
SH2
Y320_SHIELDING_CPU
123456789
101112
SH3
Y320_SHIELDING_DDR
123456789
1011121314
SH4
Y320_SHIELDING_RF
DR1
DRILL_2.0_UP
DR2
DRILL_2.0_UP
1
2
4
3
U1006
7300277M001_DNP
RV9 0
RV10 0
DR3
DRILL_2.0_UP
DR4
DRILL_2.0_UP
DR5
DRILL_1.3_UP
DR6
DRILL_1_UP
DR7
DRILL_1_UP
DR8
DRILL_1_UP
DR9
DRILL_1_UP
LCM_BL_EN[4]
VBAT
LEDK [9]
LEDA [9]
CTP_INT[4]
CTP_RST[4]
VDD2V8
I2C0_SCL[4]
I2C0_SDA[4]
MDSI_CLKP [4]
MDSI_CLKN [4]
MDSI_DATAP0 [4]
MDSI_DATAN0 [4]
MDSI_DATAP1 [4]
MDSI_DATAN1 [4]
LCM_DATAP1[9]
LCM_DATAN1[9]
LCM_CLKP[9]
LCM_CLKN[9]
LCM_DATAP0[9]
LCM_DATAN0[9]
BLIGHT_PWM[9]
CAM_CLKP [9]
CAM_CLKN [9]
CAM_DATAP0 [9]
CAM_DATAN0 [9]MCSI_DATAN0[4]
MCSI_DATAP0[4]
MCSI_CLKN[4]
MCSI_CLKP[4]
CCIR_PWDN1[4]
CCIR_RST[4]
VDDCAMCOREVDDCAMIO
I2C1_SDA[4]
VDDCAMA
I2C1_SCL[4]
CAM_DATAN0[9]
CAM_DATAP0[9]
CAM_CLKN [9]
CAM_CLKP [9]
CCIR_MCLK [4]
LEDK [9]
LEDA [9]
LCD_ID [2]
LCM_RSTN [4]
VDD2V8VDD1V8
BLIGHT_PWM [9]
LCM_DATAN0 [9]
LCM_DATAP0 [9]
LCM_CLKN [9]
LCM_CLKP [9]
LCM_DATAN1 [9]
LCM_DATAP1 [9]
LCM_FMARK[4]
CAM_DATAP1 [9]
CAM_DATAN1 [9]MCSI_DATAN1[4]
MCSI_DATAP1[4]
CAM_DATAP1 [9]
CAM_DATAN1 [9]
