1. Explain in detail architecture of generic microprocessor. · Unit–I Introduction of Microprocessor 1 Dept: CE MALP(3330705) Prof. Chintan N. Kanani 1. Explain in detail architecture

Unit–I Introduction of Microprocessor

1 Dept: CE MALP(3330705) Prof. Chintan N. Kanani

1. Explain in detail architecture of generic microprocessor.

The microprocessor works as a heart of the system and performs primarily following

function’s 1. Fetch-decode-execute program instructions in order. 2. Performs data transfer to and from memory and to and from input/output devices. 3. Provides interrupt services to the external devices. 4. Provides overall timing and control in the system.

In order to perform a given task, microprocessor executes a program written the task instruction by instruction

In order to execute a program it must be loaded in memory.

Microprocessor reads the first instruction from memory and stores it into internal instruction register. It is known as fetching an instruction.

After fetching an instruction, microprocessor interprets it to find what instruction it is. This is known as decoding an instruction.

Finally microprocessor performs the work as indicated by an instruction called executing an instruction.

This complete cycle is known as fetch-decode-execute cycle.

After completing first instruction, microprocessor repeats the same cycle for next instruction.

1) Arithmetic and Logical Unit

It performs all the arithmetic and logical operations. It consists of logic circuits like adder, shifter etc.



2) Accumulator

It is a special register used in all the arithmetic and logic operations.

The result of arithmetic and logic operation is stored in accumulator.

Accumulator also acts as a source for one of the operands when arithmetic or logic operation is performed.

3) Temporary register

It provides another operand to ALU for arithmetic and logic operations.

4) General purpose registers

Microprocessor contains no. of general purpose registers which are used to store data or address.

5) Status register

It stores the status of execution of last arithmetic or logic instruction.

It includes normally overflow during addition, parity of result, sign of the number, whether result was zero etc.

The status register consists of individual flip-flops for each flag like overflow, parity, sign, zero etc.

The contents of these flags are used to decide flow of execution of the program. 6) Stack pointer

The stack is LIFO memory used by program to store values temporarily, during the execution.

The stack pointer register stores the address of last location in stack where the last value is stored. So it can be read first. It is also known as “top of the stack”, because it points to top of stack.

7) Program counter

It stores the address of next instruction to be executed.

The program counter sequences the execution of program.

Once the previous instruction is completed, the microprocessor fetches the next instruction from the address stored in program counter.

8) Instruction register and Instruction decoder

The microprocessor repeatedly performs fetch-decode-execute cycle.

The microprocessor while fetching the instruction from memory brings it into instruction register.

The instruction decoder decodes the instruction stored in the instruction register and sends necessary signals to timing and control section to execute the instruction.

9) Timing and control

This section controls all the operations performed by the microprocessor as well as provides the necessary synchronization for performing operations.

It is also responsible for generating/reading various control signals necessary to perform operations with external devices like memory or I/O devices.

10) Internal bus and buffers

Internal bus provides necessary paths to allow the transfer of data from one component to another. Buffers provide necessary buffering.



2. Explain in detail bus organization of 8085. The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates with the other units

using a 16-bit address bus, an 8-bit data bus and a control bus.

Address Bus

It consists of 16 address lines: A0 – A15.

It operates in unidirectional mode: The address bits are always sent from the microprocessor to peripheral devices in one direction, not reverse.

Microprocessor uses the address bus to perform first function : identifying a peripheral or a memory location.16 address lines are capable of addressing a Total of 216=65,536 (64k) memory locations. Address locations: 0000 (hex) to FFFF (hex).

When the 8085 wants to access a peripheral or a memory location, it places the 16-bit address on the address bus and then sends the appropriate control signals.

Data Bus It consists of 8 data lines: D0 – D7.

It operates in bidirectional mode: The data bits are sent from the microprocessor to peripheral devices, as well as from the peripheral devices to the microprocessor

The microprocessor uses the data bus to perform second function: Transfer binary information (data and instructions).

Data range: 00 (hex) – FF (hex).

Control Bus It comprised of various single lines that carry synchronization signals.

The microprocessor uses such lines to perform third function: Provide timing or synchronization signals (control signals)



3. Explain in detail pin diagram of 8085

OR Explain in detail working of HOLD and HLDA pin OR Explain in detail working of pin (i) ALE (ii) CLK (iii) Ready OR Explain in detail Interrupt pins

X1 & X2

These are also called Crystal Input Pins.

8085 can generate clock signals internally, to generate clock signals internally, 8085 requires external inputs from X1 and X2.

It is used to reset the microprocessor. It is active low signal. When the signal on this pin

is low (for at least 3 clocking cycles), it forces the microprocessor to reset itself.



Resetting the microprocessor means: I. Clearing the PC and IR.

II. Disabling all interrupts (except TRAP). III. Disabling the SOD pin. IV. All the buses (data, address, control) are tristated. V. Gives HIGH output to RESET OUT pin.

RESET OUT

It is used to reset the peripheral devices and other ICs on the circuit.

It is an output signal.

It is an active high signal.

The output on this pin goes high whenever RESET IN is given low signal.

The output remains high as long as RESET IN is kept low. SID (Serial Input Data)

It takes 1 bit input from serial port of 8085 and Stores the bit at the 8th position (MSB) of the Accumulator.

RIM (Read Interrupt Mask) instruction is used to transfer the bit. SOD (Serial Output Data)

It takes 1 bit from the 8th position (MSB) of the Accumulator to serial port of 8085.

SIM (Set Interrupt Mask) instruction is used to transfer the bit. Interrupt Pin

TRAP

It is a non-maskable interrupt.

It has the highest priority.

It cannot be disabled.

It is both edge and level triggered. It means TRAP signal must go from low to high and must remain high for a certain period of time.

TRAP is usually used for power failure and emergency shutoff. RST 7.5

It is a maskable interrupt.

It has the second highest priority.

It is positive edge triggered only. The internal flip-flop is triggered by the rising edge. The flip-flop remains high until it is cleared by RESET IN.

RST 6.5


It has the third highest priority.

It is level triggered only. The pin has to be held high for a specific period of time.

RST 6.5 can be enabled by EI instruction. It can be disabled by DI instruction. RST 5.5


It has the fourth highest priority.

It is also level triggered. The pin has to be held high for a specific period of time.

This interrupt is very similar to RST 6.5.



INTR


It has the lowest priority.

It is also level triggered. It is a general purpose interrupt. By general purpose we mean that it can be used to vector microprocessor to any specific subroutine having any address.

It stands for interrupt acknowledge.

It is an outgoing signal.

It is an active low signal. Low output on this pin indicates that microprocessor has acknowledged the INTR request.

Address and Data Pins AD0 – AD7:- (Bidirectional)

These pins have dual purpose of transmitting lower order address and data byte.

During 1st clock cycle, these pins act as lower half of address. In remaining clock cycles, these pins act as data bus. The separation of lower order address and data is done by address latch.

A8 – A15:-(Unidirectional)

These pins carry the higher order of address bus. The address is sent from microprocessor to memory.

ALE:- (Output)

It is used to enable Address Latch. It indicates whether bus functions as address bus or data bus.

If ALE = 1 then Bus functions as address bus.

If ALE = 0 then Bus functions as data bus. S0 and S1 :-( output)

S0 and S1 are called Status Pins. They tell the current operation which is in progress in 8085.



Signals Operation IO/M S1(read) S0(write)

0 0 1 Memory write 0 1 0 Memory read 1 0 1 I/O write 1 1 0 I/O read 0 1 1 Opcode fetch 1 1 1 Interrupt Acknowledge * 0 0 Hal * × × Hold * × × Reset

IO/M:-

This pin tells whether I/O or memory operation is being performed.

If IO/M = 1 then I/O operation is being performed.

If IO/M = 0 then Memory operation is being performed.

Stands for Read.

It is an active low signal. .

It is a control signal used for Read operation either from memory or from Input device.

A low signal indicates that data on the data bus must be placed either from selected memory location or from input device.

stands for Write.

It is also active low signal.

It is a control signal used for Write operation either into memory or into output device.

A low signal indicates that data on the data bus must be written into selected memory location or into output device.

READY

This pin is used to synchronize slower peripheral devices with fast microprocessor HOLD

HOLD pin is used to request the microprocessor for DMA transfer.

A high signal on this pin is a request to microprocessor to come off from the hold on buses.

This request is sent by DMA controller. HLDA

HLDA stands for Hold Acknowledge.

The microprocessor uses this pin to acknowledge the receipt of HOLD signal.

en si nal oes i , address bus, data bus, , , I pins are tri-stated.



This means they are cut-off from external environment.

The control of these buses goes to DMA Controller. VSS and VCC

+5V power supply is connected to VCC. Ground signal is connected to VSS.

4. Explain in detail memory Read & Write and I/O Read & Write operation. Memory read operation

The following sequence of event occurs when microprocessor reads the data from a particular memory location. 1) The microprocessor sends an address of memory location into the MAR (Memory

Address Register) using address bus. 2) At the same time, microprocessor also sends the read signal which activates memory

for read. 3) The memory device reads the contents of memory location whose address is in MAR

and puts the data stored at that location into the MBR. (Memory Buffer Register). 4) The microprocessor reads the desired contents from MBR using data bus.

Memory write operation

The following sequence of event occurs when microprocessor writes into a particular memory location. 1. The microprocessor sends an address of memory location into MAR using address bus. 2. The microprocessor also sends the data into MBR. 3. At the same time, microprocessor sends write signal to activate memory for write

operation. 4. The memory device will store the data stored into MBR into the location whose

address is in MAR



I/O read operation

1. The microprocessor sends port address on address bus. 2. At the same time, it activates Input device by sending appropriate control signals. 3. The device puts data on to the data bus. 4. The microprocessor receives data by reading the data bus.

I/O write operation 1. The microprocessor sends port address on address bus and data on data bus. 2. At the same time, it activates output device by sending appropriate control signals. 3. The selected device reads the data from data bus.

5. Draw and explain the internal architecture of 8085. The architecture of 8085 Microprocessor is shown in figure given below. The internal

architecture of 8085 includes following section 1. ALU-Arithmetic and Logic unit 2. Timing and control unit 3. Instruction register and decoder 4. Register array 5. Interrupt control and serial I/O control.



1. ALU

The ALU performs the arithmetic and logical operations.

It is an 8-bit register and focus of all the arithmetic, logic, load and store and I/O instruction.

2. General-purpose registers

There are six 8-bit general purpose registers B, C, D, E, H and L.

They can also be used as 16-bit register pairs as BC, DE and HL.

The HL pair is used for storing 16-bit memory address, while BC and DE are normally used to store data except in few instructions.

3. Program Counter (PC)

The program counter is a 16-bit register which stores address of the next instruction to be executed.

It is responsible for sequencing the program execution. 4. Stack Pointer (SP)

It is a 16-bit register which stores the address of top of stack.

Stack is a LIFO RAM to store data temporarily during the execution of the program. 5. FLAG register

It is an 8-bit register which contains five 1-bit flags used by conditional jump and call instructions.



The flags are set or reset according to the result of execution of last arithmetic or

logical instruction.

The flag resister is also known as PSW (Program Status Word) or F-register. There are five flags as follows:

i. Carry flag

The carry flag (CY) is an overflow from the 8-bit addition. It acts as a “borrow” flag during subtraction.

ii. Parity flag (P)

The parity flag (P) indicates no. of 1's in the result of arithmetic or logical instructions which is always stored in accumulator.

If no. of 1's are even in the accumulator, then it is called even parity and parity flag is set to 1.

On the other hand if no. of 1’s in the accumulator are odd. Then it is called odd parity and parity flag is reset to 0.

iii. The auxiliary carry flag (AC)

The auxiliary carry flag (AC) indicates an overflow from the bit-3 of the result as like CY which is overflow from bit-7.

The auxiliary carry flag is generally used in BCD (Binary Coded Decimal) operations.

iv. Zero flag (Z)

The zero flag (Z) is set to 1 when result of arithmetic or logical instruction is zero.

It is cleared when result is not zero. v. Sign (S) flag

The MSB (Most Significant Bit) of the accumulator after the arithmetic or logical operation is copied into the sign (S) flag.

The 1 in the sign flag indicates result is negative and 0 in the sign flag indicates result is positive.

For example, 8085 performs the following addition and stores the result in to accumulator.



6. Arithmetic and Logic Unit

It is a logic circuit which is responsible for performing all the arithmetic and logical operations.

The ALU receives the inputs from the accumulator and temporary registers and also stores result into accumulator.

The ALU also accesses the flag register in order to set or reset the individual flags according to the result it has computed.

7. Instruction Register and Decoder

During the opcode fetch cycle, the 8-bit opcode of an instruction is transferred into the instruction register.

The contents of the instruction register are received by instruction decoder and it is decoded to find the meaning of the instruction.

After decoding the instruction, decoder directs the timing and control section to perform sequence of events in order to complete the execution of the current instruction.

8. Interrupt section

There are five interrupts in 8085: TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.

The TRAP is non-maskable while others are maskable.

When interrupt comes on one of the pin, 8085 suspends current activity, saves the status and jumps to specific address where ISR is written.

Name of Interrupt Priority Address

TRAP 1 0024h

RST 7.5 2 003Ch

RST 6.5 3 0034h

RST 5.5 4 002Ch

INTR 5 Address given by external interrupt controller like 8259

The INTR is general purpose interrupt and external interrupt controller 8259 will provide the address of the service routine.

9. Serial Control Section

The serial control section in 8085 provides the serial interface through SID (Serial Input Data) and SOD (serial Output Data) lines. This kind of direct serial interface avoids the need of external hardware in smaller system.

10. Timing and Control Section

Once the instruction decoder decodes the instruction, it sends necessary signals to timing and control section to perform necessary steps in order to complete the execution of the instruction.

These steps might include the various internal operations like moving contents of one register to other register or external operations like memory read, memory write, I/O read, and I/O write.



Apart from controlling the various operations, this section also provides necessary synchronization signals to perform various external operations with memory or I/O devices.

6. Explain detail how to Demultiplexing multiplexed Address/Data Bus. The multiplexed address/data bus AD7-AD0, is used to transfer data and address both.

In order to perform the read or write operation, the memory device requires to identify memory location which is specified by l6-bit address.

The higher-order address is available through A15-A8 address lines and lower-order address is available through AD7-AD0.

The lower-order address must be latched as it is required by the memory device and AD7-

AD0 lines must be made free to transfer data.

The ALE signal is used to demultiplex AD7-AD0 as shown in fig.



7. Explain in detail operation of 8085 microprocessor OR Explain in detail microprocessor initiated operation OR Explain in detail internally initiated operation of 8085 OR Explain in detail peripheral initiated operation of 8085 OR Explain in detail externally initiated operation of 8085

The microprocessor has a set of finite no. of instructions through which it can manipulate data and communicate with the peripheral devices.

Microprocessor initiated operations

The 8085 performs four primary operations memory read, memory write, I/O read and I/O write.

the 8085 performs three steps- 1. to identify the memory location by l6-bit address for memory operation and I/o device by port address for I/O operation 2. Transfer the data and 3. Provide the necessary control signals. i.e. , , or

Fig. shows the timing diagram for the memory read and memory write operations which shows how the 8085 completes the memory operations using the address, data and control bus.

8085 requires three T-states to complete the memory read operation.

During T1, ALE goes high and the 8085 places the higher-order address on A15-A8 and lower-order address on AD7-AD0.

The high value of ALE indicates the availability of address on multiplexed address/data bus AD7-AD0.

The low value of IO/ indicates the memory operation.

A the end of T1 ALE goes low which latches the lower-order address in to the latch and makes the bus free for data transfer.

During T2, signal goes low which together with IO/ generates the control signal .

The signal enables the memory device for read operation as a result, the memory device places the contents of memory location specified by 16-bit address on the data bus.

The 8085 microprocessor takes the byte available on data bus and completes the memory read operation.

The memory write operation is also very similar to memory read operation except it uses signal to generate signal as shown in fig.



Internal data manipulation

Once the data is transferred to the microprocessor, the internal architecture of the 8085 determines what and how operation can be performed with the data

The 8085 performs following operation- 1. store 8-bit data 2. perform arithmetic and logical operations

3. test for certain conditions

4. sequence the execution of instructions

5. store data temporarily in stack during execution

Peripheral or externally initiated operations

Reset-

This operation can be initiated by making signal of the 8085low.

When reset ls activated, the 8085 suspends all the internal operations and clears the

Program counter i.e. PC stores 0000h.

The 8085 also informs the other devices through RESETOUT signal that it is being reset.

Now program execution can again be started from the memory location 0000h.

The RESET Key on 8085 microprocessor based kit is used to perform the reset operation.

Once it is pressed, the hardware circuit in a system sends signal to 8085 which

performs system reset as above and starts execution from memory location 0000h. It is the

address of monitor program.

Hence as a result, monitor program restarts the system.



Interrupt-

The external device can interrupt the 8085 by sending signal on one of the interrupt pin of

the 8085 microprocessor (TRAP, RST 7.5, RST 6.5,RST 5.5 and INTR) to execute group of

instructions called interrupt service routine.

After completing the interrupt service routine, it resumes the normal execution.

For example, when a key is pressed on a keyboard, the keyboard circuit sends an interrupt

signal to the microprocessor on one of its interrupt pin which causes the execution of

special keyboard service routine which reads the key from keyboard port and stores in

memory and used by requesting program.

Interrupt mechanism is used to provide such services (like keyboard service) to various

hardware devices.

In interrupt, request always comes from external hardware device and microprocessor

always provides service by executing appropriate interrupt service routine.

Ready-

This is used to synchronize the operation of slower devices with the microprocessor. The

8085 has a READY pin for this purpose.

When READY goes low. The 8085 goes into wait state and remains idle until READY goes

high again.

For example, memory is slow device and can’t respond with the speed of microprocessor.

During the memory read operation, after activating the memory device for read operation,

microprocessor has to wait before memory is ready with data as it takes certain time to get

data from given location.

Once memory is ready to transfer data, the memory device informs 8085 by sending

READY signal high.

The microprocessor then comes out of wait state, read the data from the data bus and

continues with normal operation.

Hold-

When HOLD input of 8085 goes high, 8085 completes the current cycle and leaves the

control of buses in order to allow the other peripheral devices like DMA (Direct Memory

Access) controller to use it.

The DMA controller is special device used to transfer data in bulk between peripheral

device and memory.

For example, between floppy disk or hard disk and memory and vice versa.

During the data transfer by DMA, microprocessor remains idle.

Documents

1. Explain in detail architecture of generic microprocessor. · Unit–I Introduction of Microprocessor 1 Dept: CE MALP(3330705) Prof. Chintan N. Kanani 1. Explain in detail architecture