01 Transistor Biasing Eng

8/13/2019 01 Transistor Biasing Eng

1/20

DC TRANSISTORS BIASING

in active regionaF

AMPLIFIERS WITHTRANSISTORS


2/20

2/13

Remark: input signal - low

enough for the amplifier to workin a linear region around the OP

Op-ampamplifier

revisited

VTC


3/20

transistor utilization as amplifier (CS, CE)

in active region (aF), the transistor operates around the dcoperating point (OP)

Necessity for dc transistor biasing

VPS dc supply

VI set the OP: (VO,IO)

vi input voltage

(to be amplified)vo output voltage

(amplified voltage)

superposition of the

variable signal over the

dc regime


4/20

Operation of the amplifier (CS, CE)

Who is responsible for the gain ?

VPS


5/20

Voltage transfer characteristicvO(vI), inverting amplifier

Small signal:operation of theamplifier in the

narrow linear regionaround the OP

Maximum swingof the input signal:

often determined based on thelinearity considerations

slope voltage gain


6/20

DC biasing setting the OP

Operation of the transistor as amplifier:

the transistor biased as close as possible to the middle of the aF

the instantaneous (mobile) operating point - in the active region

the input variable signal kept small (linear region around OP)

OP:

stabile and predictibile

independent of the transistor parameters


7/20

MOSFET biasing

2)( ThGSD VVI =

simple

the current in the OP, ID,depends on the transistor

parameters, and VTh

cannot assure the stability ofthe quiescent point.

PS

GG

GGS V

RR

RV

21

2

+=

DDPSDS IRVV =

DR

1st

variant 3 resistors,single supply

),(OP DDS IV


8/20

V2.154.26.7

4.2

21

2 =+

=+

= PSGG

GGS V

RR

RV

( ) A808.02.1500)( 22 === ThGSD VVI

V67.208.01.295 === DDPSDS IRVV

Example 1 RG1=7.6M; RG2=2.4M;RD=29.1K; VPS=5V

VTh =0.8V; =500A/V2. OP ?

V4.08.02.1 === ThGSDSsat VVV

FDSsatDS aVV inisrtransistothe>

( ) ( ) V7.22/4.052/ =+=+ DSsatPS VV V67.2=DSVThe transistor is biased in themiddle of its active region

A)80,V67.2(Q

DR

Resize the circuit to have the

transistor in the middle of its activeregion for ID=120A


9/20


10/20

MOSFET biasing

DSGGGS IRVV =

VGSdepends also on the drain currentID

ID , RSID, VGS , ID the circuitwithstands to the variation tendency of ID

negative feedbackdue toRS ensure the OP stability for variation of

certain parameters

increases the complexity of computationalrelations

2)( ThGSD VVI =

2nd

variant 4 resistors, single supply - cont.

OPTIONAL


11/20

Example 2

RG1=3M; RG2=1M;RD=3K; RS=1K; VPS=20V

VTh =2V; =0,5mA/V2.

? What is the OP ?

SDGGGS RIVV =2)( ThGSD VVI =

ID

2-8ID

+9=0; ID

in mA

V6,14)13(35,120

)(

=+=

=+= SDDPSDS RRIVVID1=6,65mA and

ID2=1,35mA

ID1 is not suitable;results VGS


12/20

Example 3

MOSFET: VTh

=2V; =0,25mA/V2; VPS

=20V

? Choose the resistances to obtainID=1mA in the OP.

2)( ThGSD VVI =

V4

25,0

12 =+=+=

DThGS

IVV

VDSsat=VGS-VTh=2V

T- active region VDS(2V; 20V).Q : We chose VDS=9V

DSDPSDS IRRVV )( += K111

920

=

=

=+D

DSPS

SD I

VV

RR

VGG

OPTIONAL


13/20

Example 3 cont.

MOSFET: VTh

=2V; =0,25mA/V2

? Choose the resistances to obtainID=1mA in the OP

RD,RS also sets the gain. For now we

can consider VS=4V acrossRS :

K41

4===

D

S

SI

VR

K7411 ==DR

V844 =+=+= SGSGG VVV

== K200;K300 21 GG RR

OPTIONAL


14/20

MOSFET biasing

Usual in integrated circuits: biasing with current sources

ID independent of the transistor parameters

GGGSDPSDS VVIRVV += GSDPSDS VIRVV +=Voltage across the current source: VGG-VGS

3rd

variant current source, single and differential supply


15/20

BJT biasing, usual variant in discrete circuits

oppositely to MOSFET, for BJT appears:

- base currentIB different from zero

- through collector and emitter do not flow exactly thesame current

CBBCEIIIII

1)1( +=+=+=

EC II One can approximate

BC II =

precise calculation:make use ofIB

approximate calculation:neglectingIBcompared to the current throughthe resistive voltage divider in thebase of the transistor

),(OP CCE IV


16/20

Approximate calculation

IBmuch smaller than the

current flowing through thebase divider

PSBB

B

BB VRR

R

V 21

2

+=

E

BEBB

EC R

VV

II

=

)( ECCPS

EECCPSCE

RRIV

RIRIVV

+

=

RE

is very important for setting

and stabilizing the OP, through anegative feedback mechanism

IC; IE; VRE; VBE; IC


17/20

Precise calculation

Thevenin theorem: VBB, RB

IC=IE+IB IE

IE insensitive to variations:

)1( +>>

BE

RR

BE

RR 10>

RB1,RB2 small values for the

independence of OP on

RB1, RB2 high values for the high

input resistance

IEinsensitive to temperature

variations due to VBE

V1.0>>BBV

aVBEvariation of 0,1V can be neglected visa vis the VBB=35V

)( ECCPSEECCPSCE

RRIV

RIRIVV

+

=

)1/( ++=

BE

BEBBE

RRVVI

IE=(+1)IB

EEBEBBBB IRVIRV ++=


18/20

VPS=15V;RB1=10k;RB2=4.7k;

RE=1.5k; RC=1.8k; =150

Approximate calculation

Exact calculation

IC

= ?

VCE =?

VC = ?

VE = ?

IC = 2.73mA

VCE = 6V

VC = 10.1V

VE = 4.1V

IC = ? IC = 2.7mA

Example 4


19/20

Example 5

Values of the resistances

so that T is biased in aF@ IC=2mA ?

VPS=12V, =100

Usually wechoose:

V4123

1

3

1===

AlBBVV

=

=

= k65.12

7.012)3/1(

E

BEBBE

I

VVR

PSPS

BB

BBB VV

RRRV

31

21

2 =+

= 21 2 BB RR =

mA84.1)1100/(7.1465.1

7.04

)1/(=

++

=

++

=

BE

BEBBE

RR

VVIVerification:

RB2=22K;RB1=44K

B

E

RR 10>

EBB

BB RRR

RR10

21

21

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01 Transistor Biasing Eng