Digital design chap 3

DIGITAL ELECTRONICSCHAPTER 3

DEE 204

DIGITAL ELECTRONICS• Function of combination logic

Conversion of BCD to 7 segment decoder.

Multiplexer, tri-state output, fan out, address, half adder, full adder, comparator.

Logic minimisation and Karnaugh maps.

FUNCTION OF COMBINATION LOGIC• BCD to 7 segment decoder

displays decimal characters 0 to 9 using a 7 segment configuration

takes a 4-bit BCD input and provides output by passing current through it and LED emits light

Lamp test: to verify that no segments are burned out

Zero suppression: blank out unnecessary zeros in multi-digit displays

FUNCTION OF COMBINATION LOGIC• Circuit for a BCD to 7 segment decoder

FUNCTION OF COMBINATION LOGIC• Table of input and output variables of BCD to 7

segment decoder

FUNCTION OF COMBINATION LOGIC• Table of input and output variables of BCD to

7 segment decoder

FUNCTION OF COMBINATION LOGIC

• Multiplexer (MUX)- also known as data selector - is a device that allows digital information from several sources to be routed onto a single line for transmission over that line to a common destination- has several input lines and single output line

FUNCTION OF COMBINATION LOGIC

• Block diagram for a 1-of-n data selector/multiplexer

FUNCTION OF COMBINATION LOGIC

• MultiplexerFor an 8-input MUX with truth table:

INPUTS OUTPUTSA2 A1 A0 Y

0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 0

FUNCTION OF COMBINATION LOGIC

• MultiplexerThe connection to a 74LS151 IC is as shown:

FUNCTION OF COMBINATION LOGIC

• Tri-state logic- normal logic circuits only have two output states; HIGH and LOW- in complex digital systems a number of gate inputs may be required, causing certain operation problems

FUNCTION OF COMBINATION LOGICRelated problems:

Transistor-transistor-logic (TTL) totem-pole outputs or CMOS active pull-up/pull-down outputs can’t be connected together open-collector outputs can be connected together with common collector but resistor connected externally, loading and speed

FUNCTION OF COMBINATION LOGIC

• Problems solved by - developing special circuits with one more output state known as third state or high impedance state- usually used as buffer gates- modification of NAND gate with addition of diodes D1 and D2 and an inverter gate

FUNCTION OF COMBINATION LOGIC

• Fan-out- maximum number of inputs of several gates that can be driven by the output of a logic gate - maximum number of inputs of the same IC family that the gate can drive maintaining its output levels within specified limits

FUNCTION OF COMBINATION LOGIC

• Fan-in- the number of inputs- at hardware level, it provides information about the intrinsic speed of the gate itself- increases or decreases the propagation delay

FUNCTION OF COMBINATION LOGIC

• Address:- location in memory- indicates the positions of instructions and data in the memory- starts with the number ‘0’ and up to the largest address

FUNCTION OF COMBINATION LOGIC• Half adder

- adds two bits and produces a sum and carry output- accepts two binary digits on inputs and produces two binary digits on outputs, a sum bit and a carry bitRules of binary addition0 + 0 = 00 + 1 = 11 + 0 = 11 + 1 = 10

FUNCTION OF COMBINATION LOGIC• Half-adder

The logic symbol and logic diagram for a half-adder:

FUNCTION OF COMBINATION LOGIC

• Half adderThe truth table for a half adder:

FUNCTION OF COMBINATION LOGIC

• Full adder- has an input carry while the half-adder does not- accepts two input bits and an input carry and generates a sum output and an output carry

FUNCTION OF COMBINATION LOGIC

• Full adder logic symbol

FUNCTION OF COMBINATION LOGIC

• Full adder logic diagram

inout CBAABC

inCBAS

FUNCTION OF COMBINATION LOGIC

• Full adder truth table

FUNCTION OF COMBINATION LOGIC

• Comparators- a special combinational circuit designed primarily to compare the relative magnitude of two binary numbers- for two n-bit numbers A and B as inputs, the outputs could be either A=B, A<B or A>B- depending on the relative magnitudes, one of the outputs will be HIGH

FUNCTION OF COMBINATION LOGIC

• ComparatorThe block diagram of a n-bit comparator:

FUNCTION OF COMBINATION LOGIC

• ComparatorLogic diagram of a one-bit comparator:

FUNCTION OF COMBINATION LOGIC• Comparator

Truth table of a one-bit comparator:

FUNCTION OF COMBINATION LOGIC

• Logic minimization or simplification Boolean sum of products (SOP) –

when two or more product terms are summed by Boolean addition

Boolean product of sums (POS) – when two or more sum terms are multiplied

Karnaugh map

FUNCTION OF COMBINATION LOGIC

• The sum of products (SOP) formExample:

ACCBABA

DCBCDEABC

ABCAB

FUNCTION OF COMBINATION LOGIC

• Example:Convert Boolean expression to SOP form

CBAc

DCBBAb

EFCDBABa

)

)

)

FUNCTION OF COMBINATION LOGIC

• Solution

An SOP expression is ‘1’ if one or more of the product terms is ‘1’

CBCACBACBACBAc

BDBCBBADACABDCBBAb

BEFBCDABEFCDBABa

)

)

)

FUNCTION OF COMBINATION LOGIC

• The product of sums (POS) formExample:

CACBABA

DCBEDCCBA

CBABA

FUNCTION OF COMBINATION LOGIC

• Example:Convert Boolean expression to POS form

DCBADCBADCBADCBADCBA

DCBADCBAAADCBDCB

DCBADCBADDCBACBA

DCBADCBCBA

as form POS thegiving thus,

Aor A variablemissing is termsecond thegconsiderin

Dor D variablemissing is first term thegconsiderin

FUNCTION OF COMBINATION LOGIC

• Example:Simplify or minimize Boolean expression

FUNCTION OF COMBINATION LOGIC• Example:

Simplify or minimize Boolean expression

FUNCTION OF COMBINATION LOGIC

• Karnaugh map- a systematic method for simplifying Boolean expressions - similar to the truth table presenting all possible values of input variables and resulting output of each value

FUNCTION OF COMBINATION LOGIC

• Karnaugh map

FUNCTION OF COMBINATION LOGIC

• Karnaugh map3-variable K-map

0 1

00

01

11

10

CAB

CBA CBA

CBA BCA

CAB ABC

CBA CBA

FUNCTION OF COMBINATION LOGIC• Karnaugh map : 4-variable K-

map 00 01 11 10

00

01

11

10

CD

AB

DCBA DCBA

DCBA DCBA

DCAB DCAB

DCBA DCBA

CDBA DCBA

BCDA DBCA

ABCD DABC

CDBA DCBA

FUNCTION OF COMBINATION LOGIC

• Karnaugh mapExample:Draw the truth table and Karnaugh map for

ABBAY

FUNCTION OF COMBINATION LOGIC

• Karnaugh map for the given expression

0 1

00 1 1

01

11 1

10 1

CAB

CBACABCBACBA

FUNCTION OF COMBINATION LOGIC

• Map the Karnaugh map for the given expression

1 1 1 0 1 1 0 1 0 1 0 0

itin 1 putting and expression theevaluating

ABCCABCBACBA

FUNCTION OF COMBINATION LOGIC

• Mapping the Karnaugh map for the given expression

0 1

00 1

01 1

11 1 1

10

CAB

FUNCTION OF COMBINATION LOGIC• Karnaugh map : 4-variable K-

map

0 1 0 1 1 0 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 1 0 0

itin 1 putting and expression theevaluating

DCBADCBADCABDCABDCBACDBA

FUNCTION OF COMBINATION LOGIC• Karnaugh map : 4-variable K-

map 00 01 11 10

00 1 1

01 1

11 1 1

10 1

CD

AB

FUNCTION OF COMBINATION LOGIC

• Map the Karnaugh map for the given expression

011

010

101 001

0 1 1 100 000

CAB BA A

iablesoutput var possible all gconsiderin

CABBAA

FUNCTION OF COMBINATION LOGIC

• Mapping the Karnaugh map for the given expression

0 1

00 1 1

01 1 1

11 1

10 1 1

CAB

FUNCTION OF COMBINATION LOGIC

• Deriving expression from Karnaugh map

0 1

00

01

11

10

CAB

CBA CBA

CBA BCA

CAB ABC

CBA CBA

FUNCTION OF COMBINATION LOGIC

• Deriving expression from Karnaugh map- grouping the 1s

0 1

00 1

01 1

11 1 1

10

CAB

FUNCTION OF COMBINATION LOGIC

• Deriving expression from Karnaugh map-determining the Boolean expression

0 1

00 1

01 1

11 1 1

10

CAB

CBABC

AB

FUNCTION OF COMBINATION LOGIC• Deriving the expression from the Karnaugh map

00 01 11 10

00 1 1

01 1 1 1 1

11

10 1 1

CD

AB

FUNCTION OF COMBINATION LOGIC• Grouping the 1s in the Karnaugh map

00 01 11 10

00 1 1

01 1 1 1 1

11

10 1 1

CD

AB CA

BA

DBA