View
1
Download
0
Category
Preview:
Citation preview
byRandy Geiger
Temperature Sensor Design for
Power/Thermal Management in Emerging
Semiconductor Processes
1Fort Collins – July 25, 2011
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
ABSTRACT
2
Various methods of building on-chip temperature sensors will be reviewed. Performance requirements for on-chip temperature sensors needed for power/thermal management will be discussed. New approaches for building on-chip temperature sensors for multi-site temperature monitoring for power/thermal management in fine-feature processes will be presented. Techniques for designing temperature sensors which provide a Boolean representation of temperature without requiring either an ADC or a voltage reference will be introduced.
Much of this work has been supported by the
National Science Foundation and the
Semiconductor Research Corporation
Acknowledgements
3
Results primarily due to the following students in the AMS program at Iowa State University
• Jun He• Chen Zhao• Alex Lee• Tina Wang• Karl Peterson
Project coordinated by faculty members Degang Chen and Randy Geiger
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
4
Standard Approach to Temperature Sensor Design
5
• Temp transducer usually provides an output voltage• Reference is usually a voltage reference• Generally require calibration at one or more temperatures• Viable solution for temperature sensor products but not attractive for
multi-site on-chip temperature measurement for power/thermal management
o Large areao Power dissipationo Accuracy
Standard Approach to Temperature Sensor Design
6
o Variations in supply voltage affect performance of Transducer, Reference, and ADCo Introduce errors (often significant) in XOUT that can not be calibrated out
And – all blocks require biasing
Temperature Transducer Concepts
7
=
ɶG0 D-qV qV
m kT kTD SXI (T) J A T e e
ˆβ
=
G0 BE-qV qVm kT kT
C SXI (T) J A T e e
VGS
ID
( ) ( )2OX
WC
Lµ λ≃
2
D GS TH DSI (T) V -V 1+ V
( )( )
1OX
WC e e
Lµ
−
≃
GS TH DSq V -V qV-2 kT kT
D TI (T) V
mOµ µ≃ T
VTγ+≃TH TH0V (T) V T
( )R = R T
( )nS f = 4kTR
What is temperature dependent in MOS processes?
ID
VD
VBE
IC
Noise is everywhere temperature dependent
Temperature Transducer Concepts
8
=
ɶG0 D-qV qV
m kT kTD SXI (T) J A T e e
ˆβ
=
G0 BE-qV qVm kT kT
C SXI (T) J A T e e
VGS
ID
( ) ( )2OX
WC
Lµ λ≃
2
D GS TH DSI (T) V -V 1+ V
( )( )
1OX
WC e e
Lµ
−
≃
GS TH DSq V -V qV-2 kT kT
D TI (T) V
mOµ µ≃ T
VTγ+≃TH TH0V (T) V T
( )R = R T
( )nS f = 4kTR
Which are used (proposed) as temperature sensors?
ID
VD
VBE
IC
All of them !
Temperature Transducer Circuits
Temperature
Transducer
T
I MI
VD1 VD2
( )M
=
=
=
ɶ
ɶ
G0 D1
G0 D2
-qV qVm kT kT
D1 SX
-qV qVm kT kT
D2 SX
D2 D1
I (T) J A T e e
I (T) J A T e e
I (T) I T
( )ln M− =D2 D1
kTV V
q
• Most diode and BJT temp sensor circuits based upon this analysis• Batch-level calibration often reported without details (compensates for RB and β)
Assuming diodes matched
Temperature Transducer Circuits
Temperature
Transducer
T
Ring oscillator based sensor
( )OSCf f T=
• Output signal is frequency• ADC (not shown) is a frequency detector (counter)
• Depends nonlinearly on µ(T) and VT(T)• Depends upon VDD
Temperature Transducer Circuits
Temperature
Transducer
T
Pulse-Swallowing Temperature Sensor
( )PT f= T
• Output signal is pulse period• ADC is Swallower/Counter• Depends nonlinearly on µ(T) and VT(T)• Depends upon VDD
Delay Line
Pulse Swallower is an even number of inverters in a loop
Temperature Transducer Circuits
Temperature
Transducer
T
Threshold-Based Temperature Sensor
• Output “expresses” VTH• Output is highly linear in T • Threshold Extractor can be small, low power
VTγ+≃TH TH0V (T) V T
Temperature Transducer Concepts
13
VGS
ID
Which are used (proposed) as temperature sensors?
VBE
IC
Little in literature suggests which type of temperature transducer is best
Little in literature suggests which circuit structure is bestExperimental results based upon small samplesMeasurement procedures often questionableModels for temperature dependence of key parameters not well developed either functionally or statistically
Will focus here on threshold-based temperature sensors which show promise for multi-site applications needed for power/thermal management
Small, low power, linear
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
14
Goal:
15
Develop VDD-independent temperature sensor with Boolean output that is very small, very low power, that is useful for power/thermal management applications(1oC accuracy over 80oC to 110oC range)
Secondary Goal: Develop general-purpose temperature sensor with 0.5oC linearity over -20oC to 120oC range.
Goal:
16
Develop VDD-independent temperature sensor with Boolean output that is very small, very low power, for power/thermal management applications(1oC accuracy over 80oC to 110oC range)
Premise: 1. Linearity of output with temperature is the major challenge2. Single-temperature trim can compensate for most process variations3. Batch calibration for slope adequate for modest temperature range4. Second temperature trim for slope if needed
Standard Approach:1. Develop sensor that provides linear temperature output2. Develop ADC to convert this linear signal to Boolean form
Rationale:
17
Rationale:
• Threshold voltage varies quite linearly with temperature
• Threshold extraction circuits should be small and low power
• Compatible with existing and emerging processes
Concerns:
• Precise temperature dependence of threshold voltage with temperature not well characterized
• In contrast to pn-junction PTAT voltage generators, threshold voltage does not project to 0V at T=0K
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
18
Inverse-Widlar Temperature Sensor
19
p-typen-type
• Express threshold voltage at outputs• Ideally supply independent• Well-known as bias generators but not as temp sensors• Seemingly simple structures but design space is large• Start up circuits not shown
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse-Widlar Temperature Sensors
20
2 1
1 201 Tn
2 3 2 1
3 2 1 2
W L1
MW LV V
W L W L1
W L MW L
−
=
+ −
2 3 2 1
3 2 1 202 Tn
2 3 2 1
3 2 1 2
W L W L1 2
W L MW LV V
W L W L1
W L MW L
+ −
=
+ −
Expression of threshold voltage
Tn T0n nV = V +γ T
• Used basic square-law model w/o γ or λ effects• Outputs highly linear with T• Outputs highly independent of VDD• Outputs of other structures similarly express VT
where M is the current mirror gain of M5:M4
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
21
Simulation Results – TSMC 0.18u
Over 120oC, output is quite linear at TT
�VOUT1 ⋍ 110mV
VOUT1(T)
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
22
Simulation results – TSMC 0.18u
Over 120oC, INL is about .055oC at TT
VOUT1(T)
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
23
Simulation results – TSMC 0.18u
Linearity remains good over process corners
VOUT1(T)
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
24
Simulation results – TSMC 0.18u
• Linearity error bounded by 0.16oC over process corners• This suggests that linearity is robust to process variations• Robustness is not discussed in any of the published results
VOUT1(T)
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
25
Start-up Circuit
• Some useful fundamental results for characterizing start-up circuits were developed• These have not been reported in the literature• Will not go into details in this review
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
26
Simulation results – TSMC 0.18u
n-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Inverse Widlar Temperature Sensors
27
Expression of threshold voltage
• Over 120oC, INL is about .055oC at TT and about 0.16oC over all corners• Slope quite independent of process – single batch calibration may be adequate• Single-point calibration to compensate for process-dependent offset • Area is very small and power dissipation is very low• Results based upon simulations in 0.18u process, must verify experimentally
VOUT1(T)
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Voltage Linear to Temperature Sensors
28
Based upon simulations, these circuits appear to be much more linear with T than anything reported
n-type p-type
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
29
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Test Chip LayoutArea:825um*759um (PADs are included)
0.18u CMOS Process
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Different Temperature Sensors on the Die
N-type
P-type
Circuit P-type N-type
Area(um2) 24*14.4 12*25.5
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Test Temperature Sensor Circuits
N-type: (NTC) P-type: (PTC)
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Strategy
33
• Using high performance platinum RTD temperature sensor as reference
• Testing configuration
Oven(Controlled Temperature)
DUTHigh Performance
Temperature Sensor(Error:<0.03˚C)
Voltage Temperature
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Equipment
34
1. Oven: ESPEC BTL-433 • Thermal controller : Watlow F4 connected with computer by RS-232.• Temperature range : -20°C to 180°C• ±0.5°C fluctuation at control sensor after stabilization • Temperature cycling rate :� 1.5°C/m heating � 2°C/m cooling
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Equipment
35
2. Thermometer: • F200 thermometer • T100-250-18 Platinum
Resistance Thermometer
3. Thermal Buffer• Achieve Thermal equilibrium
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Results
36
• N-type 5-transistor temperature sensor
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
x 104
-50
0
50
100
150
Time(s)T
empe
ratu
re f
rom
PR
T( °C
)
PRT Data <Chip testing: NTC 5 transistor >
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
x 104
0.4
0.42
0.44
0.46
0.48
0.5
0.52
0.54
Time(s)
Vol
tage
fro
m C
hip
Vou
t(V
)
Chip Vout <Chip testing NTC 5 transistor >
12-hour slow ramp test
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Results
37
-20 0 20 40 60 80 100 1200.4
0.42
0.44
0.46
0.48
0.5
0.52
0.54
Temperature(°C)
Vol
tage
(V)
T-V transfer curve <Chip1 Ntype2 Oct. 19th>
Testing transfer curve
fitting line
-20 0 20 40 60 80 100 120-6
-5
-4
-3
-2
-1
0
1
Temperature(°C)
Tem
pera
ture
Err
or( °C
)
INL <Chip1 Ntype2 Oct. 19th>
• End-point fitting line shows 2.5C linearity error in the measurement results over 120oC range
• Much lower error (100mK) over 30oC range needed for power/thermal management
• Much less linear than simulation results predict but still very useful• Difference between measurement and simulation attributable to thermal model
of VT used in PDK
±
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Results
38
• P-type 5-transistor temperature sensor
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
x 104
-50
0
50
100
150
Time(s)T
empe
ratu
re f
rom
PR
T( °C
)
PRT Data <Chip testing: NTC 5 transistor >
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
x 104
0.4
0.42
0.44
0.46
0.48
0.5
0.52
0.54
Time(s)
Vol
tage
fro
m C
hip
Vou
t(V
)
Chip Vout <Chip testing NTC 5 transistor >
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Results
39
• End-point fitting line shows 2.4C linearity error in the measurement results over 120oC range
• Much lower error over 30oC range needed for power/thermal management• Much less linear than simulation results predict but still very useful• Difference between measurement and simulation attributable to thermal
model of VT used in PDK
-20 0 20 40 60 80 100 1201.28
1.3
1.32
1.34
1.36
1.38
1.4
1.42
1.44
1.46
Temperature(°C)
Vol
tage
(V)
T-V transfer curve <Chip1 Ptype2 Oct. 19th>
Testing transfer curve
fitting line
-20 0 20 40 60 80 100 120-5
-4
-3
-2
-1
0
1
Temperature(°C)T
empe
ratu
re E
rror
( °C)
INL <Chip1 Ptype2 Oct. 19th>
±
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Measurement Results
40
-20 0 20 40 60 80 100 1201.28
1.3
1.32
1.34
1.36
1.38
1.4
1.42
1.44
1.46
Temperature(°C)
Vol
tage
(V)
T-V transfer curve <Chip1 Ptype2 Oct. 19th>
Testing transfer curve
fitting line
-20 0 20 40 60 80 100 1200.4
0.42
0.44
0.46
0.48
0.5
0.52
0.54
Temperature(°C)
Vol
tage
(V)
T-V transfer curve <Chip1 Ntype2 Oct. 19th>
Testing transfer curve
fitting line
Similar nonlinearity was measured for several other temperature sensors as well !
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
41
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
2nd Order TC
• In the BSIM3 model, the temperature dependence of the threshold voltage of MOS devices is modeled as
KT1 is the temperature coefficient KT1L is the channel length dependence of the temperature coefficientKT2 is the body-bias coefficient of threshold voltage temperature effect
• Second-order temperature coefficient added to BSIM model
42
This is linear in T
1 1 10T
KT KTTnom
α = − −
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
2nd Order TC
Simulation results with second-order model for N-Type sensor
-20 0 20 40 60 80 100 1200.35
0.4
0.45
0.5
0.55
0.6
Temperature(°C)
Vol
tage
(V)
T-V transfer curve <Chip1 Ntype1 Oct. 19th>
Measurement
Typical Model
-20 0 20 40 60 80 100 120-1
0
1
2
3
4
5
6
Temperature(°C)
Tem
pera
ture
Err
or( °C
)
Temperature Error of End Point Fitting<Chip1 Ntype1 Oct. 19th>
Measurement
TT for modified model
• Inclusion of the second-order TC provides good agreement between simulation and measured results• Have been unable to get information from industry on modeling second-order temperature effects of threshold voltage• Have redesigned sensor to reduce second-order temperatue dependance but no experimental results yet
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
44
CMOS Temp Sensors with Improved Head Room
45
( )o
Tn
VV Tn Proc Tn tempHR s V V> × ∆ + ∆
Headroom Requirements to Accommodate for Process and Temperature Variations:
Inverse Widlar Sensor does not have enough headroom at low VDD(.9VDDNOM) at the SN,SP process corner
Cascoding is not possible to reduce VDD sensitivity
CMOS Temp Sensors with Improved Head Room
Circuit B Circuit C
46
(start-up circuits not shown)
Circuit A
CMOS Temp Sensors with Improved Head Room
M2
Vin Vout
M6
Vdd
( )out in TnV =θ V -V
Both improved HR circuits incorporate active attenuator.
For appropriate design, VEB2 is very smallVoltage drop from Vin to Vout is approximately VTn.
47
Proposed Work 1--- Circuit B
Circuit B
o1 Tn3
2
3
1V = ×V
(W/L) 11- ( -1)
(W/L) θ
o2 Tn3 Tn2
2
3
1V = ×V +V
(W/L)θ- (1-θ)
(W/L)
• Output is linear with VTn, (thus linear with temperature)• Output voltage is VDD independent• HR constraint reduced by VEB with attenuator• Low current consumption and small area
48
DD nom Tn EB0.9V -(2V +2V ) > HR
At low VDD
CMOS Temp Sensors with Improved Head Room
Circuit C
3 3Tn3 Tn1 Tn2
2 2 6 101
3 3
2 2 6 1
(W/L) (W/L)[(1-θ) - ]×V +(V -V )
W /(L +L ) (W/L)V =
(W/L) (W/L)(1-θ) - +1
W /(L +L ) (W/L)
01 Tn302 Tn1
1
3
V -VV = +V
(W/L)(W/L)
(17)
49
DD nom Tn EB0.9V -(2V +2V ) > HR
At low VDD
• Output is linear with VTn, (thus linear with temperature)• Output voltage is VDD independent• HR constraint reduced by VEB with attenuator• Low current consumption and small area
Simulation Results at Slow n Corner at Low VDD
Simulations at 0.9*VDD Nom at slow n corner
Circuits B and C maintain temperature error within 80mK whileCircuit A has more than 900mK temperature error
-20 0 20 40 60 80 100-2
-1.5
-1
-0.5
0
0.5
Temperature (°C)
Tem
pera
ture
( °C
)
Circuit B
Circuit C
CircuitA
50
Simulation Results Summary
51
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
52
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Low voltage dual-threshold temperature sensorTemperature Sensor Design
( ) ( )1 1 2 2
1 2
1 1 2 2 1 1 2 2
n TnO T
W L M W LV
W L M W L W L M WV
LV −=
− −
53
Enough headroom for full cascoding even with low supply voltages!
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Low voltage dual-threshold temperature sensor
• Can be viewed as 2-cascaded inverters in a loop• Must have single operating point with all devices in
saturation to obtain VDD insensitivity
54
M4
M1
M3
M2
VDD
VSS
ID1 ID2VO
M2 has higher VTthan M1
1:M
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Low voltage dual-threshold temperature sensor
55
If VTn2 > VTn1 will have a single stable equilibrium point (requires no startup)If AVL<1, all devices will be operating in saturationIt VTn1>VTn2, will not operate as a VDD-independent temperature sensor
Basic Operation:
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
M4
M1
M3
M2
VDD
VSS
ID1 ID2VO
M2 has higher VTthan M1
1:M
Low voltage dual-threshold temperature sensorTemperature Sensor Design
56
• Circuit has been designed in a 65nm process and is in fabrication• Simulation results suggest INL well under 0.5oC over temperature range
needed for power management• Can not discuss simulation results at this time
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
57
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Direct Temp to Digital Converter
58
One implementation to demonstrate concept
• Control logic forces VOUT1=VOUT2• Temperature encoded in DOUT• Switches on mirror not shown
• No ADC (just SAR register)
• No VREF or IREF• Very simple logic• Very low power
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Direct Temp to Digital Converter
59
One implementation to demonstrate concept
Output code varies linearly with T
Simulation results – TSMC 0.18u with 2nd order model
-20 0 20 40 60 80 10000000000
00011001
00110011
01001100
01100110
10000000
10011001
10110011
11001100
temperature (° C)
tem
pe
ratu
re d
igita
l co
de
ou
tpu
t(°
C)
IOWA STATE UNIVERSITY Department of Electrical and Computer Engineering
Direct Temp to Digital Converter
60
One implementation to demonstrate concept
INL bound by 1oC
Simulation results – TSMC 0.18u with 2nd order model
-20 0 20 40 60 80 10000000000
00011001
00110011
01001100
01100110
10000000
10011001
10110011
11001100
temperature (° C)
tem
pe
ratu
re d
igita
l co
de
ou
tpu
t(°
C)
-20 0 20 40 60 80 100-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
temperature (° C)
tem
pera
ture
err
or( °
C)
• Review of Temperature Sensor Approaches• Goal and Motivation• Inverse Widlar Temperature Sensor
– Description– Measured Results
• Second-Order Temperature Dependence to VT• Temperature Sensor with Improved Headroom• Four-Transistor Dual-VT Temperature Sensor• Temperature to Digital Converter• Summary
Outline
61
Many different approaches have been proposed for building integrated temperature sensors but limited results have been reported that fairly compare the different approaches
Temperature sensors based upon the temperature dependence of the threshold offer potential for implementation of low-power low-area accurate temperature sensors
Improved models for temperature higher-order temperature dependence of threshold voltage would be quite useful
New method of designing temperature sensor that does not require either a stable reference or an ADC was introduced.
Summary
62
Thank you for your attention !
63
Recommended