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JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOP8 Plastic-Encapsulate MOSFETS
CJQ7328 Dual P-Channel MOSFET
DESCRIPTION
The CJQ7328 uses advanced processing techniques to achieve
extremely low on-resistance. This benefit, combined with the
ruggedized device design that the MOSFETs are well known for,
provides the designer with an extremely efficient and reliable device
for use in battery and load management.
FEATURES
Ultra Low On-Resistance
Maximum ratings (Ta=25 unless otherwise noted)
Parameter Symbol Value Unit
Drain-Source Voltage VDS -30
Gate-Source Voltage VGS ±20 V
Continuous Drain Current ID -8
Pulsed Drain Current (note 1) IDM -32 A
Power Dissipation (note 2) PD 1.4 W
Thermal Resistance from Junction to Ambient (note 2) RθJA 89 /W
Junction Temperature TJ 150
Storage Temperature Tstg -55 ~+150
SOP8
V(BR)DSS RDS(on)MAX ID
-30V21mΩ@-10V
-8A 32mΩ -4.5V @
MARKING: Equivalent Circuit
www.cj-elec.com 1 E,Mar,2016
Solid dot = Green molding compound device,if none,the normal device.
Q7328= Device code
YY=Date CodeSolid dot = Pin1 indicator
Parameter Symbol Test Condition Min Typ Max Unit
Static Characteristics
Drain Source Breakdown Voltage V(BR)DSS VGS=0V,ID=-250µA -30 V
Zero Gate Voltage Drain Current IDSS VDS=-24V, VGS=0V -15 µA
Gate body Leakage lGSS VDS=0V, VGS=±20V ±100 nA
Gate Threshold Voltage VGS(th) VDS =VGS, ID =-250µA -1 -1.5 -2.5 V
VGS =-10V, ID =-8A 19 21 Drain-Source on-state Resistance
(note 3) RDS(on)
VGS =-4.5V, ID =-6.8A 26 32 mΩ
Forward Transconductance gFs VDS =-10V, ID =-8A 12 S
Dynamic Characteristics (note 4)
Input Capacitance Ciss 2675
Output Capacitance Coss 409
Reverse Transfer Capacitance Crss
VDS =-25V,VGS =0V,f =1MHz
262
pF
Total Gate Charge Qg 78
Gate-Source Charge Qgs 9.8
Gate-Drain Charge Qgd
VDS =-15V,VGS =-10V,ID =-8A
8.3
nC
Turn-On Delay Time td(on) 20
Rise Time tr 23
Turn-Off Delay Time td(off) 297
Fall Time tf
VDD=-15V,RD=15Ω
ID =-1A,VGS=-10V,RG=6Ω
147
ns
Drain-Source Body Diode Characteristics
Diode Forward Voltage (note 3) VSD IS=-2A,VGS=0V -1.2 V
Notes:
1. Repetitive rating : Pulse width limited by junction temperature.
2. Surface mounted on 1”×1” FR4 board,t≤10s.
3. Pulse Test : Pulse Width≤300µs, Duty Cycle ≤2%.
4. Guaranteed by design, not subject to production testing.
aT =25 unless otherwise specified
www.cj-elec.com 2 E,Mar,2016
-0 -2 -4 -6 -8 -100
5
10
15
20
25
30
35
40
-0 -5 -10 -15 -201E-3
0.01
0.1
1
10
-2 -4 -6 -810
15
20
25
30
-0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0-0
-1
-2
-3
-4
-400 -600 -800 -1000-1E-4
-1E-3
-0.01
-0.1
-1
-10
25 50 75 100 125-1.0
-1.2
-1.4
-1.6
-10V -4.0V
-3.5V
-3.0V
DR
AIN
CU
RR
EN
T
I D
(A
)
DRAIN TO SOURCE VOLTAGE VDS
(V)
Pulsed
VGS
=-2.5V
GATE TO SOURCE VOLTAGE VGS
(V)
ON
-RE
SIS
TA
NC
E
RD
S(O
N)
(Ω
)
ID=-8A
Ta=25
Pulsed
VGS
——RDS(ON)
Ta=25
Pulsed
VGS
=-10V
VGS
=-4.5V
ON
-RE
SIS
TA
NC
E
RD
S(O
N)
(mΩ
)
DRAIN CURRENT ID (A)
ID
——RDS(ON)
-0.5
DR
AIN
CU
RR
EN
T
I D
(A
)
GATE TO SOURCE VOLTAGE VGS
(V)
VDS
=-24V
Pulsed
Ta=100
Ta=25
Transfer Characteristics
SO
UR
CE
CU
RR
EN
T
I S
(A)
SOURCE TO DRAIN VOLTAGE VSD
(mV)
Ta=25
Pulsed
VSDI
S ——
Output Characteristics
TH
RE
SH
OLD
VO
LTA
GE
V
TH
(V
)
JUNCTION TEMPERATURE TJ ( )
ID=-250uA
Threshold Voltage
www.cj-elec.com 3 E,Mar,2016
www.cj-elec.com 4 E,Mar,2016
SOP8 Package Outline Dimensions
SOP8 Suggested Pad Layout
Min Max Min MaxA
A1 0.100 0.250 0.004 0.010A2 1.350 1.550 0.053 0.061b 0.330 0.510 0.013 0.020c 0.170 0.250 0.007 0.010D 4.800 5.000 0.189 0.197e
E 5.800 6.200 0.228 0.244E1 3.800 4.000 0.150 0.157L 0.400 1.270 0.016 0.050
θ 0° 8° 0° 8°
SymbolDimensions In Millimeters Dimensions In Inches
0.050(BSC)1.270(BSC)
1.350 1.750 0.053 0.069
SOP8 Tape and Reel
www.cj-elec.com 5 E,Mar,2016
REEL Reel Size Box Box Size(mm) Carton Carton Size(mm) G.W.(kg)
4,000 pcs 13 inch 8,000 pcs 360×360×65 64,000 pcs 565×380×390
Reel Option
13''Dia
Dimensions are in millimeter
D D1 D2 G H I W1 W2
Ø330.00 100.00 13.00 R151.00 R56.00 R6.50 12.40 17.60
Recommended