Network-on-Chip Network Adapter and Network Issues System-on-Chip Group, CSE-IMM, DTU

Network-on-Chip

Network Adapter and Network Issues

System-on-Chip Group, CSE-IMM, DTU

© System-on-Chip Group, CSE-IMM, DTU 2

NoC Overview Slide

Network AdapterRouting Node

© System-on-Chip Group, CSE-IMM, DTU 3

Overview

•Network Adapter Session / Transport Layer Plug and play interface Traffic encapsulation

•Network Topology Protocol

© System-on-Chip Group, CSE-IMM, DTU 4

Network Adapter

• Functions Encapsulation Service Management Interface multiple IPs to a single NoC

port

• Sockets OCP VCI

© System-on-Chip Group, CSE-IMM, DTU 5

Encapsulation

• Convert messages into packets Header to payload ratio Header is overhead

Routing information Control information (such as services, flit

number, etc) Possible error-correction

• Broadcast, narrowcast services

© System-on-Chip Group, CSE-IMM, DTU 6

Service Management

• Definition: Acquire, retain, use and relinquishany service in a predictable way!!

• Types of Services: BE: not guarantee, only correctness and

completion of transmission is guaranteed GS: provides bounded guarantees

Latency Bandwidth Power etc…

© System-on-Chip Group, CSE-IMM, DTU 7

Sockets

• Point-to-point connection (abstraction)• Abstract away the network details for

the IP cores• Examples: OCP, VCI, etc• Limitations (a bus-based view):

Broadcast, narrowcast, services are not supported

Easy means for GS service request, retention and teardown not supported

© System-on-Chip Group, CSE-IMM, DTU 8

Network

• Two characteristics Topology Protocol

• Flow-Control• Quality-of-Service

© System-on-Chip Group, CSE-IMM, DTU 9

Topology

• Form: relates to geometry Scalable with area and power Easy to lay out in 2D chip plane

• Nature of link: relates to unidirectional or bidirectional links

• Presence of IP core

© System-on-Chip Group, CSE-IMM, DTU 10

Forms of Topology

• preferred for easy of layout• better utilization of available bandwidth

K-ary 2-cube K-ary tree

• better hardware utilization for same bandwidth• good to exploit locality of traffic

© System-on-Chip Group, CSE-IMM, DTU 11

Nature of Topological Link

• Common variations: torus and mesh

Uni-directional Bi-directional

© System-on-Chip Group, CSE-IMM, DTU 12

IP Core of Topology

Direct network

Indirect network

© System-on-Chip Group, CSE-IMM, DTU 13

Irregular Topologies

• Hybrid, asymmetric and hierarchical

© System-on-Chip Group, CSE-IMM, DTU 14

Router Architecture

© System-on-Chip Group, CSE-IMM, DTU 15

Buffering Schemes

• Input Head-of-line blocking

• Output Expensive in terms of hardware

• Virtual-output Moderately buffer cost at very high

improvement in performance

© System-on-Chip Group, CSE-IMM, DTU 16

Crossbar and Arbitration Unit

• Crossbar connects input port to output port

• Arbitration is used to prioritize, setup and manage crossbar connections Possibly programmable for best-effort

and guaranteed service connections

© System-on-Chip Group, CSE-IMM, DTU 17

Protocol

• Many dimensions Circuit vs packet switched Connectionless or connection-

oriented Adaptive or deterministic Minimal or non-minimal Delay or loss Centralized or decentralized control

© System-on-Chip Group, CSE-IMM, DTU 18

Common Routing Mechanisms

• Store-and-forward• Virtual-cut through• Wormhole

Protocol

RouterStallingLatency Storage

Store-and-forward

Packet Packet At two nodes and link between them

Virtual-cut through

Header Header At all nodes and links spanned by the packet

Wormhole Header Packet At the local node

© System-on-Chip Group, CSE-IMM, DTU 19

Flow-Control

• Network-level: NA-to-NA In-order delivery Packet Acknowledgment Credit based injection schemes

• Link-Level: Node-to-Node Congestion look-ahead or stalling Virtual channel selection

© System-on-Chip Group, CSE-IMM, DTU 20

Quality-of-Service

• End-to-end Reserving virtual circuits from source to

destination One-way, round-trip or just reverse-way Connection management overhead!!

• Node-to-Node Logically independent resource allocation

(avoid contention) Division of link bandwidth!!

© System-on-Chip Group, CSE-IMM, DTU 21

Conclusion

• Each NoC level offers many parameters such as topology, packet size, buffereing, that to optimize the implementation

• Sockets are enable plug’n’play of IP cores, thus flexibility in placement anywhere within the network geometry

• Topology is influenced by placement of IP cores• Many protocol choices available, with wormhole

costing the least in terms of buffering• Buffers are most area consuming component

within the routers

© System-on-Chip Group, CSE-IMM, DTU 22

References

• BJERREGAARD, T. and MAHADEVAN, S. 2004. “NoC Survey Manuscript”, Submitted.• JANTSCH, A. and TENHUNEN, H. 2003. Networks on Chip. Kluwer Academic Publishers.• BHOJWANI, P. and MAHAPATRA, R. 2003. Interfacing cores with on-chip packet-switched networks. In Proceedings

of the Sixteenth International Conference on VLSI Design.• ANDRIAHANTENAINA, A. and GREINER, A. 2003. Micro-network for SoC : Implementation of a 32-port spin

network. In The Proceedings of Design, Automation and Test in Europe Conference and Exhibition. IEEE.• BANERJEE, N., VELLANKI, P., and CHATHA, K. S. 2004. A power and performance model for network-onchip

architectures. In Proceedings of the 2004 Design, Automation and Test in Europe Conference (DATE’04). IEEE.• DALLY, W. J. 1990. Performance analysis of k-ary n-cube interconnection networks. IEEE Transactions on

Computer.• DALLY, W. J. and SEITZ, C. L. 1987. Deadlock-free message routing in multiprocessor interconnection

networks.IEEE Transactions on Computers.• DUATO, J. 1996. A necessary and sufficient condition for deadlock-free routing in cut-through and store-and

forward networks. IEEE Transactions on Parallel and Distributed Systems.• KUMAR, S., JANTSCH, A., SOININEN, J.-P., FORSELL, M., MILLBERG, M., OBERG, J., TIENSYRJÄ, K., and HEMANI, A.

2002. A network on chip architecture and design methodology. In Proceedings of the Computer Society Annual Symposium on VLSI, ISVLSI 2002. IEEE Computer Society.

• OCPIP. 2003. Open Core Protocol Specification, Release 2.0. http://www.ocpip.org.• MILLBERG, M., NILSSON, E., THID, R., and JANTSCH, A. 2004. Guaranteed bandwidth using looped containers in

temporally disjoint networks within the nostrum network on chip. In Proceedings of the conference on Design, automation and test in Europe. IEEE Computer Society.

• RADULESCU, A., DIELISSEN, J., GOOSSENS, K., RIJPKEMA, E., and WIELAGE, P. 2004. An efficient on-chip network interface offering guaranteed services, shared-memory abstraction, and flexible network configuration. In Proceedings of the 2004 Design, Automation and Test in Europe Conference (DATE’04). IEEE.

• RIJPKEMA, E., GOOSSENS, K. G. W., RADULESCU, A., DIELISSEN, J., MEERBERGEN, J. V., WIELAGE, P., and WATERLANDER, E. 2003. Trade offs in the design of a router with both guaranteed and best-effort services for networks on chip. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE.

• TAMIR, Y. and FRAZIER, G. L. 1988. High-performance multiqueue buffers for VLSI communication switches. In Proceedings of the 15th Annual International Symposium on Computer Architecture. IEEE Computer Society.