Group 6 You’ve Got SARS!!

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Group 6 You’ve Got SARS!!. Brent Anderson Lauren Cutsinger Martin Gilpatric Michael Oberg Matthew Taylor Capstone Spring 2006. Presentation Outline. Milestones Logistics Enhancements to Core Design Bus Interconnectivity Program Flow Client GUI Motor Control Demonstrations. - PowerPoint PPT Presentation

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Group 6 You’ve Got SARS!!

Brent AndersonLauren CutsingerMartin GilpatricMichael ObergMatthew Taylor

Capstone Spring 2006

Presentation Outline

Milestones

Logistics

Enhancements to Core Design

Bus Interconnectivity

Program Flow

Client GUI

Motor Control

Demonstrations

Project Overview

Design an infrared tracking system that will

control a motorized camera platform.

Track infrared image of person.

Display IR image.

Determine temperature of person for possible

disease detection.

System Overview

SPI

SPI

PWM

USB 2.0

Major ComponentsMajor Components IR CameraIR Camera PIC ProcessorsPIC Processors Camera MountCamera Mount MotorsMotors PCBPCB Output (PC)Output (PC)

Serial Motor Control

4431

4550

Milestones

Milestone 1– Complete Prototype– Basic Motor Control– Talk to IR Camera over SPI– Basic Tracking Abilities

Milestone 2– PCB with Surface Mount Components– Advanced Tracking– Fine Tuned Motor Control– Camera Mounted with Optics– Basic PC Interface

Expo– Full Camera Integration– Complete PC Interface

Tasks

Team Member Main TasksBrent • Core Chip Programming

• Overall Product Design and Prototyping

Lauren • PCB Layout• Mechanical Assembly

Martin • Targeting Software• UART Interfacing

Michael • Image Post-Processing • PC Client Interface

Matthew • PCB Layout• Motor Interfacing

Costs (Overall - Vendor)

Vendor AmountLynxmotion $43.86

Sparkfun $21.51

DigiKey $17.09

Dexter $850.00

Total $932.46

UROP Funds $800.00

Costs (Specific)

Part Cost

Thermopile Array $850.00

Misc. Connectors $13.82

Crystal Oscillator $5.01

Misc. Parts $11.28

Camera Mount and Servos $35.93

Total $916.04

Schematics

Voltage Regulator

Processor Board

Breakout Board

Motor Control Board

Schematics – Voltage Regulator

1

23

J1

PWR2.5

S1

SW-PB

C110 uF

C2100 uF

D5LED

5V OUTPUTVin Vout

GND

VR?

Volt RegR?Res1

R?Res1

C2100 uF

MCLR/VPP/RE318

RA0/AN019

RA1/AN120

RA2/AN2/VREF-/CVREF21

RA3/AN3/VREF+22

RA4/T0CKI/C1OUT/RCV23

RA5/AN4/SS/HLVDIN/C2OUT24

RE0/AN5/CK1SPP 25

RE1/AN6/CK2SPP 26

RE2/AN7/OESPP 27

VDD 28

VSS29

OSC1/CLKI30 OSC2/CLKO/RA631

RC0/T1OSO/T13CKI 32

RC1/T1OSI/CCP2(1)/-UOE 35RC2/CCP1/P1A 36

VUSB 37

RD0/SPP0 38

RD1/SPP1 39

RD2/SPP2 40

RD3/SPP3 41

RC4/D-/VM 42

RC5/D+/VP 43

RC6/TX/CK 44

RC7/RX/DT/SDO 1

RD4/SPP4 2

RD5/SPP5/P1B 3

RD6/SPP6/P1C 4

RD7/SPP7/P1D 5

VSS6

VDD 7

RB0/AN12/INT0/FLT0/SDI/SDA8

RB1/AN10/INT1/SCK/SCL9

RB2/AN8/INT2/VMO10

RB3/AN9/CCP2(1)/VPO11

RB4/AN11/KBI0/CSSPP14

RB5/KBI1/PGM15

RB6/KBI2/PGC16

RB7/KBI3/PGD17

NC/ICCK(2)/ICPGC(2)12

NC/ICDT(2)/ICPGD(2)13

NC/-ICRST(2)/ICVPP(2)33

NC/ICPORTS(2)34

U1

PIC18F4550-E/PT

MCLR/VPP/RE318

RA0/AN019

RA1/AN120

RA2/AN2/VREF-/CVREF21

RA3/AN3/VREF+22

RA4/T0CKI/C1OUT/RCV23

RA5/AN4/SS/HLVDIN/C2OUT24

RE0/AN5/CK1SPP 25

RE1/AN6/CK2SPP 26

RE2/AN7/OESPP 27

VDD 28

VSS29

OSC1/CLKI30 OSC2/CLKO/RA631

RC0/T1OSO/T13CKI 32

RC1/T1OSI/CCP2(1)/-UOE 35RC2/CCP1/P1A 36

VUSB 37

RD0/SPP0 38

RD1/SPP1 39

RD2/SPP2 40

RD3/SPP3 41

RC4/D-/VM 42

RC5/D+/VP 43

RC6/TX/CK 44

RC7/RX/DT/SDO 1

RD4/SPP4 2

RD5/SPP5/P1B 3

RD6/SPP6/P1C 4

RD7/SPP7/P1D 5

VSS6

VDD 7

RB0/AN12/INT0/FLT0/SDI/SDA8

RB1/AN10/INT1/SCK/SCL9

RB2/AN8/INT2/VMO10

RB3/AN9/CCP2(1)/VPO11

RB4/AN11/KBI0/CSSPP14

RB5/KBI1/PGM15

RB6/KBI2/PGC16

RB7/KBI3/PGD17

NC/ICCK(2)/ICPGC(2)12

NC/ICDT(2)/ICPGD(2)13

NC/-ICRST(2)/ICVPP(2)33

NC/ICPORTS(2)34

U2

PIC18F4550-E/PT

1 23 45 67 89 1011 1213 1415 16

P1

Header 8X2

VCC

VCCVCC

C5

Cap

C6

Cap

C1

C2

C3

C4

Schematics - Processor

Schematics – Breakout Board

1 23 45 67 89 1011 1213 1415 16

P1

Header 8X2

123456

P2Header 6

123456

P3Header 6

T2In1

T1In2

R1Out3

R1In4

T1Out5

GND6

Vdc7

(v+)C1+8

GND9

(V-)CS-10 C2+ 11

V- 12

C1- 13

V+ 14

C2+ 15

C2- 16

V- 17

T2Out 18

R2In 19

R2Out 20*

MAX233

VCC

VCCVCC

123456789

P4

Header 9

123456789

P5

Header 9VCC

C?Cap Pol1

Enhancements to Core Design

Smaller design – all surface mount parts

Faster communications with USB 2.0

Off-board Programming header

New motor control PIC processor with better

PWM precision

Benefits of smaller design

Daughter board connection to camera Small casing and camera mount Minimal connections to camera

– Mini USB– Power

Looks cool!

Benefits of Breakout Board

Smaller main PCB

Great debugging tool

Off-board Programming header

Adds serial connector with very little space

Benefits of USB 2.0

Faster frame rate (up to 30 fps, limited by SPI and camera)

Goes around problem of multiuse pin (RX and SPI)

Allows us to bring RS232 out to breakout board

Very small connector to save even more space

If power constraints work, use USB to power entire board

Benefits of the 4331 Motor Control PIC

Better motor control

RS232 not multiplexed with SPI, so more

debug control (manual control)

Don't have to slow down processor, allowing

more speed for processing frames

Better precision and more fine tuned control

Camera Communications

Component Interconnect

Two bus types:1)SPI

-Connects the camera and the two processors

-3 lines: MISO, MOSI, SCK.

2)RS 232

-Using single line: TX

-Only transmitting from one processor to the PC

SPI

3 Line Serial Standard (with enable lines).

– MISO: Master in, Slave out.

– MOSI: Master out, Slave in.

– SCK: SPI clock.

– Individual enable lines for each slave.

SPI communication method:

– Enable slave: Set appropriate enable line high.

– Master: Write to SPI Register (SPI module will load SPI shift register from this buffer)

– SPI module will clock data out and receive data sent by the slave.

Data is clocked into and out of the slave via the SPI clock.

SPI

SPI “Spying”

Reasoning:

– Require same image data on both processors.

– Using the SPI bus twice would waste time.

Method:

– Second PIC is connected to the bus as if it were a master: SDI tied to MISO, SDO tied to MOSI.

– Second PIC enables SPI as a slave: does not generate SCK, uses SS as SPI receive enable.

– Enable is same line as the camera’s data SPI output enable

– When Master requests data from camera it will clock data from the camera which will be output to

the MOSI which is tied to the SDI of both processors. The master generating the clock will receive

the data as it would without the second processor. The Second PIC will have data clocked in as if

it were receiving it from a normal SPI Master.

RS 232

Normally a 2 line serial connection.Normally a 2 line serial connection.

Using only TX, the transmit line.Using only TX, the transmit line.

Options:Options:

115200 baudrate115200 baudrate

No parity bitNo parity bit

8 bit data8 bit data

1 stop bit1 stop bit

Currently using Tera Term to interpret received data.Currently using Tera Term to interpret received data.

Potentially being replaced by USB 2.0 for greater speed.Potentially being replaced by USB 2.0 for greater speed.

Pin Outs

PIC 1 PIC 2

Pin # Connection

2 Fun Little LED

8 ~ARRAY/LM20

9 ~TEST/RUN

15 ADC select

16 DAC select

17 MUX select

23 USB D-

24 USB D+

25 TX

26 SPI Data Out

33 SPI Data In

34 SPI Clock

35 ARRAY_CLK

36 ARRAY_RESET

Pin # Connection

2 ARRAY_RESET

15 PWM

16 PWM

33 SPI Data In

34 SPI Clock

Program Flow

PIC 1: Acting as Master of the SPI bus/ Relaying Image to PC– Initialisation:

Set appropriate control registers for both RS 232 and SPI– Interact with camera:

Reset Thermopile array. Begin loop to access all values on the thermopile array. through SPI, set MUX to appropriate output and read output from ADC. Repeat loop until array has been completely relayed, the issue reset to thermopile and begin again.

– Relay information to PC through RS 232.

PIC 2: “Spy” on SPI bus to acquire image data/ Process image for tracking– Initialisation:

Set appropriate control registers for SPI and PWM.– Spy on SPI bus:

Wait for reset to be sent to thermopile. Indicates beginning of picture. Begin loop to generate running averages of both columns and rows. Read in value from SPI and add it to the appropriate portions of column averages and row averages. Leave loop when all 1024 values have been appropriately processed. Process image via column and row averages to generate targeting information. Change direction of camera as necessary. Wait for reset signal, then begin loop again.

Client Software Outline

Architecture

Block Diagrams

Current Implementation

Client Architecture

Ubuntu Linux– Easy to install, configure, secure

– Up to date packages

Client written in C– Good choice for interaction with Serial/USB, and GTK+

GTK+ 2.8.6 Graphical User Interface Library– Cross-Platform (also supports Windows)

– ~ 2800 functions, from high level convenience functions to low level

routines for fine tuned control

Client Block Diagram

Client Block Diagram

Client Screenshot

Motor Control and Implementation

Parts List:

PIC18F4431 (Specialized For Motor Control)– 14 Bits of accuracy on Duty and Period Registers– Large Prescalers and Postscalers– Comparable to PIC18F4550

2 Hitec-422 Servos HC_HCPL-2730 Optocouplers MAX4426 1.5A MOSFET Drivers

Servo Schematic

NC1

NC8

2

4

7

5

VDD6

GND3

A

B

U?

MAX4427EJA

+Vf11

-Vf12

-Vf23

+Vf24

GND5

Vo26

Vo17

Vcc8

*

HCPL-2730

VCC

PWM1

PWM2

12

Motor Power

Header 2

123

Servo1

Header 3

123

Servo2

Header 3

SP+5SPGND

SP+5

SP+5

SPGND

SP+5SPGND

SP+5SPGND

SPGND

Optocoupler

MOSFET Driver

Servo Headers

Main Power

Servo Power

HiTec HS-422 Servo Constraints

Controlled With PWM signalling

20ms Signal Refresh (50Hz) .9ms to 2.1ms active high position definition range

– Duty Cycle from 4.5% 10%

With PIC18F4550 achieved 5° of precision– Maximum Oscillation freq 500Khz

PIC18F4431 can achieve servo constraints at 40MHz– High Degree of accuracy over 1°

PWM Control Signal

0° 4.5% Duty Cycle @50Hz 180° 10% Duty Cycle @50Hz

Demonstrations, and Questions?